iommu-helpers.h 4.7 KB

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  1. #include <linux/prefetch.h>
  2. /**
  3. * iommu_fill_pdir - Insert coalesced scatter/gather chunks into the I/O Pdir.
  4. * @ioc: The I/O Controller.
  5. * @startsg: The scatter/gather list of coalesced chunks.
  6. * @nents: The number of entries in the scatter/gather list.
  7. * @hint: The DMA Hint.
  8. *
  9. * This function inserts the coalesced scatter/gather list chunks into the
  10. * I/O Controller's I/O Pdir.
  11. */
  12. static inline unsigned int
  13. iommu_fill_pdir(struct ioc *ioc, struct scatterlist *startsg, int nents,
  14. unsigned long hint,
  15. void (*iommu_io_pdir_entry)(u64 *, space_t, unsigned long,
  16. unsigned long))
  17. {
  18. struct scatterlist *dma_sg = startsg; /* pointer to current DMA */
  19. unsigned int n_mappings = 0;
  20. unsigned long dma_offset = 0, dma_len = 0;
  21. u64 *pdirp = NULL;
  22. /* Horrible hack. For efficiency's sake, dma_sg starts one
  23. * entry below the true start (it is immediately incremented
  24. * in the loop) */
  25. dma_sg--;
  26. while (nents-- > 0) {
  27. unsigned long vaddr;
  28. long size;
  29. DBG_RUN_SG(" %d : %08lx/%05x %p/%05x\n", nents,
  30. (unsigned long)sg_dma_address(startsg), cnt,
  31. sg_virt(startsg), startsg->length
  32. );
  33. /*
  34. ** Look for the start of a new DMA stream
  35. */
  36. if (sg_dma_address(startsg) & PIDE_FLAG) {
  37. u32 pide = sg_dma_address(startsg) & ~PIDE_FLAG;
  38. BUG_ON(pdirp && (dma_len != sg_dma_len(dma_sg)));
  39. dma_sg++;
  40. dma_len = sg_dma_len(startsg);
  41. sg_dma_len(startsg) = 0;
  42. dma_offset = (unsigned long) pide & ~IOVP_MASK;
  43. n_mappings++;
  44. #if defined(ZX1_SUPPORT)
  45. /* Pluto IOMMU IO Virt Address is not zero based */
  46. sg_dma_address(dma_sg) = pide | ioc->ibase;
  47. #else
  48. /* SBA, ccio, and dino are zero based.
  49. * Trying to save a few CPU cycles for most users.
  50. */
  51. sg_dma_address(dma_sg) = pide;
  52. #endif
  53. pdirp = &(ioc->pdir_base[pide >> IOVP_SHIFT]);
  54. prefetchw(pdirp);
  55. }
  56. BUG_ON(pdirp == NULL);
  57. vaddr = (unsigned long)sg_virt(startsg);
  58. sg_dma_len(dma_sg) += startsg->length;
  59. size = startsg->length + dma_offset;
  60. dma_offset = 0;
  61. #ifdef IOMMU_MAP_STATS
  62. ioc->msg_pages += startsg->length >> IOVP_SHIFT;
  63. #endif
  64. do {
  65. iommu_io_pdir_entry(pdirp, KERNEL_SPACE,
  66. vaddr, hint);
  67. vaddr += IOVP_SIZE;
  68. size -= IOVP_SIZE;
  69. pdirp++;
  70. } while(unlikely(size > 0));
  71. startsg++;
  72. }
  73. return(n_mappings);
  74. }
  75. /*
  76. ** First pass is to walk the SG list and determine where the breaks are
  77. ** in the DMA stream. Allocates PDIR entries but does not fill them.
  78. ** Returns the number of DMA chunks.
  79. **
  80. ** Doing the fill separate from the coalescing/allocation keeps the
  81. ** code simpler. Future enhancement could make one pass through
  82. ** the sglist do both.
  83. */
  84. static inline unsigned int
  85. iommu_coalesce_chunks(struct ioc *ioc, struct device *dev,
  86. struct scatterlist *startsg, int nents,
  87. int (*iommu_alloc_range)(struct ioc *, struct device *, size_t))
  88. {
  89. struct scatterlist *contig_sg; /* contig chunk head */
  90. unsigned long dma_offset, dma_len; /* start/len of DMA stream */
  91. unsigned int n_mappings = 0;
  92. unsigned int max_seg_size = min(dma_get_max_seg_size(dev),
  93. (unsigned)DMA_CHUNK_SIZE);
  94. unsigned int max_seg_boundary = dma_get_seg_boundary(dev) + 1;
  95. if (max_seg_boundary) /* check if the addition above didn't overflow */
  96. max_seg_size = min(max_seg_size, max_seg_boundary);
  97. while (nents > 0) {
  98. /*
  99. ** Prepare for first/next DMA stream
  100. */
  101. contig_sg = startsg;
  102. dma_len = startsg->length;
  103. dma_offset = startsg->offset;
  104. /* PARANOID: clear entries */
  105. sg_dma_address(startsg) = 0;
  106. sg_dma_len(startsg) = 0;
  107. /*
  108. ** This loop terminates one iteration "early" since
  109. ** it's always looking one "ahead".
  110. */
  111. while(--nents > 0) {
  112. unsigned long prev_end, sg_start;
  113. prev_end = (unsigned long)sg_virt(startsg) +
  114. startsg->length;
  115. startsg++;
  116. sg_start = (unsigned long)sg_virt(startsg);
  117. /* PARANOID: clear entries */
  118. sg_dma_address(startsg) = 0;
  119. sg_dma_len(startsg) = 0;
  120. /*
  121. ** First make sure current dma stream won't
  122. ** exceed max_seg_size if we coalesce the
  123. ** next entry.
  124. */
  125. if (unlikely(ALIGN(dma_len + dma_offset + startsg->length, IOVP_SIZE) >
  126. max_seg_size))
  127. break;
  128. /*
  129. * Next see if we can append the next chunk (i.e.
  130. * it must end on one page and begin on another, or
  131. * it must start on the same address as the previous
  132. * entry ended.
  133. */
  134. if (unlikely((prev_end != sg_start) ||
  135. ((prev_end | sg_start) & ~PAGE_MASK)))
  136. break;
  137. dma_len += startsg->length;
  138. }
  139. /*
  140. ** End of DMA Stream
  141. ** Terminate last VCONTIG block.
  142. ** Allocate space for DMA stream.
  143. */
  144. sg_dma_len(contig_sg) = dma_len;
  145. dma_len = ALIGN(dma_len + dma_offset, IOVP_SIZE);
  146. sg_dma_address(contig_sg) =
  147. PIDE_FLAG
  148. | (iommu_alloc_range(ioc, dev, dma_len) << IOVP_SHIFT)
  149. | dma_offset;
  150. n_mappings++;
  151. }
  152. return n_mappings;
  153. }