cpcihp_zt5550.c 8.4 KB

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  1. /*
  2. * cpcihp_zt5550.c
  3. *
  4. * Intel/Ziatech ZT5550 CompactPCI Host Controller driver
  5. *
  6. * Copyright 2002 SOMA Networks, Inc.
  7. * Copyright 2001 Intel San Luis Obispo
  8. * Copyright 2000,2001 MontaVista Software Inc.
  9. *
  10. * This program is free software; you can redistribute it and/or modify it
  11. * under the terms of the GNU General Public License as published by the
  12. * Free Software Foundation; either version 2 of the License, or (at your
  13. * option) any later version.
  14. *
  15. * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
  16. * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
  17. * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
  18. * THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
  19. * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
  20. * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
  21. * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
  22. * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
  23. * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  24. * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  25. *
  26. * You should have received a copy of the GNU General Public License along
  27. * with this program; if not, write to the Free Software Foundation, Inc.,
  28. * 675 Mass Ave, Cambridge, MA 02139, USA.
  29. *
  30. * Send feedback to <scottm@somanetworks.com>
  31. */
  32. #include <linux/module.h>
  33. #include <linux/moduleparam.h>
  34. #include <linux/init.h>
  35. #include <linux/errno.h>
  36. #include <linux/pci.h>
  37. #include <linux/interrupt.h>
  38. #include <linux/signal.h> /* IRQF_SHARED */
  39. #include "cpci_hotplug.h"
  40. #include "cpcihp_zt5550.h"
  41. #define DRIVER_VERSION "0.2"
  42. #define DRIVER_AUTHOR "Scott Murray <scottm@somanetworks.com>"
  43. #define DRIVER_DESC "ZT5550 CompactPCI Hot Plug Driver"
  44. #define MY_NAME "cpcihp_zt5550"
  45. #define dbg(format, arg...) \
  46. do { \
  47. if (debug) \
  48. printk (KERN_DEBUG "%s: " format "\n", \
  49. MY_NAME , ## arg); \
  50. } while (0)
  51. #define err(format, arg...) printk(KERN_ERR "%s: " format "\n", MY_NAME , ## arg)
  52. #define info(format, arg...) printk(KERN_INFO "%s: " format "\n", MY_NAME , ## arg)
  53. #define warn(format, arg...) printk(KERN_WARNING "%s: " format "\n", MY_NAME , ## arg)
  54. /* local variables */
  55. static bool debug;
  56. static bool poll;
  57. static struct cpci_hp_controller_ops zt5550_hpc_ops;
  58. static struct cpci_hp_controller zt5550_hpc;
  59. /* Primary cPCI bus bridge device */
  60. static struct pci_dev *bus0_dev;
  61. static struct pci_bus *bus0;
  62. /* Host controller device */
  63. static struct pci_dev *hc_dev;
  64. /* Host controller register addresses */
  65. static void __iomem *hc_registers;
  66. static void __iomem *csr_hc_index;
  67. static void __iomem *csr_hc_data;
  68. static void __iomem *csr_int_status;
  69. static void __iomem *csr_int_mask;
  70. static int zt5550_hc_config(struct pci_dev *pdev)
  71. {
  72. int ret;
  73. /* Since we know that no boards exist with two HC chips, treat it as an error */
  74. if (hc_dev) {
  75. err("too many host controller devices?");
  76. return -EBUSY;
  77. }
  78. ret = pci_enable_device(pdev);
  79. if (ret) {
  80. err("cannot enable %s\n", pci_name(pdev));
  81. return ret;
  82. }
  83. hc_dev = pdev;
  84. dbg("hc_dev = %p", hc_dev);
  85. dbg("pci resource start %llx", (unsigned long long)pci_resource_start(hc_dev, 1));
  86. dbg("pci resource len %llx", (unsigned long long)pci_resource_len(hc_dev, 1));
  87. if (!request_mem_region(pci_resource_start(hc_dev, 1),
  88. pci_resource_len(hc_dev, 1), MY_NAME)) {
  89. err("cannot reserve MMIO region");
  90. ret = -ENOMEM;
  91. goto exit_disable_device;
  92. }
  93. hc_registers =
  94. ioremap(pci_resource_start(hc_dev, 1), pci_resource_len(hc_dev, 1));
  95. if (!hc_registers) {
  96. err("cannot remap MMIO region %llx @ %llx",
  97. (unsigned long long)pci_resource_len(hc_dev, 1),
  98. (unsigned long long)pci_resource_start(hc_dev, 1));
  99. ret = -ENODEV;
  100. goto exit_release_region;
  101. }
  102. csr_hc_index = hc_registers + CSR_HCINDEX;
  103. csr_hc_data = hc_registers + CSR_HCDATA;
  104. csr_int_status = hc_registers + CSR_INTSTAT;
  105. csr_int_mask = hc_registers + CSR_INTMASK;
  106. /*
  107. * Disable host control, fault and serial interrupts
  108. */
  109. dbg("disabling host control, fault and serial interrupts");
  110. writeb((u8) HC_INT_MASK_REG, csr_hc_index);
  111. writeb((u8) ALL_INDEXED_INTS_MASK, csr_hc_data);
  112. dbg("disabled host control, fault and serial interrupts");
  113. /*
  114. * Disable timer0, timer1 and ENUM interrupts
  115. */
  116. dbg("disabling timer0, timer1 and ENUM interrupts");
  117. writeb((u8) ALL_DIRECT_INTS_MASK, csr_int_mask);
  118. dbg("disabled timer0, timer1 and ENUM interrupts");
  119. return 0;
  120. exit_release_region:
  121. release_mem_region(pci_resource_start(hc_dev, 1),
  122. pci_resource_len(hc_dev, 1));
  123. exit_disable_device:
  124. pci_disable_device(hc_dev);
  125. return ret;
  126. }
  127. static int zt5550_hc_cleanup(void)
  128. {
  129. if (!hc_dev)
  130. return -ENODEV;
  131. iounmap(hc_registers);
  132. release_mem_region(pci_resource_start(hc_dev, 1),
  133. pci_resource_len(hc_dev, 1));
  134. pci_disable_device(hc_dev);
  135. return 0;
  136. }
  137. static int zt5550_hc_query_enum(void)
  138. {
  139. u8 value;
  140. value = inb_p(ENUM_PORT);
  141. return ((value & ENUM_MASK) == ENUM_MASK);
  142. }
  143. static int zt5550_hc_check_irq(void *dev_id)
  144. {
  145. int ret;
  146. u8 reg;
  147. ret = 0;
  148. if (dev_id == zt5550_hpc.dev_id) {
  149. reg = readb(csr_int_status);
  150. if (reg)
  151. ret = 1;
  152. }
  153. return ret;
  154. }
  155. static int zt5550_hc_enable_irq(void)
  156. {
  157. u8 reg;
  158. if (hc_dev == NULL)
  159. return -ENODEV;
  160. reg = readb(csr_int_mask);
  161. reg = reg & ~ENUM_INT_MASK;
  162. writeb(reg, csr_int_mask);
  163. return 0;
  164. }
  165. static int zt5550_hc_disable_irq(void)
  166. {
  167. u8 reg;
  168. if (hc_dev == NULL)
  169. return -ENODEV;
  170. reg = readb(csr_int_mask);
  171. reg = reg | ENUM_INT_MASK;
  172. writeb(reg, csr_int_mask);
  173. return 0;
  174. }
  175. static int zt5550_hc_init_one (struct pci_dev *pdev, const struct pci_device_id *ent)
  176. {
  177. int status;
  178. status = zt5550_hc_config(pdev);
  179. if (status != 0)
  180. return status;
  181. dbg("returned from zt5550_hc_config");
  182. memset(&zt5550_hpc, 0, sizeof (struct cpci_hp_controller));
  183. zt5550_hpc_ops.query_enum = zt5550_hc_query_enum;
  184. zt5550_hpc.ops = &zt5550_hpc_ops;
  185. if (!poll) {
  186. zt5550_hpc.irq = hc_dev->irq;
  187. zt5550_hpc.irq_flags = IRQF_SHARED;
  188. zt5550_hpc.dev_id = hc_dev;
  189. zt5550_hpc_ops.enable_irq = zt5550_hc_enable_irq;
  190. zt5550_hpc_ops.disable_irq = zt5550_hc_disable_irq;
  191. zt5550_hpc_ops.check_irq = zt5550_hc_check_irq;
  192. } else {
  193. info("using ENUM# polling mode");
  194. }
  195. status = cpci_hp_register_controller(&zt5550_hpc);
  196. if (status != 0) {
  197. err("could not register cPCI hotplug controller");
  198. goto init_hc_error;
  199. }
  200. dbg("registered controller");
  201. /* Look for first device matching cPCI bus's bridge vendor and device IDs */
  202. bus0_dev = pci_get_device(PCI_VENDOR_ID_DEC,
  203. PCI_DEVICE_ID_DEC_21154, NULL);
  204. if (!bus0_dev) {
  205. status = -ENODEV;
  206. goto init_register_error;
  207. }
  208. bus0 = bus0_dev->subordinate;
  209. pci_dev_put(bus0_dev);
  210. status = cpci_hp_register_bus(bus0, 0x0a, 0x0f);
  211. if (status != 0) {
  212. err("could not register cPCI hotplug bus");
  213. goto init_register_error;
  214. }
  215. dbg("registered bus");
  216. status = cpci_hp_start();
  217. if (status != 0) {
  218. err("could not started cPCI hotplug system");
  219. cpci_hp_unregister_bus(bus0);
  220. goto init_register_error;
  221. }
  222. dbg("started cpci hp system");
  223. return 0;
  224. init_register_error:
  225. cpci_hp_unregister_controller(&zt5550_hpc);
  226. init_hc_error:
  227. err("status = %d", status);
  228. zt5550_hc_cleanup();
  229. return status;
  230. }
  231. static void zt5550_hc_remove_one(struct pci_dev *pdev)
  232. {
  233. cpci_hp_stop();
  234. cpci_hp_unregister_bus(bus0);
  235. cpci_hp_unregister_controller(&zt5550_hpc);
  236. zt5550_hc_cleanup();
  237. }
  238. static struct pci_device_id zt5550_hc_pci_tbl[] = {
  239. { PCI_VENDOR_ID_ZIATECH, PCI_DEVICE_ID_ZIATECH_5550_HC, PCI_ANY_ID, PCI_ANY_ID, },
  240. { 0, }
  241. };
  242. MODULE_DEVICE_TABLE(pci, zt5550_hc_pci_tbl);
  243. static struct pci_driver zt5550_hc_driver = {
  244. .name = "zt5550_hc",
  245. .id_table = zt5550_hc_pci_tbl,
  246. .probe = zt5550_hc_init_one,
  247. .remove = zt5550_hc_remove_one,
  248. };
  249. static int __init zt5550_init(void)
  250. {
  251. struct resource *r;
  252. int rc;
  253. info(DRIVER_DESC " version: " DRIVER_VERSION);
  254. r = request_region(ENUM_PORT, 1, "#ENUM hotswap signal register");
  255. if (!r)
  256. return -EBUSY;
  257. rc = pci_register_driver(&zt5550_hc_driver);
  258. if (rc < 0)
  259. release_region(ENUM_PORT, 1);
  260. return rc;
  261. }
  262. static void __exit
  263. zt5550_exit(void)
  264. {
  265. pci_unregister_driver(&zt5550_hc_driver);
  266. release_region(ENUM_PORT, 1);
  267. }
  268. module_init(zt5550_init);
  269. module_exit(zt5550_exit);
  270. MODULE_AUTHOR(DRIVER_AUTHOR);
  271. MODULE_DESCRIPTION(DRIVER_DESC);
  272. MODULE_LICENSE("GPL");
  273. module_param(debug, bool, 0644);
  274. MODULE_PARM_DESC(debug, "Debugging mode enabled or not");
  275. module_param(poll, bool, 0644);
  276. MODULE_PARM_DESC(poll, "#ENUM polling mode enabled or not");