phy-rockchip-usb.c 4.2 KB

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  1. /*
  2. * Rockchip usb PHY driver
  3. *
  4. * Copyright (C) 2014 Yunzhi Li <lyz@rock-chips.com>
  5. * Copyright (C) 2014 ROCKCHIP, Inc.
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License as published by
  9. * the Free Software Foundation; either version 2 of the License.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. */
  16. #include <linux/clk.h>
  17. #include <linux/io.h>
  18. #include <linux/kernel.h>
  19. #include <linux/module.h>
  20. #include <linux/mutex.h>
  21. #include <linux/of.h>
  22. #include <linux/of_address.h>
  23. #include <linux/phy/phy.h>
  24. #include <linux/platform_device.h>
  25. #include <linux/regulator/consumer.h>
  26. #include <linux/reset.h>
  27. #include <linux/regmap.h>
  28. #include <linux/mfd/syscon.h>
  29. /*
  30. * The higher 16-bit of this register is used for write protection
  31. * only if BIT(13 + 16) set to 1 the BIT(13) can be written.
  32. */
  33. #define SIDDQ_WRITE_ENA BIT(29)
  34. #define SIDDQ_ON BIT(13)
  35. #define SIDDQ_OFF (0 << 13)
  36. struct rockchip_usb_phy {
  37. unsigned int reg_offset;
  38. struct regmap *reg_base;
  39. struct clk *clk;
  40. struct phy *phy;
  41. };
  42. static int rockchip_usb_phy_power(struct rockchip_usb_phy *phy,
  43. bool siddq)
  44. {
  45. return regmap_write(phy->reg_base, phy->reg_offset,
  46. SIDDQ_WRITE_ENA | (siddq ? SIDDQ_ON : SIDDQ_OFF));
  47. }
  48. static int rockchip_usb_phy_power_off(struct phy *_phy)
  49. {
  50. struct rockchip_usb_phy *phy = phy_get_drvdata(_phy);
  51. int ret = 0;
  52. /* Power down usb phy analog blocks by set siddq 1 */
  53. ret = rockchip_usb_phy_power(phy, 1);
  54. if (ret)
  55. return ret;
  56. clk_disable_unprepare(phy->clk);
  57. return 0;
  58. }
  59. static int rockchip_usb_phy_power_on(struct phy *_phy)
  60. {
  61. struct rockchip_usb_phy *phy = phy_get_drvdata(_phy);
  62. int ret = 0;
  63. ret = clk_prepare_enable(phy->clk);
  64. if (ret)
  65. return ret;
  66. /* Power up usb phy analog blocks by set siddq 0 */
  67. ret = rockchip_usb_phy_power(phy, 0);
  68. if (ret) {
  69. clk_disable_unprepare(phy->clk);
  70. return ret;
  71. }
  72. return 0;
  73. }
  74. static const struct phy_ops ops = {
  75. .power_on = rockchip_usb_phy_power_on,
  76. .power_off = rockchip_usb_phy_power_off,
  77. .owner = THIS_MODULE,
  78. };
  79. static int rockchip_usb_phy_probe(struct platform_device *pdev)
  80. {
  81. struct device *dev = &pdev->dev;
  82. struct rockchip_usb_phy *rk_phy;
  83. struct phy_provider *phy_provider;
  84. struct device_node *child;
  85. struct regmap *grf;
  86. unsigned int reg_offset;
  87. int err;
  88. grf = syscon_regmap_lookup_by_phandle(dev->of_node, "rockchip,grf");
  89. if (IS_ERR(grf)) {
  90. dev_err(&pdev->dev, "Missing rockchip,grf property\n");
  91. return PTR_ERR(grf);
  92. }
  93. for_each_available_child_of_node(dev->of_node, child) {
  94. rk_phy = devm_kzalloc(dev, sizeof(*rk_phy), GFP_KERNEL);
  95. if (!rk_phy) {
  96. err = -ENOMEM;
  97. goto put_child;
  98. }
  99. if (of_property_read_u32(child, "reg", &reg_offset)) {
  100. dev_err(dev, "missing reg property in node %s\n",
  101. child->name);
  102. err = -EINVAL;
  103. goto put_child;
  104. }
  105. rk_phy->reg_offset = reg_offset;
  106. rk_phy->reg_base = grf;
  107. rk_phy->clk = of_clk_get_by_name(child, "phyclk");
  108. if (IS_ERR(rk_phy->clk))
  109. rk_phy->clk = NULL;
  110. rk_phy->phy = devm_phy_create(dev, child, &ops);
  111. if (IS_ERR(rk_phy->phy)) {
  112. dev_err(dev, "failed to create PHY\n");
  113. err = PTR_ERR(rk_phy->phy);
  114. goto put_child;
  115. }
  116. phy_set_drvdata(rk_phy->phy, rk_phy);
  117. /* only power up usb phy when it use, so disable it when init*/
  118. err = rockchip_usb_phy_power(rk_phy, 1);
  119. if (err)
  120. goto put_child;
  121. }
  122. phy_provider = devm_of_phy_provider_register(dev, of_phy_simple_xlate);
  123. return PTR_ERR_OR_ZERO(phy_provider);
  124. put_child:
  125. of_node_put(child);
  126. return err;
  127. }
  128. static const struct of_device_id rockchip_usb_phy_dt_ids[] = {
  129. { .compatible = "rockchip,rk3288-usb-phy" },
  130. {}
  131. };
  132. MODULE_DEVICE_TABLE(of, rockchip_usb_phy_dt_ids);
  133. static struct platform_driver rockchip_usb_driver = {
  134. .probe = rockchip_usb_phy_probe,
  135. .driver = {
  136. .name = "rockchip-usb-phy",
  137. .of_match_table = rockchip_usb_phy_dt_ids,
  138. },
  139. };
  140. module_platform_driver(rockchip_usb_driver);
  141. MODULE_AUTHOR("Yunzhi Li <lyz@rock-chips.com>");
  142. MODULE_DESCRIPTION("Rockchip USB 2.0 PHY driver");
  143. MODULE_LICENSE("GPL v2");