pinctrl-ab9540.c 22 KB

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  1. /*
  2. * Copyright (C) ST-Ericsson SA 2012
  3. *
  4. * Author: Patrice Chotard <patrice.chotard@stericsson.com> for ST-Ericsson.
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License version 2 as
  8. * published by the Free Software Foundation.
  9. */
  10. #include <linux/kernel.h>
  11. #include <linux/gpio.h>
  12. #include <linux/pinctrl/pinctrl.h>
  13. #include <linux/mfd/abx500/ab8500.h>
  14. #include "pinctrl-abx500.h"
  15. /* All the pins that can be used for GPIO and some other functions */
  16. #define ABX500_GPIO(offset) (offset)
  17. #define AB9540_PIN_R4 ABX500_GPIO(1)
  18. #define AB9540_PIN_V3 ABX500_GPIO(2)
  19. #define AB9540_PIN_T4 ABX500_GPIO(3)
  20. #define AB9540_PIN_T5 ABX500_GPIO(4)
  21. /* hole */
  22. #define AB9540_PIN_B18 ABX500_GPIO(10)
  23. #define AB9540_PIN_C18 ABX500_GPIO(11)
  24. /* hole */
  25. #define AB9540_PIN_D18 ABX500_GPIO(13)
  26. #define AB9540_PIN_B19 ABX500_GPIO(14)
  27. #define AB9540_PIN_C19 ABX500_GPIO(15)
  28. #define AB9540_PIN_D19 ABX500_GPIO(16)
  29. #define AB9540_PIN_R3 ABX500_GPIO(17)
  30. #define AB9540_PIN_T2 ABX500_GPIO(18)
  31. #define AB9540_PIN_U2 ABX500_GPIO(19)
  32. #define AB9540_PIN_V2 ABX500_GPIO(20)
  33. #define AB9540_PIN_N17 ABX500_GPIO(21)
  34. #define AB9540_PIN_N16 ABX500_GPIO(22)
  35. #define AB9540_PIN_M19 ABX500_GPIO(23)
  36. #define AB9540_PIN_T3 ABX500_GPIO(24)
  37. #define AB9540_PIN_W2 ABX500_GPIO(25)
  38. /* hole */
  39. #define AB9540_PIN_H4 ABX500_GPIO(27)
  40. #define AB9540_PIN_F1 ABX500_GPIO(28)
  41. #define AB9540_PIN_F4 ABX500_GPIO(29)
  42. #define AB9540_PIN_F2 ABX500_GPIO(30)
  43. #define AB9540_PIN_E4 ABX500_GPIO(31)
  44. #define AB9540_PIN_F3 ABX500_GPIO(32)
  45. /* hole */
  46. #define AB9540_PIN_J13 ABX500_GPIO(34)
  47. /* hole */
  48. #define AB9540_PIN_L17 ABX500_GPIO(40)
  49. #define AB9540_PIN_L16 ABX500_GPIO(41)
  50. #define AB9540_PIN_W3 ABX500_GPIO(42)
  51. #define AB9540_PIN_N4 ABX500_GPIO(50)
  52. #define AB9540_PIN_G12 ABX500_GPIO(51)
  53. #define AB9540_PIN_E17 ABX500_GPIO(52)
  54. #define AB9540_PIN_D11 ABX500_GPIO(53)
  55. #define AB9540_PIN_M18 ABX500_GPIO(54)
  56. /* indicates the highest GPIO number */
  57. #define AB9540_GPIO_MAX_NUMBER 54
  58. /*
  59. * The names of the pins are denoted by GPIO number and ball name, even
  60. * though they can be used for other things than GPIO, this is the first
  61. * column in the table of the data sheet and often used on schematics and
  62. * such.
  63. */
  64. static const struct pinctrl_pin_desc ab9540_pins[] = {
  65. PINCTRL_PIN(AB9540_PIN_R4, "GPIO1_R4"),
  66. PINCTRL_PIN(AB9540_PIN_V3, "GPIO2_V3"),
  67. PINCTRL_PIN(AB9540_PIN_T4, "GPIO3_T4"),
  68. PINCTRL_PIN(AB9540_PIN_T5, "GPIO4_T5"),
  69. /* hole */
  70. PINCTRL_PIN(AB9540_PIN_B18, "GPIO10_B18"),
  71. PINCTRL_PIN(AB9540_PIN_C18, "GPIO11_C18"),
  72. /* hole */
  73. PINCTRL_PIN(AB9540_PIN_D18, "GPIO13_D18"),
  74. PINCTRL_PIN(AB9540_PIN_B19, "GPIO14_B19"),
  75. PINCTRL_PIN(AB9540_PIN_C19, "GPIO15_C19"),
  76. PINCTRL_PIN(AB9540_PIN_D19, "GPIO16_D19"),
  77. PINCTRL_PIN(AB9540_PIN_R3, "GPIO17_R3"),
  78. PINCTRL_PIN(AB9540_PIN_T2, "GPIO18_T2"),
  79. PINCTRL_PIN(AB9540_PIN_U2, "GPIO19_U2"),
  80. PINCTRL_PIN(AB9540_PIN_V2, "GPIO20_V2"),
  81. PINCTRL_PIN(AB9540_PIN_N17, "GPIO21_N17"),
  82. PINCTRL_PIN(AB9540_PIN_N16, "GPIO22_N16"),
  83. PINCTRL_PIN(AB9540_PIN_M19, "GPIO23_M19"),
  84. PINCTRL_PIN(AB9540_PIN_T3, "GPIO24_T3"),
  85. PINCTRL_PIN(AB9540_PIN_W2, "GPIO25_W2"),
  86. /* hole */
  87. PINCTRL_PIN(AB9540_PIN_H4, "GPIO27_H4"),
  88. PINCTRL_PIN(AB9540_PIN_F1, "GPIO28_F1"),
  89. PINCTRL_PIN(AB9540_PIN_F4, "GPIO29_F4"),
  90. PINCTRL_PIN(AB9540_PIN_F2, "GPIO30_F2"),
  91. PINCTRL_PIN(AB9540_PIN_E4, "GPIO31_E4"),
  92. PINCTRL_PIN(AB9540_PIN_F3, "GPIO32_F3"),
  93. /* hole */
  94. PINCTRL_PIN(AB9540_PIN_J13, "GPIO34_J13"),
  95. /* hole */
  96. PINCTRL_PIN(AB9540_PIN_L17, "GPIO40_L17"),
  97. PINCTRL_PIN(AB9540_PIN_L16, "GPIO41_L16"),
  98. PINCTRL_PIN(AB9540_PIN_W3, "GPIO42_W3"),
  99. PINCTRL_PIN(AB9540_PIN_N4, "GPIO50_N4"),
  100. PINCTRL_PIN(AB9540_PIN_G12, "GPIO51_G12"),
  101. PINCTRL_PIN(AB9540_PIN_E17, "GPIO52_E17"),
  102. PINCTRL_PIN(AB9540_PIN_D11, "GPIO53_D11"),
  103. PINCTRL_PIN(AB9540_PIN_M18, "GPIO60_M18"),
  104. };
  105. /*
  106. * Maps local GPIO offsets to local pin numbers
  107. */
  108. static const struct abx500_pinrange ab9540_pinranges[] = {
  109. ABX500_PINRANGE(1, 4, ABX500_ALT_A),
  110. ABX500_PINRANGE(10, 2, ABX500_DEFAULT),
  111. ABX500_PINRANGE(13, 1, ABX500_DEFAULT),
  112. ABX500_PINRANGE(14, 12, ABX500_ALT_A),
  113. ABX500_PINRANGE(27, 6, ABX500_ALT_A),
  114. ABX500_PINRANGE(34, 1, ABX500_ALT_A),
  115. ABX500_PINRANGE(40, 3, ABX500_ALT_A),
  116. ABX500_PINRANGE(50, 1, ABX500_DEFAULT),
  117. ABX500_PINRANGE(51, 3, ABX500_ALT_A),
  118. ABX500_PINRANGE(54, 1, ABX500_DEFAULT),
  119. };
  120. /*
  121. * Read the pin group names like this:
  122. * sysclkreq2_d_1 = first groups of pins for sysclkreq2 on default function
  123. *
  124. * The groups are arranged as sets per altfunction column, so we can
  125. * mux in one group at a time by selecting the same altfunction for them
  126. * all. When functions require pins on different altfunctions, you need
  127. * to combine several groups.
  128. */
  129. /* default column */
  130. static const unsigned sysclkreq2_d_1_pins[] = { AB9540_PIN_R4 };
  131. static const unsigned sysclkreq3_d_1_pins[] = { AB9540_PIN_V3 };
  132. static const unsigned sysclkreq4_d_1_pins[] = { AB9540_PIN_T4 };
  133. static const unsigned sysclkreq6_d_1_pins[] = { AB9540_PIN_T5 };
  134. static const unsigned gpio10_d_1_pins[] = { AB9540_PIN_B18 };
  135. static const unsigned gpio11_d_1_pins[] = { AB9540_PIN_C18 };
  136. static const unsigned gpio13_d_1_pins[] = { AB9540_PIN_D18 };
  137. static const unsigned pwmout1_d_1_pins[] = { AB9540_PIN_B19 };
  138. static const unsigned pwmout2_d_1_pins[] = { AB9540_PIN_C19 };
  139. static const unsigned pwmout3_d_1_pins[] = { AB9540_PIN_D19 };
  140. /* audio data interface 1*/
  141. static const unsigned adi1_d_1_pins[] = { AB9540_PIN_R3, AB9540_PIN_T2,
  142. AB9540_PIN_U2, AB9540_PIN_V2 };
  143. /* USBUICC */
  144. static const unsigned usbuicc_d_1_pins[] = { AB9540_PIN_N17, AB9540_PIN_N16,
  145. AB9540_PIN_M19 };
  146. static const unsigned sysclkreq7_d_1_pins[] = { AB9540_PIN_T3 };
  147. static const unsigned sysclkreq8_d_1_pins[] = { AB9540_PIN_W2 };
  148. /* Digital microphone 1 and 2 */
  149. static const unsigned dmic12_d_1_pins[] = { AB9540_PIN_H4, AB9540_PIN_F1 };
  150. /* Digital microphone 3 and 4 */
  151. static const unsigned dmic34_d_1_pins[] = { AB9540_PIN_F4, AB9540_PIN_F2 };
  152. /* Digital microphone 5 and 6 */
  153. static const unsigned dmic56_d_1_pins[] = { AB9540_PIN_E4, AB9540_PIN_F3 };
  154. static const unsigned extcpena_d_1_pins[] = { AB9540_PIN_J13 };
  155. /* modem SDA/SCL */
  156. static const unsigned modsclsda_d_1_pins[] = { AB9540_PIN_L17, AB9540_PIN_L16 };
  157. static const unsigned sysclkreq5_d_1_pins[] = { AB9540_PIN_W3 };
  158. static const unsigned gpio50_d_1_pins[] = { AB9540_PIN_N4 };
  159. static const unsigned batremn_d_1_pins[] = { AB9540_PIN_G12 };
  160. static const unsigned resethw_d_1_pins[] = { AB9540_PIN_E17 };
  161. static const unsigned service_d_1_pins[] = { AB9540_PIN_D11 };
  162. static const unsigned gpio60_d_1_pins[] = { AB9540_PIN_M18 };
  163. /* Altfunction A column */
  164. static const unsigned gpio1_a_1_pins[] = { AB9540_PIN_R4 };
  165. static const unsigned gpio2_a_1_pins[] = { AB9540_PIN_V3 };
  166. static const unsigned gpio3_a_1_pins[] = { AB9540_PIN_T4 };
  167. static const unsigned gpio4_a_1_pins[] = { AB9540_PIN_T5 };
  168. static const unsigned hiqclkena_a_1_pins[] = { AB9540_PIN_B18 };
  169. static const unsigned pdmclk_a_1_pins[] = { AB9540_PIN_C18 };
  170. static const unsigned uartdata_a_1_pins[] = { AB9540_PIN_D18, AB9540_PIN_N4 };
  171. static const unsigned gpio14_a_1_pins[] = { AB9540_PIN_B19 };
  172. static const unsigned gpio15_a_1_pins[] = { AB9540_PIN_C19 };
  173. static const unsigned gpio16_a_1_pins[] = { AB9540_PIN_D19 };
  174. static const unsigned gpio17_a_1_pins[] = { AB9540_PIN_R3 };
  175. static const unsigned gpio18_a_1_pins[] = { AB9540_PIN_T2 };
  176. static const unsigned gpio19_a_1_pins[] = { AB9540_PIN_U2 };
  177. static const unsigned gpio20_a_1_pins[] = { AB9540_PIN_V2 };
  178. static const unsigned gpio21_a_1_pins[] = { AB9540_PIN_N17 };
  179. static const unsigned gpio22_a_1_pins[] = { AB9540_PIN_N16 };
  180. static const unsigned gpio23_a_1_pins[] = { AB9540_PIN_M19 };
  181. static const unsigned gpio24_a_1_pins[] = { AB9540_PIN_T3 };
  182. static const unsigned gpio25_a_1_pins[] = { AB9540_PIN_W2 };
  183. static const unsigned gpio27_a_1_pins[] = { AB9540_PIN_H4 };
  184. static const unsigned gpio28_a_1_pins[] = { AB9540_PIN_F1 };
  185. static const unsigned gpio29_a_1_pins[] = { AB9540_PIN_F4 };
  186. static const unsigned gpio30_a_1_pins[] = { AB9540_PIN_F2 };
  187. static const unsigned gpio31_a_1_pins[] = { AB9540_PIN_E4 };
  188. static const unsigned gpio32_a_1_pins[] = { AB9540_PIN_F3 };
  189. static const unsigned gpio34_a_1_pins[] = { AB9540_PIN_J13 };
  190. static const unsigned gpio40_a_1_pins[] = { AB9540_PIN_L17 };
  191. static const unsigned gpio41_a_1_pins[] = { AB9540_PIN_L16 };
  192. static const unsigned gpio42_a_1_pins[] = { AB9540_PIN_W3 };
  193. static const unsigned gpio51_a_1_pins[] = { AB9540_PIN_G12 };
  194. static const unsigned gpio52_a_1_pins[] = { AB9540_PIN_E17 };
  195. static const unsigned gpio53_a_1_pins[] = { AB9540_PIN_D11 };
  196. static const unsigned usbuiccpd_a_1_pins[] = { AB9540_PIN_M18 };
  197. /* Altfunction B colum */
  198. static const unsigned pdmdata_b_1_pins[] = { AB9540_PIN_B18 };
  199. static const unsigned pwmextvibra1_b_1_pins[] = { AB9540_PIN_D18 };
  200. static const unsigned pwmextvibra2_b_1_pins[] = { AB9540_PIN_N4 };
  201. /* Altfunction C column */
  202. static const unsigned usbvdat_c_1_pins[] = { AB9540_PIN_D18 };
  203. #define AB9540_PIN_GROUP(a, b) { .name = #a, .pins = a##_pins, \
  204. .npins = ARRAY_SIZE(a##_pins), .altsetting = b }
  205. static const struct abx500_pingroup ab9540_groups[] = {
  206. /* default column */
  207. AB9540_PIN_GROUP(sysclkreq2_d_1, ABX500_DEFAULT),
  208. AB9540_PIN_GROUP(sysclkreq3_d_1, ABX500_DEFAULT),
  209. AB9540_PIN_GROUP(sysclkreq4_d_1, ABX500_DEFAULT),
  210. AB9540_PIN_GROUP(sysclkreq6_d_1, ABX500_DEFAULT),
  211. AB9540_PIN_GROUP(gpio10_d_1, ABX500_DEFAULT),
  212. AB9540_PIN_GROUP(gpio11_d_1, ABX500_DEFAULT),
  213. AB9540_PIN_GROUP(gpio13_d_1, ABX500_DEFAULT),
  214. AB9540_PIN_GROUP(pwmout1_d_1, ABX500_DEFAULT),
  215. AB9540_PIN_GROUP(pwmout2_d_1, ABX500_DEFAULT),
  216. AB9540_PIN_GROUP(pwmout3_d_1, ABX500_DEFAULT),
  217. AB9540_PIN_GROUP(adi1_d_1, ABX500_DEFAULT),
  218. AB9540_PIN_GROUP(usbuicc_d_1, ABX500_DEFAULT),
  219. AB9540_PIN_GROUP(sysclkreq7_d_1, ABX500_DEFAULT),
  220. AB9540_PIN_GROUP(sysclkreq8_d_1, ABX500_DEFAULT),
  221. AB9540_PIN_GROUP(dmic12_d_1, ABX500_DEFAULT),
  222. AB9540_PIN_GROUP(dmic34_d_1, ABX500_DEFAULT),
  223. AB9540_PIN_GROUP(dmic56_d_1, ABX500_DEFAULT),
  224. AB9540_PIN_GROUP(extcpena_d_1, ABX500_DEFAULT),
  225. AB9540_PIN_GROUP(modsclsda_d_1, ABX500_DEFAULT),
  226. AB9540_PIN_GROUP(sysclkreq5_d_1, ABX500_DEFAULT),
  227. AB9540_PIN_GROUP(gpio50_d_1, ABX500_DEFAULT),
  228. AB9540_PIN_GROUP(batremn_d_1, ABX500_DEFAULT),
  229. AB9540_PIN_GROUP(resethw_d_1, ABX500_DEFAULT),
  230. AB9540_PIN_GROUP(service_d_1, ABX500_DEFAULT),
  231. AB9540_PIN_GROUP(gpio60_d_1, ABX500_DEFAULT),
  232. /* Altfunction A column */
  233. AB9540_PIN_GROUP(gpio1_a_1, ABX500_ALT_A),
  234. AB9540_PIN_GROUP(gpio2_a_1, ABX500_ALT_A),
  235. AB9540_PIN_GROUP(gpio3_a_1, ABX500_ALT_A),
  236. AB9540_PIN_GROUP(gpio4_a_1, ABX500_ALT_A),
  237. AB9540_PIN_GROUP(hiqclkena_a_1, ABX500_ALT_A),
  238. AB9540_PIN_GROUP(pdmclk_a_1, ABX500_ALT_A),
  239. AB9540_PIN_GROUP(uartdata_a_1, ABX500_ALT_A),
  240. AB9540_PIN_GROUP(gpio14_a_1, ABX500_ALT_A),
  241. AB9540_PIN_GROUP(gpio15_a_1, ABX500_ALT_A),
  242. AB9540_PIN_GROUP(gpio16_a_1, ABX500_ALT_A),
  243. AB9540_PIN_GROUP(gpio17_a_1, ABX500_ALT_A),
  244. AB9540_PIN_GROUP(gpio18_a_1, ABX500_ALT_A),
  245. AB9540_PIN_GROUP(gpio19_a_1, ABX500_ALT_A),
  246. AB9540_PIN_GROUP(gpio20_a_1, ABX500_ALT_A),
  247. AB9540_PIN_GROUP(gpio21_a_1, ABX500_ALT_A),
  248. AB9540_PIN_GROUP(gpio22_a_1, ABX500_ALT_A),
  249. AB9540_PIN_GROUP(gpio23_a_1, ABX500_ALT_A),
  250. AB9540_PIN_GROUP(gpio24_a_1, ABX500_ALT_A),
  251. AB9540_PIN_GROUP(gpio25_a_1, ABX500_ALT_A),
  252. AB9540_PIN_GROUP(gpio27_a_1, ABX500_ALT_A),
  253. AB9540_PIN_GROUP(gpio28_a_1, ABX500_ALT_A),
  254. AB9540_PIN_GROUP(gpio29_a_1, ABX500_ALT_A),
  255. AB9540_PIN_GROUP(gpio30_a_1, ABX500_ALT_A),
  256. AB9540_PIN_GROUP(gpio31_a_1, ABX500_ALT_A),
  257. AB9540_PIN_GROUP(gpio32_a_1, ABX500_ALT_A),
  258. AB9540_PIN_GROUP(gpio34_a_1, ABX500_ALT_A),
  259. AB9540_PIN_GROUP(gpio40_a_1, ABX500_ALT_A),
  260. AB9540_PIN_GROUP(gpio41_a_1, ABX500_ALT_A),
  261. AB9540_PIN_GROUP(gpio42_a_1, ABX500_ALT_A),
  262. AB9540_PIN_GROUP(gpio51_a_1, ABX500_ALT_A),
  263. AB9540_PIN_GROUP(gpio52_a_1, ABX500_ALT_A),
  264. AB9540_PIN_GROUP(gpio53_a_1, ABX500_ALT_A),
  265. AB9540_PIN_GROUP(usbuiccpd_a_1, ABX500_ALT_A),
  266. /* Altfunction B column */
  267. AB9540_PIN_GROUP(pdmdata_b_1, ABX500_ALT_B),
  268. AB9540_PIN_GROUP(pwmextvibra1_b_1, ABX500_ALT_B),
  269. AB9540_PIN_GROUP(pwmextvibra2_b_1, ABX500_ALT_B),
  270. /* Altfunction C column */
  271. AB9540_PIN_GROUP(usbvdat_c_1, ABX500_ALT_C),
  272. };
  273. /* We use this macro to define the groups applicable to a function */
  274. #define AB9540_FUNC_GROUPS(a, b...) \
  275. static const char * const a##_groups[] = { b };
  276. AB9540_FUNC_GROUPS(sysclkreq, "sysclkreq2_d_1", "sysclkreq3_d_1",
  277. "sysclkreq4_d_1", "sysclkreq5_d_1", "sysclkreq6_d_1",
  278. "sysclkreq7_d_1", "sysclkreq8_d_1");
  279. AB9540_FUNC_GROUPS(gpio, "gpio1_a_1", "gpio2_a_1", "gpio3_a_1", "gpio4_a_1",
  280. "gpio10_d_1", "gpio11_d_1", "gpio13_d_1", "gpio14_a_1",
  281. "gpio15_a_1", "gpio16_a_1", "gpio17_a_1", "gpio18_a_1",
  282. "gpio19_a_1", "gpio20_a_1", "gpio21_a_1", "gpio22_a_1",
  283. "gpio23_a_1", "gpio24_a_1", "gpio25_a_1", "gpio27_a_1",
  284. "gpio28_a_1", "gpio29_a_1", "gpio30_a_1", "gpio31_a_1",
  285. "gpio32_a_1", "gpio34_a_1", "gpio40_a_1", "gpio41_a_1",
  286. "gpio42_a_1", "gpio50_d_1", "gpio51_a_1", "gpio52_a_1",
  287. "gpio53_a_1", "gpio60_d_1");
  288. AB9540_FUNC_GROUPS(pwmout, "pwmout1_d_1", "pwmout2_d_1", "pwmout3_d_1");
  289. AB9540_FUNC_GROUPS(adi1, "adi1_d_1");
  290. AB9540_FUNC_GROUPS(usbuicc, "usbuicc_d_1", "usbuiccpd_a_1");
  291. AB9540_FUNC_GROUPS(dmic, "dmic12_d_1", "dmic34_d_1", "dmic56_d_1");
  292. AB9540_FUNC_GROUPS(extcpena, "extcpena_d_1");
  293. AB9540_FUNC_GROUPS(modsclsda, "modsclsda_d_1");
  294. AB9540_FUNC_GROUPS(batremn, "batremn_d_1");
  295. AB9540_FUNC_GROUPS(resethw, "resethw_d_1");
  296. AB9540_FUNC_GROUPS(service, "service_d_1");
  297. AB9540_FUNC_GROUPS(hiqclkena, "hiqclkena_a_1");
  298. AB9540_FUNC_GROUPS(pdm, "pdmdata_b_1", "pdmclk_a_1");
  299. AB9540_FUNC_GROUPS(uartdata, "uartdata_a_1");
  300. AB9540_FUNC_GROUPS(pwmextvibra, "pwmextvibra1_b_1", "pwmextvibra2_b_1");
  301. AB9540_FUNC_GROUPS(usbvdat, "usbvdat_c_1");
  302. #define FUNCTION(fname) \
  303. { \
  304. .name = #fname, \
  305. .groups = fname##_groups, \
  306. .ngroups = ARRAY_SIZE(fname##_groups), \
  307. }
  308. static const struct abx500_function ab9540_functions[] = {
  309. FUNCTION(sysclkreq),
  310. FUNCTION(gpio),
  311. FUNCTION(pwmout),
  312. FUNCTION(adi1),
  313. FUNCTION(usbuicc),
  314. FUNCTION(dmic),
  315. FUNCTION(extcpena),
  316. FUNCTION(modsclsda),
  317. FUNCTION(batremn),
  318. FUNCTION(resethw),
  319. FUNCTION(service),
  320. FUNCTION(hiqclkena),
  321. FUNCTION(pdm),
  322. FUNCTION(uartdata),
  323. FUNCTION(pwmextvibra),
  324. FUNCTION(usbvdat),
  325. };
  326. /*
  327. * this table translates what's is in the AB9540 specification regarding the
  328. * balls alternate functions (as for DB, default, ALT_A, ALT_B and ALT_C).
  329. * ALTERNATE_FUNCTIONS(GPIO_NUMBER, GPIOSEL bit, ALTERNATFUNC bit1,
  330. * ALTERNATEFUNC bit2, ALTA val, ALTB val, ALTC val),
  331. *
  332. * example :
  333. *
  334. * ALTERNATE_FUNCTIONS(13, 4, 3, 4, 1, 0, 2),
  335. * means that pin AB9540_PIN_D18 (pin 13) supports 4 mux (default/ALT_A,
  336. * ALT_B and ALT_C), so GPIOSEL and ALTERNATFUNC registers are used to
  337. * select the mux. ALTA, ALTB and ALTC val indicates values to write in
  338. * ALTERNATFUNC register. We need to specifies these values as SOC
  339. * designers didn't apply the same logic on how to select mux in the
  340. * ABx500 family.
  341. *
  342. * As this pins supports at least ALT_B mux, default mux is
  343. * selected by writing 1 in GPIOSEL bit :
  344. *
  345. * | GPIOSEL bit=4 | alternatfunc bit2=4 | alternatfunc bit1=3
  346. * default | 1 | 0 | 0
  347. * alt_A | 0 | 0 | 1
  348. * alt_B | 0 | 0 | 0
  349. * alt_C | 0 | 1 | 0
  350. *
  351. * ALTERNATE_FUNCTIONS(1, 0, UNUSED, UNUSED),
  352. * means that pin AB9540_PIN_R4 (pin 1) supports 2 mux, so only GPIOSEL
  353. * register is used to select the mux. As this pins doesn't support at
  354. * least ALT_B mux, default mux is by writing 0 in GPIOSEL bit :
  355. *
  356. * | GPIOSEL bit=0 | alternatfunc bit2= | alternatfunc bit1=
  357. * default | 0 | 0 | 0
  358. * alt_A | 1 | 0 | 0
  359. */
  360. static struct
  361. alternate_functions ab9540alternate_functions[AB9540_GPIO_MAX_NUMBER + 1] = {
  362. /* GPIOSEL1 - bits 4-7 are reserved */
  363. ALTERNATE_FUNCTIONS(0, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO0 */
  364. ALTERNATE_FUNCTIONS(1, 0, UNUSED, UNUSED, 0, 0, 0), /* GPIO1, altA controlled by bit 0 */
  365. ALTERNATE_FUNCTIONS(2, 1, UNUSED, UNUSED, 0, 0, 0), /* GPIO2, altA controlled by bit 1 */
  366. ALTERNATE_FUNCTIONS(3, 2, UNUSED, UNUSED, 0, 0, 0), /* GPIO3, altA controlled by bit 2*/
  367. ALTERNATE_FUNCTIONS(4, 3, UNUSED, UNUSED, 0, 0, 0), /* GPIO4, altA controlled by bit 3*/
  368. ALTERNATE_FUNCTIONS(5, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO5 */
  369. ALTERNATE_FUNCTIONS(6, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO6 */
  370. ALTERNATE_FUNCTIONS(7, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO7 */
  371. ALTERNATE_FUNCTIONS(8, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO8 */
  372. /* GPIOSEL2 - bits 0 and 3 are reserved */
  373. ALTERNATE_FUNCTIONS(9, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO9 */
  374. ALTERNATE_FUNCTIONS(10, 1, 0, UNUSED, 1, 0, 0), /* GPIO10, altA and altB controlled by bit 0 */
  375. ALTERNATE_FUNCTIONS(11, 2, 1, UNUSED, 0, 0, 0), /* GPIO11, altA controlled by bit 1 */
  376. ALTERNATE_FUNCTIONS(12, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO12 */
  377. ALTERNATE_FUNCTIONS(13, 4, 3, 4, 1, 0, 2), /* GPIO13, altA altB and altC controlled by bit 3 and 4 */
  378. ALTERNATE_FUNCTIONS(14, 5, UNUSED, UNUSED, 0, 0, 0), /* GPIO14, altA controlled by bit 5 */
  379. ALTERNATE_FUNCTIONS(15, 6, UNUSED, UNUSED, 0, 0, 0), /* GPIO15, altA controlled by bit 6 */
  380. ALTERNATE_FUNCTIONS(16, 7, UNUSED, UNUSED, 0, 0, 0), /* GPIO16, altA controlled by bit 7 */
  381. /* GPIOSEL3 - bit 1-3 reserved
  382. * pins 17 to 20 are special case, only bit 0 is used to select
  383. * alternate function for these 4 pins.
  384. * bits 1 to 3 are reserved
  385. */
  386. ALTERNATE_FUNCTIONS(17, 0, UNUSED, UNUSED, 0, 0, 0), /* GPIO17, altA controlled by bit 0 */
  387. ALTERNATE_FUNCTIONS(18, 0, UNUSED, UNUSED, 0, 0, 0), /* GPIO18, altA controlled by bit 0 */
  388. ALTERNATE_FUNCTIONS(19, 0, UNUSED, UNUSED, 0, 0, 0), /* GPIO19, altA controlled by bit 0 */
  389. ALTERNATE_FUNCTIONS(20, 0, UNUSED, UNUSED, 0, 0, 0), /* GPIO20, altA controlled by bit 0 */
  390. ALTERNATE_FUNCTIONS(21, 4, UNUSED, UNUSED, 0, 0, 0), /* GPIO21, altA controlled by bit 4 */
  391. ALTERNATE_FUNCTIONS(22, 5, UNUSED, UNUSED, 0, 0, 0), /* GPIO22, altA controlled by bit 5 */
  392. ALTERNATE_FUNCTIONS(23, 6, UNUSED, UNUSED, 0, 0, 0), /* GPIO23, altA controlled by bit 6 */
  393. ALTERNATE_FUNCTIONS(24, 7, UNUSED, UNUSED, 0, 0, 0), /* GPIO24, altA controlled by bit 7 */
  394. /* GPIOSEL4 - bit 1 reserved */
  395. ALTERNATE_FUNCTIONS(25, 0, UNUSED, UNUSED, 0, 0, 0), /* GPIO25, altA controlled by bit 0 */
  396. ALTERNATE_FUNCTIONS(26, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO26 */
  397. ALTERNATE_FUNCTIONS(27, 2, UNUSED, UNUSED, 0, 0, 0), /* GPIO27, altA controlled by bit 2 */
  398. ALTERNATE_FUNCTIONS(28, 3, UNUSED, UNUSED, 0, 0, 0), /* GPIO28, altA controlled by bit 3 */
  399. ALTERNATE_FUNCTIONS(29, 4, UNUSED, UNUSED, 0, 0, 0), /* GPIO29, altA controlled by bit 4 */
  400. ALTERNATE_FUNCTIONS(30, 5, UNUSED, UNUSED, 0, 0, 0), /* GPIO30, altA controlled by bit 5 */
  401. ALTERNATE_FUNCTIONS(31, 6, UNUSED, UNUSED, 0, 0, 0), /* GPIO31, altA controlled by bit 6 */
  402. ALTERNATE_FUNCTIONS(32, 7, UNUSED, UNUSED, 0, 0, 0), /* GPIO32, altA controlled by bit 7 */
  403. /* GPIOSEL5 - bit 0, 2-6 are reserved */
  404. ALTERNATE_FUNCTIONS(33, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO33 */
  405. ALTERNATE_FUNCTIONS(34, 1, UNUSED, UNUSED, 0, 0, 0), /* GPIO34, altA controlled by bit 1 */
  406. ALTERNATE_FUNCTIONS(35, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO35 */
  407. ALTERNATE_FUNCTIONS(36, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO36 */
  408. ALTERNATE_FUNCTIONS(37, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO37 */
  409. ALTERNATE_FUNCTIONS(38, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO38 */
  410. ALTERNATE_FUNCTIONS(39, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO39 */
  411. ALTERNATE_FUNCTIONS(40, 7, UNUSED, UNUSED, 0, 0, 0), /* GPIO40, altA controlled by bit 7 */
  412. /* GPIOSEL6 - bit 2-7 are reserved */
  413. ALTERNATE_FUNCTIONS(41, 0, UNUSED, UNUSED, 0, 0, 0), /* GPIO41, altA controlled by bit 0 */
  414. ALTERNATE_FUNCTIONS(42, 1, UNUSED, UNUSED, 0, 0, 0), /* GPIO42, altA controlled by bit 1 */
  415. ALTERNATE_FUNCTIONS(43, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO43 */
  416. ALTERNATE_FUNCTIONS(44, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO44 */
  417. ALTERNATE_FUNCTIONS(45, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO45 */
  418. ALTERNATE_FUNCTIONS(46, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO46 */
  419. ALTERNATE_FUNCTIONS(47, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO47 */
  420. ALTERNATE_FUNCTIONS(48, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO48 */
  421. /*
  422. * GPIOSEL7 - bit 0 and 6-7 are reserved
  423. * special case with GPIO60, wich is located at offset 5 of gpiosel7
  424. * don't know why it has been called GPIO60 in AB9540 datasheet,
  425. * GPIO54 would be logical..., so at SOC point of view we consider
  426. * GPIO60 = GPIO54
  427. */
  428. ALTERNATE_FUNCTIONS(49, 0, UNUSED, UNUSED, 0, 0, 0), /* no GPIO49 */
  429. ALTERNATE_FUNCTIONS(50, 1, 2, UNUSED, 1, 0, 0), /* GPIO50, altA and altB controlled by bit 1 */
  430. ALTERNATE_FUNCTIONS(51, 2, UNUSED, UNUSED, 0, 0, 0), /* GPIO51, altA controlled by bit 2 */
  431. ALTERNATE_FUNCTIONS(52, 3, UNUSED, UNUSED, 0, 0, 0), /* GPIO52, altA controlled by bit 3 */
  432. ALTERNATE_FUNCTIONS(53, 4, UNUSED, UNUSED, 0, 0, 0), /* GPIO53, altA controlled by bit 4 */
  433. ALTERNATE_FUNCTIONS(54, 5, UNUSED, UNUSED, 0, 0, 0), /* GPIO54 = GPIO60, altA controlled by bit 5 */
  434. };
  435. static struct abx500_gpio_irq_cluster ab9540_gpio_irq_cluster[] = {
  436. GPIO_IRQ_CLUSTER(10, 13, AB8500_INT_GPIO10R),
  437. GPIO_IRQ_CLUSTER(24, 25, AB8500_INT_GPIO24R),
  438. GPIO_IRQ_CLUSTER(40, 41, AB8500_INT_GPIO40R),
  439. GPIO_IRQ_CLUSTER(50, 54, AB9540_INT_GPIO50R),
  440. };
  441. static struct abx500_pinctrl_soc_data ab9540_soc = {
  442. .gpio_ranges = ab9540_pinranges,
  443. .gpio_num_ranges = ARRAY_SIZE(ab9540_pinranges),
  444. .pins = ab9540_pins,
  445. .npins = ARRAY_SIZE(ab9540_pins),
  446. .functions = ab9540_functions,
  447. .nfunctions = ARRAY_SIZE(ab9540_functions),
  448. .groups = ab9540_groups,
  449. .ngroups = ARRAY_SIZE(ab9540_groups),
  450. .alternate_functions = ab9540alternate_functions,
  451. .gpio_irq_cluster = ab9540_gpio_irq_cluster,
  452. .ngpio_irq_cluster = ARRAY_SIZE(ab9540_gpio_irq_cluster),
  453. .irq_gpio_rising_offset = AB8500_INT_GPIO6R,
  454. .irq_gpio_falling_offset = AB8500_INT_GPIO6F,
  455. .irq_gpio_factor = 1,
  456. };
  457. void
  458. abx500_pinctrl_ab9540_init(struct abx500_pinctrl_soc_data **soc)
  459. {
  460. *soc = &ab9540_soc;
  461. }