pinctrl-abx500.h 6.7 KB

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  1. #ifndef PINCTRL_PINCTRL_ABx500_H
  2. #define PINCTRL_PINCTRL_ABx500_H
  3. /* Package definitions */
  4. #define PINCTRL_AB8500 0
  5. #define PINCTRL_AB8540 1
  6. #define PINCTRL_AB9540 2
  7. #define PINCTRL_AB8505 3
  8. /* pins alternate function */
  9. enum abx500_pin_func {
  10. ABX500_DEFAULT,
  11. ABX500_ALT_A,
  12. ABX500_ALT_B,
  13. ABX500_ALT_C,
  14. };
  15. enum abx500_gpio_pull_updown {
  16. ABX500_GPIO_PULL_DOWN = 0x0,
  17. ABX500_GPIO_PULL_NONE = 0x1,
  18. ABX500_GPIO_PULL_UP = 0x3,
  19. };
  20. enum abx500_gpio_vinsel {
  21. ABX500_GPIO_VINSEL_VBAT = 0x0,
  22. ABX500_GPIO_VINSEL_VIN_1V8 = 0x1,
  23. ABX500_GPIO_VINSEL_VDD_BIF = 0x2,
  24. };
  25. /**
  26. * struct abx500_function - ABx500 pinctrl mux function
  27. * @name: The name of the function, exported to pinctrl core.
  28. * @groups: An array of pin groups that may select this function.
  29. * @ngroups: The number of entries in @groups.
  30. */
  31. struct abx500_function {
  32. const char *name;
  33. const char * const *groups;
  34. unsigned ngroups;
  35. };
  36. /**
  37. * struct abx500_pingroup - describes a ABx500 pin group
  38. * @name: the name of this specific pin group
  39. * @pins: an array of discrete physical pins used in this group, taken
  40. * from the driver-local pin enumeration space
  41. * @num_pins: the number of pins in this group array, i.e. the number of
  42. * elements in .pins so we can iterate over that array
  43. * @altsetting: the altsetting to apply to all pins in this group to
  44. * configure them to be used by a function
  45. */
  46. struct abx500_pingroup {
  47. const char *name;
  48. const unsigned int *pins;
  49. const unsigned npins;
  50. int altsetting;
  51. };
  52. #define ALTERNATE_FUNCTIONS(pin, sel_bit, alt1, alt2, alta, altb, altc) \
  53. { \
  54. .pin_number = pin, \
  55. .gpiosel_bit = sel_bit, \
  56. .alt_bit1 = alt1, \
  57. .alt_bit2 = alt2, \
  58. .alta_val = alta, \
  59. .altb_val = altb, \
  60. .altc_val = altc, \
  61. }
  62. #define UNUSED -1
  63. /**
  64. * struct alternate_functions
  65. * @pin_number: The pin number
  66. * @gpiosel_bit: Control bit in GPIOSEL register,
  67. * @alt_bit1: First AlternateFunction bit used to select the
  68. * alternate function
  69. * @alt_bit2: Second AlternateFunction bit used to select the
  70. * alternate function
  71. *
  72. * these 3 following fields are necessary due to none
  73. * coherency on how to select the altA, altB and altC
  74. * function between the ABx500 SOC family when using
  75. * alternatfunc register.
  76. * @alta_val: value to write in alternatfunc to select altA function
  77. * @altb_val: value to write in alternatfunc to select altB function
  78. * @altc_val: value to write in alternatfunc to select altC function
  79. */
  80. struct alternate_functions {
  81. unsigned pin_number;
  82. s8 gpiosel_bit;
  83. s8 alt_bit1;
  84. s8 alt_bit2;
  85. u8 alta_val;
  86. u8 altb_val;
  87. u8 altc_val;
  88. };
  89. /**
  90. * struct pullud - specific pull up/down feature
  91. * @first_pin: The pin number of the first pins which support
  92. * specific pull up/down
  93. * @last_pin: The pin number of the last pins
  94. */
  95. struct pullud {
  96. unsigned first_pin;
  97. unsigned last_pin;
  98. };
  99. #define GPIO_IRQ_CLUSTER(a, b, c) \
  100. { \
  101. .start = a, \
  102. .end = b, \
  103. .to_irq = c, \
  104. }
  105. /**
  106. * struct abx500_gpio_irq_cluster - indicates GPIOs which are interrupt
  107. * capable
  108. * @start: The pin number of the first pin interrupt capable
  109. * @end: The pin number of the last pin interrupt capable
  110. * @to_irq: The ABx500 GPIO's associated IRQs are clustered
  111. * together throughout the interrupt numbers at irregular
  112. * intervals. To solve this quandary, we will place the
  113. * read-in values into the cluster information table
  114. */
  115. struct abx500_gpio_irq_cluster {
  116. int start;
  117. int end;
  118. int to_irq;
  119. };
  120. /**
  121. * struct abx500_pinrange - map pin numbers to GPIO offsets
  122. * @offset: offset into the GPIO local numberspace, incidentally
  123. * identical to the offset into the local pin numberspace
  124. * @npins: number of pins to map from both offsets
  125. * @altfunc: altfunc setting to be used to enable GPIO on a pin in
  126. * this range (may vary)
  127. */
  128. struct abx500_pinrange {
  129. unsigned int offset;
  130. unsigned int npins;
  131. int altfunc;
  132. };
  133. #define ABX500_PINRANGE(a, b, c) { .offset = a, .npins = b, .altfunc = c }
  134. /**
  135. * struct abx500_pinctrl_soc_data - ABx500 pin controller per-SoC configuration
  136. * @gpio_ranges: An array of GPIO ranges for this SoC
  137. * @gpio_num_ranges: The number of GPIO ranges for this SoC
  138. * @pins: An array describing all pins the pin controller affects.
  139. * All pins which are also GPIOs must be listed first within the
  140. * array, and be numbered identically to the GPIO controller's
  141. * numbering.
  142. * @npins: The number of entries in @pins.
  143. * @functions: The functions supported on this SoC.
  144. * @nfunction: The number of entries in @functions.
  145. * @groups: An array describing all pin groups the pin SoC supports.
  146. * @ngroups: The number of entries in @groups.
  147. * @alternate_functions: array describing pins which supports alternate and
  148. * how to set it.
  149. * @pullud: array describing pins which supports pull up/down
  150. * specific registers.
  151. * @gpio_irq_cluster: An array of GPIO interrupt capable for this SoC
  152. * @ngpio_irq_cluster: The number of GPIO inetrrupt capable for this SoC
  153. * @irq_gpio_rising_offset: Interrupt offset used as base to compute specific
  154. * setting strategy of the rising interrupt line
  155. * @irq_gpio_falling_offset: Interrupt offset used as base to compute specific
  156. * setting strategy of the falling interrupt line
  157. * @irq_gpio_factor: Factor used to compute specific setting strategy of
  158. * the interrupt line
  159. */
  160. struct abx500_pinctrl_soc_data {
  161. const struct abx500_pinrange *gpio_ranges;
  162. unsigned gpio_num_ranges;
  163. const struct pinctrl_pin_desc *pins;
  164. unsigned npins;
  165. const struct abx500_function *functions;
  166. unsigned nfunctions;
  167. const struct abx500_pingroup *groups;
  168. unsigned ngroups;
  169. struct alternate_functions *alternate_functions;
  170. struct pullud *pullud;
  171. struct abx500_gpio_irq_cluster *gpio_irq_cluster;
  172. unsigned ngpio_irq_cluster;
  173. int irq_gpio_rising_offset;
  174. int irq_gpio_falling_offset;
  175. int irq_gpio_factor;
  176. };
  177. #ifdef CONFIG_PINCTRL_AB8500
  178. void abx500_pinctrl_ab8500_init(struct abx500_pinctrl_soc_data **soc);
  179. #else
  180. static inline void
  181. abx500_pinctrl_ab8500_init(struct abx500_pinctrl_soc_data **soc)
  182. {
  183. }
  184. #endif
  185. #ifdef CONFIG_PINCTRL_AB8540
  186. void abx500_pinctrl_ab8540_init(struct abx500_pinctrl_soc_data **soc);
  187. #else
  188. static inline void
  189. abx500_pinctrl_ab8540_init(struct abx500_pinctrl_soc_data **soc)
  190. {
  191. }
  192. #endif
  193. #ifdef CONFIG_PINCTRL_AB9540
  194. void abx500_pinctrl_ab9540_init(struct abx500_pinctrl_soc_data **soc);
  195. #else
  196. static inline void
  197. abx500_pinctrl_ab9540_init(struct abx500_pinctrl_soc_data **soc)
  198. {
  199. }
  200. #endif
  201. #ifdef CONFIG_PINCTRL_AB8505
  202. void abx500_pinctrl_ab8505_init(struct abx500_pinctrl_soc_data **soc);
  203. #else
  204. static inline void
  205. abx500_pinctrl_ab8505_init(struct abx500_pinctrl_soc_data **soc)
  206. {
  207. }
  208. #endif
  209. #endif /* PINCTRL_PINCTRL_ABx500_H */