pinctrl-ssbi-mpp.c 21 KB

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  1. /*
  2. * Copyright (c) 2015, Sony Mobile Communications AB.
  3. * Copyright (c) 2013, The Linux Foundation. All rights reserved.
  4. *
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License version 2 and
  7. * only version 2 as published by the Free Software Foundation.
  8. *
  9. * This program is distributed in the hope that it will be useful,
  10. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. * GNU General Public License for more details.
  13. */
  14. #include <linux/module.h>
  15. #include <linux/platform_device.h>
  16. #include <linux/pinctrl/pinctrl.h>
  17. #include <linux/pinctrl/pinmux.h>
  18. #include <linux/pinctrl/pinconf.h>
  19. #include <linux/pinctrl/pinconf-generic.h>
  20. #include <linux/slab.h>
  21. #include <linux/regmap.h>
  22. #include <linux/gpio.h>
  23. #include <linux/interrupt.h>
  24. #include <linux/of_device.h>
  25. #include <dt-bindings/pinctrl/qcom,pmic-mpp.h>
  26. #include "../core.h"
  27. #include "../pinctrl-utils.h"
  28. /* MPP registers */
  29. #define SSBI_REG_ADDR_MPP_BASE 0x50
  30. #define SSBI_REG_ADDR_MPP(n) (SSBI_REG_ADDR_MPP_BASE + n)
  31. /* MPP Type: type */
  32. #define PM8XXX_MPP_TYPE_D_INPUT 0
  33. #define PM8XXX_MPP_TYPE_D_OUTPUT 1
  34. #define PM8XXX_MPP_TYPE_D_BI_DIR 2
  35. #define PM8XXX_MPP_TYPE_A_INPUT 3
  36. #define PM8XXX_MPP_TYPE_A_OUTPUT 4
  37. #define PM8XXX_MPP_TYPE_SINK 5
  38. #define PM8XXX_MPP_TYPE_DTEST_SINK 6
  39. #define PM8XXX_MPP_TYPE_DTEST_OUTPUT 7
  40. /* Digital Input: control */
  41. #define PM8XXX_MPP_DIN_TO_INT 0
  42. #define PM8XXX_MPP_DIN_TO_DBUS1 1
  43. #define PM8XXX_MPP_DIN_TO_DBUS2 2
  44. #define PM8XXX_MPP_DIN_TO_DBUS3 3
  45. /* Digital Output: control */
  46. #define PM8XXX_MPP_DOUT_CTRL_LOW 0
  47. #define PM8XXX_MPP_DOUT_CTRL_HIGH 1
  48. #define PM8XXX_MPP_DOUT_CTRL_MPP 2
  49. #define PM8XXX_MPP_DOUT_CTRL_INV_MPP 3
  50. /* Bidirectional: control */
  51. #define PM8XXX_MPP_BI_PULLUP_1KOHM 0
  52. #define PM8XXX_MPP_BI_PULLUP_OPEN 1
  53. #define PM8XXX_MPP_BI_PULLUP_10KOHM 2
  54. #define PM8XXX_MPP_BI_PULLUP_30KOHM 3
  55. /* Analog Output: control */
  56. #define PM8XXX_MPP_AOUT_CTRL_DISABLE 0
  57. #define PM8XXX_MPP_AOUT_CTRL_ENABLE 1
  58. #define PM8XXX_MPP_AOUT_CTRL_MPP_HIGH_EN 2
  59. #define PM8XXX_MPP_AOUT_CTRL_MPP_LOW_EN 3
  60. /* Current Sink: control */
  61. #define PM8XXX_MPP_CS_CTRL_DISABLE 0
  62. #define PM8XXX_MPP_CS_CTRL_ENABLE 1
  63. #define PM8XXX_MPP_CS_CTRL_MPP_HIGH_EN 2
  64. #define PM8XXX_MPP_CS_CTRL_MPP_LOW_EN 3
  65. /* DTEST Current Sink: control */
  66. #define PM8XXX_MPP_DTEST_CS_CTRL_EN1 0
  67. #define PM8XXX_MPP_DTEST_CS_CTRL_EN2 1
  68. #define PM8XXX_MPP_DTEST_CS_CTRL_EN3 2
  69. #define PM8XXX_MPP_DTEST_CS_CTRL_EN4 3
  70. /* DTEST Digital Output: control */
  71. #define PM8XXX_MPP_DTEST_DBUS1 0
  72. #define PM8XXX_MPP_DTEST_DBUS2 1
  73. #define PM8XXX_MPP_DTEST_DBUS3 2
  74. #define PM8XXX_MPP_DTEST_DBUS4 3
  75. /* custom pinconf parameters */
  76. #define PM8XXX_CONFIG_AMUX (PIN_CONFIG_END + 1)
  77. #define PM8XXX_CONFIG_DTEST_SELECTOR (PIN_CONFIG_END + 2)
  78. #define PM8XXX_CONFIG_ALEVEL (PIN_CONFIG_END + 3)
  79. #define PM8XXX_CONFIG_PAIRED (PIN_CONFIG_END + 4)
  80. /**
  81. * struct pm8xxx_pin_data - dynamic configuration for a pin
  82. * @reg: address of the control register
  83. * @irq: IRQ from the PMIC interrupt controller
  84. * @mode: operating mode for the pin (digital, analog or current sink)
  85. * @input: pin is input
  86. * @output: pin is output
  87. * @high_z: pin is floating
  88. * @paired: mpp operates in paired mode
  89. * @output_value: logical output value of the mpp
  90. * @power_source: selected power source
  91. * @dtest: DTEST route selector
  92. * @amux: input muxing in analog mode
  93. * @aout_level: selector of the output in analog mode
  94. * @drive_strength: drive strength of the current sink
  95. * @pullup: pull up value, when in digital bidirectional mode
  96. */
  97. struct pm8xxx_pin_data {
  98. unsigned reg;
  99. int irq;
  100. u8 mode;
  101. bool input;
  102. bool output;
  103. bool high_z;
  104. bool paired;
  105. bool output_value;
  106. u8 power_source;
  107. u8 dtest;
  108. u8 amux;
  109. u8 aout_level;
  110. u8 drive_strength;
  111. unsigned pullup;
  112. };
  113. struct pm8xxx_mpp {
  114. struct device *dev;
  115. struct regmap *regmap;
  116. struct pinctrl_dev *pctrl;
  117. struct gpio_chip chip;
  118. struct pinctrl_desc desc;
  119. unsigned npins;
  120. };
  121. static const struct pinconf_generic_params pm8xxx_mpp_bindings[] = {
  122. {"qcom,amux-route", PM8XXX_CONFIG_AMUX, 0},
  123. {"qcom,analog-level", PM8XXX_CONFIG_ALEVEL, 0},
  124. {"qcom,dtest", PM8XXX_CONFIG_DTEST_SELECTOR, 0},
  125. {"qcom,paired", PM8XXX_CONFIG_PAIRED, 0},
  126. };
  127. #ifdef CONFIG_DEBUG_FS
  128. static const struct pin_config_item pm8xxx_conf_items[] = {
  129. PCONFDUMP(PM8XXX_CONFIG_AMUX, "analog mux", NULL, true),
  130. PCONFDUMP(PM8XXX_CONFIG_ALEVEL, "analog level", NULL, true),
  131. PCONFDUMP(PM8XXX_CONFIG_DTEST_SELECTOR, "dtest", NULL, true),
  132. PCONFDUMP(PM8XXX_CONFIG_PAIRED, "paired", NULL, false),
  133. };
  134. #endif
  135. #define PM8XXX_MAX_MPPS 12
  136. static const char * const pm8xxx_groups[PM8XXX_MAX_MPPS] = {
  137. "mpp1", "mpp2", "mpp3", "mpp4", "mpp5", "mpp6", "mpp7", "mpp8",
  138. "mpp9", "mpp10", "mpp11", "mpp12",
  139. };
  140. #define PM8XXX_MPP_DIGITAL 0
  141. #define PM8XXX_MPP_ANALOG 1
  142. #define PM8XXX_MPP_SINK 2
  143. static const char * const pm8xxx_mpp_functions[] = {
  144. "digital", "analog", "sink",
  145. };
  146. static int pm8xxx_mpp_update(struct pm8xxx_mpp *pctrl,
  147. struct pm8xxx_pin_data *pin)
  148. {
  149. unsigned level;
  150. unsigned ctrl;
  151. unsigned type;
  152. int ret;
  153. u8 val;
  154. switch (pin->mode) {
  155. case PM8XXX_MPP_DIGITAL:
  156. if (pin->dtest) {
  157. type = PM8XXX_MPP_TYPE_DTEST_OUTPUT;
  158. ctrl = pin->dtest - 1;
  159. } else if (pin->input && pin->output) {
  160. type = PM8XXX_MPP_TYPE_D_BI_DIR;
  161. if (pin->high_z)
  162. ctrl = PM8XXX_MPP_BI_PULLUP_OPEN;
  163. else if (pin->pullup == 600)
  164. ctrl = PM8XXX_MPP_BI_PULLUP_1KOHM;
  165. else if (pin->pullup == 10000)
  166. ctrl = PM8XXX_MPP_BI_PULLUP_10KOHM;
  167. else
  168. ctrl = PM8XXX_MPP_BI_PULLUP_30KOHM;
  169. } else if (pin->input) {
  170. type = PM8XXX_MPP_TYPE_D_INPUT;
  171. if (pin->dtest)
  172. ctrl = pin->dtest;
  173. else
  174. ctrl = PM8XXX_MPP_DIN_TO_INT;
  175. } else {
  176. type = PM8XXX_MPP_TYPE_D_OUTPUT;
  177. ctrl = !!pin->output_value;
  178. if (pin->paired)
  179. ctrl |= BIT(1);
  180. }
  181. level = pin->power_source;
  182. break;
  183. case PM8XXX_MPP_ANALOG:
  184. if (pin->output) {
  185. type = PM8XXX_MPP_TYPE_A_OUTPUT;
  186. level = pin->aout_level;
  187. ctrl = pin->output_value;
  188. if (pin->paired)
  189. ctrl |= BIT(1);
  190. } else {
  191. type = PM8XXX_MPP_TYPE_A_INPUT;
  192. level = pin->amux;
  193. ctrl = 0;
  194. }
  195. break;
  196. case PM8XXX_MPP_SINK:
  197. level = (pin->drive_strength / 5) - 1;
  198. if (pin->dtest) {
  199. type = PM8XXX_MPP_TYPE_DTEST_SINK;
  200. ctrl = pin->dtest - 1;
  201. } else {
  202. type = PM8XXX_MPP_TYPE_SINK;
  203. ctrl = pin->output_value;
  204. if (pin->paired)
  205. ctrl |= BIT(1);
  206. }
  207. break;
  208. default:
  209. return -EINVAL;
  210. }
  211. val = type << 5 | level << 2 | ctrl;
  212. ret = regmap_write(pctrl->regmap, pin->reg, val);
  213. if (ret)
  214. dev_err(pctrl->dev, "failed to write register\n");
  215. return ret;
  216. }
  217. static int pm8xxx_get_groups_count(struct pinctrl_dev *pctldev)
  218. {
  219. struct pm8xxx_mpp *pctrl = pinctrl_dev_get_drvdata(pctldev);
  220. return pctrl->npins;
  221. }
  222. static const char *pm8xxx_get_group_name(struct pinctrl_dev *pctldev,
  223. unsigned group)
  224. {
  225. return pm8xxx_groups[group];
  226. }
  227. static int pm8xxx_get_group_pins(struct pinctrl_dev *pctldev,
  228. unsigned group,
  229. const unsigned **pins,
  230. unsigned *num_pins)
  231. {
  232. struct pm8xxx_mpp *pctrl = pinctrl_dev_get_drvdata(pctldev);
  233. *pins = &pctrl->desc.pins[group].number;
  234. *num_pins = 1;
  235. return 0;
  236. }
  237. static const struct pinctrl_ops pm8xxx_pinctrl_ops = {
  238. .get_groups_count = pm8xxx_get_groups_count,
  239. .get_group_name = pm8xxx_get_group_name,
  240. .get_group_pins = pm8xxx_get_group_pins,
  241. .dt_node_to_map = pinconf_generic_dt_node_to_map_group,
  242. .dt_free_map = pinctrl_utils_dt_free_map,
  243. };
  244. static int pm8xxx_get_functions_count(struct pinctrl_dev *pctldev)
  245. {
  246. return ARRAY_SIZE(pm8xxx_mpp_functions);
  247. }
  248. static const char *pm8xxx_get_function_name(struct pinctrl_dev *pctldev,
  249. unsigned function)
  250. {
  251. return pm8xxx_mpp_functions[function];
  252. }
  253. static int pm8xxx_get_function_groups(struct pinctrl_dev *pctldev,
  254. unsigned function,
  255. const char * const **groups,
  256. unsigned * const num_groups)
  257. {
  258. struct pm8xxx_mpp *pctrl = pinctrl_dev_get_drvdata(pctldev);
  259. *groups = pm8xxx_groups;
  260. *num_groups = pctrl->npins;
  261. return 0;
  262. }
  263. static int pm8xxx_pinmux_set_mux(struct pinctrl_dev *pctldev,
  264. unsigned function,
  265. unsigned group)
  266. {
  267. struct pm8xxx_mpp *pctrl = pinctrl_dev_get_drvdata(pctldev);
  268. struct pm8xxx_pin_data *pin = pctrl->desc.pins[group].drv_data;
  269. pin->mode = function;
  270. pm8xxx_mpp_update(pctrl, pin);
  271. return 0;
  272. }
  273. static const struct pinmux_ops pm8xxx_pinmux_ops = {
  274. .get_functions_count = pm8xxx_get_functions_count,
  275. .get_function_name = pm8xxx_get_function_name,
  276. .get_function_groups = pm8xxx_get_function_groups,
  277. .set_mux = pm8xxx_pinmux_set_mux,
  278. };
  279. static int pm8xxx_pin_config_get(struct pinctrl_dev *pctldev,
  280. unsigned int offset,
  281. unsigned long *config)
  282. {
  283. struct pm8xxx_mpp *pctrl = pinctrl_dev_get_drvdata(pctldev);
  284. struct pm8xxx_pin_data *pin = pctrl->desc.pins[offset].drv_data;
  285. unsigned param = pinconf_to_config_param(*config);
  286. unsigned arg;
  287. switch (param) {
  288. case PIN_CONFIG_BIAS_PULL_UP:
  289. arg = pin->pullup;
  290. break;
  291. case PIN_CONFIG_BIAS_HIGH_IMPEDANCE:
  292. arg = pin->high_z;
  293. break;
  294. case PIN_CONFIG_INPUT_ENABLE:
  295. arg = pin->input;
  296. break;
  297. case PIN_CONFIG_OUTPUT:
  298. arg = pin->output_value;
  299. break;
  300. case PIN_CONFIG_POWER_SOURCE:
  301. arg = pin->power_source;
  302. break;
  303. case PIN_CONFIG_DRIVE_STRENGTH:
  304. arg = pin->drive_strength;
  305. break;
  306. case PM8XXX_CONFIG_DTEST_SELECTOR:
  307. arg = pin->dtest;
  308. break;
  309. case PM8XXX_CONFIG_AMUX:
  310. arg = pin->amux;
  311. break;
  312. case PM8XXX_CONFIG_ALEVEL:
  313. arg = pin->aout_level;
  314. break;
  315. case PM8XXX_CONFIG_PAIRED:
  316. arg = pin->paired;
  317. break;
  318. default:
  319. return -EINVAL;
  320. }
  321. *config = pinconf_to_config_packed(param, arg);
  322. return 0;
  323. }
  324. static int pm8xxx_pin_config_set(struct pinctrl_dev *pctldev,
  325. unsigned int offset,
  326. unsigned long *configs,
  327. unsigned num_configs)
  328. {
  329. struct pm8xxx_mpp *pctrl = pinctrl_dev_get_drvdata(pctldev);
  330. struct pm8xxx_pin_data *pin = pctrl->desc.pins[offset].drv_data;
  331. unsigned param;
  332. unsigned arg;
  333. unsigned i;
  334. for (i = 0; i < num_configs; i++) {
  335. param = pinconf_to_config_param(configs[i]);
  336. arg = pinconf_to_config_argument(configs[i]);
  337. switch (param) {
  338. case PIN_CONFIG_BIAS_PULL_UP:
  339. pin->pullup = arg;
  340. break;
  341. case PIN_CONFIG_BIAS_HIGH_IMPEDANCE:
  342. pin->high_z = true;
  343. break;
  344. case PIN_CONFIG_INPUT_ENABLE:
  345. pin->input = true;
  346. break;
  347. case PIN_CONFIG_OUTPUT:
  348. pin->output = true;
  349. pin->output_value = !!arg;
  350. break;
  351. case PIN_CONFIG_POWER_SOURCE:
  352. pin->power_source = arg;
  353. break;
  354. case PIN_CONFIG_DRIVE_STRENGTH:
  355. pin->drive_strength = arg;
  356. break;
  357. case PM8XXX_CONFIG_DTEST_SELECTOR:
  358. pin->dtest = arg;
  359. break;
  360. case PM8XXX_CONFIG_AMUX:
  361. pin->amux = arg;
  362. break;
  363. case PM8XXX_CONFIG_ALEVEL:
  364. pin->aout_level = arg;
  365. break;
  366. case PM8XXX_CONFIG_PAIRED:
  367. pin->paired = !!arg;
  368. break;
  369. default:
  370. dev_err(pctrl->dev,
  371. "unsupported config parameter: %x\n",
  372. param);
  373. return -EINVAL;
  374. }
  375. }
  376. pm8xxx_mpp_update(pctrl, pin);
  377. return 0;
  378. }
  379. static const struct pinconf_ops pm8xxx_pinconf_ops = {
  380. .is_generic = true,
  381. .pin_config_group_get = pm8xxx_pin_config_get,
  382. .pin_config_group_set = pm8xxx_pin_config_set,
  383. };
  384. static struct pinctrl_desc pm8xxx_pinctrl_desc = {
  385. .name = "pm8xxx_mpp",
  386. .pctlops = &pm8xxx_pinctrl_ops,
  387. .pmxops = &pm8xxx_pinmux_ops,
  388. .confops = &pm8xxx_pinconf_ops,
  389. .owner = THIS_MODULE,
  390. };
  391. static int pm8xxx_mpp_direction_input(struct gpio_chip *chip,
  392. unsigned offset)
  393. {
  394. struct pm8xxx_mpp *pctrl = container_of(chip, struct pm8xxx_mpp, chip);
  395. struct pm8xxx_pin_data *pin = pctrl->desc.pins[offset].drv_data;
  396. switch (pin->mode) {
  397. case PM8XXX_MPP_DIGITAL:
  398. pin->input = true;
  399. break;
  400. case PM8XXX_MPP_ANALOG:
  401. pin->input = true;
  402. pin->output = true;
  403. break;
  404. case PM8XXX_MPP_SINK:
  405. return -EINVAL;
  406. }
  407. pm8xxx_mpp_update(pctrl, pin);
  408. return 0;
  409. }
  410. static int pm8xxx_mpp_direction_output(struct gpio_chip *chip,
  411. unsigned offset,
  412. int value)
  413. {
  414. struct pm8xxx_mpp *pctrl = container_of(chip, struct pm8xxx_mpp, chip);
  415. struct pm8xxx_pin_data *pin = pctrl->desc.pins[offset].drv_data;
  416. switch (pin->mode) {
  417. case PM8XXX_MPP_DIGITAL:
  418. pin->output = true;
  419. break;
  420. case PM8XXX_MPP_ANALOG:
  421. pin->input = false;
  422. pin->output = true;
  423. break;
  424. case PM8XXX_MPP_SINK:
  425. pin->input = false;
  426. pin->output = true;
  427. break;
  428. }
  429. pm8xxx_mpp_update(pctrl, pin);
  430. return 0;
  431. }
  432. static int pm8xxx_mpp_get(struct gpio_chip *chip, unsigned offset)
  433. {
  434. struct pm8xxx_mpp *pctrl = container_of(chip, struct pm8xxx_mpp, chip);
  435. struct pm8xxx_pin_data *pin = pctrl->desc.pins[offset].drv_data;
  436. bool state;
  437. int ret;
  438. if (!pin->input)
  439. return pin->output_value;
  440. ret = irq_get_irqchip_state(pin->irq, IRQCHIP_STATE_LINE_LEVEL, &state);
  441. if (!ret)
  442. ret = !!state;
  443. return ret;
  444. }
  445. static void pm8xxx_mpp_set(struct gpio_chip *chip, unsigned offset, int value)
  446. {
  447. struct pm8xxx_mpp *pctrl = container_of(chip, struct pm8xxx_mpp, chip);
  448. struct pm8xxx_pin_data *pin = pctrl->desc.pins[offset].drv_data;
  449. pin->output_value = !!value;
  450. pm8xxx_mpp_update(pctrl, pin);
  451. }
  452. static int pm8xxx_mpp_of_xlate(struct gpio_chip *chip,
  453. const struct of_phandle_args *gpio_desc,
  454. u32 *flags)
  455. {
  456. if (chip->of_gpio_n_cells < 2)
  457. return -EINVAL;
  458. if (flags)
  459. *flags = gpio_desc->args[1];
  460. return gpio_desc->args[0] - 1;
  461. }
  462. static int pm8xxx_mpp_to_irq(struct gpio_chip *chip, unsigned offset)
  463. {
  464. struct pm8xxx_mpp *pctrl = container_of(chip, struct pm8xxx_mpp, chip);
  465. struct pm8xxx_pin_data *pin = pctrl->desc.pins[offset].drv_data;
  466. return pin->irq;
  467. }
  468. #ifdef CONFIG_DEBUG_FS
  469. #include <linux/seq_file.h>
  470. static void pm8xxx_mpp_dbg_show_one(struct seq_file *s,
  471. struct pinctrl_dev *pctldev,
  472. struct gpio_chip *chip,
  473. unsigned offset,
  474. unsigned gpio)
  475. {
  476. struct pm8xxx_mpp *pctrl = container_of(chip, struct pm8xxx_mpp, chip);
  477. struct pm8xxx_pin_data *pin = pctrl->desc.pins[offset].drv_data;
  478. static const char * const aout_lvls[] = {
  479. "1v25", "1v25_2", "0v625", "0v3125", "mpp", "abus1", "abus2",
  480. "abus3"
  481. };
  482. static const char * const amuxs[] = {
  483. "amux5", "amux6", "amux7", "amux8", "amux9", "abus1", "abus2",
  484. "abus3",
  485. };
  486. seq_printf(s, " mpp%-2d:", offset + 1);
  487. switch (pin->mode) {
  488. case PM8XXX_MPP_DIGITAL:
  489. seq_puts(s, " digital ");
  490. if (pin->dtest) {
  491. seq_printf(s, "dtest%d\n", pin->dtest);
  492. } else if (pin->input && pin->output) {
  493. if (pin->high_z)
  494. seq_puts(s, "bi-dir high-z");
  495. else
  496. seq_printf(s, "bi-dir %dOhm", pin->pullup);
  497. } else if (pin->input) {
  498. if (pin->dtest)
  499. seq_printf(s, "in dtest%d", pin->dtest);
  500. else
  501. seq_puts(s, "in gpio");
  502. } else if (pin->output) {
  503. seq_puts(s, "out ");
  504. if (!pin->paired) {
  505. seq_puts(s, pin->output_value ?
  506. "high" : "low");
  507. } else {
  508. seq_puts(s, pin->output_value ?
  509. "inverted" : "follow");
  510. }
  511. }
  512. break;
  513. case PM8XXX_MPP_ANALOG:
  514. seq_puts(s, " analog ");
  515. if (pin->output) {
  516. seq_printf(s, "out %s ", aout_lvls[pin->aout_level]);
  517. if (!pin->paired) {
  518. seq_puts(s, pin->output_value ?
  519. "high" : "low");
  520. } else {
  521. seq_puts(s, pin->output_value ?
  522. "inverted" : "follow");
  523. }
  524. } else {
  525. seq_printf(s, "input mux %s", amuxs[pin->amux]);
  526. }
  527. break;
  528. case PM8XXX_MPP_SINK:
  529. seq_printf(s, " sink %dmA ", pin->drive_strength);
  530. if (pin->dtest) {
  531. seq_printf(s, "dtest%d", pin->dtest);
  532. } else {
  533. if (!pin->paired) {
  534. seq_puts(s, pin->output_value ?
  535. "high" : "low");
  536. } else {
  537. seq_puts(s, pin->output_value ?
  538. "inverted" : "follow");
  539. }
  540. }
  541. break;
  542. }
  543. }
  544. static void pm8xxx_mpp_dbg_show(struct seq_file *s, struct gpio_chip *chip)
  545. {
  546. unsigned gpio = chip->base;
  547. unsigned i;
  548. for (i = 0; i < chip->ngpio; i++, gpio++) {
  549. pm8xxx_mpp_dbg_show_one(s, NULL, chip, i, gpio);
  550. seq_puts(s, "\n");
  551. }
  552. }
  553. #else
  554. #define pm8xxx_mpp_dbg_show NULL
  555. #endif
  556. static struct gpio_chip pm8xxx_mpp_template = {
  557. .direction_input = pm8xxx_mpp_direction_input,
  558. .direction_output = pm8xxx_mpp_direction_output,
  559. .get = pm8xxx_mpp_get,
  560. .set = pm8xxx_mpp_set,
  561. .of_xlate = pm8xxx_mpp_of_xlate,
  562. .to_irq = pm8xxx_mpp_to_irq,
  563. .dbg_show = pm8xxx_mpp_dbg_show,
  564. .owner = THIS_MODULE,
  565. };
  566. static int pm8xxx_pin_populate(struct pm8xxx_mpp *pctrl,
  567. struct pm8xxx_pin_data *pin)
  568. {
  569. unsigned int val;
  570. unsigned level;
  571. unsigned ctrl;
  572. unsigned type;
  573. int ret;
  574. ret = regmap_read(pctrl->regmap, pin->reg, &val);
  575. if (ret) {
  576. dev_err(pctrl->dev, "failed to read register\n");
  577. return ret;
  578. }
  579. type = (val >> 5) & 7;
  580. level = (val >> 2) & 7;
  581. ctrl = (val) & 3;
  582. switch (type) {
  583. case PM8XXX_MPP_TYPE_D_INPUT:
  584. pin->mode = PM8XXX_MPP_DIGITAL;
  585. pin->input = true;
  586. pin->power_source = level;
  587. pin->dtest = ctrl;
  588. break;
  589. case PM8XXX_MPP_TYPE_D_OUTPUT:
  590. pin->mode = PM8XXX_MPP_DIGITAL;
  591. pin->output = true;
  592. pin->power_source = level;
  593. pin->output_value = !!(ctrl & BIT(0));
  594. pin->paired = !!(ctrl & BIT(1));
  595. break;
  596. case PM8XXX_MPP_TYPE_D_BI_DIR:
  597. pin->mode = PM8XXX_MPP_DIGITAL;
  598. pin->input = true;
  599. pin->output = true;
  600. pin->power_source = level;
  601. switch (ctrl) {
  602. case PM8XXX_MPP_BI_PULLUP_1KOHM:
  603. pin->pullup = 600;
  604. break;
  605. case PM8XXX_MPP_BI_PULLUP_OPEN:
  606. pin->high_z = true;
  607. break;
  608. case PM8XXX_MPP_BI_PULLUP_10KOHM:
  609. pin->pullup = 10000;
  610. break;
  611. case PM8XXX_MPP_BI_PULLUP_30KOHM:
  612. pin->pullup = 30000;
  613. break;
  614. }
  615. break;
  616. case PM8XXX_MPP_TYPE_A_INPUT:
  617. pin->mode = PM8XXX_MPP_ANALOG;
  618. pin->input = true;
  619. pin->amux = level;
  620. break;
  621. case PM8XXX_MPP_TYPE_A_OUTPUT:
  622. pin->mode = PM8XXX_MPP_ANALOG;
  623. pin->output = true;
  624. pin->aout_level = level;
  625. pin->output_value = !!(ctrl & BIT(0));
  626. pin->paired = !!(ctrl & BIT(1));
  627. break;
  628. case PM8XXX_MPP_TYPE_SINK:
  629. pin->mode = PM8XXX_MPP_SINK;
  630. pin->drive_strength = 5 * (level + 1);
  631. pin->output_value = !!(ctrl & BIT(0));
  632. pin->paired = !!(ctrl & BIT(1));
  633. break;
  634. case PM8XXX_MPP_TYPE_DTEST_SINK:
  635. pin->mode = PM8XXX_MPP_SINK;
  636. pin->dtest = ctrl + 1;
  637. pin->drive_strength = 5 * (level + 1);
  638. break;
  639. case PM8XXX_MPP_TYPE_DTEST_OUTPUT:
  640. pin->mode = PM8XXX_MPP_DIGITAL;
  641. pin->power_source = level;
  642. if (ctrl >= 1)
  643. pin->dtest = ctrl;
  644. break;
  645. }
  646. return 0;
  647. }
  648. static const struct of_device_id pm8xxx_mpp_of_match[] = {
  649. { .compatible = "qcom,pm8018-mpp", .data = (void *)6 },
  650. { .compatible = "qcom,pm8038-mpp", .data = (void *)6 },
  651. { .compatible = "qcom,pm8917-mpp", .data = (void *)10 },
  652. { .compatible = "qcom,pm8821-mpp", .data = (void *)4 },
  653. { .compatible = "qcom,pm8921-mpp", .data = (void *)12 },
  654. { },
  655. };
  656. MODULE_DEVICE_TABLE(of, pm8xxx_mpp_of_match);
  657. static int pm8xxx_mpp_probe(struct platform_device *pdev)
  658. {
  659. struct pm8xxx_pin_data *pin_data;
  660. struct pinctrl_pin_desc *pins;
  661. struct pm8xxx_mpp *pctrl;
  662. int ret;
  663. int i;
  664. pctrl = devm_kzalloc(&pdev->dev, sizeof(*pctrl), GFP_KERNEL);
  665. if (!pctrl)
  666. return -ENOMEM;
  667. pctrl->dev = &pdev->dev;
  668. pctrl->npins = (unsigned long)of_device_get_match_data(&pdev->dev);
  669. pctrl->regmap = dev_get_regmap(pdev->dev.parent, NULL);
  670. if (!pctrl->regmap) {
  671. dev_err(&pdev->dev, "parent regmap unavailable\n");
  672. return -ENXIO;
  673. }
  674. pctrl->desc = pm8xxx_pinctrl_desc;
  675. pctrl->desc.npins = pctrl->npins;
  676. pins = devm_kcalloc(&pdev->dev,
  677. pctrl->desc.npins,
  678. sizeof(struct pinctrl_pin_desc),
  679. GFP_KERNEL);
  680. if (!pins)
  681. return -ENOMEM;
  682. pin_data = devm_kcalloc(&pdev->dev,
  683. pctrl->desc.npins,
  684. sizeof(struct pm8xxx_pin_data),
  685. GFP_KERNEL);
  686. if (!pin_data)
  687. return -ENOMEM;
  688. for (i = 0; i < pctrl->desc.npins; i++) {
  689. pin_data[i].reg = SSBI_REG_ADDR_MPP(i);
  690. pin_data[i].irq = platform_get_irq(pdev, i);
  691. if (pin_data[i].irq < 0) {
  692. dev_err(&pdev->dev,
  693. "missing interrupts for pin %d\n", i);
  694. return pin_data[i].irq;
  695. }
  696. ret = pm8xxx_pin_populate(pctrl, &pin_data[i]);
  697. if (ret)
  698. return ret;
  699. pins[i].number = i;
  700. pins[i].name = pm8xxx_groups[i];
  701. pins[i].drv_data = &pin_data[i];
  702. }
  703. pctrl->desc.pins = pins;
  704. pctrl->desc.num_custom_params = ARRAY_SIZE(pm8xxx_mpp_bindings);
  705. pctrl->desc.custom_params = pm8xxx_mpp_bindings;
  706. #ifdef CONFIG_DEBUG_FS
  707. pctrl->desc.custom_conf_items = pm8xxx_conf_items;
  708. #endif
  709. pctrl->pctrl = pinctrl_register(&pctrl->desc, &pdev->dev, pctrl);
  710. if (IS_ERR(pctrl->pctrl)) {
  711. dev_err(&pdev->dev, "couldn't register pm8xxx mpp driver\n");
  712. return PTR_ERR(pctrl->pctrl);
  713. }
  714. pctrl->chip = pm8xxx_mpp_template;
  715. pctrl->chip.base = -1;
  716. pctrl->chip.dev = &pdev->dev;
  717. pctrl->chip.of_node = pdev->dev.of_node;
  718. pctrl->chip.of_gpio_n_cells = 2;
  719. pctrl->chip.label = dev_name(pctrl->dev);
  720. pctrl->chip.ngpio = pctrl->npins;
  721. ret = gpiochip_add(&pctrl->chip);
  722. if (ret) {
  723. dev_err(&pdev->dev, "failed register gpiochip\n");
  724. goto unregister_pinctrl;
  725. }
  726. ret = gpiochip_add_pin_range(&pctrl->chip,
  727. dev_name(pctrl->dev),
  728. 0, 0, pctrl->chip.ngpio);
  729. if (ret) {
  730. dev_err(pctrl->dev, "failed to add pin range\n");
  731. goto unregister_gpiochip;
  732. }
  733. platform_set_drvdata(pdev, pctrl);
  734. dev_dbg(&pdev->dev, "Qualcomm pm8xxx mpp driver probed\n");
  735. return 0;
  736. unregister_gpiochip:
  737. gpiochip_remove(&pctrl->chip);
  738. unregister_pinctrl:
  739. pinctrl_unregister(pctrl->pctrl);
  740. return ret;
  741. }
  742. static int pm8xxx_mpp_remove(struct platform_device *pdev)
  743. {
  744. struct pm8xxx_mpp *pctrl = platform_get_drvdata(pdev);
  745. gpiochip_remove(&pctrl->chip);
  746. pinctrl_unregister(pctrl->pctrl);
  747. return 0;
  748. }
  749. static struct platform_driver pm8xxx_mpp_driver = {
  750. .driver = {
  751. .name = "qcom-ssbi-mpp",
  752. .of_match_table = pm8xxx_mpp_of_match,
  753. },
  754. .probe = pm8xxx_mpp_probe,
  755. .remove = pm8xxx_mpp_remove,
  756. };
  757. module_platform_driver(pm8xxx_mpp_driver);
  758. MODULE_AUTHOR("Bjorn Andersson <bjorn.andersson@sonymobile.com>");
  759. MODULE_DESCRIPTION("Qualcomm PM8xxx MPP driver");
  760. MODULE_LICENSE("GPL v2");