quirks.c 12 KB

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  1. /*
  2. * This file contains quirk handling code for PnP devices
  3. * Some devices do not report all their resources, and need to have extra
  4. * resources added. This is most easily accomplished at initialisation time
  5. * when building up the resource structure for the first time.
  6. *
  7. * Copyright (c) 2000 Peter Denison <peterd@pnd-pc.demon.co.uk>
  8. * Copyright (C) 2008 Hewlett-Packard Development Company, L.P.
  9. * Bjorn Helgaas <bjorn.helgaas@hp.com>
  10. *
  11. * Heavily based on PCI quirks handling which is
  12. *
  13. * Copyright (c) 1999 Martin Mares <mj@ucw.cz>
  14. */
  15. #include <linux/types.h>
  16. #include <linux/kernel.h>
  17. #include <linux/pci.h>
  18. #include <linux/string.h>
  19. #include <linux/slab.h>
  20. #include <linux/pnp.h>
  21. #include <linux/io.h>
  22. #include <linux/kallsyms.h>
  23. #include "base.h"
  24. static void quirk_awe32_add_ports(struct pnp_dev *dev,
  25. struct pnp_option *option,
  26. unsigned int offset)
  27. {
  28. struct pnp_option *new_option;
  29. new_option = kmalloc(sizeof(struct pnp_option), GFP_KERNEL);
  30. if (!new_option) {
  31. dev_err(&dev->dev, "couldn't add ioport region to option set "
  32. "%d\n", pnp_option_set(option));
  33. return;
  34. }
  35. *new_option = *option;
  36. new_option->u.port.min += offset;
  37. new_option->u.port.max += offset;
  38. list_add(&new_option->list, &option->list);
  39. dev_info(&dev->dev, "added ioport region %#llx-%#llx to set %d\n",
  40. (unsigned long long) new_option->u.port.min,
  41. (unsigned long long) new_option->u.port.max,
  42. pnp_option_set(option));
  43. }
  44. static void quirk_awe32_resources(struct pnp_dev *dev)
  45. {
  46. struct pnp_option *option;
  47. unsigned int set = ~0;
  48. /*
  49. * Add two extra ioport regions (at offset 0x400 and 0x800 from the
  50. * one given) to every dependent option set.
  51. */
  52. list_for_each_entry(option, &dev->options, list) {
  53. if (pnp_option_is_dependent(option) &&
  54. pnp_option_set(option) != set) {
  55. set = pnp_option_set(option);
  56. quirk_awe32_add_ports(dev, option, 0x800);
  57. quirk_awe32_add_ports(dev, option, 0x400);
  58. }
  59. }
  60. }
  61. static void quirk_cmi8330_resources(struct pnp_dev *dev)
  62. {
  63. struct pnp_option *option;
  64. struct pnp_irq *irq;
  65. struct pnp_dma *dma;
  66. list_for_each_entry(option, &dev->options, list) {
  67. if (!pnp_option_is_dependent(option))
  68. continue;
  69. if (option->type == IORESOURCE_IRQ) {
  70. irq = &option->u.irq;
  71. bitmap_zero(irq->map.bits, PNP_IRQ_NR);
  72. __set_bit(5, irq->map.bits);
  73. __set_bit(7, irq->map.bits);
  74. __set_bit(10, irq->map.bits);
  75. dev_info(&dev->dev, "set possible IRQs in "
  76. "option set %d to 5, 7, 10\n",
  77. pnp_option_set(option));
  78. } else if (option->type == IORESOURCE_DMA) {
  79. dma = &option->u.dma;
  80. if ((dma->flags & IORESOURCE_DMA_TYPE_MASK) ==
  81. IORESOURCE_DMA_8BIT &&
  82. dma->map != 0x0A) {
  83. dev_info(&dev->dev, "changing possible "
  84. "DMA channel mask in option set %d "
  85. "from %#02x to 0x0A (1, 3)\n",
  86. pnp_option_set(option), dma->map);
  87. dma->map = 0x0A;
  88. }
  89. }
  90. }
  91. }
  92. static void quirk_sb16audio_resources(struct pnp_dev *dev)
  93. {
  94. struct pnp_option *option;
  95. unsigned int prev_option_flags = ~0, n = 0;
  96. struct pnp_port *port;
  97. /*
  98. * The default range on the OPL port for these devices is 0x388-0x388.
  99. * Here we increase that range so that two such cards can be
  100. * auto-configured.
  101. */
  102. list_for_each_entry(option, &dev->options, list) {
  103. if (prev_option_flags != option->flags) {
  104. prev_option_flags = option->flags;
  105. n = 0;
  106. }
  107. if (pnp_option_is_dependent(option) &&
  108. option->type == IORESOURCE_IO) {
  109. n++;
  110. port = &option->u.port;
  111. if (n == 3 && port->min == port->max) {
  112. port->max += 0x70;
  113. dev_info(&dev->dev, "increased option port "
  114. "range from %#llx-%#llx to "
  115. "%#llx-%#llx\n",
  116. (unsigned long long) port->min,
  117. (unsigned long long) port->min,
  118. (unsigned long long) port->min,
  119. (unsigned long long) port->max);
  120. }
  121. }
  122. }
  123. }
  124. static struct pnp_option *pnp_clone_dependent_set(struct pnp_dev *dev,
  125. unsigned int set)
  126. {
  127. struct pnp_option *tail = NULL, *first_new_option = NULL;
  128. struct pnp_option *option, *new_option;
  129. unsigned int flags;
  130. list_for_each_entry(option, &dev->options, list) {
  131. if (pnp_option_is_dependent(option))
  132. tail = option;
  133. }
  134. if (!tail) {
  135. dev_err(&dev->dev, "no dependent option sets\n");
  136. return NULL;
  137. }
  138. flags = pnp_new_dependent_set(dev, PNP_RES_PRIORITY_FUNCTIONAL);
  139. list_for_each_entry(option, &dev->options, list) {
  140. if (pnp_option_is_dependent(option) &&
  141. pnp_option_set(option) == set) {
  142. new_option = kmalloc(sizeof(struct pnp_option),
  143. GFP_KERNEL);
  144. if (!new_option) {
  145. dev_err(&dev->dev, "couldn't clone dependent "
  146. "set %d\n", set);
  147. return NULL;
  148. }
  149. *new_option = *option;
  150. new_option->flags = flags;
  151. if (!first_new_option)
  152. first_new_option = new_option;
  153. list_add(&new_option->list, &tail->list);
  154. tail = new_option;
  155. }
  156. }
  157. return first_new_option;
  158. }
  159. static void quirk_add_irq_optional_dependent_sets(struct pnp_dev *dev)
  160. {
  161. struct pnp_option *new_option;
  162. unsigned int num_sets, i, set;
  163. struct pnp_irq *irq;
  164. num_sets = dev->num_dependent_sets;
  165. for (i = 0; i < num_sets; i++) {
  166. new_option = pnp_clone_dependent_set(dev, i);
  167. if (!new_option)
  168. return;
  169. set = pnp_option_set(new_option);
  170. while (new_option && pnp_option_set(new_option) == set) {
  171. if (new_option->type == IORESOURCE_IRQ) {
  172. irq = &new_option->u.irq;
  173. irq->flags |= IORESOURCE_IRQ_OPTIONAL;
  174. }
  175. dbg_pnp_show_option(dev, new_option);
  176. new_option = list_entry(new_option->list.next,
  177. struct pnp_option, list);
  178. }
  179. dev_info(&dev->dev, "added dependent option set %d (same as "
  180. "set %d except IRQ optional)\n", set, i);
  181. }
  182. }
  183. static void quirk_ad1815_mpu_resources(struct pnp_dev *dev)
  184. {
  185. struct pnp_option *option;
  186. struct pnp_irq *irq = NULL;
  187. unsigned int independent_irqs = 0;
  188. list_for_each_entry(option, &dev->options, list) {
  189. if (option->type == IORESOURCE_IRQ &&
  190. !pnp_option_is_dependent(option)) {
  191. independent_irqs++;
  192. irq = &option->u.irq;
  193. }
  194. }
  195. if (independent_irqs != 1)
  196. return;
  197. irq->flags |= IORESOURCE_IRQ_OPTIONAL;
  198. dev_info(&dev->dev, "made independent IRQ optional\n");
  199. }
  200. #include <linux/pci.h>
  201. static void quirk_system_pci_resources(struct pnp_dev *dev)
  202. {
  203. struct pci_dev *pdev = NULL;
  204. struct resource *res;
  205. resource_size_t pnp_start, pnp_end, pci_start, pci_end;
  206. int i, j;
  207. /*
  208. * Some BIOSes have PNP motherboard devices with resources that
  209. * partially overlap PCI BARs. The PNP system driver claims these
  210. * motherboard resources, which prevents the normal PCI driver from
  211. * requesting them later.
  212. *
  213. * This patch disables the PNP resources that conflict with PCI BARs
  214. * so they won't be claimed by the PNP system driver.
  215. */
  216. for_each_pci_dev(pdev) {
  217. for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
  218. unsigned long flags, type;
  219. flags = pci_resource_flags(pdev, i);
  220. type = flags & (IORESOURCE_IO | IORESOURCE_MEM);
  221. if (!type || pci_resource_len(pdev, i) == 0)
  222. continue;
  223. if (flags & IORESOURCE_UNSET)
  224. continue;
  225. pci_start = pci_resource_start(pdev, i);
  226. pci_end = pci_resource_end(pdev, i);
  227. for (j = 0;
  228. (res = pnp_get_resource(dev, type, j)); j++) {
  229. if (res->start == 0 && res->end == 0)
  230. continue;
  231. pnp_start = res->start;
  232. pnp_end = res->end;
  233. /*
  234. * If the PNP region doesn't overlap the PCI
  235. * region at all, there's no problem.
  236. */
  237. if (pnp_end < pci_start || pnp_start > pci_end)
  238. continue;
  239. /*
  240. * If the PNP region completely encloses (or is
  241. * at least as large as) the PCI region, that's
  242. * also OK. For example, this happens when the
  243. * PNP device describes a bridge with PCI
  244. * behind it.
  245. */
  246. if (pnp_start <= pci_start &&
  247. pnp_end >= pci_end)
  248. continue;
  249. /*
  250. * Otherwise, the PNP region overlaps *part* of
  251. * the PCI region, and that might prevent a PCI
  252. * driver from requesting its resources.
  253. */
  254. dev_warn(&dev->dev,
  255. "disabling %pR because it overlaps "
  256. "%s BAR %d %pR\n", res,
  257. pci_name(pdev), i, &pdev->resource[i]);
  258. res->flags |= IORESOURCE_DISABLED;
  259. }
  260. }
  261. }
  262. }
  263. #ifdef CONFIG_AMD_NB
  264. #include <asm/amd_nb.h>
  265. static void quirk_amd_mmconfig_area(struct pnp_dev *dev)
  266. {
  267. resource_size_t start, end;
  268. struct pnp_resource *pnp_res;
  269. struct resource *res;
  270. struct resource mmconfig_res, *mmconfig;
  271. mmconfig = amd_get_mmconfig_range(&mmconfig_res);
  272. if (!mmconfig)
  273. return;
  274. list_for_each_entry(pnp_res, &dev->resources, list) {
  275. res = &pnp_res->res;
  276. if (res->end < mmconfig->start || res->start > mmconfig->end ||
  277. (res->start == mmconfig->start && res->end == mmconfig->end))
  278. continue;
  279. dev_info(&dev->dev, FW_BUG
  280. "%pR covers only part of AMD MMCONFIG area %pR; adding more reservations\n",
  281. res, mmconfig);
  282. if (mmconfig->start < res->start) {
  283. start = mmconfig->start;
  284. end = res->start - 1;
  285. pnp_add_mem_resource(dev, start, end, 0);
  286. }
  287. if (mmconfig->end > res->end) {
  288. start = res->end + 1;
  289. end = mmconfig->end;
  290. pnp_add_mem_resource(dev, start, end, 0);
  291. }
  292. break;
  293. }
  294. }
  295. #endif
  296. #ifdef CONFIG_PCI
  297. /* Device IDs of parts that have 32KB MCH space */
  298. static const unsigned int mch_quirk_devices[] = {
  299. 0x0154, /* Ivy Bridge */
  300. 0x0a04, /* Haswell-ULT */
  301. 0x0c00, /* Haswell */
  302. 0x1604, /* Broadwell */
  303. };
  304. static struct pci_dev *get_intel_host(void)
  305. {
  306. int i;
  307. struct pci_dev *host;
  308. for (i = 0; i < ARRAY_SIZE(mch_quirk_devices); i++) {
  309. host = pci_get_device(PCI_VENDOR_ID_INTEL, mch_quirk_devices[i],
  310. NULL);
  311. if (host)
  312. return host;
  313. }
  314. return NULL;
  315. }
  316. static void quirk_intel_mch(struct pnp_dev *dev)
  317. {
  318. struct pci_dev *host;
  319. u32 addr_lo, addr_hi;
  320. struct pci_bus_region region;
  321. struct resource mch;
  322. struct pnp_resource *pnp_res;
  323. struct resource *res;
  324. host = get_intel_host();
  325. if (!host)
  326. return;
  327. /*
  328. * MCHBAR is not an architected PCI BAR, so MCH space is usually
  329. * reported as a PNP0C02 resource. The MCH space was originally
  330. * 16KB, but is 32KB in newer parts. Some BIOSes still report a
  331. * PNP0C02 resource that is only 16KB, which means the rest of the
  332. * MCH space is consumed but unreported.
  333. */
  334. /*
  335. * Read MCHBAR for Host Member Mapped Register Range Base
  336. * https://www-ssl.intel.com/content/www/us/en/processors/core/4th-gen-core-family-desktop-vol-2-datasheet
  337. * Sec 3.1.12.
  338. */
  339. pci_read_config_dword(host, 0x48, &addr_lo);
  340. region.start = addr_lo & ~0x7fff;
  341. pci_read_config_dword(host, 0x4c, &addr_hi);
  342. region.start |= (u64) addr_hi << 32;
  343. region.end = region.start + 32*1024 - 1;
  344. memset(&mch, 0, sizeof(mch));
  345. mch.flags = IORESOURCE_MEM;
  346. pcibios_bus_to_resource(host->bus, &mch, &region);
  347. list_for_each_entry(pnp_res, &dev->resources, list) {
  348. res = &pnp_res->res;
  349. if (res->end < mch.start || res->start > mch.end)
  350. continue; /* no overlap */
  351. if (res->start == mch.start && res->end == mch.end)
  352. continue; /* exact match */
  353. dev_info(&dev->dev, FW_BUG "PNP resource %pR covers only part of %s Intel MCH; extending to %pR\n",
  354. res, pci_name(host), &mch);
  355. res->start = mch.start;
  356. res->end = mch.end;
  357. break;
  358. }
  359. pci_dev_put(host);
  360. }
  361. #endif
  362. /*
  363. * PnP Quirks
  364. * Cards or devices that need some tweaking due to incomplete resource info
  365. */
  366. static struct pnp_fixup pnp_fixups[] = {
  367. /* Soundblaster awe io port quirk */
  368. {"CTL0021", quirk_awe32_resources},
  369. {"CTL0022", quirk_awe32_resources},
  370. {"CTL0023", quirk_awe32_resources},
  371. /* CMI 8330 interrupt and dma fix */
  372. {"@X@0001", quirk_cmi8330_resources},
  373. /* Soundblaster audio device io port range quirk */
  374. {"CTL0001", quirk_sb16audio_resources},
  375. {"CTL0031", quirk_sb16audio_resources},
  376. {"CTL0041", quirk_sb16audio_resources},
  377. {"CTL0042", quirk_sb16audio_resources},
  378. {"CTL0043", quirk_sb16audio_resources},
  379. {"CTL0044", quirk_sb16audio_resources},
  380. {"CTL0045", quirk_sb16audio_resources},
  381. /* Add IRQ-optional MPU options */
  382. {"ADS7151", quirk_ad1815_mpu_resources},
  383. {"ADS7181", quirk_add_irq_optional_dependent_sets},
  384. {"AZT0002", quirk_add_irq_optional_dependent_sets},
  385. /* PnP resources that might overlap PCI BARs */
  386. {"PNP0c01", quirk_system_pci_resources},
  387. {"PNP0c02", quirk_system_pci_resources},
  388. #ifdef CONFIG_AMD_NB
  389. {"PNP0c01", quirk_amd_mmconfig_area},
  390. #endif
  391. #ifdef CONFIG_PCI
  392. {"PNP0c02", quirk_intel_mch},
  393. #endif
  394. {""}
  395. };
  396. void pnp_fixup_device(struct pnp_dev *dev)
  397. {
  398. struct pnp_fixup *f;
  399. for (f = pnp_fixups; *f->id; f++) {
  400. if (!compare_pnp_id(dev->id, f->id))
  401. continue;
  402. pnp_dbg(&dev->dev, "%s: calling %pF\n", f->id,
  403. f->quirk_function);
  404. f->quirk_function(dev);
  405. }
  406. }