pwm-sti.c 10 KB

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  1. /*
  2. * PWM device driver for ST SoCs.
  3. * Author: Ajit Pal Singh <ajitpal.singh@st.com>
  4. *
  5. * Copyright (C) 2013-2014 STMicroelectronics (R&D) Limited
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License as published by
  9. * the Free Software Foundation; either version 2 of the License, or
  10. * (at your option) any later version.
  11. */
  12. #include <linux/clk.h>
  13. #include <linux/math64.h>
  14. #include <linux/mfd/syscon.h>
  15. #include <linux/module.h>
  16. #include <linux/of.h>
  17. #include <linux/platform_device.h>
  18. #include <linux/pwm.h>
  19. #include <linux/regmap.h>
  20. #include <linux/slab.h>
  21. #include <linux/time.h>
  22. #define STI_DS_REG(ch) (4 * (ch)) /* Channel's Duty Cycle register */
  23. #define STI_PWMCR 0x50 /* Control/Config register */
  24. #define STI_INTEN 0x54 /* Interrupt Enable/Disable register */
  25. #define PWM_PRESCALE_LOW_MASK 0x0f
  26. #define PWM_PRESCALE_HIGH_MASK 0xf0
  27. /* Regfield IDs */
  28. enum {
  29. PWMCLK_PRESCALE_LOW,
  30. PWMCLK_PRESCALE_HIGH,
  31. PWM_EN,
  32. PWM_INT_EN,
  33. /* Keep last */
  34. MAX_REGFIELDS
  35. };
  36. struct sti_pwm_compat_data {
  37. const struct reg_field *reg_fields;
  38. unsigned int num_chan;
  39. unsigned int max_pwm_cnt;
  40. unsigned int max_prescale;
  41. };
  42. struct sti_pwm_chip {
  43. struct device *dev;
  44. struct clk *clk;
  45. unsigned long clk_rate;
  46. struct regmap *regmap;
  47. struct sti_pwm_compat_data *cdata;
  48. struct regmap_field *prescale_low;
  49. struct regmap_field *prescale_high;
  50. struct regmap_field *pwm_en;
  51. struct regmap_field *pwm_int_en;
  52. struct pwm_chip chip;
  53. struct pwm_device *cur;
  54. unsigned long configured;
  55. unsigned int en_count;
  56. struct mutex sti_pwm_lock; /* To sync between enable/disable calls */
  57. void __iomem *mmio;
  58. };
  59. static const struct reg_field sti_pwm_regfields[MAX_REGFIELDS] = {
  60. [PWMCLK_PRESCALE_LOW] = REG_FIELD(STI_PWMCR, 0, 3),
  61. [PWMCLK_PRESCALE_HIGH] = REG_FIELD(STI_PWMCR, 11, 14),
  62. [PWM_EN] = REG_FIELD(STI_PWMCR, 9, 9),
  63. [PWM_INT_EN] = REG_FIELD(STI_INTEN, 0, 0),
  64. };
  65. static inline struct sti_pwm_chip *to_sti_pwmchip(struct pwm_chip *chip)
  66. {
  67. return container_of(chip, struct sti_pwm_chip, chip);
  68. }
  69. /*
  70. * Calculate the prescaler value corresponding to the period.
  71. */
  72. static int sti_pwm_get_prescale(struct sti_pwm_chip *pc, unsigned long period,
  73. unsigned int *prescale)
  74. {
  75. struct sti_pwm_compat_data *cdata = pc->cdata;
  76. unsigned long val;
  77. unsigned int ps;
  78. /*
  79. * prescale = ((period_ns * clk_rate) / (10^9 * (max_pwm_count + 1)) - 1
  80. */
  81. val = NSEC_PER_SEC / pc->clk_rate;
  82. val *= cdata->max_pwm_cnt + 1;
  83. if (period % val) {
  84. return -EINVAL;
  85. } else {
  86. ps = period / val - 1;
  87. if (ps > cdata->max_prescale)
  88. return -EINVAL;
  89. }
  90. *prescale = ps;
  91. return 0;
  92. }
  93. /*
  94. * For STiH4xx PWM IP, the PWM period is fixed to 256 local clock cycles.
  95. * The only way to change the period (apart from changing the PWM input clock)
  96. * is to change the PWM clock prescaler.
  97. * The prescaler is of 8 bits, so 256 prescaler values and hence
  98. * 256 possible period values are supported (for a particular clock rate).
  99. * The requested period will be applied only if it matches one of these
  100. * 256 values.
  101. */
  102. static int sti_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm,
  103. int duty_ns, int period_ns)
  104. {
  105. struct sti_pwm_chip *pc = to_sti_pwmchip(chip);
  106. struct sti_pwm_compat_data *cdata = pc->cdata;
  107. struct pwm_device *cur = pc->cur;
  108. struct device *dev = pc->dev;
  109. unsigned int prescale = 0, pwmvalx;
  110. int ret;
  111. unsigned int ncfg;
  112. bool period_same = false;
  113. ncfg = hweight_long(pc->configured);
  114. if (ncfg)
  115. period_same = (period_ns == pwm_get_period(cur));
  116. /* Allow configuration changes if one of the
  117. * following conditions satisfy.
  118. * 1. No channels have been configured.
  119. * 2. Only one channel has been configured and the new request
  120. * is for the same channel.
  121. * 3. Only one channel has been configured and the new request is
  122. * for a new channel and period of the new channel is same as
  123. * the current configured period.
  124. * 4. More than one channels are configured and period of the new
  125. * requestis the same as the current period.
  126. */
  127. if (!ncfg ||
  128. ((ncfg == 1) && (pwm->hwpwm == cur->hwpwm)) ||
  129. ((ncfg == 1) && (pwm->hwpwm != cur->hwpwm) && period_same) ||
  130. ((ncfg > 1) && period_same)) {
  131. /* Enable clock before writing to PWM registers. */
  132. ret = clk_enable(pc->clk);
  133. if (ret)
  134. return ret;
  135. if (!period_same) {
  136. ret = sti_pwm_get_prescale(pc, period_ns, &prescale);
  137. if (ret)
  138. goto clk_dis;
  139. ret =
  140. regmap_field_write(pc->prescale_low,
  141. prescale & PWM_PRESCALE_LOW_MASK);
  142. if (ret)
  143. goto clk_dis;
  144. ret =
  145. regmap_field_write(pc->prescale_high,
  146. (prescale & PWM_PRESCALE_HIGH_MASK) >> 4);
  147. if (ret)
  148. goto clk_dis;
  149. }
  150. /*
  151. * When PWMVal == 0, PWM pulse = 1 local clock cycle.
  152. * When PWMVal == max_pwm_count,
  153. * PWM pulse = (max_pwm_count + 1) local cycles,
  154. * that is continuous pulse: signal never goes low.
  155. */
  156. pwmvalx = cdata->max_pwm_cnt * duty_ns / period_ns;
  157. ret = regmap_write(pc->regmap, STI_DS_REG(pwm->hwpwm), pwmvalx);
  158. if (ret)
  159. goto clk_dis;
  160. ret = regmap_field_write(pc->pwm_int_en, 0);
  161. set_bit(pwm->hwpwm, &pc->configured);
  162. pc->cur = pwm;
  163. dev_dbg(dev, "prescale:%u, period:%i, duty:%i, pwmvalx:%u\n",
  164. prescale, period_ns, duty_ns, pwmvalx);
  165. } else {
  166. return -EINVAL;
  167. }
  168. clk_dis:
  169. clk_disable(pc->clk);
  170. return ret;
  171. }
  172. static int sti_pwm_enable(struct pwm_chip *chip, struct pwm_device *pwm)
  173. {
  174. struct sti_pwm_chip *pc = to_sti_pwmchip(chip);
  175. struct device *dev = pc->dev;
  176. int ret = 0;
  177. /*
  178. * Since we have a common enable for all PWM channels,
  179. * do not enable if already enabled.
  180. */
  181. mutex_lock(&pc->sti_pwm_lock);
  182. if (!pc->en_count) {
  183. ret = clk_enable(pc->clk);
  184. if (ret)
  185. goto out;
  186. ret = regmap_field_write(pc->pwm_en, 1);
  187. if (ret) {
  188. dev_err(dev, "failed to enable PWM device:%d\n",
  189. pwm->hwpwm);
  190. goto out;
  191. }
  192. }
  193. pc->en_count++;
  194. out:
  195. mutex_unlock(&pc->sti_pwm_lock);
  196. return ret;
  197. }
  198. static void sti_pwm_disable(struct pwm_chip *chip, struct pwm_device *pwm)
  199. {
  200. struct sti_pwm_chip *pc = to_sti_pwmchip(chip);
  201. mutex_lock(&pc->sti_pwm_lock);
  202. if (--pc->en_count) {
  203. mutex_unlock(&pc->sti_pwm_lock);
  204. return;
  205. }
  206. regmap_field_write(pc->pwm_en, 0);
  207. clk_disable(pc->clk);
  208. mutex_unlock(&pc->sti_pwm_lock);
  209. }
  210. static void sti_pwm_free(struct pwm_chip *chip, struct pwm_device *pwm)
  211. {
  212. struct sti_pwm_chip *pc = to_sti_pwmchip(chip);
  213. clear_bit(pwm->hwpwm, &pc->configured);
  214. }
  215. static const struct pwm_ops sti_pwm_ops = {
  216. .config = sti_pwm_config,
  217. .enable = sti_pwm_enable,
  218. .disable = sti_pwm_disable,
  219. .free = sti_pwm_free,
  220. .owner = THIS_MODULE,
  221. };
  222. static int sti_pwm_probe_dt(struct sti_pwm_chip *pc)
  223. {
  224. struct device *dev = pc->dev;
  225. const struct reg_field *reg_fields;
  226. struct device_node *np = dev->of_node;
  227. struct sti_pwm_compat_data *cdata = pc->cdata;
  228. u32 num_chan;
  229. of_property_read_u32(np, "st,pwm-num-chan", &num_chan);
  230. if (num_chan)
  231. cdata->num_chan = num_chan;
  232. reg_fields = cdata->reg_fields;
  233. pc->prescale_low = devm_regmap_field_alloc(dev, pc->regmap,
  234. reg_fields[PWMCLK_PRESCALE_LOW]);
  235. if (IS_ERR(pc->prescale_low))
  236. return PTR_ERR(pc->prescale_low);
  237. pc->prescale_high = devm_regmap_field_alloc(dev, pc->regmap,
  238. reg_fields[PWMCLK_PRESCALE_HIGH]);
  239. if (IS_ERR(pc->prescale_high))
  240. return PTR_ERR(pc->prescale_high);
  241. pc->pwm_en = devm_regmap_field_alloc(dev, pc->regmap,
  242. reg_fields[PWM_EN]);
  243. if (IS_ERR(pc->pwm_en))
  244. return PTR_ERR(pc->pwm_en);
  245. pc->pwm_int_en = devm_regmap_field_alloc(dev, pc->regmap,
  246. reg_fields[PWM_INT_EN]);
  247. if (IS_ERR(pc->pwm_int_en))
  248. return PTR_ERR(pc->pwm_int_en);
  249. return 0;
  250. }
  251. static const struct regmap_config sti_pwm_regmap_config = {
  252. .reg_bits = 32,
  253. .val_bits = 32,
  254. .reg_stride = 4,
  255. };
  256. static int sti_pwm_probe(struct platform_device *pdev)
  257. {
  258. struct device *dev = &pdev->dev;
  259. struct sti_pwm_compat_data *cdata;
  260. struct sti_pwm_chip *pc;
  261. struct resource *res;
  262. int ret;
  263. pc = devm_kzalloc(dev, sizeof(*pc), GFP_KERNEL);
  264. if (!pc)
  265. return -ENOMEM;
  266. cdata = devm_kzalloc(dev, sizeof(*cdata), GFP_KERNEL);
  267. if (!cdata)
  268. return -ENOMEM;
  269. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  270. pc->mmio = devm_ioremap_resource(dev, res);
  271. if (IS_ERR(pc->mmio))
  272. return PTR_ERR(pc->mmio);
  273. pc->regmap = devm_regmap_init_mmio(dev, pc->mmio,
  274. &sti_pwm_regmap_config);
  275. if (IS_ERR(pc->regmap))
  276. return PTR_ERR(pc->regmap);
  277. /*
  278. * Setup PWM data with default values: some values could be replaced
  279. * with specific ones provided from Device Tree.
  280. */
  281. cdata->reg_fields = &sti_pwm_regfields[0];
  282. cdata->max_prescale = 0xff;
  283. cdata->max_pwm_cnt = 255;
  284. cdata->num_chan = 1;
  285. pc->cdata = cdata;
  286. pc->dev = dev;
  287. pc->en_count = 0;
  288. mutex_init(&pc->sti_pwm_lock);
  289. ret = sti_pwm_probe_dt(pc);
  290. if (ret)
  291. return ret;
  292. pc->clk = of_clk_get_by_name(dev->of_node, "pwm");
  293. if (IS_ERR(pc->clk)) {
  294. dev_err(dev, "failed to get PWM clock\n");
  295. return PTR_ERR(pc->clk);
  296. }
  297. pc->clk_rate = clk_get_rate(pc->clk);
  298. if (!pc->clk_rate) {
  299. dev_err(dev, "failed to get clock rate\n");
  300. return -EINVAL;
  301. }
  302. ret = clk_prepare(pc->clk);
  303. if (ret) {
  304. dev_err(dev, "failed to prepare clock\n");
  305. return ret;
  306. }
  307. pc->chip.dev = dev;
  308. pc->chip.ops = &sti_pwm_ops;
  309. pc->chip.base = -1;
  310. pc->chip.npwm = pc->cdata->num_chan;
  311. pc->chip.can_sleep = true;
  312. ret = pwmchip_add(&pc->chip);
  313. if (ret < 0) {
  314. clk_unprepare(pc->clk);
  315. return ret;
  316. }
  317. platform_set_drvdata(pdev, pc);
  318. return 0;
  319. }
  320. static int sti_pwm_remove(struct platform_device *pdev)
  321. {
  322. struct sti_pwm_chip *pc = platform_get_drvdata(pdev);
  323. unsigned int i;
  324. for (i = 0; i < pc->cdata->num_chan; i++)
  325. pwm_disable(&pc->chip.pwms[i]);
  326. clk_unprepare(pc->clk);
  327. return pwmchip_remove(&pc->chip);
  328. }
  329. static const struct of_device_id sti_pwm_of_match[] = {
  330. { .compatible = "st,sti-pwm", },
  331. { /* sentinel */ }
  332. };
  333. MODULE_DEVICE_TABLE(of, sti_pwm_of_match);
  334. static struct platform_driver sti_pwm_driver = {
  335. .driver = {
  336. .name = "sti-pwm",
  337. .of_match_table = sti_pwm_of_match,
  338. },
  339. .probe = sti_pwm_probe,
  340. .remove = sti_pwm_remove,
  341. };
  342. module_platform_driver(sti_pwm_driver);
  343. MODULE_AUTHOR("Ajit Pal Singh <ajitpal.singh@st.com>");
  344. MODULE_DESCRIPTION("STMicroelectronics ST PWM driver");
  345. MODULE_LICENSE("GPL");