rtc-ds1307.c 32 KB

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  1. /*
  2. * rtc-ds1307.c - RTC driver for some mostly-compatible I2C chips.
  3. *
  4. * Copyright (C) 2005 James Chapman (ds1337 core)
  5. * Copyright (C) 2006 David Brownell
  6. * Copyright (C) 2009 Matthias Fuchs (rx8025 support)
  7. * Copyright (C) 2012 Bertrand Achard (nvram access fixes)
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License version 2 as
  11. * published by the Free Software Foundation.
  12. */
  13. #include <linux/bcd.h>
  14. #include <linux/i2c.h>
  15. #include <linux/init.h>
  16. #include <linux/module.h>
  17. #include <linux/rtc/ds1307.h>
  18. #include <linux/rtc.h>
  19. #include <linux/slab.h>
  20. #include <linux/string.h>
  21. /*
  22. * We can't determine type by probing, but if we expect pre-Linux code
  23. * to have set the chip up as a clock (turning on the oscillator and
  24. * setting the date and time), Linux can ignore the non-clock features.
  25. * That's a natural job for a factory or repair bench.
  26. */
  27. enum ds_type {
  28. ds_1307,
  29. ds_1337,
  30. ds_1338,
  31. ds_1339,
  32. ds_1340,
  33. ds_1388,
  34. ds_3231,
  35. m41t00,
  36. mcp794xx,
  37. rx_8025,
  38. last_ds_type /* always last */
  39. /* rs5c372 too? different address... */
  40. };
  41. /* RTC registers don't differ much, except for the century flag */
  42. #define DS1307_REG_SECS 0x00 /* 00-59 */
  43. # define DS1307_BIT_CH 0x80
  44. # define DS1340_BIT_nEOSC 0x80
  45. # define MCP794XX_BIT_ST 0x80
  46. #define DS1307_REG_MIN 0x01 /* 00-59 */
  47. #define DS1307_REG_HOUR 0x02 /* 00-23, or 1-12{am,pm} */
  48. # define DS1307_BIT_12HR 0x40 /* in REG_HOUR */
  49. # define DS1307_BIT_PM 0x20 /* in REG_HOUR */
  50. # define DS1340_BIT_CENTURY_EN 0x80 /* in REG_HOUR */
  51. # define DS1340_BIT_CENTURY 0x40 /* in REG_HOUR */
  52. #define DS1307_REG_WDAY 0x03 /* 01-07 */
  53. # define MCP794XX_BIT_VBATEN 0x08
  54. #define DS1307_REG_MDAY 0x04 /* 01-31 */
  55. #define DS1307_REG_MONTH 0x05 /* 01-12 */
  56. # define DS1337_BIT_CENTURY 0x80 /* in REG_MONTH */
  57. #define DS1307_REG_YEAR 0x06 /* 00-99 */
  58. /*
  59. * Other registers (control, status, alarms, trickle charge, NVRAM, etc)
  60. * start at 7, and they differ a LOT. Only control and status matter for
  61. * basic RTC date and time functionality; be careful using them.
  62. */
  63. #define DS1307_REG_CONTROL 0x07 /* or ds1338 */
  64. # define DS1307_BIT_OUT 0x80
  65. # define DS1338_BIT_OSF 0x20
  66. # define DS1307_BIT_SQWE 0x10
  67. # define DS1307_BIT_RS1 0x02
  68. # define DS1307_BIT_RS0 0x01
  69. #define DS1337_REG_CONTROL 0x0e
  70. # define DS1337_BIT_nEOSC 0x80
  71. # define DS1339_BIT_BBSQI 0x20
  72. # define DS3231_BIT_BBSQW 0x40 /* same as BBSQI */
  73. # define DS1337_BIT_RS2 0x10
  74. # define DS1337_BIT_RS1 0x08
  75. # define DS1337_BIT_INTCN 0x04
  76. # define DS1337_BIT_A2IE 0x02
  77. # define DS1337_BIT_A1IE 0x01
  78. #define DS1340_REG_CONTROL 0x07
  79. # define DS1340_BIT_OUT 0x80
  80. # define DS1340_BIT_FT 0x40
  81. # define DS1340_BIT_CALIB_SIGN 0x20
  82. # define DS1340_M_CALIBRATION 0x1f
  83. #define DS1340_REG_FLAG 0x09
  84. # define DS1340_BIT_OSF 0x80
  85. #define DS1337_REG_STATUS 0x0f
  86. # define DS1337_BIT_OSF 0x80
  87. # define DS1337_BIT_A2I 0x02
  88. # define DS1337_BIT_A1I 0x01
  89. #define DS1339_REG_ALARM1_SECS 0x07
  90. #define DS13XX_TRICKLE_CHARGER_MAGIC 0xa0
  91. #define RX8025_REG_CTRL1 0x0e
  92. # define RX8025_BIT_2412 0x20
  93. #define RX8025_REG_CTRL2 0x0f
  94. # define RX8025_BIT_PON 0x10
  95. # define RX8025_BIT_VDET 0x40
  96. # define RX8025_BIT_XST 0x20
  97. struct ds1307 {
  98. u8 offset; /* register's offset */
  99. u8 regs[11];
  100. u16 nvram_offset;
  101. struct bin_attribute *nvram;
  102. enum ds_type type;
  103. unsigned long flags;
  104. #define HAS_NVRAM 0 /* bit 0 == sysfs file active */
  105. #define HAS_ALARM 1 /* bit 1 == irq claimed */
  106. struct i2c_client *client;
  107. struct rtc_device *rtc;
  108. s32 (*read_block_data)(const struct i2c_client *client, u8 command,
  109. u8 length, u8 *values);
  110. s32 (*write_block_data)(const struct i2c_client *client, u8 command,
  111. u8 length, const u8 *values);
  112. };
  113. struct chip_desc {
  114. unsigned alarm:1;
  115. u16 nvram_offset;
  116. u16 nvram_size;
  117. u16 trickle_charger_reg;
  118. u8 trickle_charger_setup;
  119. u8 (*do_trickle_setup)(struct i2c_client *, uint32_t, bool);
  120. };
  121. static u8 do_trickle_setup_ds1339(struct i2c_client *,
  122. uint32_t ohms, bool diode);
  123. static struct chip_desc chips[last_ds_type] = {
  124. [ds_1307] = {
  125. .nvram_offset = 8,
  126. .nvram_size = 56,
  127. },
  128. [ds_1337] = {
  129. .alarm = 1,
  130. },
  131. [ds_1338] = {
  132. .nvram_offset = 8,
  133. .nvram_size = 56,
  134. },
  135. [ds_1339] = {
  136. .alarm = 1,
  137. .trickle_charger_reg = 0x10,
  138. .do_trickle_setup = &do_trickle_setup_ds1339,
  139. },
  140. [ds_1340] = {
  141. .trickle_charger_reg = 0x08,
  142. },
  143. [ds_1388] = {
  144. .trickle_charger_reg = 0x0a,
  145. },
  146. [ds_3231] = {
  147. .alarm = 1,
  148. },
  149. [mcp794xx] = {
  150. .alarm = 1,
  151. /* this is battery backed SRAM */
  152. .nvram_offset = 0x20,
  153. .nvram_size = 0x40,
  154. },
  155. };
  156. static const struct i2c_device_id ds1307_id[] = {
  157. { "ds1307", ds_1307 },
  158. { "ds1337", ds_1337 },
  159. { "ds1338", ds_1338 },
  160. { "ds1339", ds_1339 },
  161. { "ds1388", ds_1388 },
  162. { "ds1340", ds_1340 },
  163. { "ds3231", ds_3231 },
  164. { "m41t00", m41t00 },
  165. { "mcp7940x", mcp794xx },
  166. { "mcp7941x", mcp794xx },
  167. { "pt7c4338", ds_1307 },
  168. { "rx8025", rx_8025 },
  169. { }
  170. };
  171. MODULE_DEVICE_TABLE(i2c, ds1307_id);
  172. /*----------------------------------------------------------------------*/
  173. #define BLOCK_DATA_MAX_TRIES 10
  174. static s32 ds1307_read_block_data_once(const struct i2c_client *client,
  175. u8 command, u8 length, u8 *values)
  176. {
  177. s32 i, data;
  178. for (i = 0; i < length; i++) {
  179. data = i2c_smbus_read_byte_data(client, command + i);
  180. if (data < 0)
  181. return data;
  182. values[i] = data;
  183. }
  184. return i;
  185. }
  186. static s32 ds1307_read_block_data(const struct i2c_client *client, u8 command,
  187. u8 length, u8 *values)
  188. {
  189. u8 oldvalues[255];
  190. s32 ret;
  191. int tries = 0;
  192. dev_dbg(&client->dev, "ds1307_read_block_data (length=%d)\n", length);
  193. ret = ds1307_read_block_data_once(client, command, length, values);
  194. if (ret < 0)
  195. return ret;
  196. do {
  197. if (++tries > BLOCK_DATA_MAX_TRIES) {
  198. dev_err(&client->dev,
  199. "ds1307_read_block_data failed\n");
  200. return -EIO;
  201. }
  202. memcpy(oldvalues, values, length);
  203. ret = ds1307_read_block_data_once(client, command, length,
  204. values);
  205. if (ret < 0)
  206. return ret;
  207. } while (memcmp(oldvalues, values, length));
  208. return length;
  209. }
  210. static s32 ds1307_write_block_data(const struct i2c_client *client, u8 command,
  211. u8 length, const u8 *values)
  212. {
  213. u8 currvalues[255];
  214. int tries = 0;
  215. dev_dbg(&client->dev, "ds1307_write_block_data (length=%d)\n", length);
  216. do {
  217. s32 i, ret;
  218. if (++tries > BLOCK_DATA_MAX_TRIES) {
  219. dev_err(&client->dev,
  220. "ds1307_write_block_data failed\n");
  221. return -EIO;
  222. }
  223. for (i = 0; i < length; i++) {
  224. ret = i2c_smbus_write_byte_data(client, command + i,
  225. values[i]);
  226. if (ret < 0)
  227. return ret;
  228. }
  229. ret = ds1307_read_block_data_once(client, command, length,
  230. currvalues);
  231. if (ret < 0)
  232. return ret;
  233. } while (memcmp(currvalues, values, length));
  234. return length;
  235. }
  236. /*----------------------------------------------------------------------*/
  237. /* These RTC devices are not designed to be connected to a SMbus adapter.
  238. SMbus limits block operations length to 32 bytes, whereas it's not
  239. limited on I2C buses. As a result, accesses may exceed 32 bytes;
  240. in that case, split them into smaller blocks */
  241. static s32 ds1307_native_smbus_write_block_data(const struct i2c_client *client,
  242. u8 command, u8 length, const u8 *values)
  243. {
  244. u8 suboffset = 0;
  245. if (length <= I2C_SMBUS_BLOCK_MAX)
  246. return i2c_smbus_write_i2c_block_data(client,
  247. command, length, values);
  248. while (suboffset < length) {
  249. s32 retval = i2c_smbus_write_i2c_block_data(client,
  250. command + suboffset,
  251. min(I2C_SMBUS_BLOCK_MAX, length - suboffset),
  252. values + suboffset);
  253. if (retval < 0)
  254. return retval;
  255. suboffset += I2C_SMBUS_BLOCK_MAX;
  256. }
  257. return length;
  258. }
  259. static s32 ds1307_native_smbus_read_block_data(const struct i2c_client *client,
  260. u8 command, u8 length, u8 *values)
  261. {
  262. u8 suboffset = 0;
  263. if (length <= I2C_SMBUS_BLOCK_MAX)
  264. return i2c_smbus_read_i2c_block_data(client,
  265. command, length, values);
  266. while (suboffset < length) {
  267. s32 retval = i2c_smbus_read_i2c_block_data(client,
  268. command + suboffset,
  269. min(I2C_SMBUS_BLOCK_MAX, length - suboffset),
  270. values + suboffset);
  271. if (retval < 0)
  272. return retval;
  273. suboffset += I2C_SMBUS_BLOCK_MAX;
  274. }
  275. return length;
  276. }
  277. /*----------------------------------------------------------------------*/
  278. /*
  279. * The ds1337 and ds1339 both have two alarms, but we only use the first
  280. * one (with a "seconds" field). For ds1337 we expect nINTA is our alarm
  281. * signal; ds1339 chips have only one alarm signal.
  282. */
  283. static irqreturn_t ds1307_irq(int irq, void *dev_id)
  284. {
  285. struct i2c_client *client = dev_id;
  286. struct ds1307 *ds1307 = i2c_get_clientdata(client);
  287. struct mutex *lock = &ds1307->rtc->ops_lock;
  288. int stat, control;
  289. mutex_lock(lock);
  290. stat = i2c_smbus_read_byte_data(client, DS1337_REG_STATUS);
  291. if (stat < 0)
  292. goto out;
  293. if (stat & DS1337_BIT_A1I) {
  294. stat &= ~DS1337_BIT_A1I;
  295. i2c_smbus_write_byte_data(client, DS1337_REG_STATUS, stat);
  296. control = i2c_smbus_read_byte_data(client, DS1337_REG_CONTROL);
  297. if (control < 0)
  298. goto out;
  299. control &= ~DS1337_BIT_A1IE;
  300. i2c_smbus_write_byte_data(client, DS1337_REG_CONTROL, control);
  301. rtc_update_irq(ds1307->rtc, 1, RTC_AF | RTC_IRQF);
  302. }
  303. out:
  304. mutex_unlock(lock);
  305. return IRQ_HANDLED;
  306. }
  307. /*----------------------------------------------------------------------*/
  308. static int ds1307_get_time(struct device *dev, struct rtc_time *t)
  309. {
  310. struct ds1307 *ds1307 = dev_get_drvdata(dev);
  311. int tmp;
  312. /* read the RTC date and time registers all at once */
  313. tmp = ds1307->read_block_data(ds1307->client,
  314. ds1307->offset, 7, ds1307->regs);
  315. if (tmp != 7) {
  316. dev_err(dev, "%s error %d\n", "read", tmp);
  317. return -EIO;
  318. }
  319. dev_dbg(dev, "%s: %7ph\n", "read", ds1307->regs);
  320. t->tm_sec = bcd2bin(ds1307->regs[DS1307_REG_SECS] & 0x7f);
  321. t->tm_min = bcd2bin(ds1307->regs[DS1307_REG_MIN] & 0x7f);
  322. tmp = ds1307->regs[DS1307_REG_HOUR] & 0x3f;
  323. t->tm_hour = bcd2bin(tmp);
  324. t->tm_wday = bcd2bin(ds1307->regs[DS1307_REG_WDAY] & 0x07) - 1;
  325. t->tm_mday = bcd2bin(ds1307->regs[DS1307_REG_MDAY] & 0x3f);
  326. tmp = ds1307->regs[DS1307_REG_MONTH] & 0x1f;
  327. t->tm_mon = bcd2bin(tmp) - 1;
  328. /* assume 20YY not 19YY, and ignore DS1337_BIT_CENTURY */
  329. t->tm_year = bcd2bin(ds1307->regs[DS1307_REG_YEAR]) + 100;
  330. dev_dbg(dev, "%s secs=%d, mins=%d, "
  331. "hours=%d, mday=%d, mon=%d, year=%d, wday=%d\n",
  332. "read", t->tm_sec, t->tm_min,
  333. t->tm_hour, t->tm_mday,
  334. t->tm_mon, t->tm_year, t->tm_wday);
  335. /* initial clock setting can be undefined */
  336. return rtc_valid_tm(t);
  337. }
  338. static int ds1307_set_time(struct device *dev, struct rtc_time *t)
  339. {
  340. struct ds1307 *ds1307 = dev_get_drvdata(dev);
  341. int result;
  342. int tmp;
  343. u8 *buf = ds1307->regs;
  344. dev_dbg(dev, "%s secs=%d, mins=%d, "
  345. "hours=%d, mday=%d, mon=%d, year=%d, wday=%d\n",
  346. "write", t->tm_sec, t->tm_min,
  347. t->tm_hour, t->tm_mday,
  348. t->tm_mon, t->tm_year, t->tm_wday);
  349. buf[DS1307_REG_SECS] = bin2bcd(t->tm_sec);
  350. buf[DS1307_REG_MIN] = bin2bcd(t->tm_min);
  351. buf[DS1307_REG_HOUR] = bin2bcd(t->tm_hour);
  352. buf[DS1307_REG_WDAY] = bin2bcd(t->tm_wday + 1);
  353. buf[DS1307_REG_MDAY] = bin2bcd(t->tm_mday);
  354. buf[DS1307_REG_MONTH] = bin2bcd(t->tm_mon + 1);
  355. /* assume 20YY not 19YY */
  356. tmp = t->tm_year - 100;
  357. buf[DS1307_REG_YEAR] = bin2bcd(tmp);
  358. switch (ds1307->type) {
  359. case ds_1337:
  360. case ds_1339:
  361. case ds_3231:
  362. buf[DS1307_REG_MONTH] |= DS1337_BIT_CENTURY;
  363. break;
  364. case ds_1340:
  365. buf[DS1307_REG_HOUR] |= DS1340_BIT_CENTURY_EN
  366. | DS1340_BIT_CENTURY;
  367. break;
  368. case mcp794xx:
  369. /*
  370. * these bits were cleared when preparing the date/time
  371. * values and need to be set again before writing the
  372. * buffer out to the device.
  373. */
  374. buf[DS1307_REG_SECS] |= MCP794XX_BIT_ST;
  375. buf[DS1307_REG_WDAY] |= MCP794XX_BIT_VBATEN;
  376. break;
  377. default:
  378. break;
  379. }
  380. dev_dbg(dev, "%s: %7ph\n", "write", buf);
  381. result = ds1307->write_block_data(ds1307->client,
  382. ds1307->offset, 7, buf);
  383. if (result < 0) {
  384. dev_err(dev, "%s error %d\n", "write", result);
  385. return result;
  386. }
  387. return 0;
  388. }
  389. static int ds1337_read_alarm(struct device *dev, struct rtc_wkalrm *t)
  390. {
  391. struct i2c_client *client = to_i2c_client(dev);
  392. struct ds1307 *ds1307 = i2c_get_clientdata(client);
  393. int ret;
  394. if (!test_bit(HAS_ALARM, &ds1307->flags))
  395. return -EINVAL;
  396. /* read all ALARM1, ALARM2, and status registers at once */
  397. ret = ds1307->read_block_data(client,
  398. DS1339_REG_ALARM1_SECS, 9, ds1307->regs);
  399. if (ret != 9) {
  400. dev_err(dev, "%s error %d\n", "alarm read", ret);
  401. return -EIO;
  402. }
  403. dev_dbg(dev, "%s: %02x %02x %02x %02x, %02x %02x %02x, %02x %02x\n",
  404. "alarm read",
  405. ds1307->regs[0], ds1307->regs[1],
  406. ds1307->regs[2], ds1307->regs[3],
  407. ds1307->regs[4], ds1307->regs[5],
  408. ds1307->regs[6], ds1307->regs[7],
  409. ds1307->regs[8]);
  410. /*
  411. * report alarm time (ALARM1); assume 24 hour and day-of-month modes,
  412. * and that all four fields are checked matches
  413. */
  414. t->time.tm_sec = bcd2bin(ds1307->regs[0] & 0x7f);
  415. t->time.tm_min = bcd2bin(ds1307->regs[1] & 0x7f);
  416. t->time.tm_hour = bcd2bin(ds1307->regs[2] & 0x3f);
  417. t->time.tm_mday = bcd2bin(ds1307->regs[3] & 0x3f);
  418. t->time.tm_mon = -1;
  419. t->time.tm_year = -1;
  420. t->time.tm_wday = -1;
  421. t->time.tm_yday = -1;
  422. t->time.tm_isdst = -1;
  423. /* ... and status */
  424. t->enabled = !!(ds1307->regs[7] & DS1337_BIT_A1IE);
  425. t->pending = !!(ds1307->regs[8] & DS1337_BIT_A1I);
  426. dev_dbg(dev, "%s secs=%d, mins=%d, "
  427. "hours=%d, mday=%d, enabled=%d, pending=%d\n",
  428. "alarm read", t->time.tm_sec, t->time.tm_min,
  429. t->time.tm_hour, t->time.tm_mday,
  430. t->enabled, t->pending);
  431. return 0;
  432. }
  433. static int ds1337_set_alarm(struct device *dev, struct rtc_wkalrm *t)
  434. {
  435. struct i2c_client *client = to_i2c_client(dev);
  436. struct ds1307 *ds1307 = i2c_get_clientdata(client);
  437. unsigned char *buf = ds1307->regs;
  438. u8 control, status;
  439. int ret;
  440. if (!test_bit(HAS_ALARM, &ds1307->flags))
  441. return -EINVAL;
  442. dev_dbg(dev, "%s secs=%d, mins=%d, "
  443. "hours=%d, mday=%d, enabled=%d, pending=%d\n",
  444. "alarm set", t->time.tm_sec, t->time.tm_min,
  445. t->time.tm_hour, t->time.tm_mday,
  446. t->enabled, t->pending);
  447. /* read current status of both alarms and the chip */
  448. ret = ds1307->read_block_data(client,
  449. DS1339_REG_ALARM1_SECS, 9, buf);
  450. if (ret != 9) {
  451. dev_err(dev, "%s error %d\n", "alarm write", ret);
  452. return -EIO;
  453. }
  454. control = ds1307->regs[7];
  455. status = ds1307->regs[8];
  456. dev_dbg(dev, "%s: %02x %02x %02x %02x, %02x %02x %02x, %02x %02x\n",
  457. "alarm set (old status)",
  458. ds1307->regs[0], ds1307->regs[1],
  459. ds1307->regs[2], ds1307->regs[3],
  460. ds1307->regs[4], ds1307->regs[5],
  461. ds1307->regs[6], control, status);
  462. /* set ALARM1, using 24 hour and day-of-month modes */
  463. buf[0] = bin2bcd(t->time.tm_sec);
  464. buf[1] = bin2bcd(t->time.tm_min);
  465. buf[2] = bin2bcd(t->time.tm_hour);
  466. buf[3] = bin2bcd(t->time.tm_mday);
  467. /* set ALARM2 to non-garbage */
  468. buf[4] = 0;
  469. buf[5] = 0;
  470. buf[6] = 0;
  471. /* optionally enable ALARM1 */
  472. buf[7] = control & ~(DS1337_BIT_A1IE | DS1337_BIT_A2IE);
  473. if (t->enabled) {
  474. dev_dbg(dev, "alarm IRQ armed\n");
  475. buf[7] |= DS1337_BIT_A1IE; /* only ALARM1 is used */
  476. }
  477. buf[8] = status & ~(DS1337_BIT_A1I | DS1337_BIT_A2I);
  478. ret = ds1307->write_block_data(client,
  479. DS1339_REG_ALARM1_SECS, 9, buf);
  480. if (ret < 0) {
  481. dev_err(dev, "can't set alarm time\n");
  482. return ret;
  483. }
  484. return 0;
  485. }
  486. static int ds1307_alarm_irq_enable(struct device *dev, unsigned int enabled)
  487. {
  488. struct i2c_client *client = to_i2c_client(dev);
  489. struct ds1307 *ds1307 = i2c_get_clientdata(client);
  490. int ret;
  491. if (!test_bit(HAS_ALARM, &ds1307->flags))
  492. return -ENOTTY;
  493. ret = i2c_smbus_read_byte_data(client, DS1337_REG_CONTROL);
  494. if (ret < 0)
  495. return ret;
  496. if (enabled)
  497. ret |= DS1337_BIT_A1IE;
  498. else
  499. ret &= ~DS1337_BIT_A1IE;
  500. ret = i2c_smbus_write_byte_data(client, DS1337_REG_CONTROL, ret);
  501. if (ret < 0)
  502. return ret;
  503. return 0;
  504. }
  505. static const struct rtc_class_ops ds13xx_rtc_ops = {
  506. .read_time = ds1307_get_time,
  507. .set_time = ds1307_set_time,
  508. .read_alarm = ds1337_read_alarm,
  509. .set_alarm = ds1337_set_alarm,
  510. .alarm_irq_enable = ds1307_alarm_irq_enable,
  511. };
  512. /*----------------------------------------------------------------------*/
  513. /*
  514. * Alarm support for mcp794xx devices.
  515. */
  516. #define MCP794XX_REG_CONTROL 0x07
  517. # define MCP794XX_BIT_ALM0_EN 0x10
  518. # define MCP794XX_BIT_ALM1_EN 0x20
  519. #define MCP794XX_REG_ALARM0_BASE 0x0a
  520. #define MCP794XX_REG_ALARM0_CTRL 0x0d
  521. #define MCP794XX_REG_ALARM1_BASE 0x11
  522. #define MCP794XX_REG_ALARM1_CTRL 0x14
  523. # define MCP794XX_BIT_ALMX_IF (1 << 3)
  524. # define MCP794XX_BIT_ALMX_C0 (1 << 4)
  525. # define MCP794XX_BIT_ALMX_C1 (1 << 5)
  526. # define MCP794XX_BIT_ALMX_C2 (1 << 6)
  527. # define MCP794XX_BIT_ALMX_POL (1 << 7)
  528. # define MCP794XX_MSK_ALMX_MATCH (MCP794XX_BIT_ALMX_C0 | \
  529. MCP794XX_BIT_ALMX_C1 | \
  530. MCP794XX_BIT_ALMX_C2)
  531. static irqreturn_t mcp794xx_irq(int irq, void *dev_id)
  532. {
  533. struct i2c_client *client = dev_id;
  534. struct ds1307 *ds1307 = i2c_get_clientdata(client);
  535. struct mutex *lock = &ds1307->rtc->ops_lock;
  536. int reg, ret;
  537. mutex_lock(lock);
  538. /* Check and clear alarm 0 interrupt flag. */
  539. reg = i2c_smbus_read_byte_data(client, MCP794XX_REG_ALARM0_CTRL);
  540. if (reg < 0)
  541. goto out;
  542. if (!(reg & MCP794XX_BIT_ALMX_IF))
  543. goto out;
  544. reg &= ~MCP794XX_BIT_ALMX_IF;
  545. ret = i2c_smbus_write_byte_data(client, MCP794XX_REG_ALARM0_CTRL, reg);
  546. if (ret < 0)
  547. goto out;
  548. /* Disable alarm 0. */
  549. reg = i2c_smbus_read_byte_data(client, MCP794XX_REG_CONTROL);
  550. if (reg < 0)
  551. goto out;
  552. reg &= ~MCP794XX_BIT_ALM0_EN;
  553. ret = i2c_smbus_write_byte_data(client, MCP794XX_REG_CONTROL, reg);
  554. if (ret < 0)
  555. goto out;
  556. rtc_update_irq(ds1307->rtc, 1, RTC_AF | RTC_IRQF);
  557. out:
  558. mutex_unlock(lock);
  559. return IRQ_HANDLED;
  560. }
  561. static int mcp794xx_read_alarm(struct device *dev, struct rtc_wkalrm *t)
  562. {
  563. struct i2c_client *client = to_i2c_client(dev);
  564. struct ds1307 *ds1307 = i2c_get_clientdata(client);
  565. u8 *regs = ds1307->regs;
  566. int ret;
  567. if (!test_bit(HAS_ALARM, &ds1307->flags))
  568. return -EINVAL;
  569. /* Read control and alarm 0 registers. */
  570. ret = ds1307->read_block_data(client, MCP794XX_REG_CONTROL, 10, regs);
  571. if (ret < 0)
  572. return ret;
  573. t->enabled = !!(regs[0] & MCP794XX_BIT_ALM0_EN);
  574. /* Report alarm 0 time assuming 24-hour and day-of-month modes. */
  575. t->time.tm_sec = bcd2bin(ds1307->regs[3] & 0x7f);
  576. t->time.tm_min = bcd2bin(ds1307->regs[4] & 0x7f);
  577. t->time.tm_hour = bcd2bin(ds1307->regs[5] & 0x3f);
  578. t->time.tm_wday = bcd2bin(ds1307->regs[6] & 0x7) - 1;
  579. t->time.tm_mday = bcd2bin(ds1307->regs[7] & 0x3f);
  580. t->time.tm_mon = bcd2bin(ds1307->regs[8] & 0x1f) - 1;
  581. t->time.tm_year = -1;
  582. t->time.tm_yday = -1;
  583. t->time.tm_isdst = -1;
  584. dev_dbg(dev, "%s, sec=%d min=%d hour=%d wday=%d mday=%d mon=%d "
  585. "enabled=%d polarity=%d irq=%d match=%d\n", __func__,
  586. t->time.tm_sec, t->time.tm_min, t->time.tm_hour,
  587. t->time.tm_wday, t->time.tm_mday, t->time.tm_mon, t->enabled,
  588. !!(ds1307->regs[6] & MCP794XX_BIT_ALMX_POL),
  589. !!(ds1307->regs[6] & MCP794XX_BIT_ALMX_IF),
  590. (ds1307->regs[6] & MCP794XX_MSK_ALMX_MATCH) >> 4);
  591. return 0;
  592. }
  593. static int mcp794xx_set_alarm(struct device *dev, struct rtc_wkalrm *t)
  594. {
  595. struct i2c_client *client = to_i2c_client(dev);
  596. struct ds1307 *ds1307 = i2c_get_clientdata(client);
  597. unsigned char *regs = ds1307->regs;
  598. int ret;
  599. if (!test_bit(HAS_ALARM, &ds1307->flags))
  600. return -EINVAL;
  601. dev_dbg(dev, "%s, sec=%d min=%d hour=%d wday=%d mday=%d mon=%d "
  602. "enabled=%d pending=%d\n", __func__,
  603. t->time.tm_sec, t->time.tm_min, t->time.tm_hour,
  604. t->time.tm_wday, t->time.tm_mday, t->time.tm_mon,
  605. t->enabled, t->pending);
  606. /* Read control and alarm 0 registers. */
  607. ret = ds1307->read_block_data(client, MCP794XX_REG_CONTROL, 10, regs);
  608. if (ret < 0)
  609. return ret;
  610. /* Set alarm 0, using 24-hour and day-of-month modes. */
  611. regs[3] = bin2bcd(t->time.tm_sec);
  612. regs[4] = bin2bcd(t->time.tm_min);
  613. regs[5] = bin2bcd(t->time.tm_hour);
  614. regs[6] = bin2bcd(t->time.tm_wday + 1);
  615. regs[7] = bin2bcd(t->time.tm_mday);
  616. regs[8] = bin2bcd(t->time.tm_mon + 1);
  617. /* Clear the alarm 0 interrupt flag. */
  618. regs[6] &= ~MCP794XX_BIT_ALMX_IF;
  619. /* Set alarm match: second, minute, hour, day, date, month. */
  620. regs[6] |= MCP794XX_MSK_ALMX_MATCH;
  621. /* Disable interrupt. We will not enable until completely programmed */
  622. regs[0] &= ~MCP794XX_BIT_ALM0_EN;
  623. ret = ds1307->write_block_data(client, MCP794XX_REG_CONTROL, 10, regs);
  624. if (ret < 0)
  625. return ret;
  626. if (!t->enabled)
  627. return 0;
  628. regs[0] |= MCP794XX_BIT_ALM0_EN;
  629. return i2c_smbus_write_byte_data(client, MCP794XX_REG_CONTROL, regs[0]);
  630. }
  631. static int mcp794xx_alarm_irq_enable(struct device *dev, unsigned int enabled)
  632. {
  633. struct i2c_client *client = to_i2c_client(dev);
  634. struct ds1307 *ds1307 = i2c_get_clientdata(client);
  635. int reg;
  636. if (!test_bit(HAS_ALARM, &ds1307->flags))
  637. return -EINVAL;
  638. reg = i2c_smbus_read_byte_data(client, MCP794XX_REG_CONTROL);
  639. if (reg < 0)
  640. return reg;
  641. if (enabled)
  642. reg |= MCP794XX_BIT_ALM0_EN;
  643. else
  644. reg &= ~MCP794XX_BIT_ALM0_EN;
  645. return i2c_smbus_write_byte_data(client, MCP794XX_REG_CONTROL, reg);
  646. }
  647. static const struct rtc_class_ops mcp794xx_rtc_ops = {
  648. .read_time = ds1307_get_time,
  649. .set_time = ds1307_set_time,
  650. .read_alarm = mcp794xx_read_alarm,
  651. .set_alarm = mcp794xx_set_alarm,
  652. .alarm_irq_enable = mcp794xx_alarm_irq_enable,
  653. };
  654. /*----------------------------------------------------------------------*/
  655. static ssize_t
  656. ds1307_nvram_read(struct file *filp, struct kobject *kobj,
  657. struct bin_attribute *attr,
  658. char *buf, loff_t off, size_t count)
  659. {
  660. struct i2c_client *client;
  661. struct ds1307 *ds1307;
  662. int result;
  663. client = kobj_to_i2c_client(kobj);
  664. ds1307 = i2c_get_clientdata(client);
  665. result = ds1307->read_block_data(client, ds1307->nvram_offset + off,
  666. count, buf);
  667. if (result < 0)
  668. dev_err(&client->dev, "%s error %d\n", "nvram read", result);
  669. return result;
  670. }
  671. static ssize_t
  672. ds1307_nvram_write(struct file *filp, struct kobject *kobj,
  673. struct bin_attribute *attr,
  674. char *buf, loff_t off, size_t count)
  675. {
  676. struct i2c_client *client;
  677. struct ds1307 *ds1307;
  678. int result;
  679. client = kobj_to_i2c_client(kobj);
  680. ds1307 = i2c_get_clientdata(client);
  681. result = ds1307->write_block_data(client, ds1307->nvram_offset + off,
  682. count, buf);
  683. if (result < 0) {
  684. dev_err(&client->dev, "%s error %d\n", "nvram write", result);
  685. return result;
  686. }
  687. return count;
  688. }
  689. /*----------------------------------------------------------------------*/
  690. static u8 do_trickle_setup_ds1339(struct i2c_client *client,
  691. uint32_t ohms, bool diode)
  692. {
  693. u8 setup = (diode) ? DS1307_TRICKLE_CHARGER_DIODE :
  694. DS1307_TRICKLE_CHARGER_NO_DIODE;
  695. switch (ohms) {
  696. case 250:
  697. setup |= DS1307_TRICKLE_CHARGER_250_OHM;
  698. break;
  699. case 2000:
  700. setup |= DS1307_TRICKLE_CHARGER_2K_OHM;
  701. break;
  702. case 4000:
  703. setup |= DS1307_TRICKLE_CHARGER_4K_OHM;
  704. break;
  705. default:
  706. dev_warn(&client->dev,
  707. "Unsupported ohm value %u in dt\n", ohms);
  708. return 0;
  709. }
  710. return setup;
  711. }
  712. static void ds1307_trickle_of_init(struct i2c_client *client,
  713. struct chip_desc *chip)
  714. {
  715. uint32_t ohms = 0;
  716. bool diode = true;
  717. if (!chip->do_trickle_setup)
  718. goto out;
  719. if (of_property_read_u32(client->dev.of_node, "trickle-resistor-ohms" , &ohms))
  720. goto out;
  721. if (of_property_read_bool(client->dev.of_node, "trickle-diode-disable"))
  722. diode = false;
  723. chip->trickle_charger_setup = chip->do_trickle_setup(client,
  724. ohms, diode);
  725. out:
  726. return;
  727. }
  728. static int ds1307_probe(struct i2c_client *client,
  729. const struct i2c_device_id *id)
  730. {
  731. struct ds1307 *ds1307;
  732. int err = -ENODEV;
  733. int tmp;
  734. struct chip_desc *chip = &chips[id->driver_data];
  735. struct i2c_adapter *adapter = to_i2c_adapter(client->dev.parent);
  736. bool want_irq = false;
  737. unsigned char *buf;
  738. struct ds1307_platform_data *pdata = dev_get_platdata(&client->dev);
  739. irq_handler_t irq_handler = ds1307_irq;
  740. static const int bbsqi_bitpos[] = {
  741. [ds_1337] = 0,
  742. [ds_1339] = DS1339_BIT_BBSQI,
  743. [ds_3231] = DS3231_BIT_BBSQW,
  744. };
  745. const struct rtc_class_ops *rtc_ops = &ds13xx_rtc_ops;
  746. if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA)
  747. && !i2c_check_functionality(adapter, I2C_FUNC_SMBUS_I2C_BLOCK))
  748. return -EIO;
  749. ds1307 = devm_kzalloc(&client->dev, sizeof(struct ds1307), GFP_KERNEL);
  750. if (!ds1307)
  751. return -ENOMEM;
  752. i2c_set_clientdata(client, ds1307);
  753. ds1307->client = client;
  754. ds1307->type = id->driver_data;
  755. if (!pdata && client->dev.of_node)
  756. ds1307_trickle_of_init(client, chip);
  757. else if (pdata && pdata->trickle_charger_setup)
  758. chip->trickle_charger_setup = pdata->trickle_charger_setup;
  759. if (chip->trickle_charger_setup && chip->trickle_charger_reg) {
  760. dev_dbg(&client->dev, "writing trickle charger info 0x%x to 0x%x\n",
  761. DS13XX_TRICKLE_CHARGER_MAGIC | chip->trickle_charger_setup,
  762. chip->trickle_charger_reg);
  763. i2c_smbus_write_byte_data(client, chip->trickle_charger_reg,
  764. DS13XX_TRICKLE_CHARGER_MAGIC |
  765. chip->trickle_charger_setup);
  766. }
  767. buf = ds1307->regs;
  768. if (i2c_check_functionality(adapter, I2C_FUNC_SMBUS_I2C_BLOCK)) {
  769. ds1307->read_block_data = ds1307_native_smbus_read_block_data;
  770. ds1307->write_block_data = ds1307_native_smbus_write_block_data;
  771. } else {
  772. ds1307->read_block_data = ds1307_read_block_data;
  773. ds1307->write_block_data = ds1307_write_block_data;
  774. }
  775. switch (ds1307->type) {
  776. case ds_1337:
  777. case ds_1339:
  778. case ds_3231:
  779. /* get registers that the "rtc" read below won't read... */
  780. tmp = ds1307->read_block_data(ds1307->client,
  781. DS1337_REG_CONTROL, 2, buf);
  782. if (tmp != 2) {
  783. dev_dbg(&client->dev, "read error %d\n", tmp);
  784. err = -EIO;
  785. goto exit;
  786. }
  787. /* oscillator off? turn it on, so clock can tick. */
  788. if (ds1307->regs[0] & DS1337_BIT_nEOSC)
  789. ds1307->regs[0] &= ~DS1337_BIT_nEOSC;
  790. /*
  791. * Using IRQ? Disable the square wave and both alarms.
  792. * For some variants, be sure alarms can trigger when we're
  793. * running on Vbackup (BBSQI/BBSQW)
  794. */
  795. if (ds1307->client->irq > 0 && chip->alarm) {
  796. ds1307->regs[0] |= DS1337_BIT_INTCN
  797. | bbsqi_bitpos[ds1307->type];
  798. ds1307->regs[0] &= ~(DS1337_BIT_A2IE | DS1337_BIT_A1IE);
  799. want_irq = true;
  800. }
  801. i2c_smbus_write_byte_data(client, DS1337_REG_CONTROL,
  802. ds1307->regs[0]);
  803. /* oscillator fault? clear flag, and warn */
  804. if (ds1307->regs[1] & DS1337_BIT_OSF) {
  805. i2c_smbus_write_byte_data(client, DS1337_REG_STATUS,
  806. ds1307->regs[1] & ~DS1337_BIT_OSF);
  807. dev_warn(&client->dev, "SET TIME!\n");
  808. }
  809. break;
  810. case rx_8025:
  811. tmp = i2c_smbus_read_i2c_block_data(ds1307->client,
  812. RX8025_REG_CTRL1 << 4 | 0x08, 2, buf);
  813. if (tmp != 2) {
  814. dev_dbg(&client->dev, "read error %d\n", tmp);
  815. err = -EIO;
  816. goto exit;
  817. }
  818. /* oscillator off? turn it on, so clock can tick. */
  819. if (!(ds1307->regs[1] & RX8025_BIT_XST)) {
  820. ds1307->regs[1] |= RX8025_BIT_XST;
  821. i2c_smbus_write_byte_data(client,
  822. RX8025_REG_CTRL2 << 4 | 0x08,
  823. ds1307->regs[1]);
  824. dev_warn(&client->dev,
  825. "oscillator stop detected - SET TIME!\n");
  826. }
  827. if (ds1307->regs[1] & RX8025_BIT_PON) {
  828. ds1307->regs[1] &= ~RX8025_BIT_PON;
  829. i2c_smbus_write_byte_data(client,
  830. RX8025_REG_CTRL2 << 4 | 0x08,
  831. ds1307->regs[1]);
  832. dev_warn(&client->dev, "power-on detected\n");
  833. }
  834. if (ds1307->regs[1] & RX8025_BIT_VDET) {
  835. ds1307->regs[1] &= ~RX8025_BIT_VDET;
  836. i2c_smbus_write_byte_data(client,
  837. RX8025_REG_CTRL2 << 4 | 0x08,
  838. ds1307->regs[1]);
  839. dev_warn(&client->dev, "voltage drop detected\n");
  840. }
  841. /* make sure we are running in 24hour mode */
  842. if (!(ds1307->regs[0] & RX8025_BIT_2412)) {
  843. u8 hour;
  844. /* switch to 24 hour mode */
  845. i2c_smbus_write_byte_data(client,
  846. RX8025_REG_CTRL1 << 4 | 0x08,
  847. ds1307->regs[0] |
  848. RX8025_BIT_2412);
  849. tmp = i2c_smbus_read_i2c_block_data(ds1307->client,
  850. RX8025_REG_CTRL1 << 4 | 0x08, 2, buf);
  851. if (tmp != 2) {
  852. dev_dbg(&client->dev, "read error %d\n", tmp);
  853. err = -EIO;
  854. goto exit;
  855. }
  856. /* correct hour */
  857. hour = bcd2bin(ds1307->regs[DS1307_REG_HOUR]);
  858. if (hour == 12)
  859. hour = 0;
  860. if (ds1307->regs[DS1307_REG_HOUR] & DS1307_BIT_PM)
  861. hour += 12;
  862. i2c_smbus_write_byte_data(client,
  863. DS1307_REG_HOUR << 4 | 0x08,
  864. hour);
  865. }
  866. break;
  867. case ds_1388:
  868. ds1307->offset = 1; /* Seconds starts at 1 */
  869. break;
  870. case mcp794xx:
  871. rtc_ops = &mcp794xx_rtc_ops;
  872. if (ds1307->client->irq > 0 && chip->alarm) {
  873. irq_handler = mcp794xx_irq;
  874. want_irq = true;
  875. }
  876. break;
  877. default:
  878. break;
  879. }
  880. read_rtc:
  881. /* read RTC registers */
  882. tmp = ds1307->read_block_data(ds1307->client, ds1307->offset, 8, buf);
  883. if (tmp != 8) {
  884. dev_dbg(&client->dev, "read error %d\n", tmp);
  885. err = -EIO;
  886. goto exit;
  887. }
  888. /*
  889. * minimal sanity checking; some chips (like DS1340) don't
  890. * specify the extra bits as must-be-zero, but there are
  891. * still a few values that are clearly out-of-range.
  892. */
  893. tmp = ds1307->regs[DS1307_REG_SECS];
  894. switch (ds1307->type) {
  895. case ds_1307:
  896. case m41t00:
  897. /* clock halted? turn it on, so clock can tick. */
  898. if (tmp & DS1307_BIT_CH) {
  899. i2c_smbus_write_byte_data(client, DS1307_REG_SECS, 0);
  900. dev_warn(&client->dev, "SET TIME!\n");
  901. goto read_rtc;
  902. }
  903. break;
  904. case ds_1338:
  905. /* clock halted? turn it on, so clock can tick. */
  906. if (tmp & DS1307_BIT_CH)
  907. i2c_smbus_write_byte_data(client, DS1307_REG_SECS, 0);
  908. /* oscillator fault? clear flag, and warn */
  909. if (ds1307->regs[DS1307_REG_CONTROL] & DS1338_BIT_OSF) {
  910. i2c_smbus_write_byte_data(client, DS1307_REG_CONTROL,
  911. ds1307->regs[DS1307_REG_CONTROL]
  912. & ~DS1338_BIT_OSF);
  913. dev_warn(&client->dev, "SET TIME!\n");
  914. goto read_rtc;
  915. }
  916. break;
  917. case ds_1340:
  918. /* clock halted? turn it on, so clock can tick. */
  919. if (tmp & DS1340_BIT_nEOSC)
  920. i2c_smbus_write_byte_data(client, DS1307_REG_SECS, 0);
  921. tmp = i2c_smbus_read_byte_data(client, DS1340_REG_FLAG);
  922. if (tmp < 0) {
  923. dev_dbg(&client->dev, "read error %d\n", tmp);
  924. err = -EIO;
  925. goto exit;
  926. }
  927. /* oscillator fault? clear flag, and warn */
  928. if (tmp & DS1340_BIT_OSF) {
  929. i2c_smbus_write_byte_data(client, DS1340_REG_FLAG, 0);
  930. dev_warn(&client->dev, "SET TIME!\n");
  931. }
  932. break;
  933. case mcp794xx:
  934. /* make sure that the backup battery is enabled */
  935. if (!(ds1307->regs[DS1307_REG_WDAY] & MCP794XX_BIT_VBATEN)) {
  936. i2c_smbus_write_byte_data(client, DS1307_REG_WDAY,
  937. ds1307->regs[DS1307_REG_WDAY]
  938. | MCP794XX_BIT_VBATEN);
  939. }
  940. /* clock halted? turn it on, so clock can tick. */
  941. if (!(tmp & MCP794XX_BIT_ST)) {
  942. i2c_smbus_write_byte_data(client, DS1307_REG_SECS,
  943. MCP794XX_BIT_ST);
  944. dev_warn(&client->dev, "SET TIME!\n");
  945. goto read_rtc;
  946. }
  947. break;
  948. default:
  949. break;
  950. }
  951. tmp = ds1307->regs[DS1307_REG_HOUR];
  952. switch (ds1307->type) {
  953. case ds_1340:
  954. case m41t00:
  955. /*
  956. * NOTE: ignores century bits; fix before deploying
  957. * systems that will run through year 2100.
  958. */
  959. break;
  960. case rx_8025:
  961. break;
  962. default:
  963. if (!(tmp & DS1307_BIT_12HR))
  964. break;
  965. /*
  966. * Be sure we're in 24 hour mode. Multi-master systems
  967. * take note...
  968. */
  969. tmp = bcd2bin(tmp & 0x1f);
  970. if (tmp == 12)
  971. tmp = 0;
  972. if (ds1307->regs[DS1307_REG_HOUR] & DS1307_BIT_PM)
  973. tmp += 12;
  974. i2c_smbus_write_byte_data(client,
  975. ds1307->offset + DS1307_REG_HOUR,
  976. bin2bcd(tmp));
  977. }
  978. if (want_irq) {
  979. device_set_wakeup_capable(&client->dev, true);
  980. set_bit(HAS_ALARM, &ds1307->flags);
  981. }
  982. ds1307->rtc = devm_rtc_device_register(&client->dev, client->name,
  983. rtc_ops, THIS_MODULE);
  984. if (IS_ERR(ds1307->rtc)) {
  985. return PTR_ERR(ds1307->rtc);
  986. }
  987. if (want_irq) {
  988. err = devm_request_threaded_irq(&client->dev,
  989. client->irq, NULL, irq_handler,
  990. IRQF_SHARED | IRQF_ONESHOT,
  991. ds1307->rtc->name, client);
  992. if (err) {
  993. client->irq = 0;
  994. device_set_wakeup_capable(&client->dev, false);
  995. clear_bit(HAS_ALARM, &ds1307->flags);
  996. dev_err(&client->dev, "unable to request IRQ!\n");
  997. } else
  998. dev_dbg(&client->dev, "got IRQ %d\n", client->irq);
  999. }
  1000. if (chip->nvram_size) {
  1001. ds1307->nvram = devm_kzalloc(&client->dev,
  1002. sizeof(struct bin_attribute),
  1003. GFP_KERNEL);
  1004. if (!ds1307->nvram) {
  1005. dev_err(&client->dev, "cannot allocate memory for nvram sysfs\n");
  1006. } else {
  1007. ds1307->nvram->attr.name = "nvram";
  1008. ds1307->nvram->attr.mode = S_IRUGO | S_IWUSR;
  1009. sysfs_bin_attr_init(ds1307->nvram);
  1010. ds1307->nvram->read = ds1307_nvram_read;
  1011. ds1307->nvram->write = ds1307_nvram_write;
  1012. ds1307->nvram->size = chip->nvram_size;
  1013. ds1307->nvram_offset = chip->nvram_offset;
  1014. err = sysfs_create_bin_file(&client->dev.kobj,
  1015. ds1307->nvram);
  1016. if (err) {
  1017. dev_err(&client->dev,
  1018. "unable to create sysfs file: %s\n",
  1019. ds1307->nvram->attr.name);
  1020. } else {
  1021. set_bit(HAS_NVRAM, &ds1307->flags);
  1022. dev_info(&client->dev, "%zu bytes nvram\n",
  1023. ds1307->nvram->size);
  1024. }
  1025. }
  1026. }
  1027. return 0;
  1028. exit:
  1029. return err;
  1030. }
  1031. static int ds1307_remove(struct i2c_client *client)
  1032. {
  1033. struct ds1307 *ds1307 = i2c_get_clientdata(client);
  1034. if (test_and_clear_bit(HAS_NVRAM, &ds1307->flags))
  1035. sysfs_remove_bin_file(&client->dev.kobj, ds1307->nvram);
  1036. return 0;
  1037. }
  1038. static struct i2c_driver ds1307_driver = {
  1039. .driver = {
  1040. .name = "rtc-ds1307",
  1041. },
  1042. .probe = ds1307_probe,
  1043. .remove = ds1307_remove,
  1044. .id_table = ds1307_id,
  1045. };
  1046. module_i2c_driver(ds1307_driver);
  1047. MODULE_DESCRIPTION("RTC driver for DS1307 and similar chips");
  1048. MODULE_LICENSE("GPL");