rtc-ds1511.c 13 KB

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  1. /*
  2. * An rtc driver for the Dallas DS1511
  3. *
  4. * Copyright (C) 2006 Atsushi Nemoto <anemo@mba.ocn.ne.jp>
  5. * Copyright (C) 2007 Andrew Sharp <andy.sharp@lsi.com>
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License version 2 as
  9. * published by the Free Software Foundation.
  10. *
  11. * Real time clock driver for the Dallas 1511 chip, which also
  12. * contains a watchdog timer. There is a tiny amount of code that
  13. * platform code could use to mess with the watchdog device a little
  14. * bit, but not a full watchdog driver.
  15. */
  16. #include <linux/bcd.h>
  17. #include <linux/init.h>
  18. #include <linux/kernel.h>
  19. #include <linux/gfp.h>
  20. #include <linux/delay.h>
  21. #include <linux/interrupt.h>
  22. #include <linux/rtc.h>
  23. #include <linux/platform_device.h>
  24. #include <linux/io.h>
  25. #include <linux/module.h>
  26. #define DRV_VERSION "0.6"
  27. enum ds1511reg {
  28. DS1511_SEC = 0x0,
  29. DS1511_MIN = 0x1,
  30. DS1511_HOUR = 0x2,
  31. DS1511_DOW = 0x3,
  32. DS1511_DOM = 0x4,
  33. DS1511_MONTH = 0x5,
  34. DS1511_YEAR = 0x6,
  35. DS1511_CENTURY = 0x7,
  36. DS1511_AM1_SEC = 0x8,
  37. DS1511_AM2_MIN = 0x9,
  38. DS1511_AM3_HOUR = 0xa,
  39. DS1511_AM4_DATE = 0xb,
  40. DS1511_WD_MSEC = 0xc,
  41. DS1511_WD_SEC = 0xd,
  42. DS1511_CONTROL_A = 0xe,
  43. DS1511_CONTROL_B = 0xf,
  44. DS1511_RAMADDR_LSB = 0x10,
  45. DS1511_RAMDATA = 0x13
  46. };
  47. #define DS1511_BLF1 0x80
  48. #define DS1511_BLF2 0x40
  49. #define DS1511_PRS 0x20
  50. #define DS1511_PAB 0x10
  51. #define DS1511_TDF 0x08
  52. #define DS1511_KSF 0x04
  53. #define DS1511_WDF 0x02
  54. #define DS1511_IRQF 0x01
  55. #define DS1511_TE 0x80
  56. #define DS1511_CS 0x40
  57. #define DS1511_BME 0x20
  58. #define DS1511_TPE 0x10
  59. #define DS1511_TIE 0x08
  60. #define DS1511_KIE 0x04
  61. #define DS1511_WDE 0x02
  62. #define DS1511_WDS 0x01
  63. #define DS1511_RAM_MAX 0x100
  64. #define RTC_CMD DS1511_CONTROL_B
  65. #define RTC_CMD1 DS1511_CONTROL_A
  66. #define RTC_ALARM_SEC DS1511_AM1_SEC
  67. #define RTC_ALARM_MIN DS1511_AM2_MIN
  68. #define RTC_ALARM_HOUR DS1511_AM3_HOUR
  69. #define RTC_ALARM_DATE DS1511_AM4_DATE
  70. #define RTC_SEC DS1511_SEC
  71. #define RTC_MIN DS1511_MIN
  72. #define RTC_HOUR DS1511_HOUR
  73. #define RTC_DOW DS1511_DOW
  74. #define RTC_DOM DS1511_DOM
  75. #define RTC_MON DS1511_MONTH
  76. #define RTC_YEAR DS1511_YEAR
  77. #define RTC_CENTURY DS1511_CENTURY
  78. #define RTC_TIE DS1511_TIE
  79. #define RTC_TE DS1511_TE
  80. struct rtc_plat_data {
  81. struct rtc_device *rtc;
  82. void __iomem *ioaddr; /* virtual base address */
  83. int irq;
  84. unsigned int irqen;
  85. int alrm_sec;
  86. int alrm_min;
  87. int alrm_hour;
  88. int alrm_mday;
  89. spinlock_t lock;
  90. };
  91. static DEFINE_SPINLOCK(ds1511_lock);
  92. static __iomem char *ds1511_base;
  93. static u32 reg_spacing = 1;
  94. static noinline void
  95. rtc_write(uint8_t val, uint32_t reg)
  96. {
  97. writeb(val, ds1511_base + (reg * reg_spacing));
  98. }
  99. static inline void
  100. rtc_write_alarm(uint8_t val, enum ds1511reg reg)
  101. {
  102. rtc_write((val | 0x80), reg);
  103. }
  104. static noinline uint8_t
  105. rtc_read(enum ds1511reg reg)
  106. {
  107. return readb(ds1511_base + (reg * reg_spacing));
  108. }
  109. static inline void
  110. rtc_disable_update(void)
  111. {
  112. rtc_write((rtc_read(RTC_CMD) & ~RTC_TE), RTC_CMD);
  113. }
  114. static void
  115. rtc_enable_update(void)
  116. {
  117. rtc_write((rtc_read(RTC_CMD) | RTC_TE), RTC_CMD);
  118. }
  119. /*
  120. * #define DS1511_WDOG_RESET_SUPPORT
  121. *
  122. * Uncomment this if you want to use these routines in
  123. * some platform code.
  124. */
  125. #ifdef DS1511_WDOG_RESET_SUPPORT
  126. /*
  127. * just enough code to set the watchdog timer so that it
  128. * will reboot the system
  129. */
  130. void
  131. ds1511_wdog_set(unsigned long deciseconds)
  132. {
  133. /*
  134. * the wdog timer can take 99.99 seconds
  135. */
  136. deciseconds %= 10000;
  137. /*
  138. * set the wdog values in the wdog registers
  139. */
  140. rtc_write(bin2bcd(deciseconds % 100), DS1511_WD_MSEC);
  141. rtc_write(bin2bcd(deciseconds / 100), DS1511_WD_SEC);
  142. /*
  143. * set wdog enable and wdog 'steering' bit to issue a reset
  144. */
  145. rtc_write(rtc_read(RTC_CMD) | DS1511_WDE | DS1511_WDS, RTC_CMD);
  146. }
  147. void
  148. ds1511_wdog_disable(void)
  149. {
  150. /*
  151. * clear wdog enable and wdog 'steering' bits
  152. */
  153. rtc_write(rtc_read(RTC_CMD) & ~(DS1511_WDE | DS1511_WDS), RTC_CMD);
  154. /*
  155. * clear the wdog counter
  156. */
  157. rtc_write(0, DS1511_WD_MSEC);
  158. rtc_write(0, DS1511_WD_SEC);
  159. }
  160. #endif
  161. /*
  162. * set the rtc chip's idea of the time.
  163. * stupidly, some callers call with year unmolested;
  164. * and some call with year = year - 1900. thanks.
  165. */
  166. static int ds1511_rtc_set_time(struct device *dev, struct rtc_time *rtc_tm)
  167. {
  168. u8 mon, day, dow, hrs, min, sec, yrs, cen;
  169. unsigned long flags;
  170. /*
  171. * won't have to change this for a while
  172. */
  173. if (rtc_tm->tm_year < 1900)
  174. rtc_tm->tm_year += 1900;
  175. if (rtc_tm->tm_year < 1970)
  176. return -EINVAL;
  177. yrs = rtc_tm->tm_year % 100;
  178. cen = rtc_tm->tm_year / 100;
  179. mon = rtc_tm->tm_mon + 1; /* tm_mon starts at zero */
  180. day = rtc_tm->tm_mday;
  181. dow = rtc_tm->tm_wday & 0x7; /* automatic BCD */
  182. hrs = rtc_tm->tm_hour;
  183. min = rtc_tm->tm_min;
  184. sec = rtc_tm->tm_sec;
  185. if ((mon > 12) || (day == 0))
  186. return -EINVAL;
  187. if (day > rtc_month_days(rtc_tm->tm_mon, rtc_tm->tm_year))
  188. return -EINVAL;
  189. if ((hrs >= 24) || (min >= 60) || (sec >= 60))
  190. return -EINVAL;
  191. /*
  192. * each register is a different number of valid bits
  193. */
  194. sec = bin2bcd(sec) & 0x7f;
  195. min = bin2bcd(min) & 0x7f;
  196. hrs = bin2bcd(hrs) & 0x3f;
  197. day = bin2bcd(day) & 0x3f;
  198. mon = bin2bcd(mon) & 0x1f;
  199. yrs = bin2bcd(yrs) & 0xff;
  200. cen = bin2bcd(cen) & 0xff;
  201. spin_lock_irqsave(&ds1511_lock, flags);
  202. rtc_disable_update();
  203. rtc_write(cen, RTC_CENTURY);
  204. rtc_write(yrs, RTC_YEAR);
  205. rtc_write((rtc_read(RTC_MON) & 0xe0) | mon, RTC_MON);
  206. rtc_write(day, RTC_DOM);
  207. rtc_write(hrs, RTC_HOUR);
  208. rtc_write(min, RTC_MIN);
  209. rtc_write(sec, RTC_SEC);
  210. rtc_write(dow, RTC_DOW);
  211. rtc_enable_update();
  212. spin_unlock_irqrestore(&ds1511_lock, flags);
  213. return 0;
  214. }
  215. static int ds1511_rtc_read_time(struct device *dev, struct rtc_time *rtc_tm)
  216. {
  217. unsigned int century;
  218. unsigned long flags;
  219. spin_lock_irqsave(&ds1511_lock, flags);
  220. rtc_disable_update();
  221. rtc_tm->tm_sec = rtc_read(RTC_SEC) & 0x7f;
  222. rtc_tm->tm_min = rtc_read(RTC_MIN) & 0x7f;
  223. rtc_tm->tm_hour = rtc_read(RTC_HOUR) & 0x3f;
  224. rtc_tm->tm_mday = rtc_read(RTC_DOM) & 0x3f;
  225. rtc_tm->tm_wday = rtc_read(RTC_DOW) & 0x7;
  226. rtc_tm->tm_mon = rtc_read(RTC_MON) & 0x1f;
  227. rtc_tm->tm_year = rtc_read(RTC_YEAR) & 0x7f;
  228. century = rtc_read(RTC_CENTURY);
  229. rtc_enable_update();
  230. spin_unlock_irqrestore(&ds1511_lock, flags);
  231. rtc_tm->tm_sec = bcd2bin(rtc_tm->tm_sec);
  232. rtc_tm->tm_min = bcd2bin(rtc_tm->tm_min);
  233. rtc_tm->tm_hour = bcd2bin(rtc_tm->tm_hour);
  234. rtc_tm->tm_mday = bcd2bin(rtc_tm->tm_mday);
  235. rtc_tm->tm_wday = bcd2bin(rtc_tm->tm_wday);
  236. rtc_tm->tm_mon = bcd2bin(rtc_tm->tm_mon);
  237. rtc_tm->tm_year = bcd2bin(rtc_tm->tm_year);
  238. century = bcd2bin(century) * 100;
  239. /*
  240. * Account for differences between how the RTC uses the values
  241. * and how they are defined in a struct rtc_time;
  242. */
  243. century += rtc_tm->tm_year;
  244. rtc_tm->tm_year = century - 1900;
  245. rtc_tm->tm_mon--;
  246. if (rtc_valid_tm(rtc_tm) < 0) {
  247. dev_err(dev, "retrieved date/time is not valid.\n");
  248. rtc_time_to_tm(0, rtc_tm);
  249. }
  250. return 0;
  251. }
  252. /*
  253. * write the alarm register settings
  254. *
  255. * we only have the use to interrupt every second, otherwise
  256. * known as the update interrupt, or the interrupt if the whole
  257. * date/hours/mins/secs matches. the ds1511 has many more
  258. * permutations, but the kernel doesn't.
  259. */
  260. static void
  261. ds1511_rtc_update_alarm(struct rtc_plat_data *pdata)
  262. {
  263. unsigned long flags;
  264. spin_lock_irqsave(&pdata->lock, flags);
  265. rtc_write(pdata->alrm_mday < 0 || (pdata->irqen & RTC_UF) ?
  266. 0x80 : bin2bcd(pdata->alrm_mday) & 0x3f,
  267. RTC_ALARM_DATE);
  268. rtc_write(pdata->alrm_hour < 0 || (pdata->irqen & RTC_UF) ?
  269. 0x80 : bin2bcd(pdata->alrm_hour) & 0x3f,
  270. RTC_ALARM_HOUR);
  271. rtc_write(pdata->alrm_min < 0 || (pdata->irqen & RTC_UF) ?
  272. 0x80 : bin2bcd(pdata->alrm_min) & 0x7f,
  273. RTC_ALARM_MIN);
  274. rtc_write(pdata->alrm_sec < 0 || (pdata->irqen & RTC_UF) ?
  275. 0x80 : bin2bcd(pdata->alrm_sec) & 0x7f,
  276. RTC_ALARM_SEC);
  277. rtc_write(rtc_read(RTC_CMD) | (pdata->irqen ? RTC_TIE : 0), RTC_CMD);
  278. rtc_read(RTC_CMD1); /* clear interrupts */
  279. spin_unlock_irqrestore(&pdata->lock, flags);
  280. }
  281. static int
  282. ds1511_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
  283. {
  284. struct platform_device *pdev = to_platform_device(dev);
  285. struct rtc_plat_data *pdata = platform_get_drvdata(pdev);
  286. if (pdata->irq <= 0)
  287. return -EINVAL;
  288. pdata->alrm_mday = alrm->time.tm_mday;
  289. pdata->alrm_hour = alrm->time.tm_hour;
  290. pdata->alrm_min = alrm->time.tm_min;
  291. pdata->alrm_sec = alrm->time.tm_sec;
  292. if (alrm->enabled)
  293. pdata->irqen |= RTC_AF;
  294. ds1511_rtc_update_alarm(pdata);
  295. return 0;
  296. }
  297. static int
  298. ds1511_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
  299. {
  300. struct platform_device *pdev = to_platform_device(dev);
  301. struct rtc_plat_data *pdata = platform_get_drvdata(pdev);
  302. if (pdata->irq <= 0)
  303. return -EINVAL;
  304. alrm->time.tm_mday = pdata->alrm_mday < 0 ? 0 : pdata->alrm_mday;
  305. alrm->time.tm_hour = pdata->alrm_hour < 0 ? 0 : pdata->alrm_hour;
  306. alrm->time.tm_min = pdata->alrm_min < 0 ? 0 : pdata->alrm_min;
  307. alrm->time.tm_sec = pdata->alrm_sec < 0 ? 0 : pdata->alrm_sec;
  308. alrm->enabled = (pdata->irqen & RTC_AF) ? 1 : 0;
  309. return 0;
  310. }
  311. static irqreturn_t
  312. ds1511_interrupt(int irq, void *dev_id)
  313. {
  314. struct platform_device *pdev = dev_id;
  315. struct rtc_plat_data *pdata = platform_get_drvdata(pdev);
  316. unsigned long events = 0;
  317. spin_lock(&pdata->lock);
  318. /*
  319. * read and clear interrupt
  320. */
  321. if (rtc_read(RTC_CMD1) & DS1511_IRQF) {
  322. events = RTC_IRQF;
  323. if (rtc_read(RTC_ALARM_SEC) & 0x80)
  324. events |= RTC_UF;
  325. else
  326. events |= RTC_AF;
  327. rtc_update_irq(pdata->rtc, 1, events);
  328. }
  329. spin_unlock(&pdata->lock);
  330. return events ? IRQ_HANDLED : IRQ_NONE;
  331. }
  332. static int ds1511_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled)
  333. {
  334. struct platform_device *pdev = to_platform_device(dev);
  335. struct rtc_plat_data *pdata = platform_get_drvdata(pdev);
  336. if (pdata->irq <= 0)
  337. return -EINVAL;
  338. if (enabled)
  339. pdata->irqen |= RTC_AF;
  340. else
  341. pdata->irqen &= ~RTC_AF;
  342. ds1511_rtc_update_alarm(pdata);
  343. return 0;
  344. }
  345. static const struct rtc_class_ops ds1511_rtc_ops = {
  346. .read_time = ds1511_rtc_read_time,
  347. .set_time = ds1511_rtc_set_time,
  348. .read_alarm = ds1511_rtc_read_alarm,
  349. .set_alarm = ds1511_rtc_set_alarm,
  350. .alarm_irq_enable = ds1511_rtc_alarm_irq_enable,
  351. };
  352. static ssize_t
  353. ds1511_nvram_read(struct file *filp, struct kobject *kobj,
  354. struct bin_attribute *ba,
  355. char *buf, loff_t pos, size_t size)
  356. {
  357. ssize_t count;
  358. rtc_write(pos, DS1511_RAMADDR_LSB);
  359. for (count = 0; count < size; count++)
  360. *buf++ = rtc_read(DS1511_RAMDATA);
  361. return count;
  362. }
  363. static ssize_t
  364. ds1511_nvram_write(struct file *filp, struct kobject *kobj,
  365. struct bin_attribute *bin_attr,
  366. char *buf, loff_t pos, size_t size)
  367. {
  368. ssize_t count;
  369. rtc_write(pos, DS1511_RAMADDR_LSB);
  370. for (count = 0; count < size; count++)
  371. rtc_write(*buf++, DS1511_RAMDATA);
  372. return count;
  373. }
  374. static struct bin_attribute ds1511_nvram_attr = {
  375. .attr = {
  376. .name = "nvram",
  377. .mode = S_IRUGO | S_IWUSR,
  378. },
  379. .size = DS1511_RAM_MAX,
  380. .read = ds1511_nvram_read,
  381. .write = ds1511_nvram_write,
  382. };
  383. static int ds1511_rtc_probe(struct platform_device *pdev)
  384. {
  385. struct resource *res;
  386. struct rtc_plat_data *pdata;
  387. int ret = 0;
  388. pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL);
  389. if (!pdata)
  390. return -ENOMEM;
  391. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  392. ds1511_base = devm_ioremap_resource(&pdev->dev, res);
  393. if (IS_ERR(ds1511_base))
  394. return PTR_ERR(ds1511_base);
  395. pdata->ioaddr = ds1511_base;
  396. pdata->irq = platform_get_irq(pdev, 0);
  397. /*
  398. * turn on the clock and the crystal, etc.
  399. */
  400. rtc_write(DS1511_BME, RTC_CMD);
  401. rtc_write(0, RTC_CMD1);
  402. /*
  403. * clear the wdog counter
  404. */
  405. rtc_write(0, DS1511_WD_MSEC);
  406. rtc_write(0, DS1511_WD_SEC);
  407. /*
  408. * start the clock
  409. */
  410. rtc_enable_update();
  411. /*
  412. * check for a dying bat-tree
  413. */
  414. if (rtc_read(RTC_CMD1) & DS1511_BLF1)
  415. dev_warn(&pdev->dev, "voltage-low detected.\n");
  416. spin_lock_init(&pdata->lock);
  417. platform_set_drvdata(pdev, pdata);
  418. pdata->rtc = devm_rtc_device_register(&pdev->dev, pdev->name,
  419. &ds1511_rtc_ops, THIS_MODULE);
  420. if (IS_ERR(pdata->rtc))
  421. return PTR_ERR(pdata->rtc);
  422. /*
  423. * if the platform has an interrupt in mind for this device,
  424. * then by all means, set it
  425. */
  426. if (pdata->irq > 0) {
  427. rtc_read(RTC_CMD1);
  428. if (devm_request_irq(&pdev->dev, pdata->irq, ds1511_interrupt,
  429. IRQF_SHARED, pdev->name, pdev) < 0) {
  430. dev_warn(&pdev->dev, "interrupt not available.\n");
  431. pdata->irq = 0;
  432. }
  433. }
  434. ret = sysfs_create_bin_file(&pdev->dev.kobj, &ds1511_nvram_attr);
  435. if (ret)
  436. dev_err(&pdev->dev, "Unable to create sysfs entry: %s\n",
  437. ds1511_nvram_attr.attr.name);
  438. return 0;
  439. }
  440. static int ds1511_rtc_remove(struct platform_device *pdev)
  441. {
  442. struct rtc_plat_data *pdata = platform_get_drvdata(pdev);
  443. sysfs_remove_bin_file(&pdev->dev.kobj, &ds1511_nvram_attr);
  444. if (pdata->irq > 0) {
  445. /*
  446. * disable the alarm interrupt
  447. */
  448. rtc_write(rtc_read(RTC_CMD) & ~RTC_TIE, RTC_CMD);
  449. rtc_read(RTC_CMD1);
  450. }
  451. return 0;
  452. }
  453. /* work with hotplug and coldplug */
  454. MODULE_ALIAS("platform:ds1511");
  455. static struct platform_driver ds1511_rtc_driver = {
  456. .probe = ds1511_rtc_probe,
  457. .remove = ds1511_rtc_remove,
  458. .driver = {
  459. .name = "ds1511",
  460. },
  461. };
  462. module_platform_driver(ds1511_rtc_driver);
  463. MODULE_AUTHOR("Andrew Sharp <andy.sharp@lsi.com>");
  464. MODULE_DESCRIPTION("Dallas DS1511 RTC driver");
  465. MODULE_LICENSE("GPL");
  466. MODULE_VERSION(DRV_VERSION);