rtc-s3c.c 21 KB

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  1. /* drivers/rtc/rtc-s3c.c
  2. *
  3. * Copyright (c) 2010 Samsung Electronics Co., Ltd.
  4. * http://www.samsung.com/
  5. *
  6. * Copyright (c) 2004,2006 Simtec Electronics
  7. * Ben Dooks, <ben@simtec.co.uk>
  8. * http://armlinux.simtec.co.uk/
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of the GNU General Public License version 2 as
  12. * published by the Free Software Foundation.
  13. *
  14. * S3C2410/S3C2440/S3C24XX Internal RTC Driver
  15. */
  16. #include <linux/module.h>
  17. #include <linux/fs.h>
  18. #include <linux/string.h>
  19. #include <linux/init.h>
  20. #include <linux/platform_device.h>
  21. #include <linux/interrupt.h>
  22. #include <linux/rtc.h>
  23. #include <linux/bcd.h>
  24. #include <linux/clk.h>
  25. #include <linux/log2.h>
  26. #include <linux/slab.h>
  27. #include <linux/of.h>
  28. #include <linux/uaccess.h>
  29. #include <linux/io.h>
  30. #include <asm/irq.h>
  31. #include "rtc-s3c.h"
  32. struct s3c_rtc {
  33. struct device *dev;
  34. struct rtc_device *rtc;
  35. void __iomem *base;
  36. struct clk *rtc_clk;
  37. struct clk *rtc_src_clk;
  38. bool clk_disabled;
  39. struct s3c_rtc_data *data;
  40. int irq_alarm;
  41. int irq_tick;
  42. spinlock_t pie_lock;
  43. spinlock_t alarm_clk_lock;
  44. int ticnt_save, ticnt_en_save;
  45. bool wake_en;
  46. };
  47. struct s3c_rtc_data {
  48. int max_user_freq;
  49. bool needs_src_clk;
  50. void (*irq_handler) (struct s3c_rtc *info, int mask);
  51. void (*set_freq) (struct s3c_rtc *info, int freq);
  52. void (*enable_tick) (struct s3c_rtc *info, struct seq_file *seq);
  53. void (*select_tick_clk) (struct s3c_rtc *info);
  54. void (*save_tick_cnt) (struct s3c_rtc *info);
  55. void (*restore_tick_cnt) (struct s3c_rtc *info);
  56. void (*enable) (struct s3c_rtc *info);
  57. void (*disable) (struct s3c_rtc *info);
  58. };
  59. static void s3c_rtc_enable_clk(struct s3c_rtc *info)
  60. {
  61. unsigned long irq_flags;
  62. spin_lock_irqsave(&info->alarm_clk_lock, irq_flags);
  63. if (info->clk_disabled) {
  64. clk_enable(info->rtc_clk);
  65. if (info->data->needs_src_clk)
  66. clk_enable(info->rtc_src_clk);
  67. info->clk_disabled = false;
  68. }
  69. spin_unlock_irqrestore(&info->alarm_clk_lock, irq_flags);
  70. }
  71. static void s3c_rtc_disable_clk(struct s3c_rtc *info)
  72. {
  73. unsigned long irq_flags;
  74. spin_lock_irqsave(&info->alarm_clk_lock, irq_flags);
  75. if (!info->clk_disabled) {
  76. if (info->data->needs_src_clk)
  77. clk_disable(info->rtc_src_clk);
  78. clk_disable(info->rtc_clk);
  79. info->clk_disabled = true;
  80. }
  81. spin_unlock_irqrestore(&info->alarm_clk_lock, irq_flags);
  82. }
  83. /* IRQ Handlers */
  84. static irqreturn_t s3c_rtc_tickirq(int irq, void *id)
  85. {
  86. struct s3c_rtc *info = (struct s3c_rtc *)id;
  87. if (info->data->irq_handler)
  88. info->data->irq_handler(info, S3C2410_INTP_TIC);
  89. return IRQ_HANDLED;
  90. }
  91. static irqreturn_t s3c_rtc_alarmirq(int irq, void *id)
  92. {
  93. struct s3c_rtc *info = (struct s3c_rtc *)id;
  94. if (info->data->irq_handler)
  95. info->data->irq_handler(info, S3C2410_INTP_ALM);
  96. return IRQ_HANDLED;
  97. }
  98. /* Update control registers */
  99. static int s3c_rtc_setaie(struct device *dev, unsigned int enabled)
  100. {
  101. struct s3c_rtc *info = dev_get_drvdata(dev);
  102. unsigned int tmp;
  103. dev_dbg(info->dev, "%s: aie=%d\n", __func__, enabled);
  104. s3c_rtc_enable_clk(info);
  105. tmp = readb(info->base + S3C2410_RTCALM) & ~S3C2410_RTCALM_ALMEN;
  106. if (enabled)
  107. tmp |= S3C2410_RTCALM_ALMEN;
  108. writeb(tmp, info->base + S3C2410_RTCALM);
  109. s3c_rtc_disable_clk(info);
  110. if (enabled)
  111. s3c_rtc_enable_clk(info);
  112. else
  113. s3c_rtc_disable_clk(info);
  114. return 0;
  115. }
  116. /* Set RTC frequency */
  117. static int s3c_rtc_setfreq(struct s3c_rtc *info, int freq)
  118. {
  119. if (!is_power_of_2(freq))
  120. return -EINVAL;
  121. s3c_rtc_enable_clk(info);
  122. spin_lock_irq(&info->pie_lock);
  123. if (info->data->set_freq)
  124. info->data->set_freq(info, freq);
  125. spin_unlock_irq(&info->pie_lock);
  126. s3c_rtc_disable_clk(info);
  127. return 0;
  128. }
  129. /* Time read/write */
  130. static int s3c_rtc_gettime(struct device *dev, struct rtc_time *rtc_tm)
  131. {
  132. struct s3c_rtc *info = dev_get_drvdata(dev);
  133. unsigned int have_retried = 0;
  134. s3c_rtc_enable_clk(info);
  135. retry_get_time:
  136. rtc_tm->tm_min = readb(info->base + S3C2410_RTCMIN);
  137. rtc_tm->tm_hour = readb(info->base + S3C2410_RTCHOUR);
  138. rtc_tm->tm_mday = readb(info->base + S3C2410_RTCDATE);
  139. rtc_tm->tm_mon = readb(info->base + S3C2410_RTCMON);
  140. rtc_tm->tm_year = readb(info->base + S3C2410_RTCYEAR);
  141. rtc_tm->tm_sec = readb(info->base + S3C2410_RTCSEC);
  142. /* the only way to work out whether the system was mid-update
  143. * when we read it is to check the second counter, and if it
  144. * is zero, then we re-try the entire read
  145. */
  146. if (rtc_tm->tm_sec == 0 && !have_retried) {
  147. have_retried = 1;
  148. goto retry_get_time;
  149. }
  150. rtc_tm->tm_sec = bcd2bin(rtc_tm->tm_sec);
  151. rtc_tm->tm_min = bcd2bin(rtc_tm->tm_min);
  152. rtc_tm->tm_hour = bcd2bin(rtc_tm->tm_hour);
  153. rtc_tm->tm_mday = bcd2bin(rtc_tm->tm_mday);
  154. rtc_tm->tm_mon = bcd2bin(rtc_tm->tm_mon);
  155. rtc_tm->tm_year = bcd2bin(rtc_tm->tm_year);
  156. s3c_rtc_disable_clk(info);
  157. rtc_tm->tm_year += 100;
  158. dev_dbg(dev, "read time %04d.%02d.%02d %02d:%02d:%02d\n",
  159. 1900 + rtc_tm->tm_year, rtc_tm->tm_mon, rtc_tm->tm_mday,
  160. rtc_tm->tm_hour, rtc_tm->tm_min, rtc_tm->tm_sec);
  161. rtc_tm->tm_mon -= 1;
  162. return rtc_valid_tm(rtc_tm);
  163. }
  164. static int s3c_rtc_settime(struct device *dev, struct rtc_time *tm)
  165. {
  166. struct s3c_rtc *info = dev_get_drvdata(dev);
  167. int year = tm->tm_year - 100;
  168. dev_dbg(dev, "set time %04d.%02d.%02d %02d:%02d:%02d\n",
  169. 1900 + tm->tm_year, tm->tm_mon, tm->tm_mday,
  170. tm->tm_hour, tm->tm_min, tm->tm_sec);
  171. /* we get around y2k by simply not supporting it */
  172. if (year < 0 || year >= 100) {
  173. dev_err(dev, "rtc only supports 100 years\n");
  174. return -EINVAL;
  175. }
  176. s3c_rtc_enable_clk(info);
  177. writeb(bin2bcd(tm->tm_sec), info->base + S3C2410_RTCSEC);
  178. writeb(bin2bcd(tm->tm_min), info->base + S3C2410_RTCMIN);
  179. writeb(bin2bcd(tm->tm_hour), info->base + S3C2410_RTCHOUR);
  180. writeb(bin2bcd(tm->tm_mday), info->base + S3C2410_RTCDATE);
  181. writeb(bin2bcd(tm->tm_mon + 1), info->base + S3C2410_RTCMON);
  182. writeb(bin2bcd(year), info->base + S3C2410_RTCYEAR);
  183. s3c_rtc_disable_clk(info);
  184. return 0;
  185. }
  186. static int s3c_rtc_getalarm(struct device *dev, struct rtc_wkalrm *alrm)
  187. {
  188. struct s3c_rtc *info = dev_get_drvdata(dev);
  189. struct rtc_time *alm_tm = &alrm->time;
  190. unsigned int alm_en;
  191. s3c_rtc_enable_clk(info);
  192. alm_tm->tm_sec = readb(info->base + S3C2410_ALMSEC);
  193. alm_tm->tm_min = readb(info->base + S3C2410_ALMMIN);
  194. alm_tm->tm_hour = readb(info->base + S3C2410_ALMHOUR);
  195. alm_tm->tm_mon = readb(info->base + S3C2410_ALMMON);
  196. alm_tm->tm_mday = readb(info->base + S3C2410_ALMDATE);
  197. alm_tm->tm_year = readb(info->base + S3C2410_ALMYEAR);
  198. alm_en = readb(info->base + S3C2410_RTCALM);
  199. s3c_rtc_disable_clk(info);
  200. alrm->enabled = (alm_en & S3C2410_RTCALM_ALMEN) ? 1 : 0;
  201. dev_dbg(dev, "read alarm %d, %04d.%02d.%02d %02d:%02d:%02d\n",
  202. alm_en,
  203. 1900 + alm_tm->tm_year, alm_tm->tm_mon, alm_tm->tm_mday,
  204. alm_tm->tm_hour, alm_tm->tm_min, alm_tm->tm_sec);
  205. /* decode the alarm enable field */
  206. if (alm_en & S3C2410_RTCALM_SECEN)
  207. alm_tm->tm_sec = bcd2bin(alm_tm->tm_sec);
  208. else
  209. alm_tm->tm_sec = -1;
  210. if (alm_en & S3C2410_RTCALM_MINEN)
  211. alm_tm->tm_min = bcd2bin(alm_tm->tm_min);
  212. else
  213. alm_tm->tm_min = -1;
  214. if (alm_en & S3C2410_RTCALM_HOUREN)
  215. alm_tm->tm_hour = bcd2bin(alm_tm->tm_hour);
  216. else
  217. alm_tm->tm_hour = -1;
  218. if (alm_en & S3C2410_RTCALM_DAYEN)
  219. alm_tm->tm_mday = bcd2bin(alm_tm->tm_mday);
  220. else
  221. alm_tm->tm_mday = -1;
  222. if (alm_en & S3C2410_RTCALM_MONEN) {
  223. alm_tm->tm_mon = bcd2bin(alm_tm->tm_mon);
  224. alm_tm->tm_mon -= 1;
  225. } else {
  226. alm_tm->tm_mon = -1;
  227. }
  228. if (alm_en & S3C2410_RTCALM_YEAREN)
  229. alm_tm->tm_year = bcd2bin(alm_tm->tm_year);
  230. else
  231. alm_tm->tm_year = -1;
  232. return 0;
  233. }
  234. static int s3c_rtc_setalarm(struct device *dev, struct rtc_wkalrm *alrm)
  235. {
  236. struct s3c_rtc *info = dev_get_drvdata(dev);
  237. struct rtc_time *tm = &alrm->time;
  238. unsigned int alrm_en;
  239. int year = tm->tm_year - 100;
  240. dev_dbg(dev, "s3c_rtc_setalarm: %d, %04d.%02d.%02d %02d:%02d:%02d\n",
  241. alrm->enabled,
  242. 1900 + tm->tm_year, tm->tm_mon + 1, tm->tm_mday,
  243. tm->tm_hour, tm->tm_min, tm->tm_sec);
  244. s3c_rtc_enable_clk(info);
  245. alrm_en = readb(info->base + S3C2410_RTCALM) & S3C2410_RTCALM_ALMEN;
  246. writeb(0x00, info->base + S3C2410_RTCALM);
  247. if (tm->tm_sec < 60 && tm->tm_sec >= 0) {
  248. alrm_en |= S3C2410_RTCALM_SECEN;
  249. writeb(bin2bcd(tm->tm_sec), info->base + S3C2410_ALMSEC);
  250. }
  251. if (tm->tm_min < 60 && tm->tm_min >= 0) {
  252. alrm_en |= S3C2410_RTCALM_MINEN;
  253. writeb(bin2bcd(tm->tm_min), info->base + S3C2410_ALMMIN);
  254. }
  255. if (tm->tm_hour < 24 && tm->tm_hour >= 0) {
  256. alrm_en |= S3C2410_RTCALM_HOUREN;
  257. writeb(bin2bcd(tm->tm_hour), info->base + S3C2410_ALMHOUR);
  258. }
  259. if (year < 100 && year >= 0) {
  260. alrm_en |= S3C2410_RTCALM_YEAREN;
  261. writeb(bin2bcd(year), info->base + S3C2410_ALMYEAR);
  262. }
  263. if (tm->tm_mon < 12 && tm->tm_mon >= 0) {
  264. alrm_en |= S3C2410_RTCALM_MONEN;
  265. writeb(bin2bcd(tm->tm_mon + 1), info->base + S3C2410_ALMMON);
  266. }
  267. if (tm->tm_mday <= 31 && tm->tm_mday >= 1) {
  268. alrm_en |= S3C2410_RTCALM_DAYEN;
  269. writeb(bin2bcd(tm->tm_mday), info->base + S3C2410_ALMDATE);
  270. }
  271. dev_dbg(dev, "setting S3C2410_RTCALM to %08x\n", alrm_en);
  272. writeb(alrm_en, info->base + S3C2410_RTCALM);
  273. s3c_rtc_disable_clk(info);
  274. s3c_rtc_setaie(dev, alrm->enabled);
  275. return 0;
  276. }
  277. static int s3c_rtc_proc(struct device *dev, struct seq_file *seq)
  278. {
  279. struct s3c_rtc *info = dev_get_drvdata(dev);
  280. s3c_rtc_enable_clk(info);
  281. if (info->data->enable_tick)
  282. info->data->enable_tick(info, seq);
  283. s3c_rtc_disable_clk(info);
  284. return 0;
  285. }
  286. static const struct rtc_class_ops s3c_rtcops = {
  287. .read_time = s3c_rtc_gettime,
  288. .set_time = s3c_rtc_settime,
  289. .read_alarm = s3c_rtc_getalarm,
  290. .set_alarm = s3c_rtc_setalarm,
  291. .proc = s3c_rtc_proc,
  292. .alarm_irq_enable = s3c_rtc_setaie,
  293. };
  294. static void s3c24xx_rtc_enable(struct s3c_rtc *info)
  295. {
  296. unsigned int con, tmp;
  297. con = readw(info->base + S3C2410_RTCCON);
  298. /* re-enable the device, and check it is ok */
  299. if ((con & S3C2410_RTCCON_RTCEN) == 0) {
  300. dev_info(info->dev, "rtc disabled, re-enabling\n");
  301. tmp = readw(info->base + S3C2410_RTCCON);
  302. writew(tmp | S3C2410_RTCCON_RTCEN,
  303. info->base + S3C2410_RTCCON);
  304. }
  305. if (con & S3C2410_RTCCON_CNTSEL) {
  306. dev_info(info->dev, "removing RTCCON_CNTSEL\n");
  307. tmp = readw(info->base + S3C2410_RTCCON);
  308. writew(tmp & ~S3C2410_RTCCON_CNTSEL,
  309. info->base + S3C2410_RTCCON);
  310. }
  311. if (con & S3C2410_RTCCON_CLKRST) {
  312. dev_info(info->dev, "removing RTCCON_CLKRST\n");
  313. tmp = readw(info->base + S3C2410_RTCCON);
  314. writew(tmp & ~S3C2410_RTCCON_CLKRST,
  315. info->base + S3C2410_RTCCON);
  316. }
  317. }
  318. static void s3c24xx_rtc_disable(struct s3c_rtc *info)
  319. {
  320. unsigned int con;
  321. con = readw(info->base + S3C2410_RTCCON);
  322. con &= ~S3C2410_RTCCON_RTCEN;
  323. writew(con, info->base + S3C2410_RTCCON);
  324. con = readb(info->base + S3C2410_TICNT);
  325. con &= ~S3C2410_TICNT_ENABLE;
  326. writeb(con, info->base + S3C2410_TICNT);
  327. }
  328. static void s3c6410_rtc_disable(struct s3c_rtc *info)
  329. {
  330. unsigned int con;
  331. con = readw(info->base + S3C2410_RTCCON);
  332. con &= ~S3C64XX_RTCCON_TICEN;
  333. con &= ~S3C2410_RTCCON_RTCEN;
  334. writew(con, info->base + S3C2410_RTCCON);
  335. }
  336. static int s3c_rtc_remove(struct platform_device *pdev)
  337. {
  338. struct s3c_rtc *info = platform_get_drvdata(pdev);
  339. s3c_rtc_setaie(info->dev, 0);
  340. if (info->data->needs_src_clk)
  341. clk_unprepare(info->rtc_src_clk);
  342. clk_unprepare(info->rtc_clk);
  343. return 0;
  344. }
  345. static const struct of_device_id s3c_rtc_dt_match[];
  346. static struct s3c_rtc_data *s3c_rtc_get_data(struct platform_device *pdev)
  347. {
  348. const struct of_device_id *match;
  349. match = of_match_node(s3c_rtc_dt_match, pdev->dev.of_node);
  350. return (struct s3c_rtc_data *)match->data;
  351. }
  352. static int s3c_rtc_probe(struct platform_device *pdev)
  353. {
  354. struct s3c_rtc *info = NULL;
  355. struct rtc_time rtc_tm;
  356. struct resource *res;
  357. int ret;
  358. info = devm_kzalloc(&pdev->dev, sizeof(*info), GFP_KERNEL);
  359. if (!info)
  360. return -ENOMEM;
  361. /* find the IRQs */
  362. info->irq_tick = platform_get_irq(pdev, 1);
  363. if (info->irq_tick < 0) {
  364. dev_err(&pdev->dev, "no irq for rtc tick\n");
  365. return info->irq_tick;
  366. }
  367. info->dev = &pdev->dev;
  368. info->data = s3c_rtc_get_data(pdev);
  369. if (!info->data) {
  370. dev_err(&pdev->dev, "failed getting s3c_rtc_data\n");
  371. return -EINVAL;
  372. }
  373. spin_lock_init(&info->pie_lock);
  374. spin_lock_init(&info->alarm_clk_lock);
  375. platform_set_drvdata(pdev, info);
  376. info->irq_alarm = platform_get_irq(pdev, 0);
  377. if (info->irq_alarm < 0) {
  378. dev_err(&pdev->dev, "no irq for alarm\n");
  379. return info->irq_alarm;
  380. }
  381. dev_dbg(&pdev->dev, "s3c2410_rtc: tick irq %d, alarm irq %d\n",
  382. info->irq_tick, info->irq_alarm);
  383. /* get the memory region */
  384. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  385. info->base = devm_ioremap_resource(&pdev->dev, res);
  386. if (IS_ERR(info->base))
  387. return PTR_ERR(info->base);
  388. info->rtc_clk = devm_clk_get(&pdev->dev, "rtc");
  389. if (IS_ERR(info->rtc_clk)) {
  390. dev_err(&pdev->dev, "failed to find rtc clock\n");
  391. return PTR_ERR(info->rtc_clk);
  392. }
  393. clk_prepare_enable(info->rtc_clk);
  394. if (info->data->needs_src_clk) {
  395. info->rtc_src_clk = devm_clk_get(&pdev->dev, "rtc_src");
  396. if (IS_ERR(info->rtc_src_clk)) {
  397. dev_err(&pdev->dev,
  398. "failed to find rtc source clock\n");
  399. clk_disable_unprepare(info->rtc_clk);
  400. return PTR_ERR(info->rtc_src_clk);
  401. }
  402. clk_prepare_enable(info->rtc_src_clk);
  403. }
  404. /* check to see if everything is setup correctly */
  405. if (info->data->enable)
  406. info->data->enable(info);
  407. dev_dbg(&pdev->dev, "s3c2410_rtc: RTCCON=%02x\n",
  408. readw(info->base + S3C2410_RTCCON));
  409. device_init_wakeup(&pdev->dev, 1);
  410. /* Check RTC Time */
  411. if (s3c_rtc_gettime(&pdev->dev, &rtc_tm)) {
  412. rtc_tm.tm_year = 100;
  413. rtc_tm.tm_mon = 0;
  414. rtc_tm.tm_mday = 1;
  415. rtc_tm.tm_hour = 0;
  416. rtc_tm.tm_min = 0;
  417. rtc_tm.tm_sec = 0;
  418. s3c_rtc_settime(&pdev->dev, &rtc_tm);
  419. dev_warn(&pdev->dev, "warning: invalid RTC value so initializing it\n");
  420. }
  421. /* register RTC and exit */
  422. info->rtc = devm_rtc_device_register(&pdev->dev, "s3c", &s3c_rtcops,
  423. THIS_MODULE);
  424. if (IS_ERR(info->rtc)) {
  425. dev_err(&pdev->dev, "cannot attach rtc\n");
  426. ret = PTR_ERR(info->rtc);
  427. goto err_nortc;
  428. }
  429. ret = devm_request_irq(&pdev->dev, info->irq_alarm, s3c_rtc_alarmirq,
  430. 0, "s3c2410-rtc alarm", info);
  431. if (ret) {
  432. dev_err(&pdev->dev, "IRQ%d error %d\n", info->irq_alarm, ret);
  433. goto err_nortc;
  434. }
  435. ret = devm_request_irq(&pdev->dev, info->irq_tick, s3c_rtc_tickirq,
  436. 0, "s3c2410-rtc tick", info);
  437. if (ret) {
  438. dev_err(&pdev->dev, "IRQ%d error %d\n", info->irq_tick, ret);
  439. goto err_nortc;
  440. }
  441. if (info->data->select_tick_clk)
  442. info->data->select_tick_clk(info);
  443. s3c_rtc_setfreq(info, 1);
  444. s3c_rtc_disable_clk(info);
  445. return 0;
  446. err_nortc:
  447. if (info->data->disable)
  448. info->data->disable(info);
  449. if (info->data->needs_src_clk)
  450. clk_disable_unprepare(info->rtc_src_clk);
  451. clk_disable_unprepare(info->rtc_clk);
  452. return ret;
  453. }
  454. #ifdef CONFIG_PM_SLEEP
  455. static int s3c_rtc_suspend(struct device *dev)
  456. {
  457. struct s3c_rtc *info = dev_get_drvdata(dev);
  458. s3c_rtc_enable_clk(info);
  459. /* save TICNT for anyone using periodic interrupts */
  460. if (info->data->save_tick_cnt)
  461. info->data->save_tick_cnt(info);
  462. if (info->data->disable)
  463. info->data->disable(info);
  464. if (device_may_wakeup(dev) && !info->wake_en) {
  465. if (enable_irq_wake(info->irq_alarm) == 0)
  466. info->wake_en = true;
  467. else
  468. dev_err(dev, "enable_irq_wake failed\n");
  469. }
  470. return 0;
  471. }
  472. static int s3c_rtc_resume(struct device *dev)
  473. {
  474. struct s3c_rtc *info = dev_get_drvdata(dev);
  475. if (info->data->enable)
  476. info->data->enable(info);
  477. if (info->data->restore_tick_cnt)
  478. info->data->restore_tick_cnt(info);
  479. s3c_rtc_disable_clk(info);
  480. if (device_may_wakeup(dev) && info->wake_en) {
  481. disable_irq_wake(info->irq_alarm);
  482. info->wake_en = false;
  483. }
  484. return 0;
  485. }
  486. #endif
  487. static SIMPLE_DEV_PM_OPS(s3c_rtc_pm_ops, s3c_rtc_suspend, s3c_rtc_resume);
  488. static void s3c24xx_rtc_irq(struct s3c_rtc *info, int mask)
  489. {
  490. rtc_update_irq(info->rtc, 1, RTC_AF | RTC_IRQF);
  491. }
  492. static void s3c6410_rtc_irq(struct s3c_rtc *info, int mask)
  493. {
  494. rtc_update_irq(info->rtc, 1, RTC_AF | RTC_IRQF);
  495. writeb(mask, info->base + S3C2410_INTP);
  496. }
  497. static void s3c2410_rtc_setfreq(struct s3c_rtc *info, int freq)
  498. {
  499. unsigned int tmp = 0;
  500. int val;
  501. tmp = readb(info->base + S3C2410_TICNT);
  502. tmp &= S3C2410_TICNT_ENABLE;
  503. val = (info->rtc->max_user_freq / freq) - 1;
  504. tmp |= val;
  505. writel(tmp, info->base + S3C2410_TICNT);
  506. }
  507. static void s3c2416_rtc_setfreq(struct s3c_rtc *info, int freq)
  508. {
  509. unsigned int tmp = 0;
  510. int val;
  511. tmp = readb(info->base + S3C2410_TICNT);
  512. tmp &= S3C2410_TICNT_ENABLE;
  513. val = (info->rtc->max_user_freq / freq) - 1;
  514. tmp |= S3C2443_TICNT_PART(val);
  515. writel(S3C2443_TICNT1_PART(val), info->base + S3C2443_TICNT1);
  516. writel(S3C2416_TICNT2_PART(val), info->base + S3C2416_TICNT2);
  517. writel(tmp, info->base + S3C2410_TICNT);
  518. }
  519. static void s3c2443_rtc_setfreq(struct s3c_rtc *info, int freq)
  520. {
  521. unsigned int tmp = 0;
  522. int val;
  523. tmp = readb(info->base + S3C2410_TICNT);
  524. tmp &= S3C2410_TICNT_ENABLE;
  525. val = (info->rtc->max_user_freq / freq) - 1;
  526. tmp |= S3C2443_TICNT_PART(val);
  527. writel(S3C2443_TICNT1_PART(val), info->base + S3C2443_TICNT1);
  528. writel(tmp, info->base + S3C2410_TICNT);
  529. }
  530. static void s3c6410_rtc_setfreq(struct s3c_rtc *info, int freq)
  531. {
  532. int val;
  533. val = (info->rtc->max_user_freq / freq) - 1;
  534. writel(val, info->base + S3C2410_TICNT);
  535. }
  536. static void s3c24xx_rtc_enable_tick(struct s3c_rtc *info, struct seq_file *seq)
  537. {
  538. unsigned int ticnt;
  539. ticnt = readb(info->base + S3C2410_TICNT);
  540. ticnt &= S3C2410_TICNT_ENABLE;
  541. seq_printf(seq, "periodic_IRQ\t: %s\n", ticnt ? "yes" : "no");
  542. }
  543. static void s3c2416_rtc_select_tick_clk(struct s3c_rtc *info)
  544. {
  545. unsigned int con;
  546. con = readw(info->base + S3C2410_RTCCON);
  547. con |= S3C2443_RTCCON_TICSEL;
  548. writew(con, info->base + S3C2410_RTCCON);
  549. }
  550. static void s3c6410_rtc_enable_tick(struct s3c_rtc *info, struct seq_file *seq)
  551. {
  552. unsigned int ticnt;
  553. ticnt = readw(info->base + S3C2410_RTCCON);
  554. ticnt &= S3C64XX_RTCCON_TICEN;
  555. seq_printf(seq, "periodic_IRQ\t: %s\n", ticnt ? "yes" : "no");
  556. }
  557. static void s3c24xx_rtc_save_tick_cnt(struct s3c_rtc *info)
  558. {
  559. info->ticnt_save = readb(info->base + S3C2410_TICNT);
  560. }
  561. static void s3c24xx_rtc_restore_tick_cnt(struct s3c_rtc *info)
  562. {
  563. writeb(info->ticnt_save, info->base + S3C2410_TICNT);
  564. }
  565. static void s3c6410_rtc_save_tick_cnt(struct s3c_rtc *info)
  566. {
  567. info->ticnt_en_save = readw(info->base + S3C2410_RTCCON);
  568. info->ticnt_en_save &= S3C64XX_RTCCON_TICEN;
  569. info->ticnt_save = readl(info->base + S3C2410_TICNT);
  570. }
  571. static void s3c6410_rtc_restore_tick_cnt(struct s3c_rtc *info)
  572. {
  573. unsigned int con;
  574. writel(info->ticnt_save, info->base + S3C2410_TICNT);
  575. if (info->ticnt_en_save) {
  576. con = readw(info->base + S3C2410_RTCCON);
  577. writew(con | info->ticnt_en_save,
  578. info->base + S3C2410_RTCCON);
  579. }
  580. }
  581. static struct s3c_rtc_data const s3c2410_rtc_data = {
  582. .max_user_freq = 128,
  583. .irq_handler = s3c24xx_rtc_irq,
  584. .set_freq = s3c2410_rtc_setfreq,
  585. .enable_tick = s3c24xx_rtc_enable_tick,
  586. .save_tick_cnt = s3c24xx_rtc_save_tick_cnt,
  587. .restore_tick_cnt = s3c24xx_rtc_restore_tick_cnt,
  588. .enable = s3c24xx_rtc_enable,
  589. .disable = s3c24xx_rtc_disable,
  590. };
  591. static struct s3c_rtc_data const s3c2416_rtc_data = {
  592. .max_user_freq = 32768,
  593. .irq_handler = s3c24xx_rtc_irq,
  594. .set_freq = s3c2416_rtc_setfreq,
  595. .enable_tick = s3c24xx_rtc_enable_tick,
  596. .select_tick_clk = s3c2416_rtc_select_tick_clk,
  597. .save_tick_cnt = s3c24xx_rtc_save_tick_cnt,
  598. .restore_tick_cnt = s3c24xx_rtc_restore_tick_cnt,
  599. .enable = s3c24xx_rtc_enable,
  600. .disable = s3c24xx_rtc_disable,
  601. };
  602. static struct s3c_rtc_data const s3c2443_rtc_data = {
  603. .max_user_freq = 32768,
  604. .irq_handler = s3c24xx_rtc_irq,
  605. .set_freq = s3c2443_rtc_setfreq,
  606. .enable_tick = s3c24xx_rtc_enable_tick,
  607. .select_tick_clk = s3c2416_rtc_select_tick_clk,
  608. .save_tick_cnt = s3c24xx_rtc_save_tick_cnt,
  609. .restore_tick_cnt = s3c24xx_rtc_restore_tick_cnt,
  610. .enable = s3c24xx_rtc_enable,
  611. .disable = s3c24xx_rtc_disable,
  612. };
  613. static struct s3c_rtc_data const s3c6410_rtc_data = {
  614. .max_user_freq = 32768,
  615. .needs_src_clk = true,
  616. .irq_handler = s3c6410_rtc_irq,
  617. .set_freq = s3c6410_rtc_setfreq,
  618. .enable_tick = s3c6410_rtc_enable_tick,
  619. .save_tick_cnt = s3c6410_rtc_save_tick_cnt,
  620. .restore_tick_cnt = s3c6410_rtc_restore_tick_cnt,
  621. .enable = s3c24xx_rtc_enable,
  622. .disable = s3c6410_rtc_disable,
  623. };
  624. static const struct of_device_id s3c_rtc_dt_match[] = {
  625. {
  626. .compatible = "samsung,s3c2410-rtc",
  627. .data = (void *)&s3c2410_rtc_data,
  628. }, {
  629. .compatible = "samsung,s3c2416-rtc",
  630. .data = (void *)&s3c2416_rtc_data,
  631. }, {
  632. .compatible = "samsung,s3c2443-rtc",
  633. .data = (void *)&s3c2443_rtc_data,
  634. }, {
  635. .compatible = "samsung,s3c6410-rtc",
  636. .data = (void *)&s3c6410_rtc_data,
  637. }, {
  638. .compatible = "samsung,exynos3250-rtc",
  639. .data = (void *)&s3c6410_rtc_data,
  640. },
  641. { /* sentinel */ },
  642. };
  643. MODULE_DEVICE_TABLE(of, s3c_rtc_dt_match);
  644. static struct platform_driver s3c_rtc_driver = {
  645. .probe = s3c_rtc_probe,
  646. .remove = s3c_rtc_remove,
  647. .driver = {
  648. .name = "s3c-rtc",
  649. .pm = &s3c_rtc_pm_ops,
  650. .of_match_table = of_match_ptr(s3c_rtc_dt_match),
  651. },
  652. };
  653. module_platform_driver(s3c_rtc_driver);
  654. MODULE_DESCRIPTION("Samsung S3C RTC Driver");
  655. MODULE_AUTHOR("Ben Dooks <ben@simtec.co.uk>");
  656. MODULE_LICENSE("GPL");
  657. MODULE_ALIAS("platform:s3c2410-rtc");