rtc-s5m.c 19 KB

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  1. /*
  2. * Copyright (c) 2013-2014 Samsung Electronics Co., Ltd
  3. * http://www.samsung.com
  4. *
  5. * Copyright (C) 2013 Google, Inc
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License as published by
  9. * the Free Software Foundation; either version 2 of the License, or
  10. * (at your option) any later version.
  11. *
  12. * This program is distributed in the hope that it will be useful,
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. * GNU General Public License for more details.
  16. */
  17. #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  18. #include <linux/module.h>
  19. #include <linux/i2c.h>
  20. #include <linux/bcd.h>
  21. #include <linux/regmap.h>
  22. #include <linux/rtc.h>
  23. #include <linux/platform_device.h>
  24. #include <linux/mfd/samsung/core.h>
  25. #include <linux/mfd/samsung/irq.h>
  26. #include <linux/mfd/samsung/rtc.h>
  27. #include <linux/mfd/samsung/s2mps14.h>
  28. /*
  29. * Maximum number of retries for checking changes in UDR field
  30. * of S5M_RTC_UDR_CON register (to limit possible endless loop).
  31. *
  32. * After writing to RTC registers (setting time or alarm) read the UDR field
  33. * in S5M_RTC_UDR_CON register. UDR is auto-cleared when data have
  34. * been transferred.
  35. */
  36. #define UDR_READ_RETRY_CNT 5
  37. /* Registers used by the driver which are different between chipsets. */
  38. struct s5m_rtc_reg_config {
  39. /* Number of registers used for setting time/alarm0/alarm1 */
  40. unsigned int regs_count;
  41. /* First register for time, seconds */
  42. unsigned int time;
  43. /* RTC control register */
  44. unsigned int ctrl;
  45. /* First register for alarm 0, seconds */
  46. unsigned int alarm0;
  47. /* First register for alarm 1, seconds */
  48. unsigned int alarm1;
  49. /*
  50. * Register for update flag (UDR). Typically setting UDR field to 1
  51. * will enable update of time or alarm register. Then it will be
  52. * auto-cleared after successful update.
  53. */
  54. unsigned int rtc_udr_update;
  55. /* Mask for UDR field in 'rtc_udr_update' register */
  56. unsigned int rtc_udr_mask;
  57. };
  58. /* Register map for S5M8763 and S5M8767 */
  59. static const struct s5m_rtc_reg_config s5m_rtc_regs = {
  60. .regs_count = 8,
  61. .time = S5M_RTC_SEC,
  62. .ctrl = S5M_ALARM1_CONF,
  63. .alarm0 = S5M_ALARM0_SEC,
  64. .alarm1 = S5M_ALARM1_SEC,
  65. .rtc_udr_update = S5M_RTC_UDR_CON,
  66. .rtc_udr_mask = S5M_RTC_UDR_MASK,
  67. };
  68. /*
  69. * Register map for S2MPS14.
  70. * It may be also suitable for S2MPS11 but this was not tested.
  71. */
  72. static const struct s5m_rtc_reg_config s2mps_rtc_regs = {
  73. .regs_count = 7,
  74. .time = S2MPS_RTC_SEC,
  75. .ctrl = S2MPS_RTC_CTRL,
  76. .alarm0 = S2MPS_ALARM0_SEC,
  77. .alarm1 = S2MPS_ALARM1_SEC,
  78. .rtc_udr_update = S2MPS_RTC_UDR_CON,
  79. .rtc_udr_mask = S2MPS_RTC_WUDR_MASK,
  80. };
  81. struct s5m_rtc_info {
  82. struct device *dev;
  83. struct i2c_client *i2c;
  84. struct sec_pmic_dev *s5m87xx;
  85. struct regmap *regmap;
  86. struct rtc_device *rtc_dev;
  87. int irq;
  88. enum sec_device_type device_type;
  89. int rtc_24hr_mode;
  90. const struct s5m_rtc_reg_config *regs;
  91. };
  92. static const struct regmap_config s5m_rtc_regmap_config = {
  93. .reg_bits = 8,
  94. .val_bits = 8,
  95. .max_register = S5M_RTC_REG_MAX,
  96. };
  97. static const struct regmap_config s2mps14_rtc_regmap_config = {
  98. .reg_bits = 8,
  99. .val_bits = 8,
  100. .max_register = S2MPS_RTC_REG_MAX,
  101. };
  102. static void s5m8767_data_to_tm(u8 *data, struct rtc_time *tm,
  103. int rtc_24hr_mode)
  104. {
  105. tm->tm_sec = data[RTC_SEC] & 0x7f;
  106. tm->tm_min = data[RTC_MIN] & 0x7f;
  107. if (rtc_24hr_mode) {
  108. tm->tm_hour = data[RTC_HOUR] & 0x1f;
  109. } else {
  110. tm->tm_hour = data[RTC_HOUR] & 0x0f;
  111. if (data[RTC_HOUR] & HOUR_PM_MASK)
  112. tm->tm_hour += 12;
  113. }
  114. tm->tm_wday = ffs(data[RTC_WEEKDAY] & 0x7f);
  115. tm->tm_mday = data[RTC_DATE] & 0x1f;
  116. tm->tm_mon = (data[RTC_MONTH] & 0x0f) - 1;
  117. tm->tm_year = (data[RTC_YEAR1] & 0x7f) + 100;
  118. tm->tm_yday = 0;
  119. tm->tm_isdst = 0;
  120. }
  121. static int s5m8767_tm_to_data(struct rtc_time *tm, u8 *data)
  122. {
  123. data[RTC_SEC] = tm->tm_sec;
  124. data[RTC_MIN] = tm->tm_min;
  125. if (tm->tm_hour >= 12)
  126. data[RTC_HOUR] = tm->tm_hour | HOUR_PM_MASK;
  127. else
  128. data[RTC_HOUR] = tm->tm_hour & ~HOUR_PM_MASK;
  129. data[RTC_WEEKDAY] = 1 << tm->tm_wday;
  130. data[RTC_DATE] = tm->tm_mday;
  131. data[RTC_MONTH] = tm->tm_mon + 1;
  132. data[RTC_YEAR1] = tm->tm_year > 100 ? (tm->tm_year - 100) : 0;
  133. if (tm->tm_year < 100) {
  134. pr_err("RTC cannot handle the year %d\n",
  135. 1900 + tm->tm_year);
  136. return -EINVAL;
  137. } else {
  138. return 0;
  139. }
  140. }
  141. /*
  142. * Read RTC_UDR_CON register and wait till UDR field is cleared.
  143. * This indicates that time/alarm update ended.
  144. */
  145. static inline int s5m8767_wait_for_udr_update(struct s5m_rtc_info *info)
  146. {
  147. int ret, retry = UDR_READ_RETRY_CNT;
  148. unsigned int data;
  149. do {
  150. ret = regmap_read(info->regmap, info->regs->rtc_udr_update,
  151. &data);
  152. } while (--retry && (data & info->regs->rtc_udr_mask) && !ret);
  153. if (!retry)
  154. dev_err(info->dev, "waiting for UDR update, reached max number of retries\n");
  155. return ret;
  156. }
  157. static inline int s5m_check_peding_alarm_interrupt(struct s5m_rtc_info *info,
  158. struct rtc_wkalrm *alarm)
  159. {
  160. int ret;
  161. unsigned int val;
  162. switch (info->device_type) {
  163. case S5M8767X:
  164. case S5M8763X:
  165. ret = regmap_read(info->regmap, S5M_RTC_STATUS, &val);
  166. val &= S5M_ALARM0_STATUS;
  167. break;
  168. case S2MPS14X:
  169. case S2MPS13X:
  170. ret = regmap_read(info->s5m87xx->regmap_pmic, S2MPS14_REG_ST2,
  171. &val);
  172. val &= S2MPS_ALARM0_STATUS;
  173. break;
  174. default:
  175. return -EINVAL;
  176. }
  177. if (ret < 0)
  178. return ret;
  179. if (val)
  180. alarm->pending = 1;
  181. else
  182. alarm->pending = 0;
  183. return 0;
  184. }
  185. static inline int s5m8767_rtc_set_time_reg(struct s5m_rtc_info *info)
  186. {
  187. int ret;
  188. unsigned int data;
  189. ret = regmap_read(info->regmap, info->regs->rtc_udr_update, &data);
  190. if (ret < 0) {
  191. dev_err(info->dev, "failed to read update reg(%d)\n", ret);
  192. return ret;
  193. }
  194. data |= info->regs->rtc_udr_mask;
  195. if (info->device_type == S5M8763X || info->device_type == S5M8767X)
  196. data |= S5M_RTC_TIME_EN_MASK;
  197. ret = regmap_write(info->regmap, info->regs->rtc_udr_update, data);
  198. if (ret < 0) {
  199. dev_err(info->dev, "failed to write update reg(%d)\n", ret);
  200. return ret;
  201. }
  202. ret = s5m8767_wait_for_udr_update(info);
  203. return ret;
  204. }
  205. static inline int s5m8767_rtc_set_alarm_reg(struct s5m_rtc_info *info)
  206. {
  207. int ret;
  208. unsigned int data;
  209. ret = regmap_read(info->regmap, info->regs->rtc_udr_update, &data);
  210. if (ret < 0) {
  211. dev_err(info->dev, "%s: fail to read update reg(%d)\n",
  212. __func__, ret);
  213. return ret;
  214. }
  215. data |= info->regs->rtc_udr_mask;
  216. switch (info->device_type) {
  217. case S5M8763X:
  218. case S5M8767X:
  219. data &= ~S5M_RTC_TIME_EN_MASK;
  220. break;
  221. case S2MPS14X:
  222. data |= S2MPS_RTC_RUDR_MASK;
  223. break;
  224. case S2MPS13X:
  225. data |= S2MPS13_RTC_AUDR_MASK;
  226. break;
  227. default:
  228. return -EINVAL;
  229. }
  230. ret = regmap_write(info->regmap, info->regs->rtc_udr_update, data);
  231. if (ret < 0) {
  232. dev_err(info->dev, "%s: fail to write update reg(%d)\n",
  233. __func__, ret);
  234. return ret;
  235. }
  236. ret = s5m8767_wait_for_udr_update(info);
  237. /* On S2MPS13 the AUDR is not auto-cleared */
  238. if (info->device_type == S2MPS13X)
  239. regmap_update_bits(info->regmap, info->regs->rtc_udr_update,
  240. S2MPS13_RTC_AUDR_MASK, 0);
  241. return ret;
  242. }
  243. static void s5m8763_data_to_tm(u8 *data, struct rtc_time *tm)
  244. {
  245. tm->tm_sec = bcd2bin(data[RTC_SEC]);
  246. tm->tm_min = bcd2bin(data[RTC_MIN]);
  247. if (data[RTC_HOUR] & HOUR_12) {
  248. tm->tm_hour = bcd2bin(data[RTC_HOUR] & 0x1f);
  249. if (data[RTC_HOUR] & HOUR_PM)
  250. tm->tm_hour += 12;
  251. } else {
  252. tm->tm_hour = bcd2bin(data[RTC_HOUR] & 0x3f);
  253. }
  254. tm->tm_wday = data[RTC_WEEKDAY] & 0x07;
  255. tm->tm_mday = bcd2bin(data[RTC_DATE]);
  256. tm->tm_mon = bcd2bin(data[RTC_MONTH]);
  257. tm->tm_year = bcd2bin(data[RTC_YEAR1]) + bcd2bin(data[RTC_YEAR2]) * 100;
  258. tm->tm_year -= 1900;
  259. }
  260. static void s5m8763_tm_to_data(struct rtc_time *tm, u8 *data)
  261. {
  262. data[RTC_SEC] = bin2bcd(tm->tm_sec);
  263. data[RTC_MIN] = bin2bcd(tm->tm_min);
  264. data[RTC_HOUR] = bin2bcd(tm->tm_hour);
  265. data[RTC_WEEKDAY] = tm->tm_wday;
  266. data[RTC_DATE] = bin2bcd(tm->tm_mday);
  267. data[RTC_MONTH] = bin2bcd(tm->tm_mon);
  268. data[RTC_YEAR1] = bin2bcd(tm->tm_year % 100);
  269. data[RTC_YEAR2] = bin2bcd((tm->tm_year + 1900) / 100);
  270. }
  271. static int s5m_rtc_read_time(struct device *dev, struct rtc_time *tm)
  272. {
  273. struct s5m_rtc_info *info = dev_get_drvdata(dev);
  274. u8 data[info->regs->regs_count];
  275. int ret;
  276. if (info->device_type == S2MPS14X || info->device_type == S2MPS13X) {
  277. ret = regmap_update_bits(info->regmap,
  278. info->regs->rtc_udr_update,
  279. S2MPS_RTC_RUDR_MASK, S2MPS_RTC_RUDR_MASK);
  280. if (ret) {
  281. dev_err(dev,
  282. "Failed to prepare registers for time reading: %d\n",
  283. ret);
  284. return ret;
  285. }
  286. }
  287. ret = regmap_bulk_read(info->regmap, info->regs->time, data,
  288. info->regs->regs_count);
  289. if (ret < 0)
  290. return ret;
  291. switch (info->device_type) {
  292. case S5M8763X:
  293. s5m8763_data_to_tm(data, tm);
  294. break;
  295. case S5M8767X:
  296. case S2MPS14X:
  297. case S2MPS13X:
  298. s5m8767_data_to_tm(data, tm, info->rtc_24hr_mode);
  299. break;
  300. default:
  301. return -EINVAL;
  302. }
  303. dev_dbg(dev, "%s: %d/%d/%d %d:%d:%d(%d)\n", __func__,
  304. 1900 + tm->tm_year, 1 + tm->tm_mon, tm->tm_mday,
  305. tm->tm_hour, tm->tm_min, tm->tm_sec, tm->tm_wday);
  306. return rtc_valid_tm(tm);
  307. }
  308. static int s5m_rtc_set_time(struct device *dev, struct rtc_time *tm)
  309. {
  310. struct s5m_rtc_info *info = dev_get_drvdata(dev);
  311. u8 data[info->regs->regs_count];
  312. int ret = 0;
  313. switch (info->device_type) {
  314. case S5M8763X:
  315. s5m8763_tm_to_data(tm, data);
  316. break;
  317. case S5M8767X:
  318. case S2MPS14X:
  319. case S2MPS13X:
  320. ret = s5m8767_tm_to_data(tm, data);
  321. break;
  322. default:
  323. return -EINVAL;
  324. }
  325. if (ret < 0)
  326. return ret;
  327. dev_dbg(dev, "%s: %d/%d/%d %d:%d:%d(%d)\n", __func__,
  328. 1900 + tm->tm_year, 1 + tm->tm_mon, tm->tm_mday,
  329. tm->tm_hour, tm->tm_min, tm->tm_sec, tm->tm_wday);
  330. ret = regmap_raw_write(info->regmap, info->regs->time, data,
  331. info->regs->regs_count);
  332. if (ret < 0)
  333. return ret;
  334. ret = s5m8767_rtc_set_time_reg(info);
  335. return ret;
  336. }
  337. static int s5m_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
  338. {
  339. struct s5m_rtc_info *info = dev_get_drvdata(dev);
  340. u8 data[info->regs->regs_count];
  341. unsigned int val;
  342. int ret, i;
  343. ret = regmap_bulk_read(info->regmap, info->regs->alarm0, data,
  344. info->regs->regs_count);
  345. if (ret < 0)
  346. return ret;
  347. switch (info->device_type) {
  348. case S5M8763X:
  349. s5m8763_data_to_tm(data, &alrm->time);
  350. ret = regmap_read(info->regmap, S5M_ALARM0_CONF, &val);
  351. if (ret < 0)
  352. return ret;
  353. alrm->enabled = !!val;
  354. break;
  355. case S5M8767X:
  356. case S2MPS14X:
  357. case S2MPS13X:
  358. s5m8767_data_to_tm(data, &alrm->time, info->rtc_24hr_mode);
  359. alrm->enabled = 0;
  360. for (i = 0; i < info->regs->regs_count; i++) {
  361. if (data[i] & ALARM_ENABLE_MASK) {
  362. alrm->enabled = 1;
  363. break;
  364. }
  365. }
  366. break;
  367. default:
  368. return -EINVAL;
  369. }
  370. dev_dbg(dev, "%s: %d/%d/%d %d:%d:%d(%d)\n", __func__,
  371. 1900 + alrm->time.tm_year, 1 + alrm->time.tm_mon,
  372. alrm->time.tm_mday, alrm->time.tm_hour,
  373. alrm->time.tm_min, alrm->time.tm_sec,
  374. alrm->time.tm_wday);
  375. ret = s5m_check_peding_alarm_interrupt(info, alrm);
  376. return 0;
  377. }
  378. static int s5m_rtc_stop_alarm(struct s5m_rtc_info *info)
  379. {
  380. u8 data[info->regs->regs_count];
  381. int ret, i;
  382. struct rtc_time tm;
  383. ret = regmap_bulk_read(info->regmap, info->regs->alarm0, data,
  384. info->regs->regs_count);
  385. if (ret < 0)
  386. return ret;
  387. s5m8767_data_to_tm(data, &tm, info->rtc_24hr_mode);
  388. dev_dbg(info->dev, "%s: %d/%d/%d %d:%d:%d(%d)\n", __func__,
  389. 1900 + tm.tm_year, 1 + tm.tm_mon, tm.tm_mday,
  390. tm.tm_hour, tm.tm_min, tm.tm_sec, tm.tm_wday);
  391. switch (info->device_type) {
  392. case S5M8763X:
  393. ret = regmap_write(info->regmap, S5M_ALARM0_CONF, 0);
  394. break;
  395. case S5M8767X:
  396. case S2MPS14X:
  397. case S2MPS13X:
  398. for (i = 0; i < info->regs->regs_count; i++)
  399. data[i] &= ~ALARM_ENABLE_MASK;
  400. ret = regmap_raw_write(info->regmap, info->regs->alarm0, data,
  401. info->regs->regs_count);
  402. if (ret < 0)
  403. return ret;
  404. ret = s5m8767_rtc_set_alarm_reg(info);
  405. break;
  406. default:
  407. return -EINVAL;
  408. }
  409. return ret;
  410. }
  411. static int s5m_rtc_start_alarm(struct s5m_rtc_info *info)
  412. {
  413. int ret;
  414. u8 data[info->regs->regs_count];
  415. u8 alarm0_conf;
  416. struct rtc_time tm;
  417. ret = regmap_bulk_read(info->regmap, info->regs->alarm0, data,
  418. info->regs->regs_count);
  419. if (ret < 0)
  420. return ret;
  421. s5m8767_data_to_tm(data, &tm, info->rtc_24hr_mode);
  422. dev_dbg(info->dev, "%s: %d/%d/%d %d:%d:%d(%d)\n", __func__,
  423. 1900 + tm.tm_year, 1 + tm.tm_mon, tm.tm_mday,
  424. tm.tm_hour, tm.tm_min, tm.tm_sec, tm.tm_wday);
  425. switch (info->device_type) {
  426. case S5M8763X:
  427. alarm0_conf = 0x77;
  428. ret = regmap_write(info->regmap, S5M_ALARM0_CONF, alarm0_conf);
  429. break;
  430. case S5M8767X:
  431. case S2MPS14X:
  432. case S2MPS13X:
  433. data[RTC_SEC] |= ALARM_ENABLE_MASK;
  434. data[RTC_MIN] |= ALARM_ENABLE_MASK;
  435. data[RTC_HOUR] |= ALARM_ENABLE_MASK;
  436. data[RTC_WEEKDAY] &= ~ALARM_ENABLE_MASK;
  437. if (data[RTC_DATE] & 0x1f)
  438. data[RTC_DATE] |= ALARM_ENABLE_MASK;
  439. if (data[RTC_MONTH] & 0xf)
  440. data[RTC_MONTH] |= ALARM_ENABLE_MASK;
  441. if (data[RTC_YEAR1] & 0x7f)
  442. data[RTC_YEAR1] |= ALARM_ENABLE_MASK;
  443. ret = regmap_raw_write(info->regmap, info->regs->alarm0, data,
  444. info->regs->regs_count);
  445. if (ret < 0)
  446. return ret;
  447. ret = s5m8767_rtc_set_alarm_reg(info);
  448. break;
  449. default:
  450. return -EINVAL;
  451. }
  452. return ret;
  453. }
  454. static int s5m_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
  455. {
  456. struct s5m_rtc_info *info = dev_get_drvdata(dev);
  457. u8 data[info->regs->regs_count];
  458. int ret;
  459. switch (info->device_type) {
  460. case S5M8763X:
  461. s5m8763_tm_to_data(&alrm->time, data);
  462. break;
  463. case S5M8767X:
  464. case S2MPS14X:
  465. case S2MPS13X:
  466. s5m8767_tm_to_data(&alrm->time, data);
  467. break;
  468. default:
  469. return -EINVAL;
  470. }
  471. dev_dbg(dev, "%s: %d/%d/%d %d:%d:%d(%d)\n", __func__,
  472. 1900 + alrm->time.tm_year, 1 + alrm->time.tm_mon,
  473. alrm->time.tm_mday, alrm->time.tm_hour, alrm->time.tm_min,
  474. alrm->time.tm_sec, alrm->time.tm_wday);
  475. ret = s5m_rtc_stop_alarm(info);
  476. if (ret < 0)
  477. return ret;
  478. ret = regmap_raw_write(info->regmap, info->regs->alarm0, data,
  479. info->regs->regs_count);
  480. if (ret < 0)
  481. return ret;
  482. ret = s5m8767_rtc_set_alarm_reg(info);
  483. if (ret < 0)
  484. return ret;
  485. if (alrm->enabled)
  486. ret = s5m_rtc_start_alarm(info);
  487. return ret;
  488. }
  489. static int s5m_rtc_alarm_irq_enable(struct device *dev,
  490. unsigned int enabled)
  491. {
  492. struct s5m_rtc_info *info = dev_get_drvdata(dev);
  493. if (enabled)
  494. return s5m_rtc_start_alarm(info);
  495. else
  496. return s5m_rtc_stop_alarm(info);
  497. }
  498. static irqreturn_t s5m_rtc_alarm_irq(int irq, void *data)
  499. {
  500. struct s5m_rtc_info *info = data;
  501. rtc_update_irq(info->rtc_dev, 1, RTC_IRQF | RTC_AF);
  502. return IRQ_HANDLED;
  503. }
  504. static const struct rtc_class_ops s5m_rtc_ops = {
  505. .read_time = s5m_rtc_read_time,
  506. .set_time = s5m_rtc_set_time,
  507. .read_alarm = s5m_rtc_read_alarm,
  508. .set_alarm = s5m_rtc_set_alarm,
  509. .alarm_irq_enable = s5m_rtc_alarm_irq_enable,
  510. };
  511. static int s5m8767_rtc_init_reg(struct s5m_rtc_info *info)
  512. {
  513. u8 data[2];
  514. int ret;
  515. switch (info->device_type) {
  516. case S5M8763X:
  517. case S5M8767X:
  518. /* UDR update time. Default of 7.32 ms is too long. */
  519. ret = regmap_update_bits(info->regmap, S5M_RTC_UDR_CON,
  520. S5M_RTC_UDR_T_MASK, S5M_RTC_UDR_T_450_US);
  521. if (ret < 0)
  522. dev_err(info->dev, "%s: fail to change UDR time: %d\n",
  523. __func__, ret);
  524. /* Set RTC control register : Binary mode, 24hour mode */
  525. data[0] = (1 << BCD_EN_SHIFT) | (1 << MODEL24_SHIFT);
  526. data[1] = (0 << BCD_EN_SHIFT) | (1 << MODEL24_SHIFT);
  527. ret = regmap_raw_write(info->regmap, S5M_ALARM0_CONF, data, 2);
  528. break;
  529. case S2MPS14X:
  530. case S2MPS13X:
  531. data[0] = (0 << BCD_EN_SHIFT) | (1 << MODEL24_SHIFT);
  532. ret = regmap_write(info->regmap, info->regs->ctrl, data[0]);
  533. if (ret < 0)
  534. break;
  535. /*
  536. * Should set WUDR & (RUDR or AUDR) bits to high after writing
  537. * RTC_CTRL register like writing Alarm registers. We can't find
  538. * the description from datasheet but vendor code does that
  539. * really.
  540. */
  541. ret = s5m8767_rtc_set_alarm_reg(info);
  542. break;
  543. default:
  544. return -EINVAL;
  545. }
  546. info->rtc_24hr_mode = 1;
  547. if (ret < 0) {
  548. dev_err(info->dev, "%s: fail to write controlm reg(%d)\n",
  549. __func__, ret);
  550. return ret;
  551. }
  552. return ret;
  553. }
  554. static int s5m_rtc_probe(struct platform_device *pdev)
  555. {
  556. struct sec_pmic_dev *s5m87xx = dev_get_drvdata(pdev->dev.parent);
  557. struct sec_platform_data *pdata = s5m87xx->pdata;
  558. struct s5m_rtc_info *info;
  559. const struct regmap_config *regmap_cfg;
  560. int ret, alarm_irq;
  561. if (!pdata) {
  562. dev_err(pdev->dev.parent, "Platform data not supplied\n");
  563. return -ENODEV;
  564. }
  565. info = devm_kzalloc(&pdev->dev, sizeof(*info), GFP_KERNEL);
  566. if (!info)
  567. return -ENOMEM;
  568. switch (platform_get_device_id(pdev)->driver_data) {
  569. case S2MPS14X:
  570. case S2MPS13X:
  571. regmap_cfg = &s2mps14_rtc_regmap_config;
  572. info->regs = &s2mps_rtc_regs;
  573. alarm_irq = S2MPS14_IRQ_RTCA0;
  574. break;
  575. case S5M8763X:
  576. regmap_cfg = &s5m_rtc_regmap_config;
  577. info->regs = &s5m_rtc_regs;
  578. alarm_irq = S5M8763_IRQ_ALARM0;
  579. break;
  580. case S5M8767X:
  581. regmap_cfg = &s5m_rtc_regmap_config;
  582. info->regs = &s5m_rtc_regs;
  583. alarm_irq = S5M8767_IRQ_RTCA1;
  584. break;
  585. default:
  586. dev_err(&pdev->dev,
  587. "Device type %lu is not supported by RTC driver\n",
  588. platform_get_device_id(pdev)->driver_data);
  589. return -ENODEV;
  590. }
  591. info->i2c = i2c_new_dummy(s5m87xx->i2c->adapter, RTC_I2C_ADDR);
  592. if (!info->i2c) {
  593. dev_err(&pdev->dev, "Failed to allocate I2C for RTC\n");
  594. return -ENODEV;
  595. }
  596. info->regmap = devm_regmap_init_i2c(info->i2c, regmap_cfg);
  597. if (IS_ERR(info->regmap)) {
  598. ret = PTR_ERR(info->regmap);
  599. dev_err(&pdev->dev, "Failed to allocate RTC register map: %d\n",
  600. ret);
  601. goto err;
  602. }
  603. info->dev = &pdev->dev;
  604. info->s5m87xx = s5m87xx;
  605. info->device_type = platform_get_device_id(pdev)->driver_data;
  606. if (s5m87xx->irq_data) {
  607. info->irq = regmap_irq_get_virq(s5m87xx->irq_data, alarm_irq);
  608. if (info->irq <= 0) {
  609. ret = -EINVAL;
  610. dev_err(&pdev->dev, "Failed to get virtual IRQ %d\n",
  611. alarm_irq);
  612. goto err;
  613. }
  614. }
  615. platform_set_drvdata(pdev, info);
  616. ret = s5m8767_rtc_init_reg(info);
  617. device_init_wakeup(&pdev->dev, 1);
  618. info->rtc_dev = devm_rtc_device_register(&pdev->dev, "s5m-rtc",
  619. &s5m_rtc_ops, THIS_MODULE);
  620. if (IS_ERR(info->rtc_dev)) {
  621. ret = PTR_ERR(info->rtc_dev);
  622. goto err;
  623. }
  624. if (!info->irq) {
  625. dev_info(&pdev->dev, "Alarm IRQ not available\n");
  626. return 0;
  627. }
  628. ret = devm_request_threaded_irq(&pdev->dev, info->irq, NULL,
  629. s5m_rtc_alarm_irq, 0, "rtc-alarm0",
  630. info);
  631. if (ret < 0) {
  632. dev_err(&pdev->dev, "Failed to request alarm IRQ: %d: %d\n",
  633. info->irq, ret);
  634. goto err;
  635. }
  636. return 0;
  637. err:
  638. i2c_unregister_device(info->i2c);
  639. return ret;
  640. }
  641. static int s5m_rtc_remove(struct platform_device *pdev)
  642. {
  643. struct s5m_rtc_info *info = platform_get_drvdata(pdev);
  644. i2c_unregister_device(info->i2c);
  645. return 0;
  646. }
  647. #ifdef CONFIG_PM_SLEEP
  648. static int s5m_rtc_resume(struct device *dev)
  649. {
  650. struct s5m_rtc_info *info = dev_get_drvdata(dev);
  651. int ret = 0;
  652. if (info->irq && device_may_wakeup(dev))
  653. ret = disable_irq_wake(info->irq);
  654. return ret;
  655. }
  656. static int s5m_rtc_suspend(struct device *dev)
  657. {
  658. struct s5m_rtc_info *info = dev_get_drvdata(dev);
  659. int ret = 0;
  660. if (info->irq && device_may_wakeup(dev))
  661. ret = enable_irq_wake(info->irq);
  662. return ret;
  663. }
  664. #endif /* CONFIG_PM_SLEEP */
  665. static SIMPLE_DEV_PM_OPS(s5m_rtc_pm_ops, s5m_rtc_suspend, s5m_rtc_resume);
  666. static const struct platform_device_id s5m_rtc_id[] = {
  667. { "s5m-rtc", S5M8767X },
  668. { "s2mps13-rtc", S2MPS13X },
  669. { "s2mps14-rtc", S2MPS14X },
  670. { },
  671. };
  672. MODULE_DEVICE_TABLE(platform, s5m_rtc_id);
  673. static struct platform_driver s5m_rtc_driver = {
  674. .driver = {
  675. .name = "s5m-rtc",
  676. .pm = &s5m_rtc_pm_ops,
  677. },
  678. .probe = s5m_rtc_probe,
  679. .remove = s5m_rtc_remove,
  680. .id_table = s5m_rtc_id,
  681. };
  682. module_platform_driver(s5m_rtc_driver);
  683. /* Module information */
  684. MODULE_AUTHOR("Sangbeom Kim <sbkim73@samsung.com>");
  685. MODULE_DESCRIPTION("Samsung S5M/S2MPS14 RTC driver");
  686. MODULE_LICENSE("GPL");
  687. MODULE_ALIAS("platform:s5m-rtc");