aic7xxx_reg_print.c_shipped 11 KB

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  1. /*
  2. * DO NOT EDIT - This file is automatically generated
  3. * from the following source files:
  4. *
  5. * $Id: //depot/aic7xxx/aic7xxx/aic7xxx.seq#58 $
  6. * $Id: //depot/aic7xxx/aic7xxx/aic7xxx.reg#40 $
  7. */
  8. #include "aic7xxx_osm.h"
  9. static const ahc_reg_parse_entry_t SCSISEQ_parse_table[] = {
  10. { "SCSIRSTO", 0x01, 0x01 },
  11. { "ENAUTOATNP", 0x02, 0x02 },
  12. { "ENAUTOATNI", 0x04, 0x04 },
  13. { "ENAUTOATNO", 0x08, 0x08 },
  14. { "ENRSELI", 0x10, 0x10 },
  15. { "ENSELI", 0x20, 0x20 },
  16. { "ENSELO", 0x40, 0x40 },
  17. { "TEMODE", 0x80, 0x80 }
  18. };
  19. int
  20. ahc_scsiseq_print(u_int regvalue, u_int *cur_col, u_int wrap)
  21. {
  22. return (ahc_print_register(SCSISEQ_parse_table, 8, "SCSISEQ",
  23. 0x00, regvalue, cur_col, wrap));
  24. }
  25. static const ahc_reg_parse_entry_t SXFRCTL0_parse_table[] = {
  26. { "CLRCHN", 0x02, 0x02 },
  27. { "SCAMEN", 0x04, 0x04 },
  28. { "SPIOEN", 0x08, 0x08 },
  29. { "CLRSTCNT", 0x10, 0x10 },
  30. { "FAST20", 0x20, 0x20 },
  31. { "DFPEXP", 0x40, 0x40 },
  32. { "DFON", 0x80, 0x80 }
  33. };
  34. int
  35. ahc_sxfrctl0_print(u_int regvalue, u_int *cur_col, u_int wrap)
  36. {
  37. return (ahc_print_register(SXFRCTL0_parse_table, 7, "SXFRCTL0",
  38. 0x01, regvalue, cur_col, wrap));
  39. }
  40. static const ahc_reg_parse_entry_t SCSISIGI_parse_table[] = {
  41. { "ACKI", 0x01, 0x01 },
  42. { "REQI", 0x02, 0x02 },
  43. { "BSYI", 0x04, 0x04 },
  44. { "SELI", 0x08, 0x08 },
  45. { "ATNI", 0x10, 0x10 },
  46. { "MSGI", 0x20, 0x20 },
  47. { "IOI", 0x40, 0x40 },
  48. { "CDI", 0x80, 0x80 },
  49. { "P_DATAOUT", 0x00, 0x00 },
  50. { "P_DATAOUT_DT", 0x20, 0x20 },
  51. { "P_DATAIN", 0x40, 0x40 },
  52. { "P_DATAIN_DT", 0x60, 0x60 },
  53. { "P_COMMAND", 0x80, 0x80 },
  54. { "P_MESGOUT", 0xa0, 0xa0 },
  55. { "P_STATUS", 0xc0, 0xc0 },
  56. { "PHASE_MASK", 0xe0, 0xe0 },
  57. { "P_MESGIN", 0xe0, 0xe0 }
  58. };
  59. int
  60. ahc_scsisigi_print(u_int regvalue, u_int *cur_col, u_int wrap)
  61. {
  62. return (ahc_print_register(SCSISIGI_parse_table, 17, "SCSISIGI",
  63. 0x03, regvalue, cur_col, wrap));
  64. }
  65. static const ahc_reg_parse_entry_t SCSIRATE_parse_table[] = {
  66. { "SINGLE_EDGE", 0x10, 0x10 },
  67. { "ENABLE_CRC", 0x40, 0x40 },
  68. { "WIDEXFER", 0x80, 0x80 },
  69. { "SXFR_ULTRA2", 0x0f, 0x0f },
  70. { "SOFS", 0x0f, 0x0f },
  71. { "SXFR", 0x70, 0x70 }
  72. };
  73. int
  74. ahc_scsirate_print(u_int regvalue, u_int *cur_col, u_int wrap)
  75. {
  76. return (ahc_print_register(SCSIRATE_parse_table, 6, "SCSIRATE",
  77. 0x04, regvalue, cur_col, wrap));
  78. }
  79. static const ahc_reg_parse_entry_t SSTAT0_parse_table[] = {
  80. { "DMADONE", 0x01, 0x01 },
  81. { "SPIORDY", 0x02, 0x02 },
  82. { "SDONE", 0x04, 0x04 },
  83. { "SWRAP", 0x08, 0x08 },
  84. { "IOERR", 0x08, 0x08 },
  85. { "SELINGO", 0x10, 0x10 },
  86. { "SELDI", 0x20, 0x20 },
  87. { "SELDO", 0x40, 0x40 },
  88. { "TARGET", 0x80, 0x80 }
  89. };
  90. int
  91. ahc_sstat0_print(u_int regvalue, u_int *cur_col, u_int wrap)
  92. {
  93. return (ahc_print_register(SSTAT0_parse_table, 9, "SSTAT0",
  94. 0x0b, regvalue, cur_col, wrap));
  95. }
  96. static const ahc_reg_parse_entry_t SSTAT1_parse_table[] = {
  97. { "REQINIT", 0x01, 0x01 },
  98. { "PHASECHG", 0x02, 0x02 },
  99. { "SCSIPERR", 0x04, 0x04 },
  100. { "BUSFREE", 0x08, 0x08 },
  101. { "PHASEMIS", 0x10, 0x10 },
  102. { "SCSIRSTI", 0x20, 0x20 },
  103. { "ATNTARG", 0x40, 0x40 },
  104. { "SELTO", 0x80, 0x80 }
  105. };
  106. int
  107. ahc_sstat1_print(u_int regvalue, u_int *cur_col, u_int wrap)
  108. {
  109. return (ahc_print_register(SSTAT1_parse_table, 8, "SSTAT1",
  110. 0x0c, regvalue, cur_col, wrap));
  111. }
  112. static const ahc_reg_parse_entry_t SSTAT2_parse_table[] = {
  113. { "DUAL_EDGE_ERR", 0x01, 0x01 },
  114. { "CRCREQERR", 0x02, 0x02 },
  115. { "CRCENDERR", 0x04, 0x04 },
  116. { "CRCVALERR", 0x08, 0x08 },
  117. { "EXP_ACTIVE", 0x10, 0x10 },
  118. { "SHVALID", 0x40, 0x40 },
  119. { "OVERRUN", 0x80, 0x80 },
  120. { "SFCNT", 0x1f, 0x1f }
  121. };
  122. int
  123. ahc_sstat2_print(u_int regvalue, u_int *cur_col, u_int wrap)
  124. {
  125. return (ahc_print_register(SSTAT2_parse_table, 8, "SSTAT2",
  126. 0x0d, regvalue, cur_col, wrap));
  127. }
  128. static const ahc_reg_parse_entry_t SSTAT3_parse_table[] = {
  129. { "OFFCNT", 0x0f, 0x0f },
  130. { "U2OFFCNT", 0x7f, 0x7f },
  131. { "SCSICNT", 0xf0, 0xf0 }
  132. };
  133. int
  134. ahc_sstat3_print(u_int regvalue, u_int *cur_col, u_int wrap)
  135. {
  136. return (ahc_print_register(SSTAT3_parse_table, 3, "SSTAT3",
  137. 0x0e, regvalue, cur_col, wrap));
  138. }
  139. static const ahc_reg_parse_entry_t SIMODE0_parse_table[] = {
  140. { "ENDMADONE", 0x01, 0x01 },
  141. { "ENSPIORDY", 0x02, 0x02 },
  142. { "ENSDONE", 0x04, 0x04 },
  143. { "ENSWRAP", 0x08, 0x08 },
  144. { "ENIOERR", 0x08, 0x08 },
  145. { "ENSELINGO", 0x10, 0x10 },
  146. { "ENSELDI", 0x20, 0x20 },
  147. { "ENSELDO", 0x40, 0x40 }
  148. };
  149. int
  150. ahc_simode0_print(u_int regvalue, u_int *cur_col, u_int wrap)
  151. {
  152. return (ahc_print_register(SIMODE0_parse_table, 8, "SIMODE0",
  153. 0x10, regvalue, cur_col, wrap));
  154. }
  155. static const ahc_reg_parse_entry_t SIMODE1_parse_table[] = {
  156. { "ENREQINIT", 0x01, 0x01 },
  157. { "ENPHASECHG", 0x02, 0x02 },
  158. { "ENSCSIPERR", 0x04, 0x04 },
  159. { "ENBUSFREE", 0x08, 0x08 },
  160. { "ENPHASEMIS", 0x10, 0x10 },
  161. { "ENSCSIRST", 0x20, 0x20 },
  162. { "ENATNTARG", 0x40, 0x40 },
  163. { "ENSELTIMO", 0x80, 0x80 }
  164. };
  165. int
  166. ahc_simode1_print(u_int regvalue, u_int *cur_col, u_int wrap)
  167. {
  168. return (ahc_print_register(SIMODE1_parse_table, 8, "SIMODE1",
  169. 0x11, regvalue, cur_col, wrap));
  170. }
  171. int
  172. ahc_scsibusl_print(u_int regvalue, u_int *cur_col, u_int wrap)
  173. {
  174. return (ahc_print_register(NULL, 0, "SCSIBUSL",
  175. 0x12, regvalue, cur_col, wrap));
  176. }
  177. static const ahc_reg_parse_entry_t SBLKCTL_parse_table[] = {
  178. { "XCVR", 0x01, 0x01 },
  179. { "SELWIDE", 0x02, 0x02 },
  180. { "ENAB20", 0x04, 0x04 },
  181. { "SELBUSB", 0x08, 0x08 },
  182. { "ENAB40", 0x08, 0x08 },
  183. { "AUTOFLUSHDIS", 0x20, 0x20 },
  184. { "DIAGLEDON", 0x40, 0x40 },
  185. { "DIAGLEDEN", 0x80, 0x80 }
  186. };
  187. int
  188. ahc_sblkctl_print(u_int regvalue, u_int *cur_col, u_int wrap)
  189. {
  190. return (ahc_print_register(SBLKCTL_parse_table, 8, "SBLKCTL",
  191. 0x1f, regvalue, cur_col, wrap));
  192. }
  193. static const ahc_reg_parse_entry_t SEQ_FLAGS_parse_table[] = {
  194. { "NO_DISCONNECT", 0x01, 0x01 },
  195. { "SPHASE_PENDING", 0x02, 0x02 },
  196. { "DPHASE_PENDING", 0x04, 0x04 },
  197. { "CMDPHASE_PENDING", 0x08, 0x08 },
  198. { "TARG_CMD_PENDING", 0x10, 0x10 },
  199. { "DPHASE", 0x20, 0x20 },
  200. { "NO_CDB_SENT", 0x40, 0x40 },
  201. { "TARGET_CMD_IS_TAGGED",0x40, 0x40 },
  202. { "NOT_IDENTIFIED", 0x80, 0x80 }
  203. };
  204. int
  205. ahc_seq_flags_print(u_int regvalue, u_int *cur_col, u_int wrap)
  206. {
  207. return (ahc_print_register(SEQ_FLAGS_parse_table, 9, "SEQ_FLAGS",
  208. 0x3c, regvalue, cur_col, wrap));
  209. }
  210. static const ahc_reg_parse_entry_t LASTPHASE_parse_table[] = {
  211. { "MSGI", 0x20, 0x20 },
  212. { "IOI", 0x40, 0x40 },
  213. { "CDI", 0x80, 0x80 },
  214. { "P_DATAOUT", 0x00, 0x00 },
  215. { "P_BUSFREE", 0x01, 0x01 },
  216. { "P_DATAIN", 0x40, 0x40 },
  217. { "P_COMMAND", 0x80, 0x80 },
  218. { "P_MESGOUT", 0xa0, 0xa0 },
  219. { "P_STATUS", 0xc0, 0xc0 },
  220. { "PHASE_MASK", 0xe0, 0xe0 },
  221. { "P_MESGIN", 0xe0, 0xe0 }
  222. };
  223. int
  224. ahc_lastphase_print(u_int regvalue, u_int *cur_col, u_int wrap)
  225. {
  226. return (ahc_print_register(LASTPHASE_parse_table, 11, "LASTPHASE",
  227. 0x3f, regvalue, cur_col, wrap));
  228. }
  229. static const ahc_reg_parse_entry_t SEQCTL_parse_table[] = {
  230. { "LOADRAM", 0x01, 0x01 },
  231. { "SEQRESET", 0x02, 0x02 },
  232. { "STEP", 0x04, 0x04 },
  233. { "BRKADRINTEN", 0x08, 0x08 },
  234. { "FASTMODE", 0x10, 0x10 },
  235. { "FAILDIS", 0x20, 0x20 },
  236. { "PAUSEDIS", 0x40, 0x40 },
  237. { "PERRORDIS", 0x80, 0x80 }
  238. };
  239. int
  240. ahc_seqctl_print(u_int regvalue, u_int *cur_col, u_int wrap)
  241. {
  242. return (ahc_print_register(SEQCTL_parse_table, 8, "SEQCTL",
  243. 0x60, regvalue, cur_col, wrap));
  244. }
  245. int
  246. ahc_sram_base_print(u_int regvalue, u_int *cur_col, u_int wrap)
  247. {
  248. return (ahc_print_register(NULL, 0, "SRAM_BASE",
  249. 0x70, regvalue, cur_col, wrap));
  250. }
  251. static const ahc_reg_parse_entry_t ERROR_parse_table[] = {
  252. { "ILLHADDR", 0x01, 0x01 },
  253. { "ILLSADDR", 0x02, 0x02 },
  254. { "ILLOPCODE", 0x04, 0x04 },
  255. { "SQPARERR", 0x08, 0x08 },
  256. { "DPARERR", 0x10, 0x10 },
  257. { "MPARERR", 0x20, 0x20 },
  258. { "PCIERRSTAT", 0x40, 0x40 },
  259. { "CIOPARERR", 0x80, 0x80 }
  260. };
  261. int
  262. ahc_error_print(u_int regvalue, u_int *cur_col, u_int wrap)
  263. {
  264. return (ahc_print_register(ERROR_parse_table, 8, "ERROR",
  265. 0x92, regvalue, cur_col, wrap));
  266. }
  267. static const ahc_reg_parse_entry_t DFCNTRL_parse_table[] = {
  268. { "FIFORESET", 0x01, 0x01 },
  269. { "FIFOFLUSH", 0x02, 0x02 },
  270. { "DIRECTION", 0x04, 0x04 },
  271. { "HDMAEN", 0x08, 0x08 },
  272. { "HDMAENACK", 0x08, 0x08 },
  273. { "SDMAEN", 0x10, 0x10 },
  274. { "SDMAENACK", 0x10, 0x10 },
  275. { "SCSIEN", 0x20, 0x20 },
  276. { "WIDEODD", 0x40, 0x40 },
  277. { "PRELOADEN", 0x80, 0x80 }
  278. };
  279. int
  280. ahc_dfcntrl_print(u_int regvalue, u_int *cur_col, u_int wrap)
  281. {
  282. return (ahc_print_register(DFCNTRL_parse_table, 10, "DFCNTRL",
  283. 0x93, regvalue, cur_col, wrap));
  284. }
  285. static const ahc_reg_parse_entry_t DFSTATUS_parse_table[] = {
  286. { "FIFOEMP", 0x01, 0x01 },
  287. { "FIFOFULL", 0x02, 0x02 },
  288. { "DFTHRESH", 0x04, 0x04 },
  289. { "HDONE", 0x08, 0x08 },
  290. { "MREQPEND", 0x10, 0x10 },
  291. { "FIFOQWDEMP", 0x20, 0x20 },
  292. { "DFCACHETH", 0x40, 0x40 },
  293. { "PRELOAD_AVAIL", 0x80, 0x80 }
  294. };
  295. int
  296. ahc_dfstatus_print(u_int regvalue, u_int *cur_col, u_int wrap)
  297. {
  298. return (ahc_print_register(DFSTATUS_parse_table, 8, "DFSTATUS",
  299. 0x94, regvalue, cur_col, wrap));
  300. }
  301. static const ahc_reg_parse_entry_t SCSIPHASE_parse_table[] = {
  302. { "DATA_OUT_PHASE", 0x01, 0x01 },
  303. { "DATA_IN_PHASE", 0x02, 0x02 },
  304. { "MSG_OUT_PHASE", 0x04, 0x04 },
  305. { "MSG_IN_PHASE", 0x08, 0x08 },
  306. { "COMMAND_PHASE", 0x10, 0x10 },
  307. { "STATUS_PHASE", 0x20, 0x20 },
  308. { "DATA_PHASE_MASK", 0x03, 0x03 }
  309. };
  310. int
  311. ahc_scsiphase_print(u_int regvalue, u_int *cur_col, u_int wrap)
  312. {
  313. return (ahc_print_register(SCSIPHASE_parse_table, 7, "SCSIPHASE",
  314. 0x9e, regvalue, cur_col, wrap));
  315. }
  316. int
  317. ahc_scb_base_print(u_int regvalue, u_int *cur_col, u_int wrap)
  318. {
  319. return (ahc_print_register(NULL, 0, "SCB_BASE",
  320. 0xa0, regvalue, cur_col, wrap));
  321. }
  322. static const ahc_reg_parse_entry_t SCB_CONTROL_parse_table[] = {
  323. { "DISCONNECTED", 0x04, 0x04 },
  324. { "ULTRAENB", 0x08, 0x08 },
  325. { "MK_MESSAGE", 0x10, 0x10 },
  326. { "TAG_ENB", 0x20, 0x20 },
  327. { "DISCENB", 0x40, 0x40 },
  328. { "TARGET_SCB", 0x80, 0x80 },
  329. { "STATUS_RCVD", 0x80, 0x80 },
  330. { "SCB_TAG_TYPE", 0x03, 0x03 }
  331. };
  332. int
  333. ahc_scb_control_print(u_int regvalue, u_int *cur_col, u_int wrap)
  334. {
  335. return (ahc_print_register(SCB_CONTROL_parse_table, 8, "SCB_CONTROL",
  336. 0xb8, regvalue, cur_col, wrap));
  337. }
  338. static const ahc_reg_parse_entry_t SCB_SCSIID_parse_table[] = {
  339. { "TWIN_CHNLB", 0x80, 0x80 },
  340. { "OID", 0x0f, 0x0f },
  341. { "TWIN_TID", 0x70, 0x70 },
  342. { "TID", 0xf0, 0xf0 }
  343. };
  344. int
  345. ahc_scb_scsiid_print(u_int regvalue, u_int *cur_col, u_int wrap)
  346. {
  347. return (ahc_print_register(SCB_SCSIID_parse_table, 4, "SCB_SCSIID",
  348. 0xb9, regvalue, cur_col, wrap));
  349. }
  350. static const ahc_reg_parse_entry_t SCB_LUN_parse_table[] = {
  351. { "SCB_XFERLEN_ODD", 0x80, 0x80 },
  352. { "LID", 0x3f, 0x3f }
  353. };
  354. int
  355. ahc_scb_lun_print(u_int regvalue, u_int *cur_col, u_int wrap)
  356. {
  357. return (ahc_print_register(SCB_LUN_parse_table, 2, "SCB_LUN",
  358. 0xba, regvalue, cur_col, wrap));
  359. }
  360. int
  361. ahc_scb_tag_print(u_int regvalue, u_int *cur_col, u_int wrap)
  362. {
  363. return (ahc_print_register(NULL, 0, "SCB_TAG",
  364. 0xbb, regvalue, cur_col, wrap));
  365. }