aicasm_insformat.h 5.2 KB

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  1. /*
  2. * Instruction formats for the sequencer program downloaded to
  3. * Aic7xxx SCSI host adapters
  4. *
  5. * Copyright (c) 1997, 1998, 2000 Justin T. Gibbs.
  6. * All rights reserved.
  7. *
  8. * Redistribution and use in source and binary forms, with or without
  9. * modification, are permitted provided that the following conditions
  10. * are met:
  11. * 1. Redistributions of source code must retain the above copyright
  12. * notice, this list of conditions, and the following disclaimer,
  13. * without modification.
  14. * 2. Redistributions in binary form must reproduce at minimum a disclaimer
  15. * substantially similar to the "NO WARRANTY" disclaimer below
  16. * ("Disclaimer") and any redistribution must be conditioned upon
  17. * including a substantially similar Disclaimer requirement for further
  18. * binary redistribution.
  19. * 3. Neither the names of the above-listed copyright holders nor the names
  20. * of any contributors may be used to endorse or promote products derived
  21. * from this software without specific prior written permission.
  22. *
  23. * Alternatively, this software may be distributed under the terms of the
  24. * GNU General Public License ("GPL") version 2 as published by the Free
  25. * Software Foundation.
  26. *
  27. * NO WARRANTY
  28. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  29. * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  30. * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR
  31. * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  32. * HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  33. * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  34. * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  35. * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
  36. * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
  37. * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  38. * POSSIBILITY OF SUCH DAMAGES.
  39. *
  40. * $Id: //depot/aic7xxx/aic7xxx/aicasm/aicasm_insformat.h#12 $
  41. *
  42. * $FreeBSD$
  43. */
  44. #include <asm/byteorder.h>
  45. /* 8bit ALU logic operations */
  46. struct ins_format1 {
  47. #ifdef __LITTLE_ENDIAN
  48. uint32_t immediate : 8,
  49. source : 9,
  50. destination : 9,
  51. ret : 1,
  52. opcode : 4,
  53. parity : 1;
  54. #else
  55. uint32_t parity : 1,
  56. opcode : 4,
  57. ret : 1,
  58. destination : 9,
  59. source : 9,
  60. immediate : 8;
  61. #endif
  62. };
  63. /* 8bit ALU shift/rotate operations */
  64. struct ins_format2 {
  65. #ifdef __LITTLE_ENDIAN
  66. uint32_t shift_control : 8,
  67. source : 9,
  68. destination : 9,
  69. ret : 1,
  70. opcode : 4,
  71. parity : 1;
  72. #else
  73. uint32_t parity : 1,
  74. opcode : 4,
  75. ret : 1,
  76. destination : 9,
  77. source : 9,
  78. shift_control : 8;
  79. #endif
  80. };
  81. /* 8bit branch control operations */
  82. struct ins_format3 {
  83. #ifdef __LITTLE_ENDIAN
  84. uint32_t immediate : 8,
  85. source : 9,
  86. address : 10,
  87. opcode : 4,
  88. parity : 1;
  89. #else
  90. uint32_t parity : 1,
  91. opcode : 4,
  92. address : 10,
  93. source : 9,
  94. immediate : 8;
  95. #endif
  96. };
  97. /* 16bit ALU logic operations */
  98. struct ins_format4 {
  99. #ifdef __LITTLE_ENDIAN
  100. uint32_t opcode_ext : 8,
  101. source : 9,
  102. destination : 9,
  103. ret : 1,
  104. opcode : 4,
  105. parity : 1;
  106. #else
  107. uint32_t parity : 1,
  108. opcode : 4,
  109. ret : 1,
  110. destination : 9,
  111. source : 9,
  112. opcode_ext : 8;
  113. #endif
  114. };
  115. /* 16bit branch control operations */
  116. struct ins_format5 {
  117. #ifdef __LITTLE_ENDIAN
  118. uint32_t opcode_ext : 8,
  119. source : 9,
  120. address : 10,
  121. opcode : 4,
  122. parity : 1;
  123. #else
  124. uint32_t parity : 1,
  125. opcode : 4,
  126. address : 10,
  127. source : 9,
  128. opcode_ext : 8;
  129. #endif
  130. };
  131. /* Far branch operations */
  132. struct ins_format6 {
  133. #ifdef __LITTLE_ENDIAN
  134. uint32_t page : 3,
  135. opcode_ext : 5,
  136. source : 9,
  137. address : 10,
  138. opcode : 4,
  139. parity : 1;
  140. #else
  141. uint32_t parity : 1,
  142. opcode : 4,
  143. address : 10,
  144. source : 9,
  145. opcode_ext : 5,
  146. page : 3;
  147. #endif
  148. };
  149. union ins_formats {
  150. struct ins_format1 format1;
  151. struct ins_format2 format2;
  152. struct ins_format3 format3;
  153. struct ins_format4 format4;
  154. struct ins_format5 format5;
  155. struct ins_format6 format6;
  156. uint8_t bytes[4];
  157. uint32_t integer;
  158. };
  159. struct instruction {
  160. union ins_formats format;
  161. u_int srcline;
  162. struct symbol *patch_label;
  163. STAILQ_ENTRY(instruction) links;
  164. };
  165. #define AIC_OP_OR 0x0
  166. #define AIC_OP_AND 0x1
  167. #define AIC_OP_XOR 0x2
  168. #define AIC_OP_ADD 0x3
  169. #define AIC_OP_ADC 0x4
  170. #define AIC_OP_ROL 0x5
  171. #define AIC_OP_BMOV 0x6
  172. #define AIC_OP_MVI16 0x7
  173. #define AIC_OP_JMP 0x8
  174. #define AIC_OP_JC 0x9
  175. #define AIC_OP_JNC 0xa
  176. #define AIC_OP_CALL 0xb
  177. #define AIC_OP_JNE 0xc
  178. #define AIC_OP_JNZ 0xd
  179. #define AIC_OP_JE 0xe
  180. #define AIC_OP_JZ 0xf
  181. /* Pseudo Ops */
  182. #define AIC_OP_SHL 0x10
  183. #define AIC_OP_SHR 0x20
  184. #define AIC_OP_ROR 0x30
  185. /* 16bit Ops. Low byte main opcode. High byte extended opcode. */
  186. #define AIC_OP_OR16 0x8005
  187. #define AIC_OP_AND16 0x8105
  188. #define AIC_OP_XOR16 0x8205
  189. #define AIC_OP_ADD16 0x8305
  190. #define AIC_OP_ADC16 0x8405
  191. #define AIC_OP_JNE16 0x8805
  192. #define AIC_OP_JNZ16 0x8905
  193. #define AIC_OP_JE16 0x8C05
  194. #define AIC_OP_JZ16 0x8B05
  195. #define AIC_OP_JMP16 0x9005
  196. #define AIC_OP_JC16 0x9105
  197. #define AIC_OP_JNC16 0x9205
  198. #define AIC_OP_CALL16 0x9305
  199. /* Page extension is low three bits of second opcode byte. */
  200. #define AIC_OP_JMPF 0xA005
  201. #define AIC_OP_CALLF 0xB005
  202. #define AIC_OP_JCF 0xC005
  203. #define AIC_OP_JNCF 0xD005
  204. #define AIC_OP_CMPXCHG 0xE005