esas2r_io.c 23 KB

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  1. /*
  2. * linux/drivers/scsi/esas2r/esas2r_io.c
  3. * For use with ATTO ExpressSAS R6xx SAS/SATA RAID controllers
  4. *
  5. * Copyright (c) 2001-2013 ATTO Technology, Inc.
  6. * (mailto:linuxdrivers@attotech.com)mpt3sas/mpt3sas_trigger_diag.
  7. *
  8. * This program is free software; you can redistribute it and/or
  9. * modify it under the terms of the GNU General Public License
  10. * as published by the Free Software Foundation; either version 2
  11. * of the License, or (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * NO WARRANTY
  19. * THE PROGRAM IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OR
  20. * CONDITIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED INCLUDING, WITHOUT
  21. * LIMITATION, ANY WARRANTIES OR CONDITIONS OF TITLE, NON-INFRINGEMENT,
  22. * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. Each Recipient is
  23. * solely responsible for determining the appropriateness of using and
  24. * distributing the Program and assumes all risks associated with its
  25. * exercise of rights under this Agreement, including but not limited to
  26. * the risks and costs of program errors, damage to or loss of data,
  27. * programs or equipment, and unavailability or interruption of operations.
  28. *
  29. * DISCLAIMER OF LIABILITY
  30. * NEITHER RECIPIENT NOR ANY CONTRIBUTORS SHALL HAVE ANY LIABILITY FOR ANY
  31. * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  32. * DAMAGES (INCLUDING WITHOUT LIMITATION LOST PROFITS), HOWEVER CAUSED AND
  33. * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
  34. * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
  35. * USE OR DISTRIBUTION OF THE PROGRAM OR THE EXERCISE OF ANY RIGHTS GRANTED
  36. * HEREUNDER, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES
  37. *
  38. * You should have received a copy of the GNU General Public License
  39. * along with this program; if not, write to the Free Software
  40. * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301,
  41. * USA.
  42. */
  43. #include "esas2r.h"
  44. void esas2r_start_request(struct esas2r_adapter *a, struct esas2r_request *rq)
  45. {
  46. struct esas2r_target *t = NULL;
  47. struct esas2r_request *startrq = rq;
  48. unsigned long flags;
  49. if (unlikely(test_bit(AF_DEGRADED_MODE, &a->flags) ||
  50. test_bit(AF_POWER_DOWN, &a->flags))) {
  51. if (rq->vrq->scsi.function == VDA_FUNC_SCSI)
  52. rq->req_stat = RS_SEL2;
  53. else
  54. rq->req_stat = RS_DEGRADED;
  55. } else if (likely(rq->vrq->scsi.function == VDA_FUNC_SCSI)) {
  56. t = a->targetdb + rq->target_id;
  57. if (unlikely(t >= a->targetdb_end
  58. || !(t->flags & TF_USED))) {
  59. rq->req_stat = RS_SEL;
  60. } else {
  61. /* copy in the target ID. */
  62. rq->vrq->scsi.target_id = cpu_to_le16(t->virt_targ_id);
  63. /*
  64. * Test if we want to report RS_SEL for missing target.
  65. * Note that if AF_DISC_PENDING is set than this will
  66. * go on the defer queue.
  67. */
  68. if (unlikely(t->target_state != TS_PRESENT &&
  69. !test_bit(AF_DISC_PENDING, &a->flags)))
  70. rq->req_stat = RS_SEL;
  71. }
  72. }
  73. if (unlikely(rq->req_stat != RS_PENDING)) {
  74. esas2r_complete_request(a, rq);
  75. return;
  76. }
  77. esas2r_trace("rq=%p", rq);
  78. esas2r_trace("rq->vrq->scsi.handle=%x", rq->vrq->scsi.handle);
  79. if (rq->vrq->scsi.function == VDA_FUNC_SCSI) {
  80. esas2r_trace("rq->target_id=%d", rq->target_id);
  81. esas2r_trace("rq->vrq->scsi.flags=%x", rq->vrq->scsi.flags);
  82. }
  83. spin_lock_irqsave(&a->queue_lock, flags);
  84. if (likely(list_empty(&a->defer_list) &&
  85. !test_bit(AF_CHPRST_PENDING, &a->flags) &&
  86. !test_bit(AF_FLASHING, &a->flags) &&
  87. !test_bit(AF_DISC_PENDING, &a->flags)))
  88. esas2r_local_start_request(a, startrq);
  89. else
  90. list_add_tail(&startrq->req_list, &a->defer_list);
  91. spin_unlock_irqrestore(&a->queue_lock, flags);
  92. }
  93. /*
  94. * Starts the specified request. all requests have RS_PENDING set when this
  95. * routine is called. The caller is usually esas2r_start_request, but
  96. * esas2r_do_deferred_processes will start request that are deferred.
  97. *
  98. * The caller must ensure that requests can be started.
  99. *
  100. * esas2r_start_request will defer a request if there are already requests
  101. * waiting or there is a chip reset pending. once the reset condition clears,
  102. * esas2r_do_deferred_processes will call this function to start the request.
  103. *
  104. * When a request is started, it is placed on the active list and queued to
  105. * the controller.
  106. */
  107. void esas2r_local_start_request(struct esas2r_adapter *a,
  108. struct esas2r_request *rq)
  109. {
  110. esas2r_trace_enter();
  111. esas2r_trace("rq=%p", rq);
  112. esas2r_trace("rq->vrq:%p", rq->vrq);
  113. esas2r_trace("rq->vrq_md->phys_addr:%x", rq->vrq_md->phys_addr);
  114. if (unlikely(rq->vrq->scsi.function == VDA_FUNC_FLASH
  115. && rq->vrq->flash.sub_func == VDA_FLASH_COMMIT))
  116. set_bit(AF_FLASHING, &a->flags);
  117. list_add_tail(&rq->req_list, &a->active_list);
  118. esas2r_start_vda_request(a, rq);
  119. esas2r_trace_exit();
  120. return;
  121. }
  122. void esas2r_start_vda_request(struct esas2r_adapter *a,
  123. struct esas2r_request *rq)
  124. {
  125. struct esas2r_inbound_list_source_entry *element;
  126. u32 dw;
  127. rq->req_stat = RS_STARTED;
  128. /*
  129. * Calculate the inbound list entry location and the current state of
  130. * toggle bit.
  131. */
  132. a->last_write++;
  133. if (a->last_write >= a->list_size) {
  134. a->last_write = 0;
  135. /* update the toggle bit */
  136. if (test_bit(AF_COMM_LIST_TOGGLE, &a->flags))
  137. clear_bit(AF_COMM_LIST_TOGGLE, &a->flags);
  138. else
  139. set_bit(AF_COMM_LIST_TOGGLE, &a->flags);
  140. }
  141. element =
  142. (struct esas2r_inbound_list_source_entry *)a->inbound_list_md.
  143. virt_addr
  144. + a->last_write;
  145. /* Set the VDA request size if it was never modified */
  146. if (rq->vda_req_sz == RQ_SIZE_DEFAULT)
  147. rq->vda_req_sz = (u16)(a->max_vdareq_size / sizeof(u32));
  148. element->address = cpu_to_le64(rq->vrq_md->phys_addr);
  149. element->length = cpu_to_le32(rq->vda_req_sz);
  150. /* Update the write pointer */
  151. dw = a->last_write;
  152. if (test_bit(AF_COMM_LIST_TOGGLE, &a->flags))
  153. dw |= MU_ILW_TOGGLE;
  154. esas2r_trace("rq->vrq->scsi.handle:%x", rq->vrq->scsi.handle);
  155. esas2r_trace("dw:%x", dw);
  156. esas2r_trace("rq->vda_req_sz:%x", rq->vda_req_sz);
  157. esas2r_write_register_dword(a, MU_IN_LIST_WRITE, dw);
  158. }
  159. /*
  160. * Build the scatter/gather list for an I/O request according to the
  161. * specifications placed in the s/g context. The caller must initialize
  162. * context prior to the initial call by calling esas2r_sgc_init().
  163. */
  164. bool esas2r_build_sg_list_sge(struct esas2r_adapter *a,
  165. struct esas2r_sg_context *sgc)
  166. {
  167. struct esas2r_request *rq = sgc->first_req;
  168. union atto_vda_req *vrq = rq->vrq;
  169. while (sgc->length) {
  170. u32 rem = 0;
  171. u64 addr;
  172. u32 len;
  173. len = (*sgc->get_phys_addr)(sgc, &addr);
  174. if (unlikely(len == 0))
  175. return false;
  176. /* if current length is more than what's left, stop there */
  177. if (unlikely(len > sgc->length))
  178. len = sgc->length;
  179. another_entry:
  180. /* limit to a round number less than the maximum length */
  181. if (len > SGE_LEN_MAX) {
  182. /*
  183. * Save the remainder of the split. Whenever we limit
  184. * an entry we come back around to build entries out
  185. * of the leftover. We do this to prevent multiple
  186. * calls to the get_phys_addr() function for an SGE
  187. * that is too large.
  188. */
  189. rem = len - SGE_LEN_MAX;
  190. len = SGE_LEN_MAX;
  191. }
  192. /* See if we need to allocate a new SGL */
  193. if (unlikely(sgc->sge.a64.curr > sgc->sge.a64.limit)) {
  194. u8 sgelen;
  195. struct esas2r_mem_desc *sgl;
  196. /*
  197. * If no SGls are available, return failure. The
  198. * caller can call us later with the current context
  199. * to pick up here.
  200. */
  201. sgl = esas2r_alloc_sgl(a);
  202. if (unlikely(sgl == NULL))
  203. return false;
  204. /* Calculate the length of the last SGE filled in */
  205. sgelen = (u8)((u8 *)sgc->sge.a64.curr
  206. - (u8 *)sgc->sge.a64.last);
  207. /*
  208. * Copy the last SGE filled in to the first entry of
  209. * the new SGL to make room for the chain entry.
  210. */
  211. memcpy(sgl->virt_addr, sgc->sge.a64.last, sgelen);
  212. /* Figure out the new curr pointer in the new segment */
  213. sgc->sge.a64.curr =
  214. (struct atto_vda_sge *)((u8 *)sgl->virt_addr +
  215. sgelen);
  216. /* Set the limit pointer and build the chain entry */
  217. sgc->sge.a64.limit =
  218. (struct atto_vda_sge *)((u8 *)sgl->virt_addr
  219. + sgl_page_size
  220. - sizeof(struct
  221. atto_vda_sge));
  222. sgc->sge.a64.last->length = cpu_to_le32(
  223. SGE_CHAIN | SGE_ADDR_64);
  224. sgc->sge.a64.last->address =
  225. cpu_to_le64(sgl->phys_addr);
  226. /*
  227. * Now, if there was a previous chain entry, then
  228. * update it to contain the length of this segment
  229. * and size of this chain. otherwise this is the
  230. * first SGL, so set the chain_offset in the request.
  231. */
  232. if (sgc->sge.a64.chain) {
  233. sgc->sge.a64.chain->length |=
  234. cpu_to_le32(
  235. ((u8 *)(sgc->sge.a64.
  236. last + 1)
  237. - (u8 *)rq->sg_table->
  238. virt_addr)
  239. + sizeof(struct atto_vda_sge) *
  240. LOBIT(SGE_CHAIN_SZ));
  241. } else {
  242. vrq->scsi.chain_offset = (u8)
  243. ((u8 *)sgc->
  244. sge.a64.last -
  245. (u8 *)vrq);
  246. /*
  247. * This is the first SGL, so set the
  248. * chain_offset and the VDA request size in
  249. * the request.
  250. */
  251. rq->vda_req_sz =
  252. (vrq->scsi.chain_offset +
  253. sizeof(struct atto_vda_sge) +
  254. 3)
  255. / sizeof(u32);
  256. }
  257. /*
  258. * Remember this so when we get a new SGL filled in we
  259. * can update the length of this chain entry.
  260. */
  261. sgc->sge.a64.chain = sgc->sge.a64.last;
  262. /* Now link the new SGL onto the primary request. */
  263. list_add(&sgl->next_desc, &rq->sg_table_head);
  264. }
  265. /* Update last one filled in */
  266. sgc->sge.a64.last = sgc->sge.a64.curr;
  267. /* Build the new SGE and update the S/G context */
  268. sgc->sge.a64.curr->length = cpu_to_le32(SGE_ADDR_64 | len);
  269. sgc->sge.a64.curr->address = cpu_to_le32(addr);
  270. sgc->sge.a64.curr++;
  271. sgc->cur_offset += len;
  272. sgc->length -= len;
  273. /*
  274. * Check if we previously split an entry. If so we have to
  275. * pick up where we left off.
  276. */
  277. if (rem) {
  278. addr += len;
  279. len = rem;
  280. rem = 0;
  281. goto another_entry;
  282. }
  283. }
  284. /* Mark the end of the SGL */
  285. sgc->sge.a64.last->length |= cpu_to_le32(SGE_LAST);
  286. /*
  287. * If there was a previous chain entry, update the length to indicate
  288. * the length of this last segment.
  289. */
  290. if (sgc->sge.a64.chain) {
  291. sgc->sge.a64.chain->length |= cpu_to_le32(
  292. ((u8 *)(sgc->sge.a64.curr) -
  293. (u8 *)rq->sg_table->virt_addr));
  294. } else {
  295. u16 reqsize;
  296. /*
  297. * The entire VDA request was not used so lets
  298. * set the size of the VDA request to be DMA'd
  299. */
  300. reqsize =
  301. ((u16)((u8 *)sgc->sge.a64.last - (u8 *)vrq)
  302. + sizeof(struct atto_vda_sge) + 3) / sizeof(u32);
  303. /*
  304. * Only update the request size if it is bigger than what is
  305. * already there. We can come in here twice for some management
  306. * commands.
  307. */
  308. if (reqsize > rq->vda_req_sz)
  309. rq->vda_req_sz = reqsize;
  310. }
  311. return true;
  312. }
  313. /*
  314. * Create PRD list for each I-block consumed by the command. This routine
  315. * determines how much data is required from each I-block being consumed
  316. * by the command. The first and last I-blocks can be partials and all of
  317. * the I-blocks in between are for a full I-block of data.
  318. *
  319. * The interleave size is used to determine the number of bytes in the 1st
  320. * I-block and the remaining I-blocks are what remeains.
  321. */
  322. static bool esas2r_build_prd_iblk(struct esas2r_adapter *a,
  323. struct esas2r_sg_context *sgc)
  324. {
  325. struct esas2r_request *rq = sgc->first_req;
  326. u64 addr;
  327. u32 len;
  328. struct esas2r_mem_desc *sgl;
  329. u32 numchain = 1;
  330. u32 rem = 0;
  331. while (sgc->length) {
  332. /* Get the next address/length pair */
  333. len = (*sgc->get_phys_addr)(sgc, &addr);
  334. if (unlikely(len == 0))
  335. return false;
  336. /* If current length is more than what's left, stop there */
  337. if (unlikely(len > sgc->length))
  338. len = sgc->length;
  339. another_entry:
  340. /* Limit to a round number less than the maximum length */
  341. if (len > PRD_LEN_MAX) {
  342. /*
  343. * Save the remainder of the split. whenever we limit
  344. * an entry we come back around to build entries out
  345. * of the leftover. We do this to prevent multiple
  346. * calls to the get_phys_addr() function for an SGE
  347. * that is too large.
  348. */
  349. rem = len - PRD_LEN_MAX;
  350. len = PRD_LEN_MAX;
  351. }
  352. /* See if we need to allocate a new SGL */
  353. if (sgc->sge.prd.sge_cnt == 0) {
  354. if (len == sgc->length) {
  355. /*
  356. * We only have 1 PRD entry left.
  357. * It can be placed where the chain
  358. * entry would have gone
  359. */
  360. /* Build the simple SGE */
  361. sgc->sge.prd.curr->ctl_len = cpu_to_le32(
  362. PRD_DATA | len);
  363. sgc->sge.prd.curr->address = cpu_to_le64(addr);
  364. /* Adjust length related fields */
  365. sgc->cur_offset += len;
  366. sgc->length -= len;
  367. /* We use the reserved chain entry for data */
  368. numchain = 0;
  369. break;
  370. }
  371. if (sgc->sge.prd.chain) {
  372. /*
  373. * Fill # of entries of current SGL in previous
  374. * chain the length of this current SGL may not
  375. * full.
  376. */
  377. sgc->sge.prd.chain->ctl_len |= cpu_to_le32(
  378. sgc->sge.prd.sgl_max_cnt);
  379. }
  380. /*
  381. * If no SGls are available, return failure. The
  382. * caller can call us later with the current context
  383. * to pick up here.
  384. */
  385. sgl = esas2r_alloc_sgl(a);
  386. if (unlikely(sgl == NULL))
  387. return false;
  388. /*
  389. * Link the new SGL onto the chain
  390. * They are in reverse order
  391. */
  392. list_add(&sgl->next_desc, &rq->sg_table_head);
  393. /*
  394. * An SGL was just filled in and we are starting
  395. * a new SGL. Prime the chain of the ending SGL with
  396. * info that points to the new SGL. The length gets
  397. * filled in when the new SGL is filled or ended
  398. */
  399. sgc->sge.prd.chain = sgc->sge.prd.curr;
  400. sgc->sge.prd.chain->ctl_len = cpu_to_le32(PRD_CHAIN);
  401. sgc->sge.prd.chain->address =
  402. cpu_to_le64(sgl->phys_addr);
  403. /*
  404. * Start a new segment.
  405. * Take one away and save for chain SGE
  406. */
  407. sgc->sge.prd.curr =
  408. (struct atto_physical_region_description *)sgl
  409. ->
  410. virt_addr;
  411. sgc->sge.prd.sge_cnt = sgc->sge.prd.sgl_max_cnt - 1;
  412. }
  413. sgc->sge.prd.sge_cnt--;
  414. /* Build the simple SGE */
  415. sgc->sge.prd.curr->ctl_len = cpu_to_le32(PRD_DATA | len);
  416. sgc->sge.prd.curr->address = cpu_to_le64(addr);
  417. /* Used another element. Point to the next one */
  418. sgc->sge.prd.curr++;
  419. /* Adjust length related fields */
  420. sgc->cur_offset += len;
  421. sgc->length -= len;
  422. /*
  423. * Check if we previously split an entry. If so we have to
  424. * pick up where we left off.
  425. */
  426. if (rem) {
  427. addr += len;
  428. len = rem;
  429. rem = 0;
  430. goto another_entry;
  431. }
  432. }
  433. if (!list_empty(&rq->sg_table_head)) {
  434. if (sgc->sge.prd.chain) {
  435. sgc->sge.prd.chain->ctl_len |=
  436. cpu_to_le32(sgc->sge.prd.sgl_max_cnt
  437. - sgc->sge.prd.sge_cnt
  438. - numchain);
  439. }
  440. }
  441. return true;
  442. }
  443. bool esas2r_build_sg_list_prd(struct esas2r_adapter *a,
  444. struct esas2r_sg_context *sgc)
  445. {
  446. struct esas2r_request *rq = sgc->first_req;
  447. u32 len = sgc->length;
  448. struct esas2r_target *t = a->targetdb + rq->target_id;
  449. u8 is_i_o = 0;
  450. u16 reqsize;
  451. struct atto_physical_region_description *curr_iblk_chn;
  452. u8 *cdb = (u8 *)&rq->vrq->scsi.cdb[0];
  453. /*
  454. * extract LBA from command so we can determine
  455. * the I-Block boundary
  456. */
  457. if (rq->vrq->scsi.function == VDA_FUNC_SCSI
  458. && t->target_state == TS_PRESENT
  459. && !(t->flags & TF_PASS_THRU)) {
  460. u32 lbalo = 0;
  461. switch (rq->vrq->scsi.cdb[0]) {
  462. case READ_16:
  463. case WRITE_16:
  464. {
  465. lbalo =
  466. MAKEDWORD(MAKEWORD(cdb[9],
  467. cdb[8]),
  468. MAKEWORD(cdb[7],
  469. cdb[6]));
  470. is_i_o = 1;
  471. break;
  472. }
  473. case READ_12:
  474. case WRITE_12:
  475. case READ_10:
  476. case WRITE_10:
  477. {
  478. lbalo =
  479. MAKEDWORD(MAKEWORD(cdb[5],
  480. cdb[4]),
  481. MAKEWORD(cdb[3],
  482. cdb[2]));
  483. is_i_o = 1;
  484. break;
  485. }
  486. case READ_6:
  487. case WRITE_6:
  488. {
  489. lbalo =
  490. MAKEDWORD(MAKEWORD(cdb[3],
  491. cdb[2]),
  492. MAKEWORD(cdb[1] & 0x1F,
  493. 0));
  494. is_i_o = 1;
  495. break;
  496. }
  497. default:
  498. break;
  499. }
  500. if (is_i_o) {
  501. u32 startlba;
  502. rq->vrq->scsi.iblk_cnt_prd = 0;
  503. /* Determine size of 1st I-block PRD list */
  504. startlba = t->inter_block - (lbalo & (t->inter_block -
  505. 1));
  506. sgc->length = startlba * t->block_size;
  507. /* Chk if the 1st iblk chain starts at base of Iblock */
  508. if ((lbalo & (t->inter_block - 1)) == 0)
  509. rq->flags |= RF_1ST_IBLK_BASE;
  510. if (sgc->length > len)
  511. sgc->length = len;
  512. } else {
  513. sgc->length = len;
  514. }
  515. } else {
  516. sgc->length = len;
  517. }
  518. /* get our starting chain address */
  519. curr_iblk_chn =
  520. (struct atto_physical_region_description *)sgc->sge.a64.curr;
  521. sgc->sge.prd.sgl_max_cnt = sgl_page_size /
  522. sizeof(struct
  523. atto_physical_region_description);
  524. /* create all of the I-block PRD lists */
  525. while (len) {
  526. sgc->sge.prd.sge_cnt = 0;
  527. sgc->sge.prd.chain = NULL;
  528. sgc->sge.prd.curr = curr_iblk_chn;
  529. /* increment to next I-Block */
  530. len -= sgc->length;
  531. /* go build the next I-Block PRD list */
  532. if (unlikely(!esas2r_build_prd_iblk(a, sgc)))
  533. return false;
  534. curr_iblk_chn++;
  535. if (is_i_o) {
  536. rq->vrq->scsi.iblk_cnt_prd++;
  537. if (len > t->inter_byte)
  538. sgc->length = t->inter_byte;
  539. else
  540. sgc->length = len;
  541. }
  542. }
  543. /* figure out the size used of the VDA request */
  544. reqsize = ((u16)((u8 *)curr_iblk_chn - (u8 *)rq->vrq))
  545. / sizeof(u32);
  546. /*
  547. * only update the request size if it is bigger than what is
  548. * already there. we can come in here twice for some management
  549. * commands.
  550. */
  551. if (reqsize > rq->vda_req_sz)
  552. rq->vda_req_sz = reqsize;
  553. return true;
  554. }
  555. static void esas2r_handle_pending_reset(struct esas2r_adapter *a, u32 currtime)
  556. {
  557. u32 delta = currtime - a->chip_init_time;
  558. if (delta <= ESAS2R_CHPRST_WAIT_TIME) {
  559. /* Wait before accessing registers */
  560. } else if (delta >= ESAS2R_CHPRST_TIME) {
  561. /*
  562. * The last reset failed so try again. Reset
  563. * processing will give up after three tries.
  564. */
  565. esas2r_local_reset_adapter(a);
  566. } else {
  567. /* We can now see if the firmware is ready */
  568. u32 doorbell;
  569. doorbell = esas2r_read_register_dword(a, MU_DOORBELL_OUT);
  570. if (doorbell == 0xFFFFFFFF || !(doorbell & DRBL_FORCE_INT)) {
  571. esas2r_force_interrupt(a);
  572. } else {
  573. u32 ver = (doorbell & DRBL_FW_VER_MSK);
  574. /* Driver supports API version 0 and 1 */
  575. esas2r_write_register_dword(a, MU_DOORBELL_OUT,
  576. doorbell);
  577. if (ver == DRBL_FW_VER_0) {
  578. set_bit(AF_CHPRST_DETECTED, &a->flags);
  579. set_bit(AF_LEGACY_SGE_MODE, &a->flags);
  580. a->max_vdareq_size = 128;
  581. a->build_sgl = esas2r_build_sg_list_sge;
  582. } else if (ver == DRBL_FW_VER_1) {
  583. set_bit(AF_CHPRST_DETECTED, &a->flags);
  584. clear_bit(AF_LEGACY_SGE_MODE, &a->flags);
  585. a->max_vdareq_size = 1024;
  586. a->build_sgl = esas2r_build_sg_list_prd;
  587. } else {
  588. esas2r_local_reset_adapter(a);
  589. }
  590. }
  591. }
  592. }
  593. /* This function must be called once per timer tick */
  594. void esas2r_timer_tick(struct esas2r_adapter *a)
  595. {
  596. u32 currtime = jiffies_to_msecs(jiffies);
  597. u32 deltatime = currtime - a->last_tick_time;
  598. a->last_tick_time = currtime;
  599. /* count down the uptime */
  600. if (a->chip_uptime &&
  601. !test_bit(AF_CHPRST_PENDING, &a->flags) &&
  602. !test_bit(AF_DISC_PENDING, &a->flags)) {
  603. if (deltatime >= a->chip_uptime)
  604. a->chip_uptime = 0;
  605. else
  606. a->chip_uptime -= deltatime;
  607. }
  608. if (test_bit(AF_CHPRST_PENDING, &a->flags)) {
  609. if (!test_bit(AF_CHPRST_NEEDED, &a->flags) &&
  610. !test_bit(AF_CHPRST_DETECTED, &a->flags))
  611. esas2r_handle_pending_reset(a, currtime);
  612. } else {
  613. if (test_bit(AF_DISC_PENDING, &a->flags))
  614. esas2r_disc_check_complete(a);
  615. if (test_bit(AF_HEARTBEAT_ENB, &a->flags)) {
  616. if (test_bit(AF_HEARTBEAT, &a->flags)) {
  617. if ((currtime - a->heartbeat_time) >=
  618. ESAS2R_HEARTBEAT_TIME) {
  619. clear_bit(AF_HEARTBEAT, &a->flags);
  620. esas2r_hdebug("heartbeat failed");
  621. esas2r_log(ESAS2R_LOG_CRIT,
  622. "heartbeat failed");
  623. esas2r_bugon();
  624. esas2r_local_reset_adapter(a);
  625. }
  626. } else {
  627. set_bit(AF_HEARTBEAT, &a->flags);
  628. a->heartbeat_time = currtime;
  629. esas2r_force_interrupt(a);
  630. }
  631. }
  632. }
  633. if (atomic_read(&a->disable_cnt) == 0)
  634. esas2r_do_deferred_processes(a);
  635. }
  636. /*
  637. * Send the specified task management function to the target and LUN
  638. * specified in rqaux. in addition, immediately abort any commands that
  639. * are queued but not sent to the device according to the rules specified
  640. * by the task management function.
  641. */
  642. bool esas2r_send_task_mgmt(struct esas2r_adapter *a,
  643. struct esas2r_request *rqaux, u8 task_mgt_func)
  644. {
  645. u16 targetid = rqaux->target_id;
  646. u8 lun = (u8)le32_to_cpu(rqaux->vrq->scsi.flags);
  647. bool ret = false;
  648. struct esas2r_request *rq;
  649. struct list_head *next, *element;
  650. unsigned long flags;
  651. LIST_HEAD(comp_list);
  652. esas2r_trace_enter();
  653. esas2r_trace("rqaux:%p", rqaux);
  654. esas2r_trace("task_mgt_func:%x", task_mgt_func);
  655. spin_lock_irqsave(&a->queue_lock, flags);
  656. /* search the defer queue looking for requests for the device */
  657. list_for_each_safe(element, next, &a->defer_list) {
  658. rq = list_entry(element, struct esas2r_request, req_list);
  659. if (rq->vrq->scsi.function == VDA_FUNC_SCSI
  660. && rq->target_id == targetid
  661. && (((u8)le32_to_cpu(rq->vrq->scsi.flags)) == lun
  662. || task_mgt_func == 0x20)) { /* target reset */
  663. /* Found a request affected by the task management */
  664. if (rq->req_stat == RS_PENDING) {
  665. /*
  666. * The request is pending or waiting. We can
  667. * safelycomplete the request now.
  668. */
  669. if (esas2r_ioreq_aborted(a, rq, RS_ABORTED))
  670. list_add_tail(&rq->comp_list,
  671. &comp_list);
  672. }
  673. }
  674. }
  675. /* Send the task management request to the firmware */
  676. rqaux->sense_len = 0;
  677. rqaux->vrq->scsi.length = 0;
  678. rqaux->target_id = targetid;
  679. rqaux->vrq->scsi.flags |= cpu_to_le32(lun);
  680. memset(rqaux->vrq->scsi.cdb, 0, sizeof(rqaux->vrq->scsi.cdb));
  681. rqaux->vrq->scsi.flags |=
  682. cpu_to_le16(task_mgt_func * LOBIT(FCP_CMND_TM_MASK));
  683. if (test_bit(AF_FLASHING, &a->flags)) {
  684. /* Assume success. if there are active requests, return busy */
  685. rqaux->req_stat = RS_SUCCESS;
  686. list_for_each_safe(element, next, &a->active_list) {
  687. rq = list_entry(element, struct esas2r_request,
  688. req_list);
  689. if (rq->vrq->scsi.function == VDA_FUNC_SCSI
  690. && rq->target_id == targetid
  691. && (((u8)le32_to_cpu(rq->vrq->scsi.flags)) == lun
  692. || task_mgt_func == 0x20)) /* target reset */
  693. rqaux->req_stat = RS_BUSY;
  694. }
  695. ret = true;
  696. }
  697. spin_unlock_irqrestore(&a->queue_lock, flags);
  698. if (!test_bit(AF_FLASHING, &a->flags))
  699. esas2r_start_request(a, rqaux);
  700. esas2r_comp_list_drain(a, &comp_list);
  701. if (atomic_read(&a->disable_cnt) == 0)
  702. esas2r_do_deferred_processes(a);
  703. esas2r_trace_exit();
  704. return ret;
  705. }
  706. void esas2r_reset_bus(struct esas2r_adapter *a)
  707. {
  708. esas2r_log(ESAS2R_LOG_INFO, "performing a bus reset");
  709. if (!test_bit(AF_DEGRADED_MODE, &a->flags) &&
  710. !test_bit(AF_CHPRST_PENDING, &a->flags) &&
  711. !test_bit(AF_DISC_PENDING, &a->flags)) {
  712. set_bit(AF_BUSRST_NEEDED, &a->flags);
  713. set_bit(AF_BUSRST_PENDING, &a->flags);
  714. set_bit(AF_OS_RESET, &a->flags);
  715. esas2r_schedule_tasklet(a);
  716. }
  717. }
  718. bool esas2r_ioreq_aborted(struct esas2r_adapter *a, struct esas2r_request *rq,
  719. u8 status)
  720. {
  721. esas2r_trace_enter();
  722. esas2r_trace("rq:%p", rq);
  723. list_del_init(&rq->req_list);
  724. if (rq->timeout > RQ_MAX_TIMEOUT) {
  725. /*
  726. * The request timed out, but we could not abort it because a
  727. * chip reset occurred. Return busy status.
  728. */
  729. rq->req_stat = RS_BUSY;
  730. esas2r_trace_exit();
  731. return true;
  732. }
  733. rq->req_stat = status;
  734. esas2r_trace_exit();
  735. return true;
  736. }