hptiop.c 46 KB

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  1. /*
  2. * HighPoint RR3xxx/4xxx controller driver for Linux
  3. * Copyright (C) 2006-2015 HighPoint Technologies, Inc. All Rights Reserved.
  4. *
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License as published by
  7. * the Free Software Foundation; version 2 of the License.
  8. *
  9. * This program is distributed in the hope that it will be useful,
  10. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. * GNU General Public License for more details.
  13. *
  14. * Please report bugs/comments/suggestions to linux@highpoint-tech.com
  15. *
  16. * For more information, visit http://www.highpoint-tech.com
  17. */
  18. #include <linux/module.h>
  19. #include <linux/types.h>
  20. #include <linux/string.h>
  21. #include <linux/kernel.h>
  22. #include <linux/pci.h>
  23. #include <linux/interrupt.h>
  24. #include <linux/errno.h>
  25. #include <linux/delay.h>
  26. #include <linux/timer.h>
  27. #include <linux/spinlock.h>
  28. #include <linux/gfp.h>
  29. #include <asm/uaccess.h>
  30. #include <asm/io.h>
  31. #include <asm/div64.h>
  32. #include <scsi/scsi_cmnd.h>
  33. #include <scsi/scsi_device.h>
  34. #include <scsi/scsi.h>
  35. #include <scsi/scsi_tcq.h>
  36. #include <scsi/scsi_host.h>
  37. #include "hptiop.h"
  38. MODULE_AUTHOR("HighPoint Technologies, Inc.");
  39. MODULE_DESCRIPTION("HighPoint RocketRAID 3xxx/4xxx Controller Driver");
  40. static char driver_name[] = "hptiop";
  41. static const char driver_name_long[] = "RocketRAID 3xxx/4xxx Controller driver";
  42. static const char driver_ver[] = "v1.10.0";
  43. static int iop_send_sync_msg(struct hptiop_hba *hba, u32 msg, u32 millisec);
  44. static void hptiop_finish_scsi_req(struct hptiop_hba *hba, u32 tag,
  45. struct hpt_iop_request_scsi_command *req);
  46. static void hptiop_host_request_callback_itl(struct hptiop_hba *hba, u32 tag);
  47. static void hptiop_iop_request_callback_itl(struct hptiop_hba *hba, u32 tag);
  48. static void hptiop_message_callback(struct hptiop_hba *hba, u32 msg);
  49. static int iop_wait_ready_itl(struct hptiop_hba *hba, u32 millisec)
  50. {
  51. u32 req = 0;
  52. int i;
  53. for (i = 0; i < millisec; i++) {
  54. req = readl(&hba->u.itl.iop->inbound_queue);
  55. if (req != IOPMU_QUEUE_EMPTY)
  56. break;
  57. msleep(1);
  58. }
  59. if (req != IOPMU_QUEUE_EMPTY) {
  60. writel(req, &hba->u.itl.iop->outbound_queue);
  61. readl(&hba->u.itl.iop->outbound_intstatus);
  62. return 0;
  63. }
  64. return -1;
  65. }
  66. static int iop_wait_ready_mv(struct hptiop_hba *hba, u32 millisec)
  67. {
  68. return iop_send_sync_msg(hba, IOPMU_INBOUND_MSG0_NOP, millisec);
  69. }
  70. static int iop_wait_ready_mvfrey(struct hptiop_hba *hba, u32 millisec)
  71. {
  72. return iop_send_sync_msg(hba, IOPMU_INBOUND_MSG0_NOP, millisec);
  73. }
  74. static void hptiop_request_callback_itl(struct hptiop_hba *hba, u32 tag)
  75. {
  76. if (tag & IOPMU_QUEUE_ADDR_HOST_BIT)
  77. hptiop_host_request_callback_itl(hba,
  78. tag & ~IOPMU_QUEUE_ADDR_HOST_BIT);
  79. else
  80. hptiop_iop_request_callback_itl(hba, tag);
  81. }
  82. static void hptiop_drain_outbound_queue_itl(struct hptiop_hba *hba)
  83. {
  84. u32 req;
  85. while ((req = readl(&hba->u.itl.iop->outbound_queue)) !=
  86. IOPMU_QUEUE_EMPTY) {
  87. if (req & IOPMU_QUEUE_MASK_HOST_BITS)
  88. hptiop_request_callback_itl(hba, req);
  89. else {
  90. struct hpt_iop_request_header __iomem * p;
  91. p = (struct hpt_iop_request_header __iomem *)
  92. ((char __iomem *)hba->u.itl.iop + req);
  93. if (readl(&p->flags) & IOP_REQUEST_FLAG_SYNC_REQUEST) {
  94. if (readl(&p->context))
  95. hptiop_request_callback_itl(hba, req);
  96. else
  97. writel(1, &p->context);
  98. }
  99. else
  100. hptiop_request_callback_itl(hba, req);
  101. }
  102. }
  103. }
  104. static int iop_intr_itl(struct hptiop_hba *hba)
  105. {
  106. struct hpt_iopmu_itl __iomem *iop = hba->u.itl.iop;
  107. void __iomem *plx = hba->u.itl.plx;
  108. u32 status;
  109. int ret = 0;
  110. if (plx && readl(plx + 0x11C5C) & 0xf)
  111. writel(1, plx + 0x11C60);
  112. status = readl(&iop->outbound_intstatus);
  113. if (status & IOPMU_OUTBOUND_INT_MSG0) {
  114. u32 msg = readl(&iop->outbound_msgaddr0);
  115. dprintk("received outbound msg %x\n", msg);
  116. writel(IOPMU_OUTBOUND_INT_MSG0, &iop->outbound_intstatus);
  117. hptiop_message_callback(hba, msg);
  118. ret = 1;
  119. }
  120. if (status & IOPMU_OUTBOUND_INT_POSTQUEUE) {
  121. hptiop_drain_outbound_queue_itl(hba);
  122. ret = 1;
  123. }
  124. return ret;
  125. }
  126. static u64 mv_outbound_read(struct hpt_iopmu_mv __iomem *mu)
  127. {
  128. u32 outbound_tail = readl(&mu->outbound_tail);
  129. u32 outbound_head = readl(&mu->outbound_head);
  130. if (outbound_tail != outbound_head) {
  131. u64 p;
  132. memcpy_fromio(&p, &mu->outbound_q[mu->outbound_tail], 8);
  133. outbound_tail++;
  134. if (outbound_tail == MVIOP_QUEUE_LEN)
  135. outbound_tail = 0;
  136. writel(outbound_tail, &mu->outbound_tail);
  137. return p;
  138. } else
  139. return 0;
  140. }
  141. static void mv_inbound_write(u64 p, struct hptiop_hba *hba)
  142. {
  143. u32 inbound_head = readl(&hba->u.mv.mu->inbound_head);
  144. u32 head = inbound_head + 1;
  145. if (head == MVIOP_QUEUE_LEN)
  146. head = 0;
  147. memcpy_toio(&hba->u.mv.mu->inbound_q[inbound_head], &p, 8);
  148. writel(head, &hba->u.mv.mu->inbound_head);
  149. writel(MVIOP_MU_INBOUND_INT_POSTQUEUE,
  150. &hba->u.mv.regs->inbound_doorbell);
  151. }
  152. static void hptiop_request_callback_mv(struct hptiop_hba *hba, u64 tag)
  153. {
  154. u32 req_type = (tag >> 5) & 0x7;
  155. struct hpt_iop_request_scsi_command *req;
  156. dprintk("hptiop_request_callback_mv: tag=%llx\n", tag);
  157. BUG_ON((tag & MVIOP_MU_QUEUE_REQUEST_RETURN_CONTEXT) == 0);
  158. switch (req_type) {
  159. case IOP_REQUEST_TYPE_GET_CONFIG:
  160. case IOP_REQUEST_TYPE_SET_CONFIG:
  161. hba->msg_done = 1;
  162. break;
  163. case IOP_REQUEST_TYPE_SCSI_COMMAND:
  164. req = hba->reqs[tag >> 8].req_virt;
  165. if (likely(tag & MVIOP_MU_QUEUE_REQUEST_RESULT_BIT))
  166. req->header.result = cpu_to_le32(IOP_RESULT_SUCCESS);
  167. hptiop_finish_scsi_req(hba, tag>>8, req);
  168. break;
  169. default:
  170. break;
  171. }
  172. }
  173. static int iop_intr_mv(struct hptiop_hba *hba)
  174. {
  175. u32 status;
  176. int ret = 0;
  177. status = readl(&hba->u.mv.regs->outbound_doorbell);
  178. writel(~status, &hba->u.mv.regs->outbound_doorbell);
  179. if (status & MVIOP_MU_OUTBOUND_INT_MSG) {
  180. u32 msg;
  181. msg = readl(&hba->u.mv.mu->outbound_msg);
  182. dprintk("received outbound msg %x\n", msg);
  183. hptiop_message_callback(hba, msg);
  184. ret = 1;
  185. }
  186. if (status & MVIOP_MU_OUTBOUND_INT_POSTQUEUE) {
  187. u64 tag;
  188. while ((tag = mv_outbound_read(hba->u.mv.mu)))
  189. hptiop_request_callback_mv(hba, tag);
  190. ret = 1;
  191. }
  192. return ret;
  193. }
  194. static void hptiop_request_callback_mvfrey(struct hptiop_hba *hba, u32 _tag)
  195. {
  196. u32 req_type = _tag & 0xf;
  197. struct hpt_iop_request_scsi_command *req;
  198. switch (req_type) {
  199. case IOP_REQUEST_TYPE_GET_CONFIG:
  200. case IOP_REQUEST_TYPE_SET_CONFIG:
  201. hba->msg_done = 1;
  202. break;
  203. case IOP_REQUEST_TYPE_SCSI_COMMAND:
  204. req = hba->reqs[(_tag >> 4) & 0xff].req_virt;
  205. if (likely(_tag & IOPMU_QUEUE_REQUEST_RESULT_BIT))
  206. req->header.result = IOP_RESULT_SUCCESS;
  207. hptiop_finish_scsi_req(hba, (_tag >> 4) & 0xff, req);
  208. break;
  209. default:
  210. break;
  211. }
  212. }
  213. static int iop_intr_mvfrey(struct hptiop_hba *hba)
  214. {
  215. u32 _tag, status, cptr, cur_rptr;
  216. int ret = 0;
  217. if (hba->initialized)
  218. writel(0, &(hba->u.mvfrey.mu->pcie_f0_int_enable));
  219. status = readl(&(hba->u.mvfrey.mu->f0_doorbell));
  220. if (status) {
  221. writel(status, &(hba->u.mvfrey.mu->f0_doorbell));
  222. if (status & CPU_TO_F0_DRBL_MSG_BIT) {
  223. u32 msg = readl(&(hba->u.mvfrey.mu->cpu_to_f0_msg_a));
  224. dprintk("received outbound msg %x\n", msg);
  225. hptiop_message_callback(hba, msg);
  226. }
  227. ret = 1;
  228. }
  229. status = readl(&(hba->u.mvfrey.mu->isr_cause));
  230. if (status) {
  231. writel(status, &(hba->u.mvfrey.mu->isr_cause));
  232. do {
  233. cptr = *hba->u.mvfrey.outlist_cptr & 0xff;
  234. cur_rptr = hba->u.mvfrey.outlist_rptr;
  235. while (cur_rptr != cptr) {
  236. cur_rptr++;
  237. if (cur_rptr == hba->u.mvfrey.list_count)
  238. cur_rptr = 0;
  239. _tag = hba->u.mvfrey.outlist[cur_rptr].val;
  240. BUG_ON(!(_tag & IOPMU_QUEUE_MASK_HOST_BITS));
  241. hptiop_request_callback_mvfrey(hba, _tag);
  242. ret = 1;
  243. }
  244. hba->u.mvfrey.outlist_rptr = cur_rptr;
  245. } while (cptr != (*hba->u.mvfrey.outlist_cptr & 0xff));
  246. }
  247. if (hba->initialized)
  248. writel(0x1010, &(hba->u.mvfrey.mu->pcie_f0_int_enable));
  249. return ret;
  250. }
  251. static int iop_send_sync_request_itl(struct hptiop_hba *hba,
  252. void __iomem *_req, u32 millisec)
  253. {
  254. struct hpt_iop_request_header __iomem *req = _req;
  255. u32 i;
  256. writel(readl(&req->flags) | IOP_REQUEST_FLAG_SYNC_REQUEST, &req->flags);
  257. writel(0, &req->context);
  258. writel((unsigned long)req - (unsigned long)hba->u.itl.iop,
  259. &hba->u.itl.iop->inbound_queue);
  260. readl(&hba->u.itl.iop->outbound_intstatus);
  261. for (i = 0; i < millisec; i++) {
  262. iop_intr_itl(hba);
  263. if (readl(&req->context))
  264. return 0;
  265. msleep(1);
  266. }
  267. return -1;
  268. }
  269. static int iop_send_sync_request_mv(struct hptiop_hba *hba,
  270. u32 size_bits, u32 millisec)
  271. {
  272. struct hpt_iop_request_header *reqhdr = hba->u.mv.internal_req;
  273. u32 i;
  274. hba->msg_done = 0;
  275. reqhdr->flags |= cpu_to_le32(IOP_REQUEST_FLAG_SYNC_REQUEST);
  276. mv_inbound_write(hba->u.mv.internal_req_phy |
  277. MVIOP_MU_QUEUE_ADDR_HOST_BIT | size_bits, hba);
  278. for (i = 0; i < millisec; i++) {
  279. iop_intr_mv(hba);
  280. if (hba->msg_done)
  281. return 0;
  282. msleep(1);
  283. }
  284. return -1;
  285. }
  286. static int iop_send_sync_request_mvfrey(struct hptiop_hba *hba,
  287. u32 size_bits, u32 millisec)
  288. {
  289. struct hpt_iop_request_header *reqhdr =
  290. hba->u.mvfrey.internal_req.req_virt;
  291. u32 i;
  292. hba->msg_done = 0;
  293. reqhdr->flags |= cpu_to_le32(IOP_REQUEST_FLAG_SYNC_REQUEST);
  294. hba->ops->post_req(hba, &(hba->u.mvfrey.internal_req));
  295. for (i = 0; i < millisec; i++) {
  296. iop_intr_mvfrey(hba);
  297. if (hba->msg_done)
  298. break;
  299. msleep(1);
  300. }
  301. return hba->msg_done ? 0 : -1;
  302. }
  303. static void hptiop_post_msg_itl(struct hptiop_hba *hba, u32 msg)
  304. {
  305. writel(msg, &hba->u.itl.iop->inbound_msgaddr0);
  306. readl(&hba->u.itl.iop->outbound_intstatus);
  307. }
  308. static void hptiop_post_msg_mv(struct hptiop_hba *hba, u32 msg)
  309. {
  310. writel(msg, &hba->u.mv.mu->inbound_msg);
  311. writel(MVIOP_MU_INBOUND_INT_MSG, &hba->u.mv.regs->inbound_doorbell);
  312. readl(&hba->u.mv.regs->inbound_doorbell);
  313. }
  314. static void hptiop_post_msg_mvfrey(struct hptiop_hba *hba, u32 msg)
  315. {
  316. writel(msg, &(hba->u.mvfrey.mu->f0_to_cpu_msg_a));
  317. readl(&(hba->u.mvfrey.mu->f0_to_cpu_msg_a));
  318. }
  319. static int iop_send_sync_msg(struct hptiop_hba *hba, u32 msg, u32 millisec)
  320. {
  321. u32 i;
  322. hba->msg_done = 0;
  323. hba->ops->disable_intr(hba);
  324. hba->ops->post_msg(hba, msg);
  325. for (i = 0; i < millisec; i++) {
  326. spin_lock_irq(hba->host->host_lock);
  327. hba->ops->iop_intr(hba);
  328. spin_unlock_irq(hba->host->host_lock);
  329. if (hba->msg_done)
  330. break;
  331. msleep(1);
  332. }
  333. hba->ops->enable_intr(hba);
  334. return hba->msg_done? 0 : -1;
  335. }
  336. static int iop_get_config_itl(struct hptiop_hba *hba,
  337. struct hpt_iop_request_get_config *config)
  338. {
  339. u32 req32;
  340. struct hpt_iop_request_get_config __iomem *req;
  341. req32 = readl(&hba->u.itl.iop->inbound_queue);
  342. if (req32 == IOPMU_QUEUE_EMPTY)
  343. return -1;
  344. req = (struct hpt_iop_request_get_config __iomem *)
  345. ((unsigned long)hba->u.itl.iop + req32);
  346. writel(0, &req->header.flags);
  347. writel(IOP_REQUEST_TYPE_GET_CONFIG, &req->header.type);
  348. writel(sizeof(struct hpt_iop_request_get_config), &req->header.size);
  349. writel(IOP_RESULT_PENDING, &req->header.result);
  350. if (iop_send_sync_request_itl(hba, req, 20000)) {
  351. dprintk("Get config send cmd failed\n");
  352. return -1;
  353. }
  354. memcpy_fromio(config, req, sizeof(*config));
  355. writel(req32, &hba->u.itl.iop->outbound_queue);
  356. return 0;
  357. }
  358. static int iop_get_config_mv(struct hptiop_hba *hba,
  359. struct hpt_iop_request_get_config *config)
  360. {
  361. struct hpt_iop_request_get_config *req = hba->u.mv.internal_req;
  362. req->header.flags = cpu_to_le32(IOP_REQUEST_FLAG_OUTPUT_CONTEXT);
  363. req->header.type = cpu_to_le32(IOP_REQUEST_TYPE_GET_CONFIG);
  364. req->header.size =
  365. cpu_to_le32(sizeof(struct hpt_iop_request_get_config));
  366. req->header.result = cpu_to_le32(IOP_RESULT_PENDING);
  367. req->header.context = cpu_to_le32(IOP_REQUEST_TYPE_GET_CONFIG<<5);
  368. req->header.context_hi32 = 0;
  369. if (iop_send_sync_request_mv(hba, 0, 20000)) {
  370. dprintk("Get config send cmd failed\n");
  371. return -1;
  372. }
  373. memcpy(config, req, sizeof(struct hpt_iop_request_get_config));
  374. return 0;
  375. }
  376. static int iop_get_config_mvfrey(struct hptiop_hba *hba,
  377. struct hpt_iop_request_get_config *config)
  378. {
  379. struct hpt_iop_request_get_config *info = hba->u.mvfrey.config;
  380. if (info->header.size != sizeof(struct hpt_iop_request_get_config) ||
  381. info->header.type != IOP_REQUEST_TYPE_GET_CONFIG)
  382. return -1;
  383. config->interface_version = info->interface_version;
  384. config->firmware_version = info->firmware_version;
  385. config->max_requests = info->max_requests;
  386. config->request_size = info->request_size;
  387. config->max_sg_count = info->max_sg_count;
  388. config->data_transfer_length = info->data_transfer_length;
  389. config->alignment_mask = info->alignment_mask;
  390. config->max_devices = info->max_devices;
  391. config->sdram_size = info->sdram_size;
  392. return 0;
  393. }
  394. static int iop_set_config_itl(struct hptiop_hba *hba,
  395. struct hpt_iop_request_set_config *config)
  396. {
  397. u32 req32;
  398. struct hpt_iop_request_set_config __iomem *req;
  399. req32 = readl(&hba->u.itl.iop->inbound_queue);
  400. if (req32 == IOPMU_QUEUE_EMPTY)
  401. return -1;
  402. req = (struct hpt_iop_request_set_config __iomem *)
  403. ((unsigned long)hba->u.itl.iop + req32);
  404. memcpy_toio((u8 __iomem *)req + sizeof(struct hpt_iop_request_header),
  405. (u8 *)config + sizeof(struct hpt_iop_request_header),
  406. sizeof(struct hpt_iop_request_set_config) -
  407. sizeof(struct hpt_iop_request_header));
  408. writel(0, &req->header.flags);
  409. writel(IOP_REQUEST_TYPE_SET_CONFIG, &req->header.type);
  410. writel(sizeof(struct hpt_iop_request_set_config), &req->header.size);
  411. writel(IOP_RESULT_PENDING, &req->header.result);
  412. if (iop_send_sync_request_itl(hba, req, 20000)) {
  413. dprintk("Set config send cmd failed\n");
  414. return -1;
  415. }
  416. writel(req32, &hba->u.itl.iop->outbound_queue);
  417. return 0;
  418. }
  419. static int iop_set_config_mv(struct hptiop_hba *hba,
  420. struct hpt_iop_request_set_config *config)
  421. {
  422. struct hpt_iop_request_set_config *req = hba->u.mv.internal_req;
  423. memcpy(req, config, sizeof(struct hpt_iop_request_set_config));
  424. req->header.flags = cpu_to_le32(IOP_REQUEST_FLAG_OUTPUT_CONTEXT);
  425. req->header.type = cpu_to_le32(IOP_REQUEST_TYPE_SET_CONFIG);
  426. req->header.size =
  427. cpu_to_le32(sizeof(struct hpt_iop_request_set_config));
  428. req->header.result = cpu_to_le32(IOP_RESULT_PENDING);
  429. req->header.context = cpu_to_le32(IOP_REQUEST_TYPE_SET_CONFIG<<5);
  430. req->header.context_hi32 = 0;
  431. if (iop_send_sync_request_mv(hba, 0, 20000)) {
  432. dprintk("Set config send cmd failed\n");
  433. return -1;
  434. }
  435. return 0;
  436. }
  437. static int iop_set_config_mvfrey(struct hptiop_hba *hba,
  438. struct hpt_iop_request_set_config *config)
  439. {
  440. struct hpt_iop_request_set_config *req =
  441. hba->u.mvfrey.internal_req.req_virt;
  442. memcpy(req, config, sizeof(struct hpt_iop_request_set_config));
  443. req->header.flags = cpu_to_le32(IOP_REQUEST_FLAG_OUTPUT_CONTEXT);
  444. req->header.type = cpu_to_le32(IOP_REQUEST_TYPE_SET_CONFIG);
  445. req->header.size =
  446. cpu_to_le32(sizeof(struct hpt_iop_request_set_config));
  447. req->header.result = cpu_to_le32(IOP_RESULT_PENDING);
  448. req->header.context = cpu_to_le32(IOP_REQUEST_TYPE_SET_CONFIG<<5);
  449. req->header.context_hi32 = 0;
  450. if (iop_send_sync_request_mvfrey(hba, 0, 20000)) {
  451. dprintk("Set config send cmd failed\n");
  452. return -1;
  453. }
  454. return 0;
  455. }
  456. static void hptiop_enable_intr_itl(struct hptiop_hba *hba)
  457. {
  458. writel(~(IOPMU_OUTBOUND_INT_POSTQUEUE | IOPMU_OUTBOUND_INT_MSG0),
  459. &hba->u.itl.iop->outbound_intmask);
  460. }
  461. static void hptiop_enable_intr_mv(struct hptiop_hba *hba)
  462. {
  463. writel(MVIOP_MU_OUTBOUND_INT_POSTQUEUE | MVIOP_MU_OUTBOUND_INT_MSG,
  464. &hba->u.mv.regs->outbound_intmask);
  465. }
  466. static void hptiop_enable_intr_mvfrey(struct hptiop_hba *hba)
  467. {
  468. writel(CPU_TO_F0_DRBL_MSG_BIT, &(hba->u.mvfrey.mu->f0_doorbell_enable));
  469. writel(0x1, &(hba->u.mvfrey.mu->isr_enable));
  470. writel(0x1010, &(hba->u.mvfrey.mu->pcie_f0_int_enable));
  471. }
  472. static int hptiop_initialize_iop(struct hptiop_hba *hba)
  473. {
  474. /* enable interrupts */
  475. hba->ops->enable_intr(hba);
  476. hba->initialized = 1;
  477. /* start background tasks */
  478. if (iop_send_sync_msg(hba,
  479. IOPMU_INBOUND_MSG0_START_BACKGROUND_TASK, 5000)) {
  480. printk(KERN_ERR "scsi%d: fail to start background task\n",
  481. hba->host->host_no);
  482. return -1;
  483. }
  484. return 0;
  485. }
  486. static void __iomem *hptiop_map_pci_bar(struct hptiop_hba *hba, int index)
  487. {
  488. u32 mem_base_phy, length;
  489. void __iomem *mem_base_virt;
  490. struct pci_dev *pcidev = hba->pcidev;
  491. if (!(pci_resource_flags(pcidev, index) & IORESOURCE_MEM)) {
  492. printk(KERN_ERR "scsi%d: pci resource invalid\n",
  493. hba->host->host_no);
  494. return NULL;
  495. }
  496. mem_base_phy = pci_resource_start(pcidev, index);
  497. length = pci_resource_len(pcidev, index);
  498. mem_base_virt = ioremap(mem_base_phy, length);
  499. if (!mem_base_virt) {
  500. printk(KERN_ERR "scsi%d: Fail to ioremap memory space\n",
  501. hba->host->host_no);
  502. return NULL;
  503. }
  504. return mem_base_virt;
  505. }
  506. static int hptiop_map_pci_bar_itl(struct hptiop_hba *hba)
  507. {
  508. struct pci_dev *pcidev = hba->pcidev;
  509. hba->u.itl.iop = hptiop_map_pci_bar(hba, 0);
  510. if (hba->u.itl.iop == NULL)
  511. return -1;
  512. if ((pcidev->device & 0xff00) == 0x4400) {
  513. hba->u.itl.plx = hba->u.itl.iop;
  514. hba->u.itl.iop = hptiop_map_pci_bar(hba, 2);
  515. if (hba->u.itl.iop == NULL) {
  516. iounmap(hba->u.itl.plx);
  517. return -1;
  518. }
  519. }
  520. return 0;
  521. }
  522. static void hptiop_unmap_pci_bar_itl(struct hptiop_hba *hba)
  523. {
  524. if (hba->u.itl.plx)
  525. iounmap(hba->u.itl.plx);
  526. iounmap(hba->u.itl.iop);
  527. }
  528. static int hptiop_map_pci_bar_mv(struct hptiop_hba *hba)
  529. {
  530. hba->u.mv.regs = hptiop_map_pci_bar(hba, 0);
  531. if (hba->u.mv.regs == NULL)
  532. return -1;
  533. hba->u.mv.mu = hptiop_map_pci_bar(hba, 2);
  534. if (hba->u.mv.mu == NULL) {
  535. iounmap(hba->u.mv.regs);
  536. return -1;
  537. }
  538. return 0;
  539. }
  540. static int hptiop_map_pci_bar_mvfrey(struct hptiop_hba *hba)
  541. {
  542. hba->u.mvfrey.config = hptiop_map_pci_bar(hba, 0);
  543. if (hba->u.mvfrey.config == NULL)
  544. return -1;
  545. hba->u.mvfrey.mu = hptiop_map_pci_bar(hba, 2);
  546. if (hba->u.mvfrey.mu == NULL) {
  547. iounmap(hba->u.mvfrey.config);
  548. return -1;
  549. }
  550. return 0;
  551. }
  552. static void hptiop_unmap_pci_bar_mv(struct hptiop_hba *hba)
  553. {
  554. iounmap(hba->u.mv.regs);
  555. iounmap(hba->u.mv.mu);
  556. }
  557. static void hptiop_unmap_pci_bar_mvfrey(struct hptiop_hba *hba)
  558. {
  559. iounmap(hba->u.mvfrey.config);
  560. iounmap(hba->u.mvfrey.mu);
  561. }
  562. static void hptiop_message_callback(struct hptiop_hba *hba, u32 msg)
  563. {
  564. dprintk("iop message 0x%x\n", msg);
  565. if (msg == IOPMU_INBOUND_MSG0_NOP ||
  566. msg == IOPMU_INBOUND_MSG0_RESET_COMM)
  567. hba->msg_done = 1;
  568. if (!hba->initialized)
  569. return;
  570. if (msg == IOPMU_INBOUND_MSG0_RESET) {
  571. atomic_set(&hba->resetting, 0);
  572. wake_up(&hba->reset_wq);
  573. }
  574. else if (msg <= IOPMU_INBOUND_MSG0_MAX)
  575. hba->msg_done = 1;
  576. }
  577. static struct hptiop_request *get_req(struct hptiop_hba *hba)
  578. {
  579. struct hptiop_request *ret;
  580. dprintk("get_req : req=%p\n", hba->req_list);
  581. ret = hba->req_list;
  582. if (ret)
  583. hba->req_list = ret->next;
  584. return ret;
  585. }
  586. static void free_req(struct hptiop_hba *hba, struct hptiop_request *req)
  587. {
  588. dprintk("free_req(%d, %p)\n", req->index, req);
  589. req->next = hba->req_list;
  590. hba->req_list = req;
  591. }
  592. static void hptiop_finish_scsi_req(struct hptiop_hba *hba, u32 tag,
  593. struct hpt_iop_request_scsi_command *req)
  594. {
  595. struct scsi_cmnd *scp;
  596. dprintk("hptiop_finish_scsi_req: req=%p, type=%d, "
  597. "result=%d, context=0x%x tag=%d\n",
  598. req, req->header.type, req->header.result,
  599. req->header.context, tag);
  600. BUG_ON(!req->header.result);
  601. BUG_ON(req->header.type != cpu_to_le32(IOP_REQUEST_TYPE_SCSI_COMMAND));
  602. scp = hba->reqs[tag].scp;
  603. if (HPT_SCP(scp)->mapped)
  604. scsi_dma_unmap(scp);
  605. switch (le32_to_cpu(req->header.result)) {
  606. case IOP_RESULT_SUCCESS:
  607. scsi_set_resid(scp,
  608. scsi_bufflen(scp) - le32_to_cpu(req->dataxfer_length));
  609. scp->result = (DID_OK<<16);
  610. break;
  611. case IOP_RESULT_BAD_TARGET:
  612. scp->result = (DID_BAD_TARGET<<16);
  613. break;
  614. case IOP_RESULT_BUSY:
  615. scp->result = (DID_BUS_BUSY<<16);
  616. break;
  617. case IOP_RESULT_RESET:
  618. scp->result = (DID_RESET<<16);
  619. break;
  620. case IOP_RESULT_FAIL:
  621. scp->result = (DID_ERROR<<16);
  622. break;
  623. case IOP_RESULT_INVALID_REQUEST:
  624. scp->result = (DID_ABORT<<16);
  625. break;
  626. case IOP_RESULT_CHECK_CONDITION:
  627. scsi_set_resid(scp,
  628. scsi_bufflen(scp) - le32_to_cpu(req->dataxfer_length));
  629. scp->result = SAM_STAT_CHECK_CONDITION;
  630. memcpy(scp->sense_buffer, &req->sg_list, SCSI_SENSE_BUFFERSIZE);
  631. goto skip_resid;
  632. break;
  633. default:
  634. scp->result = DRIVER_INVALID << 24 | DID_ABORT << 16;
  635. break;
  636. }
  637. scsi_set_resid(scp,
  638. scsi_bufflen(scp) - le32_to_cpu(req->dataxfer_length));
  639. skip_resid:
  640. dprintk("scsi_done(%p)\n", scp);
  641. scp->scsi_done(scp);
  642. free_req(hba, &hba->reqs[tag]);
  643. }
  644. static void hptiop_host_request_callback_itl(struct hptiop_hba *hba, u32 _tag)
  645. {
  646. struct hpt_iop_request_scsi_command *req;
  647. u32 tag;
  648. if (hba->iopintf_v2) {
  649. tag = _tag & ~IOPMU_QUEUE_REQUEST_RESULT_BIT;
  650. req = hba->reqs[tag].req_virt;
  651. if (likely(_tag & IOPMU_QUEUE_REQUEST_RESULT_BIT))
  652. req->header.result = cpu_to_le32(IOP_RESULT_SUCCESS);
  653. } else {
  654. tag = _tag;
  655. req = hba->reqs[tag].req_virt;
  656. }
  657. hptiop_finish_scsi_req(hba, tag, req);
  658. }
  659. void hptiop_iop_request_callback_itl(struct hptiop_hba *hba, u32 tag)
  660. {
  661. struct hpt_iop_request_header __iomem *req;
  662. struct hpt_iop_request_ioctl_command __iomem *p;
  663. struct hpt_ioctl_k *arg;
  664. req = (struct hpt_iop_request_header __iomem *)
  665. ((unsigned long)hba->u.itl.iop + tag);
  666. dprintk("hptiop_iop_request_callback_itl: req=%p, type=%d, "
  667. "result=%d, context=0x%x tag=%d\n",
  668. req, readl(&req->type), readl(&req->result),
  669. readl(&req->context), tag);
  670. BUG_ON(!readl(&req->result));
  671. BUG_ON(readl(&req->type) != IOP_REQUEST_TYPE_IOCTL_COMMAND);
  672. p = (struct hpt_iop_request_ioctl_command __iomem *)req;
  673. arg = (struct hpt_ioctl_k *)(unsigned long)
  674. (readl(&req->context) |
  675. ((u64)readl(&req->context_hi32)<<32));
  676. if (readl(&req->result) == IOP_RESULT_SUCCESS) {
  677. arg->result = HPT_IOCTL_RESULT_OK;
  678. if (arg->outbuf_size)
  679. memcpy_fromio(arg->outbuf,
  680. &p->buf[(readl(&p->inbuf_size) + 3)& ~3],
  681. arg->outbuf_size);
  682. if (arg->bytes_returned)
  683. *arg->bytes_returned = arg->outbuf_size;
  684. }
  685. else
  686. arg->result = HPT_IOCTL_RESULT_FAILED;
  687. arg->done(arg);
  688. writel(tag, &hba->u.itl.iop->outbound_queue);
  689. }
  690. static irqreturn_t hptiop_intr(int irq, void *dev_id)
  691. {
  692. struct hptiop_hba *hba = dev_id;
  693. int handled;
  694. unsigned long flags;
  695. spin_lock_irqsave(hba->host->host_lock, flags);
  696. handled = hba->ops->iop_intr(hba);
  697. spin_unlock_irqrestore(hba->host->host_lock, flags);
  698. return handled;
  699. }
  700. static int hptiop_buildsgl(struct scsi_cmnd *scp, struct hpt_iopsg *psg)
  701. {
  702. struct Scsi_Host *host = scp->device->host;
  703. struct hptiop_hba *hba = (struct hptiop_hba *)host->hostdata;
  704. struct scatterlist *sg;
  705. int idx, nseg;
  706. nseg = scsi_dma_map(scp);
  707. BUG_ON(nseg < 0);
  708. if (!nseg)
  709. return 0;
  710. HPT_SCP(scp)->sgcnt = nseg;
  711. HPT_SCP(scp)->mapped = 1;
  712. BUG_ON(HPT_SCP(scp)->sgcnt > hba->max_sg_descriptors);
  713. scsi_for_each_sg(scp, sg, HPT_SCP(scp)->sgcnt, idx) {
  714. psg[idx].pci_address = cpu_to_le64(sg_dma_address(sg)) |
  715. hba->ops->host_phy_flag;
  716. psg[idx].size = cpu_to_le32(sg_dma_len(sg));
  717. psg[idx].eot = (idx == HPT_SCP(scp)->sgcnt - 1) ?
  718. cpu_to_le32(1) : 0;
  719. }
  720. return HPT_SCP(scp)->sgcnt;
  721. }
  722. static void hptiop_post_req_itl(struct hptiop_hba *hba,
  723. struct hptiop_request *_req)
  724. {
  725. struct hpt_iop_request_header *reqhdr = _req->req_virt;
  726. reqhdr->context = cpu_to_le32(IOPMU_QUEUE_ADDR_HOST_BIT |
  727. (u32)_req->index);
  728. reqhdr->context_hi32 = 0;
  729. if (hba->iopintf_v2) {
  730. u32 size, size_bits;
  731. size = le32_to_cpu(reqhdr->size);
  732. if (size < 256)
  733. size_bits = IOPMU_QUEUE_REQUEST_SIZE_BIT;
  734. else if (size < 512)
  735. size_bits = IOPMU_QUEUE_ADDR_HOST_BIT;
  736. else
  737. size_bits = IOPMU_QUEUE_REQUEST_SIZE_BIT |
  738. IOPMU_QUEUE_ADDR_HOST_BIT;
  739. writel(_req->req_shifted_phy | size_bits,
  740. &hba->u.itl.iop->inbound_queue);
  741. } else
  742. writel(_req->req_shifted_phy | IOPMU_QUEUE_ADDR_HOST_BIT,
  743. &hba->u.itl.iop->inbound_queue);
  744. }
  745. static void hptiop_post_req_mv(struct hptiop_hba *hba,
  746. struct hptiop_request *_req)
  747. {
  748. struct hpt_iop_request_header *reqhdr = _req->req_virt;
  749. u32 size, size_bit;
  750. reqhdr->context = cpu_to_le32(_req->index<<8 |
  751. IOP_REQUEST_TYPE_SCSI_COMMAND<<5);
  752. reqhdr->context_hi32 = 0;
  753. size = le32_to_cpu(reqhdr->size);
  754. if (size <= 256)
  755. size_bit = 0;
  756. else if (size <= 256*2)
  757. size_bit = 1;
  758. else if (size <= 256*3)
  759. size_bit = 2;
  760. else
  761. size_bit = 3;
  762. mv_inbound_write((_req->req_shifted_phy << 5) |
  763. MVIOP_MU_QUEUE_ADDR_HOST_BIT | size_bit, hba);
  764. }
  765. static void hptiop_post_req_mvfrey(struct hptiop_hba *hba,
  766. struct hptiop_request *_req)
  767. {
  768. struct hpt_iop_request_header *reqhdr = _req->req_virt;
  769. u32 index;
  770. reqhdr->flags |= cpu_to_le32(IOP_REQUEST_FLAG_OUTPUT_CONTEXT |
  771. IOP_REQUEST_FLAG_ADDR_BITS |
  772. ((_req->req_shifted_phy >> 11) & 0xffff0000));
  773. reqhdr->context = cpu_to_le32(IOPMU_QUEUE_ADDR_HOST_BIT |
  774. (_req->index << 4) | reqhdr->type);
  775. reqhdr->context_hi32 = cpu_to_le32((_req->req_shifted_phy << 5) &
  776. 0xffffffff);
  777. hba->u.mvfrey.inlist_wptr++;
  778. index = hba->u.mvfrey.inlist_wptr & 0x3fff;
  779. if (index == hba->u.mvfrey.list_count) {
  780. index = 0;
  781. hba->u.mvfrey.inlist_wptr &= ~0x3fff;
  782. hba->u.mvfrey.inlist_wptr ^= CL_POINTER_TOGGLE;
  783. }
  784. hba->u.mvfrey.inlist[index].addr =
  785. (dma_addr_t)_req->req_shifted_phy << 5;
  786. hba->u.mvfrey.inlist[index].intrfc_len = (reqhdr->size + 3) / 4;
  787. writel(hba->u.mvfrey.inlist_wptr,
  788. &(hba->u.mvfrey.mu->inbound_write_ptr));
  789. readl(&(hba->u.mvfrey.mu->inbound_write_ptr));
  790. }
  791. static int hptiop_reset_comm_itl(struct hptiop_hba *hba)
  792. {
  793. return 0;
  794. }
  795. static int hptiop_reset_comm_mv(struct hptiop_hba *hba)
  796. {
  797. return 0;
  798. }
  799. static int hptiop_reset_comm_mvfrey(struct hptiop_hba *hba)
  800. {
  801. u32 list_count = hba->u.mvfrey.list_count;
  802. if (iop_send_sync_msg(hba, IOPMU_INBOUND_MSG0_RESET_COMM, 3000))
  803. return -1;
  804. /* wait 100ms for MCU ready */
  805. msleep(100);
  806. writel(cpu_to_le32(hba->u.mvfrey.inlist_phy & 0xffffffff),
  807. &(hba->u.mvfrey.mu->inbound_base));
  808. writel(cpu_to_le32((hba->u.mvfrey.inlist_phy >> 16) >> 16),
  809. &(hba->u.mvfrey.mu->inbound_base_high));
  810. writel(cpu_to_le32(hba->u.mvfrey.outlist_phy & 0xffffffff),
  811. &(hba->u.mvfrey.mu->outbound_base));
  812. writel(cpu_to_le32((hba->u.mvfrey.outlist_phy >> 16) >> 16),
  813. &(hba->u.mvfrey.mu->outbound_base_high));
  814. writel(cpu_to_le32(hba->u.mvfrey.outlist_cptr_phy & 0xffffffff),
  815. &(hba->u.mvfrey.mu->outbound_shadow_base));
  816. writel(cpu_to_le32((hba->u.mvfrey.outlist_cptr_phy >> 16) >> 16),
  817. &(hba->u.mvfrey.mu->outbound_shadow_base_high));
  818. hba->u.mvfrey.inlist_wptr = (list_count - 1) | CL_POINTER_TOGGLE;
  819. *hba->u.mvfrey.outlist_cptr = (list_count - 1) | CL_POINTER_TOGGLE;
  820. hba->u.mvfrey.outlist_rptr = list_count - 1;
  821. return 0;
  822. }
  823. static int hptiop_queuecommand_lck(struct scsi_cmnd *scp,
  824. void (*done)(struct scsi_cmnd *))
  825. {
  826. struct Scsi_Host *host = scp->device->host;
  827. struct hptiop_hba *hba = (struct hptiop_hba *)host->hostdata;
  828. struct hpt_iop_request_scsi_command *req;
  829. int sg_count = 0;
  830. struct hptiop_request *_req;
  831. BUG_ON(!done);
  832. scp->scsi_done = done;
  833. _req = get_req(hba);
  834. if (_req == NULL) {
  835. dprintk("hptiop_queuecmd : no free req\n");
  836. return SCSI_MLQUEUE_HOST_BUSY;
  837. }
  838. _req->scp = scp;
  839. dprintk("hptiop_queuecmd(scp=%p) %d/%d/%d/%llu cdb=(%08x-%08x-%08x-%08x) "
  840. "req_index=%d, req=%p\n",
  841. scp,
  842. host->host_no, scp->device->channel,
  843. scp->device->id, scp->device->lun,
  844. cpu_to_be32(((u32 *)scp->cmnd)[0]),
  845. cpu_to_be32(((u32 *)scp->cmnd)[1]),
  846. cpu_to_be32(((u32 *)scp->cmnd)[2]),
  847. cpu_to_be32(((u32 *)scp->cmnd)[3]),
  848. _req->index, _req->req_virt);
  849. scp->result = 0;
  850. if (scp->device->channel ||
  851. (scp->device->id > hba->max_devices) ||
  852. ((scp->device->id == (hba->max_devices-1)) && scp->device->lun)) {
  853. scp->result = DID_BAD_TARGET << 16;
  854. free_req(hba, _req);
  855. goto cmd_done;
  856. }
  857. req = _req->req_virt;
  858. /* build S/G table */
  859. sg_count = hptiop_buildsgl(scp, req->sg_list);
  860. if (!sg_count)
  861. HPT_SCP(scp)->mapped = 0;
  862. req->header.flags = cpu_to_le32(IOP_REQUEST_FLAG_OUTPUT_CONTEXT);
  863. req->header.type = cpu_to_le32(IOP_REQUEST_TYPE_SCSI_COMMAND);
  864. req->header.result = cpu_to_le32(IOP_RESULT_PENDING);
  865. req->dataxfer_length = cpu_to_le32(scsi_bufflen(scp));
  866. req->channel = scp->device->channel;
  867. req->target = scp->device->id;
  868. req->lun = scp->device->lun;
  869. req->header.size = cpu_to_le32(
  870. sizeof(struct hpt_iop_request_scsi_command)
  871. - sizeof(struct hpt_iopsg)
  872. + sg_count * sizeof(struct hpt_iopsg));
  873. memcpy(req->cdb, scp->cmnd, sizeof(req->cdb));
  874. hba->ops->post_req(hba, _req);
  875. return 0;
  876. cmd_done:
  877. dprintk("scsi_done(scp=%p)\n", scp);
  878. scp->scsi_done(scp);
  879. return 0;
  880. }
  881. static DEF_SCSI_QCMD(hptiop_queuecommand)
  882. static const char *hptiop_info(struct Scsi_Host *host)
  883. {
  884. return driver_name_long;
  885. }
  886. static int hptiop_reset_hba(struct hptiop_hba *hba)
  887. {
  888. if (atomic_xchg(&hba->resetting, 1) == 0) {
  889. atomic_inc(&hba->reset_count);
  890. hba->ops->post_msg(hba, IOPMU_INBOUND_MSG0_RESET);
  891. }
  892. wait_event_timeout(hba->reset_wq,
  893. atomic_read(&hba->resetting) == 0, 60 * HZ);
  894. if (atomic_read(&hba->resetting)) {
  895. /* IOP is in unknown state, abort reset */
  896. printk(KERN_ERR "scsi%d: reset failed\n", hba->host->host_no);
  897. return -1;
  898. }
  899. if (iop_send_sync_msg(hba,
  900. IOPMU_INBOUND_MSG0_START_BACKGROUND_TASK, 5000)) {
  901. dprintk("scsi%d: fail to start background task\n",
  902. hba->host->host_no);
  903. }
  904. return 0;
  905. }
  906. static int hptiop_reset(struct scsi_cmnd *scp)
  907. {
  908. struct Scsi_Host * host = scp->device->host;
  909. struct hptiop_hba * hba = (struct hptiop_hba *)host->hostdata;
  910. printk(KERN_WARNING "hptiop_reset(%d/%d/%d) scp=%p\n",
  911. scp->device->host->host_no, scp->device->channel,
  912. scp->device->id, scp);
  913. return hptiop_reset_hba(hba)? FAILED : SUCCESS;
  914. }
  915. static int hptiop_adjust_disk_queue_depth(struct scsi_device *sdev,
  916. int queue_depth)
  917. {
  918. struct hptiop_hba *hba = (struct hptiop_hba *)sdev->host->hostdata;
  919. if (queue_depth > hba->max_requests)
  920. queue_depth = hba->max_requests;
  921. return scsi_change_queue_depth(sdev, queue_depth);
  922. }
  923. static ssize_t hptiop_show_version(struct device *dev,
  924. struct device_attribute *attr, char *buf)
  925. {
  926. return snprintf(buf, PAGE_SIZE, "%s\n", driver_ver);
  927. }
  928. static ssize_t hptiop_show_fw_version(struct device *dev,
  929. struct device_attribute *attr, char *buf)
  930. {
  931. struct Scsi_Host *host = class_to_shost(dev);
  932. struct hptiop_hba *hba = (struct hptiop_hba *)host->hostdata;
  933. return snprintf(buf, PAGE_SIZE, "%d.%d.%d.%d\n",
  934. hba->firmware_version >> 24,
  935. (hba->firmware_version >> 16) & 0xff,
  936. (hba->firmware_version >> 8) & 0xff,
  937. hba->firmware_version & 0xff);
  938. }
  939. static struct device_attribute hptiop_attr_version = {
  940. .attr = {
  941. .name = "driver-version",
  942. .mode = S_IRUGO,
  943. },
  944. .show = hptiop_show_version,
  945. };
  946. static struct device_attribute hptiop_attr_fw_version = {
  947. .attr = {
  948. .name = "firmware-version",
  949. .mode = S_IRUGO,
  950. },
  951. .show = hptiop_show_fw_version,
  952. };
  953. static struct device_attribute *hptiop_attrs[] = {
  954. &hptiop_attr_version,
  955. &hptiop_attr_fw_version,
  956. NULL
  957. };
  958. static int hptiop_slave_config(struct scsi_device *sdev)
  959. {
  960. if (sdev->type == TYPE_TAPE)
  961. blk_queue_max_hw_sectors(sdev->request_queue, 8192);
  962. return 0;
  963. }
  964. static struct scsi_host_template driver_template = {
  965. .module = THIS_MODULE,
  966. .name = driver_name,
  967. .queuecommand = hptiop_queuecommand,
  968. .eh_device_reset_handler = hptiop_reset,
  969. .eh_bus_reset_handler = hptiop_reset,
  970. .info = hptiop_info,
  971. .emulated = 0,
  972. .use_clustering = ENABLE_CLUSTERING,
  973. .proc_name = driver_name,
  974. .shost_attrs = hptiop_attrs,
  975. .slave_configure = hptiop_slave_config,
  976. .this_id = -1,
  977. .change_queue_depth = hptiop_adjust_disk_queue_depth,
  978. };
  979. static int hptiop_internal_memalloc_itl(struct hptiop_hba *hba)
  980. {
  981. return 0;
  982. }
  983. static int hptiop_internal_memalloc_mv(struct hptiop_hba *hba)
  984. {
  985. hba->u.mv.internal_req = dma_alloc_coherent(&hba->pcidev->dev,
  986. 0x800, &hba->u.mv.internal_req_phy, GFP_KERNEL);
  987. if (hba->u.mv.internal_req)
  988. return 0;
  989. else
  990. return -1;
  991. }
  992. static int hptiop_internal_memalloc_mvfrey(struct hptiop_hba *hba)
  993. {
  994. u32 list_count = readl(&hba->u.mvfrey.mu->inbound_conf_ctl);
  995. char *p;
  996. dma_addr_t phy;
  997. BUG_ON(hba->max_request_size == 0);
  998. if (list_count == 0) {
  999. BUG_ON(1);
  1000. return -1;
  1001. }
  1002. list_count >>= 16;
  1003. hba->u.mvfrey.list_count = list_count;
  1004. hba->u.mvfrey.internal_mem_size = 0x800 +
  1005. list_count * sizeof(struct mvfrey_inlist_entry) +
  1006. list_count * sizeof(struct mvfrey_outlist_entry) +
  1007. sizeof(int);
  1008. p = dma_alloc_coherent(&hba->pcidev->dev,
  1009. hba->u.mvfrey.internal_mem_size, &phy, GFP_KERNEL);
  1010. if (!p)
  1011. return -1;
  1012. hba->u.mvfrey.internal_req.req_virt = p;
  1013. hba->u.mvfrey.internal_req.req_shifted_phy = phy >> 5;
  1014. hba->u.mvfrey.internal_req.scp = NULL;
  1015. hba->u.mvfrey.internal_req.next = NULL;
  1016. p += 0x800;
  1017. phy += 0x800;
  1018. hba->u.mvfrey.inlist = (struct mvfrey_inlist_entry *)p;
  1019. hba->u.mvfrey.inlist_phy = phy;
  1020. p += list_count * sizeof(struct mvfrey_inlist_entry);
  1021. phy += list_count * sizeof(struct mvfrey_inlist_entry);
  1022. hba->u.mvfrey.outlist = (struct mvfrey_outlist_entry *)p;
  1023. hba->u.mvfrey.outlist_phy = phy;
  1024. p += list_count * sizeof(struct mvfrey_outlist_entry);
  1025. phy += list_count * sizeof(struct mvfrey_outlist_entry);
  1026. hba->u.mvfrey.outlist_cptr = (__le32 *)p;
  1027. hba->u.mvfrey.outlist_cptr_phy = phy;
  1028. return 0;
  1029. }
  1030. static int hptiop_internal_memfree_itl(struct hptiop_hba *hba)
  1031. {
  1032. return 0;
  1033. }
  1034. static int hptiop_internal_memfree_mv(struct hptiop_hba *hba)
  1035. {
  1036. if (hba->u.mv.internal_req) {
  1037. dma_free_coherent(&hba->pcidev->dev, 0x800,
  1038. hba->u.mv.internal_req, hba->u.mv.internal_req_phy);
  1039. return 0;
  1040. } else
  1041. return -1;
  1042. }
  1043. static int hptiop_internal_memfree_mvfrey(struct hptiop_hba *hba)
  1044. {
  1045. if (hba->u.mvfrey.internal_req.req_virt) {
  1046. dma_free_coherent(&hba->pcidev->dev,
  1047. hba->u.mvfrey.internal_mem_size,
  1048. hba->u.mvfrey.internal_req.req_virt,
  1049. (dma_addr_t)
  1050. hba->u.mvfrey.internal_req.req_shifted_phy << 5);
  1051. return 0;
  1052. } else
  1053. return -1;
  1054. }
  1055. static int hptiop_probe(struct pci_dev *pcidev, const struct pci_device_id *id)
  1056. {
  1057. struct Scsi_Host *host = NULL;
  1058. struct hptiop_hba *hba;
  1059. struct hptiop_adapter_ops *iop_ops;
  1060. struct hpt_iop_request_get_config iop_config;
  1061. struct hpt_iop_request_set_config set_config;
  1062. dma_addr_t start_phy;
  1063. void *start_virt;
  1064. u32 offset, i, req_size;
  1065. dprintk("hptiop_probe(%p)\n", pcidev);
  1066. if (pci_enable_device(pcidev)) {
  1067. printk(KERN_ERR "hptiop: fail to enable pci device\n");
  1068. return -ENODEV;
  1069. }
  1070. printk(KERN_INFO "adapter at PCI %d:%d:%d, IRQ %d\n",
  1071. pcidev->bus->number, pcidev->devfn >> 3, pcidev->devfn & 7,
  1072. pcidev->irq);
  1073. pci_set_master(pcidev);
  1074. /* Enable 64bit DMA if possible */
  1075. iop_ops = (struct hptiop_adapter_ops *)id->driver_data;
  1076. if (pci_set_dma_mask(pcidev, DMA_BIT_MASK(iop_ops->hw_dma_bit_mask))) {
  1077. if (pci_set_dma_mask(pcidev, DMA_BIT_MASK(32))) {
  1078. printk(KERN_ERR "hptiop: fail to set dma_mask\n");
  1079. goto disable_pci_device;
  1080. }
  1081. }
  1082. if (pci_request_regions(pcidev, driver_name)) {
  1083. printk(KERN_ERR "hptiop: pci_request_regions failed\n");
  1084. goto disable_pci_device;
  1085. }
  1086. host = scsi_host_alloc(&driver_template, sizeof(struct hptiop_hba));
  1087. if (!host) {
  1088. printk(KERN_ERR "hptiop: fail to alloc scsi host\n");
  1089. goto free_pci_regions;
  1090. }
  1091. hba = (struct hptiop_hba *)host->hostdata;
  1092. memset(hba, 0, sizeof(struct hptiop_hba));
  1093. hba->ops = iop_ops;
  1094. hba->pcidev = pcidev;
  1095. hba->host = host;
  1096. hba->initialized = 0;
  1097. hba->iopintf_v2 = 0;
  1098. atomic_set(&hba->resetting, 0);
  1099. atomic_set(&hba->reset_count, 0);
  1100. init_waitqueue_head(&hba->reset_wq);
  1101. init_waitqueue_head(&hba->ioctl_wq);
  1102. host->max_lun = 128;
  1103. host->max_channel = 0;
  1104. host->io_port = 0;
  1105. host->n_io_port = 0;
  1106. host->irq = pcidev->irq;
  1107. if (hba->ops->map_pci_bar(hba))
  1108. goto free_scsi_host;
  1109. if (hba->ops->iop_wait_ready(hba, 20000)) {
  1110. printk(KERN_ERR "scsi%d: firmware not ready\n",
  1111. hba->host->host_no);
  1112. goto unmap_pci_bar;
  1113. }
  1114. if (hba->ops->family == MV_BASED_IOP) {
  1115. if (hba->ops->internal_memalloc(hba)) {
  1116. printk(KERN_ERR "scsi%d: internal_memalloc failed\n",
  1117. hba->host->host_no);
  1118. goto unmap_pci_bar;
  1119. }
  1120. }
  1121. if (hba->ops->get_config(hba, &iop_config)) {
  1122. printk(KERN_ERR "scsi%d: get config failed\n",
  1123. hba->host->host_no);
  1124. goto unmap_pci_bar;
  1125. }
  1126. hba->max_requests = min(le32_to_cpu(iop_config.max_requests),
  1127. HPTIOP_MAX_REQUESTS);
  1128. hba->max_devices = le32_to_cpu(iop_config.max_devices);
  1129. hba->max_request_size = le32_to_cpu(iop_config.request_size);
  1130. hba->max_sg_descriptors = le32_to_cpu(iop_config.max_sg_count);
  1131. hba->firmware_version = le32_to_cpu(iop_config.firmware_version);
  1132. hba->interface_version = le32_to_cpu(iop_config.interface_version);
  1133. hba->sdram_size = le32_to_cpu(iop_config.sdram_size);
  1134. if (hba->ops->family == MVFREY_BASED_IOP) {
  1135. if (hba->ops->internal_memalloc(hba)) {
  1136. printk(KERN_ERR "scsi%d: internal_memalloc failed\n",
  1137. hba->host->host_no);
  1138. goto unmap_pci_bar;
  1139. }
  1140. if (hba->ops->reset_comm(hba)) {
  1141. printk(KERN_ERR "scsi%d: reset comm failed\n",
  1142. hba->host->host_no);
  1143. goto unmap_pci_bar;
  1144. }
  1145. }
  1146. if (hba->firmware_version > 0x01020000 ||
  1147. hba->interface_version > 0x01020000)
  1148. hba->iopintf_v2 = 1;
  1149. host->max_sectors = le32_to_cpu(iop_config.data_transfer_length) >> 9;
  1150. host->max_id = le32_to_cpu(iop_config.max_devices);
  1151. host->sg_tablesize = le32_to_cpu(iop_config.max_sg_count);
  1152. host->can_queue = le32_to_cpu(iop_config.max_requests);
  1153. host->cmd_per_lun = le32_to_cpu(iop_config.max_requests);
  1154. host->max_cmd_len = 16;
  1155. req_size = sizeof(struct hpt_iop_request_scsi_command)
  1156. + sizeof(struct hpt_iopsg) * (hba->max_sg_descriptors - 1);
  1157. if ((req_size & 0x1f) != 0)
  1158. req_size = (req_size + 0x1f) & ~0x1f;
  1159. memset(&set_config, 0, sizeof(struct hpt_iop_request_set_config));
  1160. set_config.iop_id = cpu_to_le32(host->host_no);
  1161. set_config.vbus_id = cpu_to_le16(host->host_no);
  1162. set_config.max_host_request_size = cpu_to_le16(req_size);
  1163. if (hba->ops->set_config(hba, &set_config)) {
  1164. printk(KERN_ERR "scsi%d: set config failed\n",
  1165. hba->host->host_no);
  1166. goto unmap_pci_bar;
  1167. }
  1168. pci_set_drvdata(pcidev, host);
  1169. if (request_irq(pcidev->irq, hptiop_intr, IRQF_SHARED,
  1170. driver_name, hba)) {
  1171. printk(KERN_ERR "scsi%d: request irq %d failed\n",
  1172. hba->host->host_no, pcidev->irq);
  1173. goto unmap_pci_bar;
  1174. }
  1175. /* Allocate request mem */
  1176. dprintk("req_size=%d, max_requests=%d\n", req_size, hba->max_requests);
  1177. hba->req_size = req_size;
  1178. hba->req_list = NULL;
  1179. for (i = 0; i < hba->max_requests; i++) {
  1180. start_virt = dma_alloc_coherent(&pcidev->dev,
  1181. hba->req_size + 0x20,
  1182. &start_phy, GFP_KERNEL);
  1183. if (!start_virt) {
  1184. printk(KERN_ERR "scsi%d: fail to alloc request mem\n",
  1185. hba->host->host_no);
  1186. goto free_request_mem;
  1187. }
  1188. hba->dma_coherent[i] = start_virt;
  1189. hba->dma_coherent_handle[i] = start_phy;
  1190. if ((start_phy & 0x1f) != 0) {
  1191. offset = ((start_phy + 0x1f) & ~0x1f) - start_phy;
  1192. start_phy += offset;
  1193. start_virt += offset;
  1194. }
  1195. hba->reqs[i].next = NULL;
  1196. hba->reqs[i].req_virt = start_virt;
  1197. hba->reqs[i].req_shifted_phy = start_phy >> 5;
  1198. hba->reqs[i].index = i;
  1199. free_req(hba, &hba->reqs[i]);
  1200. }
  1201. /* Enable Interrupt and start background task */
  1202. if (hptiop_initialize_iop(hba))
  1203. goto free_request_mem;
  1204. if (scsi_add_host(host, &pcidev->dev)) {
  1205. printk(KERN_ERR "scsi%d: scsi_add_host failed\n",
  1206. hba->host->host_no);
  1207. goto free_request_mem;
  1208. }
  1209. scsi_scan_host(host);
  1210. dprintk("scsi%d: hptiop_probe successfully\n", hba->host->host_no);
  1211. return 0;
  1212. free_request_mem:
  1213. for (i = 0; i < hba->max_requests; i++) {
  1214. if (hba->dma_coherent[i] && hba->dma_coherent_handle[i])
  1215. dma_free_coherent(&hba->pcidev->dev,
  1216. hba->req_size + 0x20,
  1217. hba->dma_coherent[i],
  1218. hba->dma_coherent_handle[i]);
  1219. else
  1220. break;
  1221. }
  1222. free_irq(hba->pcidev->irq, hba);
  1223. unmap_pci_bar:
  1224. hba->ops->internal_memfree(hba);
  1225. hba->ops->unmap_pci_bar(hba);
  1226. free_scsi_host:
  1227. scsi_host_put(host);
  1228. free_pci_regions:
  1229. pci_release_regions(pcidev);
  1230. disable_pci_device:
  1231. pci_disable_device(pcidev);
  1232. dprintk("scsi%d: hptiop_probe fail\n", host ? host->host_no : 0);
  1233. return -ENODEV;
  1234. }
  1235. static void hptiop_shutdown(struct pci_dev *pcidev)
  1236. {
  1237. struct Scsi_Host *host = pci_get_drvdata(pcidev);
  1238. struct hptiop_hba *hba = (struct hptiop_hba *)host->hostdata;
  1239. dprintk("hptiop_shutdown(%p)\n", hba);
  1240. /* stop the iop */
  1241. if (iop_send_sync_msg(hba, IOPMU_INBOUND_MSG0_SHUTDOWN, 60000))
  1242. printk(KERN_ERR "scsi%d: shutdown the iop timeout\n",
  1243. hba->host->host_no);
  1244. /* disable all outbound interrupts */
  1245. hba->ops->disable_intr(hba);
  1246. }
  1247. static void hptiop_disable_intr_itl(struct hptiop_hba *hba)
  1248. {
  1249. u32 int_mask;
  1250. int_mask = readl(&hba->u.itl.iop->outbound_intmask);
  1251. writel(int_mask |
  1252. IOPMU_OUTBOUND_INT_MSG0 | IOPMU_OUTBOUND_INT_POSTQUEUE,
  1253. &hba->u.itl.iop->outbound_intmask);
  1254. readl(&hba->u.itl.iop->outbound_intmask);
  1255. }
  1256. static void hptiop_disable_intr_mv(struct hptiop_hba *hba)
  1257. {
  1258. writel(0, &hba->u.mv.regs->outbound_intmask);
  1259. readl(&hba->u.mv.regs->outbound_intmask);
  1260. }
  1261. static void hptiop_disable_intr_mvfrey(struct hptiop_hba *hba)
  1262. {
  1263. writel(0, &(hba->u.mvfrey.mu->f0_doorbell_enable));
  1264. readl(&(hba->u.mvfrey.mu->f0_doorbell_enable));
  1265. writel(0, &(hba->u.mvfrey.mu->isr_enable));
  1266. readl(&(hba->u.mvfrey.mu->isr_enable));
  1267. writel(0, &(hba->u.mvfrey.mu->pcie_f0_int_enable));
  1268. readl(&(hba->u.mvfrey.mu->pcie_f0_int_enable));
  1269. }
  1270. static void hptiop_remove(struct pci_dev *pcidev)
  1271. {
  1272. struct Scsi_Host *host = pci_get_drvdata(pcidev);
  1273. struct hptiop_hba *hba = (struct hptiop_hba *)host->hostdata;
  1274. u32 i;
  1275. dprintk("scsi%d: hptiop_remove\n", hba->host->host_no);
  1276. scsi_remove_host(host);
  1277. hptiop_shutdown(pcidev);
  1278. free_irq(hba->pcidev->irq, hba);
  1279. for (i = 0; i < hba->max_requests; i++) {
  1280. if (hba->dma_coherent[i] && hba->dma_coherent_handle[i])
  1281. dma_free_coherent(&hba->pcidev->dev,
  1282. hba->req_size + 0x20,
  1283. hba->dma_coherent[i],
  1284. hba->dma_coherent_handle[i]);
  1285. else
  1286. break;
  1287. }
  1288. hba->ops->internal_memfree(hba);
  1289. hba->ops->unmap_pci_bar(hba);
  1290. pci_release_regions(hba->pcidev);
  1291. pci_set_drvdata(hba->pcidev, NULL);
  1292. pci_disable_device(hba->pcidev);
  1293. scsi_host_put(host);
  1294. }
  1295. static struct hptiop_adapter_ops hptiop_itl_ops = {
  1296. .family = INTEL_BASED_IOP,
  1297. .iop_wait_ready = iop_wait_ready_itl,
  1298. .internal_memalloc = hptiop_internal_memalloc_itl,
  1299. .internal_memfree = hptiop_internal_memfree_itl,
  1300. .map_pci_bar = hptiop_map_pci_bar_itl,
  1301. .unmap_pci_bar = hptiop_unmap_pci_bar_itl,
  1302. .enable_intr = hptiop_enable_intr_itl,
  1303. .disable_intr = hptiop_disable_intr_itl,
  1304. .get_config = iop_get_config_itl,
  1305. .set_config = iop_set_config_itl,
  1306. .iop_intr = iop_intr_itl,
  1307. .post_msg = hptiop_post_msg_itl,
  1308. .post_req = hptiop_post_req_itl,
  1309. .hw_dma_bit_mask = 64,
  1310. .reset_comm = hptiop_reset_comm_itl,
  1311. .host_phy_flag = cpu_to_le64(0),
  1312. };
  1313. static struct hptiop_adapter_ops hptiop_mv_ops = {
  1314. .family = MV_BASED_IOP,
  1315. .iop_wait_ready = iop_wait_ready_mv,
  1316. .internal_memalloc = hptiop_internal_memalloc_mv,
  1317. .internal_memfree = hptiop_internal_memfree_mv,
  1318. .map_pci_bar = hptiop_map_pci_bar_mv,
  1319. .unmap_pci_bar = hptiop_unmap_pci_bar_mv,
  1320. .enable_intr = hptiop_enable_intr_mv,
  1321. .disable_intr = hptiop_disable_intr_mv,
  1322. .get_config = iop_get_config_mv,
  1323. .set_config = iop_set_config_mv,
  1324. .iop_intr = iop_intr_mv,
  1325. .post_msg = hptiop_post_msg_mv,
  1326. .post_req = hptiop_post_req_mv,
  1327. .hw_dma_bit_mask = 33,
  1328. .reset_comm = hptiop_reset_comm_mv,
  1329. .host_phy_flag = cpu_to_le64(0),
  1330. };
  1331. static struct hptiop_adapter_ops hptiop_mvfrey_ops = {
  1332. .family = MVFREY_BASED_IOP,
  1333. .iop_wait_ready = iop_wait_ready_mvfrey,
  1334. .internal_memalloc = hptiop_internal_memalloc_mvfrey,
  1335. .internal_memfree = hptiop_internal_memfree_mvfrey,
  1336. .map_pci_bar = hptiop_map_pci_bar_mvfrey,
  1337. .unmap_pci_bar = hptiop_unmap_pci_bar_mvfrey,
  1338. .enable_intr = hptiop_enable_intr_mvfrey,
  1339. .disable_intr = hptiop_disable_intr_mvfrey,
  1340. .get_config = iop_get_config_mvfrey,
  1341. .set_config = iop_set_config_mvfrey,
  1342. .iop_intr = iop_intr_mvfrey,
  1343. .post_msg = hptiop_post_msg_mvfrey,
  1344. .post_req = hptiop_post_req_mvfrey,
  1345. .hw_dma_bit_mask = 64,
  1346. .reset_comm = hptiop_reset_comm_mvfrey,
  1347. .host_phy_flag = cpu_to_le64(1),
  1348. };
  1349. static struct pci_device_id hptiop_id_table[] = {
  1350. { PCI_VDEVICE(TTI, 0x3220), (kernel_ulong_t)&hptiop_itl_ops },
  1351. { PCI_VDEVICE(TTI, 0x3320), (kernel_ulong_t)&hptiop_itl_ops },
  1352. { PCI_VDEVICE(TTI, 0x3410), (kernel_ulong_t)&hptiop_itl_ops },
  1353. { PCI_VDEVICE(TTI, 0x3510), (kernel_ulong_t)&hptiop_itl_ops },
  1354. { PCI_VDEVICE(TTI, 0x3511), (kernel_ulong_t)&hptiop_itl_ops },
  1355. { PCI_VDEVICE(TTI, 0x3520), (kernel_ulong_t)&hptiop_itl_ops },
  1356. { PCI_VDEVICE(TTI, 0x3521), (kernel_ulong_t)&hptiop_itl_ops },
  1357. { PCI_VDEVICE(TTI, 0x3522), (kernel_ulong_t)&hptiop_itl_ops },
  1358. { PCI_VDEVICE(TTI, 0x3530), (kernel_ulong_t)&hptiop_itl_ops },
  1359. { PCI_VDEVICE(TTI, 0x3540), (kernel_ulong_t)&hptiop_itl_ops },
  1360. { PCI_VDEVICE(TTI, 0x3560), (kernel_ulong_t)&hptiop_itl_ops },
  1361. { PCI_VDEVICE(TTI, 0x4210), (kernel_ulong_t)&hptiop_itl_ops },
  1362. { PCI_VDEVICE(TTI, 0x4211), (kernel_ulong_t)&hptiop_itl_ops },
  1363. { PCI_VDEVICE(TTI, 0x4310), (kernel_ulong_t)&hptiop_itl_ops },
  1364. { PCI_VDEVICE(TTI, 0x4311), (kernel_ulong_t)&hptiop_itl_ops },
  1365. { PCI_VDEVICE(TTI, 0x4320), (kernel_ulong_t)&hptiop_itl_ops },
  1366. { PCI_VDEVICE(TTI, 0x4321), (kernel_ulong_t)&hptiop_itl_ops },
  1367. { PCI_VDEVICE(TTI, 0x4322), (kernel_ulong_t)&hptiop_itl_ops },
  1368. { PCI_VDEVICE(TTI, 0x4400), (kernel_ulong_t)&hptiop_itl_ops },
  1369. { PCI_VDEVICE(TTI, 0x3120), (kernel_ulong_t)&hptiop_mv_ops },
  1370. { PCI_VDEVICE(TTI, 0x3122), (kernel_ulong_t)&hptiop_mv_ops },
  1371. { PCI_VDEVICE(TTI, 0x3020), (kernel_ulong_t)&hptiop_mv_ops },
  1372. { PCI_VDEVICE(TTI, 0x4520), (kernel_ulong_t)&hptiop_mvfrey_ops },
  1373. { PCI_VDEVICE(TTI, 0x4522), (kernel_ulong_t)&hptiop_mvfrey_ops },
  1374. { PCI_VDEVICE(TTI, 0x3610), (kernel_ulong_t)&hptiop_mvfrey_ops },
  1375. { PCI_VDEVICE(TTI, 0x3611), (kernel_ulong_t)&hptiop_mvfrey_ops },
  1376. { PCI_VDEVICE(TTI, 0x3620), (kernel_ulong_t)&hptiop_mvfrey_ops },
  1377. { PCI_VDEVICE(TTI, 0x3622), (kernel_ulong_t)&hptiop_mvfrey_ops },
  1378. { PCI_VDEVICE(TTI, 0x3640), (kernel_ulong_t)&hptiop_mvfrey_ops },
  1379. { PCI_VDEVICE(TTI, 0x3660), (kernel_ulong_t)&hptiop_mvfrey_ops },
  1380. { PCI_VDEVICE(TTI, 0x3680), (kernel_ulong_t)&hptiop_mvfrey_ops },
  1381. { PCI_VDEVICE(TTI, 0x3690), (kernel_ulong_t)&hptiop_mvfrey_ops },
  1382. {},
  1383. };
  1384. MODULE_DEVICE_TABLE(pci, hptiop_id_table);
  1385. static struct pci_driver hptiop_pci_driver = {
  1386. .name = driver_name,
  1387. .id_table = hptiop_id_table,
  1388. .probe = hptiop_probe,
  1389. .remove = hptiop_remove,
  1390. .shutdown = hptiop_shutdown,
  1391. };
  1392. static int __init hptiop_module_init(void)
  1393. {
  1394. printk(KERN_INFO "%s %s\n", driver_name_long, driver_ver);
  1395. return pci_register_driver(&hptiop_pci_driver);
  1396. }
  1397. static void __exit hptiop_module_exit(void)
  1398. {
  1399. pci_unregister_driver(&hptiop_pci_driver);
  1400. }
  1401. module_init(hptiop_module_init);
  1402. module_exit(hptiop_module_exit);
  1403. MODULE_LICENSE("GPL");