ipr.c 296 KB

1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859606162636465666768697071727374757677787980818283848586878889909192939495969798991001011021031041051061071081091101111121131141151161171181191201211221231241251261271281291301311321331341351361371381391401411421431441451461471481491501511521531541551561571581591601611621631641651661671681691701711721731741751761771781791801811821831841851861871881891901911921931941951961971981992002012022032042052062072082092102112122132142152162172182192202212222232242252262272282292302312322332342352362372382392402412422432442452462472482492502512522532542552562572582592602612622632642652662672682692702712722732742752762772782792802812822832842852862872882892902912922932942952962972982993003013023033043053063073083093103113123133143153163173183193203213223233243253263273283293303313323333343353363373383393403413423433443453463473483493503513523533543553563573583593603613623633643653663673683693703713723733743753763773783793803813823833843853863873883893903913923933943953963973983994004014024034044054064074084094104114124134144154164174184194204214224234244254264274284294304314324334344354364374384394404414424434444454464474484494504514524534544554564574584594604614624634644654664674684694704714724734744754764774784794804814824834844854864874884894904914924934944954964974984995005015025035045055065075085095105115125135145155165175185195205215225235245255265275285295305315325335345355365375385395405415425435445455465475485495505515525535545555565575585595605615625635645655665675685695705715725735745755765775785795805815825835845855865875885895905915925935945955965975985996006016026036046056066076086096106116126136146156166176186196206216226236246256266276286296306316326336346356366376386396406416426436446456466476486496506516526536546556566576586596606616626636646656666676686696706716726736746756766776786796806816826836846856866876886896906916926936946956966976986997007017027037047057067077087097107117127137147157167177187197207217227237247257267277287297307317327337347357367377387397407417427437447457467477487497507517527537547557567577587597607617627637647657667677687697707717727737747757767777787797807817827837847857867877887897907917927937947957967977987998008018028038048058068078088098108118128138148158168178188198208218228238248258268278288298308318328338348358368378388398408418428438448458468478488498508518528538548558568578588598608618628638648658668678688698708718728738748758768778788798808818828838848858868878888898908918928938948958968978988999009019029039049059069079089099109119129139149159169179189199209219229239249259269279289299309319329339349359369379389399409419429439449459469479489499509519529539549559569579589599609619629639649659669679689699709719729739749759769779789799809819829839849859869879889899909919929939949959969979989991000100110021003100410051006100710081009101010111012101310141015101610171018101910201021102210231024102510261027102810291030103110321033103410351036103710381039104010411042104310441045104610471048104910501051105210531054105510561057105810591060106110621063106410651066106710681069107010711072107310741075107610771078107910801081108210831084108510861087108810891090109110921093109410951096109710981099110011011102110311041105110611071108110911101111111211131114111511161117111811191120112111221123112411251126112711281129113011311132113311341135113611371138113911401141114211431144114511461147114811491150115111521153115411551156115711581159116011611162116311641165116611671168116911701171117211731174117511761177117811791180118111821183118411851186118711881189119011911192119311941195119611971198119912001201120212031204120512061207120812091210121112121213121412151216121712181219122012211222122312241225122612271228122912301231123212331234123512361237123812391240124112421243124412451246124712481249125012511252125312541255125612571258125912601261126212631264126512661267126812691270127112721273127412751276127712781279128012811282128312841285128612871288128912901291129212931294129512961297129812991300130113021303130413051306130713081309131013111312131313141315131613171318131913201321132213231324132513261327132813291330133113321333133413351336133713381339134013411342134313441345134613471348134913501351135213531354135513561357135813591360136113621363136413651366136713681369137013711372137313741375137613771378137913801381138213831384138513861387138813891390139113921393139413951396139713981399140014011402140314041405140614071408140914101411141214131414141514161417141814191420142114221423142414251426142714281429143014311432143314341435143614371438143914401441144214431444144514461447144814491450145114521453145414551456145714581459146014611462146314641465146614671468146914701471147214731474147514761477147814791480148114821483148414851486148714881489149014911492149314941495149614971498149915001501150215031504150515061507150815091510151115121513151415151516151715181519152015211522152315241525152615271528152915301531153215331534153515361537153815391540154115421543154415451546154715481549155015511552155315541555155615571558155915601561156215631564156515661567156815691570157115721573157415751576157715781579158015811582158315841585158615871588158915901591159215931594159515961597159815991600160116021603160416051606160716081609161016111612161316141615161616171618161916201621162216231624162516261627162816291630163116321633163416351636163716381639164016411642164316441645164616471648164916501651165216531654165516561657165816591660166116621663166416651666166716681669167016711672167316741675167616771678167916801681168216831684168516861687168816891690169116921693169416951696169716981699170017011702170317041705170617071708170917101711171217131714171517161717171817191720172117221723172417251726172717281729173017311732173317341735173617371738173917401741174217431744174517461747174817491750175117521753175417551756175717581759176017611762176317641765176617671768176917701771177217731774177517761777177817791780178117821783178417851786178717881789179017911792179317941795179617971798179918001801180218031804180518061807180818091810181118121813181418151816181718181819182018211822182318241825182618271828182918301831183218331834183518361837183818391840184118421843184418451846184718481849185018511852185318541855185618571858185918601861186218631864186518661867186818691870187118721873187418751876187718781879188018811882188318841885188618871888188918901891189218931894189518961897189818991900190119021903190419051906190719081909191019111912191319141915191619171918191919201921192219231924192519261927192819291930193119321933193419351936193719381939194019411942194319441945194619471948194919501951195219531954195519561957195819591960196119621963196419651966196719681969197019711972197319741975197619771978197919801981198219831984198519861987198819891990199119921993199419951996199719981999200020012002200320042005200620072008200920102011201220132014201520162017201820192020202120222023202420252026202720282029203020312032203320342035203620372038203920402041204220432044204520462047204820492050205120522053205420552056205720582059206020612062206320642065206620672068206920702071207220732074207520762077207820792080208120822083208420852086208720882089209020912092209320942095209620972098209921002101210221032104210521062107210821092110211121122113211421152116211721182119212021212122212321242125212621272128212921302131213221332134213521362137213821392140214121422143214421452146214721482149215021512152215321542155215621572158215921602161216221632164216521662167216821692170217121722173217421752176217721782179218021812182218321842185218621872188218921902191219221932194219521962197219821992200220122022203220422052206220722082209221022112212221322142215221622172218221922202221222222232224222522262227222822292230223122322233223422352236223722382239224022412242224322442245224622472248224922502251225222532254225522562257225822592260226122622263226422652266226722682269227022712272227322742275227622772278227922802281228222832284228522862287228822892290229122922293229422952296229722982299230023012302230323042305230623072308230923102311231223132314231523162317231823192320232123222323232423252326232723282329233023312332233323342335233623372338233923402341234223432344234523462347234823492350235123522353235423552356235723582359236023612362236323642365236623672368236923702371237223732374237523762377237823792380238123822383238423852386238723882389239023912392239323942395239623972398239924002401240224032404240524062407240824092410241124122413241424152416241724182419242024212422242324242425242624272428242924302431243224332434243524362437243824392440244124422443244424452446244724482449245024512452245324542455245624572458245924602461246224632464246524662467246824692470247124722473247424752476247724782479248024812482248324842485248624872488248924902491249224932494249524962497249824992500250125022503250425052506250725082509251025112512251325142515251625172518251925202521252225232524252525262527252825292530253125322533253425352536253725382539254025412542254325442545254625472548254925502551255225532554255525562557255825592560256125622563256425652566256725682569257025712572257325742575257625772578257925802581258225832584258525862587258825892590259125922593259425952596259725982599260026012602260326042605260626072608260926102611261226132614261526162617261826192620262126222623262426252626262726282629263026312632263326342635263626372638263926402641264226432644264526462647264826492650265126522653265426552656265726582659266026612662266326642665266626672668266926702671267226732674267526762677267826792680268126822683268426852686268726882689269026912692269326942695269626972698269927002701270227032704270527062707270827092710271127122713271427152716271727182719272027212722272327242725272627272728272927302731273227332734273527362737273827392740274127422743274427452746274727482749275027512752275327542755275627572758275927602761276227632764276527662767276827692770277127722773277427752776277727782779278027812782278327842785278627872788278927902791279227932794279527962797279827992800280128022803280428052806280728082809281028112812281328142815281628172818281928202821282228232824282528262827282828292830283128322833283428352836283728382839284028412842284328442845284628472848284928502851285228532854285528562857285828592860286128622863286428652866286728682869287028712872287328742875287628772878287928802881288228832884288528862887288828892890289128922893289428952896289728982899290029012902290329042905290629072908290929102911291229132914291529162917291829192920292129222923292429252926292729282929293029312932293329342935293629372938293929402941294229432944294529462947294829492950295129522953295429552956295729582959296029612962296329642965296629672968296929702971297229732974297529762977297829792980298129822983298429852986298729882989299029912992299329942995299629972998299930003001300230033004300530063007300830093010301130123013301430153016301730183019302030213022302330243025302630273028302930303031303230333034303530363037303830393040304130423043304430453046304730483049305030513052305330543055305630573058305930603061306230633064306530663067306830693070307130723073307430753076307730783079308030813082308330843085308630873088308930903091309230933094309530963097309830993100310131023103310431053106310731083109311031113112311331143115311631173118311931203121312231233124312531263127312831293130313131323133313431353136313731383139314031413142314331443145314631473148314931503151315231533154315531563157315831593160316131623163316431653166316731683169317031713172317331743175317631773178317931803181318231833184318531863187318831893190319131923193319431953196319731983199320032013202320332043205320632073208320932103211321232133214321532163217321832193220322132223223322432253226322732283229323032313232323332343235323632373238323932403241324232433244324532463247324832493250325132523253325432553256325732583259326032613262326332643265326632673268326932703271327232733274327532763277327832793280328132823283328432853286328732883289329032913292329332943295329632973298329933003301330233033304330533063307330833093310331133123313331433153316331733183319332033213322332333243325332633273328332933303331333233333334333533363337333833393340334133423343334433453346334733483349335033513352335333543355335633573358335933603361336233633364336533663367336833693370337133723373337433753376337733783379338033813382338333843385338633873388338933903391339233933394339533963397339833993400340134023403340434053406340734083409341034113412341334143415341634173418341934203421342234233424342534263427342834293430343134323433343434353436343734383439344034413442344334443445344634473448344934503451345234533454345534563457345834593460346134623463346434653466346734683469347034713472347334743475347634773478347934803481348234833484348534863487348834893490349134923493349434953496349734983499350035013502350335043505350635073508350935103511351235133514351535163517351835193520352135223523352435253526352735283529353035313532353335343535353635373538353935403541354235433544354535463547354835493550355135523553355435553556355735583559356035613562356335643565356635673568356935703571357235733574357535763577357835793580358135823583358435853586358735883589359035913592359335943595359635973598359936003601360236033604360536063607360836093610361136123613361436153616361736183619362036213622362336243625362636273628362936303631363236333634363536363637363836393640364136423643364436453646364736483649365036513652365336543655365636573658365936603661366236633664366536663667366836693670367136723673367436753676367736783679368036813682368336843685368636873688368936903691369236933694369536963697369836993700370137023703370437053706370737083709371037113712371337143715371637173718371937203721372237233724372537263727372837293730373137323733373437353736373737383739374037413742374337443745374637473748374937503751375237533754375537563757375837593760376137623763376437653766376737683769377037713772377337743775377637773778377937803781378237833784378537863787378837893790379137923793379437953796379737983799380038013802380338043805380638073808380938103811381238133814381538163817381838193820382138223823382438253826382738283829383038313832383338343835383638373838383938403841384238433844384538463847384838493850385138523853385438553856385738583859386038613862386338643865386638673868386938703871387238733874387538763877387838793880388138823883388438853886388738883889389038913892389338943895389638973898389939003901390239033904390539063907390839093910391139123913391439153916391739183919392039213922392339243925392639273928392939303931393239333934393539363937393839393940394139423943394439453946394739483949395039513952395339543955395639573958395939603961396239633964396539663967396839693970397139723973397439753976397739783979398039813982398339843985398639873988398939903991399239933994399539963997399839994000400140024003400440054006400740084009401040114012401340144015401640174018401940204021402240234024402540264027402840294030403140324033403440354036403740384039404040414042404340444045404640474048404940504051405240534054405540564057405840594060406140624063406440654066406740684069407040714072407340744075407640774078407940804081408240834084408540864087408840894090409140924093409440954096409740984099410041014102410341044105410641074108410941104111411241134114411541164117411841194120412141224123412441254126412741284129413041314132413341344135413641374138413941404141414241434144414541464147414841494150415141524153415441554156415741584159416041614162416341644165416641674168416941704171417241734174417541764177417841794180418141824183418441854186418741884189419041914192419341944195419641974198419942004201420242034204420542064207420842094210421142124213421442154216421742184219422042214222422342244225422642274228422942304231423242334234423542364237423842394240424142424243424442454246424742484249425042514252425342544255425642574258425942604261426242634264426542664267426842694270427142724273427442754276427742784279428042814282428342844285428642874288428942904291429242934294429542964297429842994300430143024303430443054306430743084309431043114312431343144315431643174318431943204321432243234324432543264327432843294330433143324333433443354336433743384339434043414342434343444345434643474348434943504351435243534354435543564357435843594360436143624363436443654366436743684369437043714372437343744375437643774378437943804381438243834384438543864387438843894390439143924393439443954396439743984399440044014402440344044405440644074408440944104411441244134414441544164417441844194420442144224423442444254426442744284429443044314432443344344435443644374438443944404441444244434444444544464447444844494450445144524453445444554456445744584459446044614462446344644465446644674468446944704471447244734474447544764477447844794480448144824483448444854486448744884489449044914492449344944495449644974498449945004501450245034504450545064507450845094510451145124513451445154516451745184519452045214522452345244525452645274528452945304531453245334534453545364537453845394540454145424543454445454546454745484549455045514552455345544555455645574558455945604561456245634564456545664567456845694570457145724573457445754576457745784579458045814582458345844585458645874588458945904591459245934594459545964597459845994600460146024603460446054606460746084609461046114612461346144615461646174618461946204621462246234624462546264627462846294630463146324633463446354636463746384639464046414642464346444645464646474648464946504651465246534654465546564657465846594660466146624663466446654666466746684669467046714672467346744675467646774678467946804681468246834684468546864687468846894690469146924693469446954696469746984699470047014702470347044705470647074708470947104711471247134714471547164717471847194720472147224723472447254726472747284729473047314732473347344735473647374738473947404741474247434744474547464747474847494750475147524753475447554756475747584759476047614762476347644765476647674768476947704771477247734774477547764777477847794780478147824783478447854786478747884789479047914792479347944795479647974798479948004801480248034804480548064807480848094810481148124813481448154816481748184819482048214822482348244825482648274828482948304831483248334834483548364837483848394840484148424843484448454846484748484849485048514852485348544855485648574858485948604861486248634864486548664867486848694870487148724873487448754876487748784879488048814882488348844885488648874888488948904891489248934894489548964897489848994900490149024903490449054906490749084909491049114912491349144915491649174918491949204921492249234924492549264927492849294930493149324933493449354936493749384939494049414942494349444945494649474948494949504951495249534954495549564957495849594960496149624963496449654966496749684969497049714972497349744975497649774978497949804981498249834984498549864987498849894990499149924993499449954996499749984999500050015002500350045005500650075008500950105011501250135014501550165017501850195020502150225023502450255026502750285029503050315032503350345035503650375038503950405041504250435044504550465047504850495050505150525053505450555056505750585059506050615062506350645065506650675068506950705071507250735074507550765077507850795080508150825083508450855086508750885089509050915092509350945095509650975098509951005101510251035104510551065107510851095110511151125113511451155116511751185119512051215122512351245125512651275128512951305131513251335134513551365137513851395140514151425143514451455146514751485149515051515152515351545155515651575158515951605161516251635164516551665167516851695170517151725173517451755176517751785179518051815182518351845185518651875188518951905191519251935194519551965197519851995200520152025203520452055206520752085209521052115212521352145215521652175218521952205221522252235224522552265227522852295230523152325233523452355236523752385239524052415242524352445245524652475248524952505251525252535254525552565257525852595260526152625263526452655266526752685269527052715272527352745275527652775278527952805281528252835284528552865287528852895290529152925293529452955296529752985299530053015302530353045305530653075308530953105311531253135314531553165317531853195320532153225323532453255326532753285329533053315332533353345335533653375338533953405341534253435344534553465347534853495350535153525353535453555356535753585359536053615362536353645365536653675368536953705371537253735374537553765377537853795380538153825383538453855386538753885389539053915392539353945395539653975398539954005401540254035404540554065407540854095410541154125413541454155416541754185419542054215422542354245425542654275428542954305431543254335434543554365437543854395440544154425443544454455446544754485449545054515452545354545455545654575458545954605461546254635464546554665467546854695470547154725473547454755476547754785479548054815482548354845485548654875488548954905491549254935494549554965497549854995500550155025503550455055506550755085509551055115512551355145515551655175518551955205521552255235524552555265527552855295530553155325533553455355536553755385539554055415542554355445545554655475548554955505551555255535554555555565557555855595560556155625563556455655566556755685569557055715572557355745575557655775578557955805581558255835584558555865587558855895590559155925593559455955596559755985599560056015602560356045605560656075608560956105611561256135614561556165617561856195620562156225623562456255626562756285629563056315632563356345635563656375638563956405641564256435644564556465647564856495650565156525653565456555656565756585659566056615662566356645665566656675668566956705671567256735674567556765677567856795680568156825683568456855686568756885689569056915692569356945695569656975698569957005701570257035704570557065707570857095710571157125713571457155716571757185719572057215722572357245725572657275728572957305731573257335734573557365737573857395740574157425743574457455746574757485749575057515752575357545755575657575758575957605761576257635764576557665767576857695770577157725773577457755776577757785779578057815782578357845785578657875788578957905791579257935794579557965797579857995800580158025803580458055806580758085809581058115812581358145815581658175818581958205821582258235824582558265827582858295830583158325833583458355836583758385839584058415842584358445845584658475848584958505851585258535854585558565857585858595860586158625863586458655866586758685869587058715872587358745875587658775878587958805881588258835884588558865887588858895890589158925893589458955896589758985899590059015902590359045905590659075908590959105911591259135914591559165917591859195920592159225923592459255926592759285929593059315932593359345935593659375938593959405941594259435944594559465947594859495950595159525953595459555956595759585959596059615962596359645965596659675968596959705971597259735974597559765977597859795980598159825983598459855986598759885989599059915992599359945995599659975998599960006001600260036004600560066007600860096010601160126013601460156016601760186019602060216022602360246025602660276028602960306031603260336034603560366037603860396040604160426043604460456046604760486049605060516052605360546055605660576058605960606061606260636064606560666067606860696070607160726073607460756076607760786079608060816082608360846085608660876088608960906091609260936094609560966097609860996100610161026103610461056106610761086109611061116112611361146115611661176118611961206121612261236124612561266127612861296130613161326133613461356136613761386139614061416142614361446145614661476148614961506151615261536154615561566157615861596160616161626163616461656166616761686169617061716172617361746175617661776178617961806181618261836184618561866187618861896190619161926193619461956196619761986199620062016202620362046205620662076208620962106211621262136214621562166217621862196220622162226223622462256226622762286229623062316232623362346235623662376238623962406241624262436244624562466247624862496250625162526253625462556256625762586259626062616262626362646265626662676268626962706271627262736274627562766277627862796280628162826283628462856286628762886289629062916292629362946295629662976298629963006301630263036304630563066307630863096310631163126313631463156316631763186319632063216322632363246325632663276328632963306331633263336334633563366337633863396340634163426343634463456346634763486349635063516352635363546355635663576358635963606361636263636364636563666367636863696370637163726373637463756376637763786379638063816382638363846385638663876388638963906391639263936394639563966397639863996400640164026403640464056406640764086409641064116412641364146415641664176418641964206421642264236424642564266427642864296430643164326433643464356436643764386439644064416442644364446445644664476448644964506451645264536454645564566457645864596460646164626463646464656466646764686469647064716472647364746475647664776478647964806481648264836484648564866487648864896490649164926493649464956496649764986499650065016502650365046505650665076508650965106511651265136514651565166517651865196520652165226523652465256526652765286529653065316532653365346535653665376538653965406541654265436544654565466547654865496550655165526553655465556556655765586559656065616562656365646565656665676568656965706571657265736574657565766577657865796580658165826583658465856586658765886589659065916592659365946595659665976598659966006601660266036604660566066607660866096610661166126613661466156616661766186619662066216622662366246625662666276628662966306631663266336634663566366637663866396640664166426643664466456646664766486649665066516652665366546655665666576658665966606661666266636664666566666667666866696670667166726673667466756676667766786679668066816682668366846685668666876688668966906691669266936694669566966697669866996700670167026703670467056706670767086709671067116712671367146715671667176718671967206721672267236724672567266727672867296730673167326733673467356736673767386739674067416742674367446745674667476748674967506751675267536754675567566757675867596760676167626763676467656766676767686769677067716772677367746775677667776778677967806781678267836784678567866787678867896790679167926793679467956796679767986799680068016802680368046805680668076808680968106811681268136814681568166817681868196820682168226823682468256826682768286829683068316832683368346835683668376838683968406841684268436844684568466847684868496850685168526853685468556856685768586859686068616862686368646865686668676868686968706871687268736874687568766877687868796880688168826883688468856886688768886889689068916892689368946895689668976898689969006901690269036904690569066907690869096910691169126913691469156916691769186919692069216922692369246925692669276928692969306931693269336934693569366937693869396940694169426943694469456946694769486949695069516952695369546955695669576958695969606961696269636964696569666967696869696970697169726973697469756976697769786979698069816982698369846985698669876988698969906991699269936994699569966997699869997000700170027003700470057006700770087009701070117012701370147015701670177018701970207021702270237024702570267027702870297030703170327033703470357036703770387039704070417042704370447045704670477048704970507051705270537054705570567057705870597060706170627063706470657066706770687069707070717072707370747075707670777078707970807081708270837084708570867087708870897090709170927093709470957096709770987099710071017102710371047105710671077108710971107111711271137114711571167117711871197120712171227123712471257126712771287129713071317132713371347135713671377138713971407141714271437144714571467147714871497150715171527153715471557156715771587159716071617162716371647165716671677168716971707171717271737174717571767177717871797180718171827183718471857186718771887189719071917192719371947195719671977198719972007201720272037204720572067207720872097210721172127213721472157216721772187219722072217222722372247225722672277228722972307231723272337234723572367237723872397240724172427243724472457246724772487249725072517252725372547255725672577258725972607261726272637264726572667267726872697270727172727273727472757276727772787279728072817282728372847285728672877288728972907291729272937294729572967297729872997300730173027303730473057306730773087309731073117312731373147315731673177318731973207321732273237324732573267327732873297330733173327333733473357336733773387339734073417342734373447345734673477348734973507351735273537354735573567357735873597360736173627363736473657366736773687369737073717372737373747375737673777378737973807381738273837384738573867387738873897390739173927393739473957396739773987399740074017402740374047405740674077408740974107411741274137414741574167417741874197420742174227423742474257426742774287429743074317432743374347435743674377438743974407441744274437444744574467447744874497450745174527453745474557456745774587459746074617462746374647465746674677468746974707471747274737474747574767477747874797480748174827483748474857486748774887489749074917492749374947495749674977498749975007501750275037504750575067507750875097510751175127513751475157516751775187519752075217522752375247525752675277528752975307531753275337534753575367537753875397540754175427543754475457546754775487549755075517552755375547555755675577558755975607561756275637564756575667567756875697570757175727573757475757576757775787579758075817582758375847585758675877588758975907591759275937594759575967597759875997600760176027603760476057606760776087609761076117612761376147615761676177618761976207621762276237624762576267627762876297630763176327633763476357636763776387639764076417642764376447645764676477648764976507651765276537654765576567657765876597660766176627663766476657666766776687669767076717672767376747675767676777678767976807681768276837684768576867687768876897690769176927693769476957696769776987699770077017702770377047705770677077708770977107711771277137714771577167717771877197720772177227723772477257726772777287729773077317732773377347735773677377738773977407741774277437744774577467747774877497750775177527753775477557756775777587759776077617762776377647765776677677768776977707771777277737774777577767777777877797780778177827783778477857786778777887789779077917792779377947795779677977798779978007801780278037804780578067807780878097810781178127813781478157816781778187819782078217822782378247825782678277828782978307831783278337834783578367837783878397840784178427843784478457846784778487849785078517852785378547855785678577858785978607861786278637864786578667867786878697870787178727873787478757876787778787879788078817882788378847885788678877888788978907891789278937894789578967897789878997900790179027903790479057906790779087909791079117912791379147915791679177918791979207921792279237924792579267927792879297930793179327933793479357936793779387939794079417942794379447945794679477948794979507951795279537954795579567957795879597960796179627963796479657966796779687969797079717972797379747975797679777978797979807981798279837984798579867987798879897990799179927993799479957996799779987999800080018002800380048005800680078008800980108011801280138014801580168017801880198020802180228023802480258026802780288029803080318032803380348035803680378038803980408041804280438044804580468047804880498050805180528053805480558056805780588059806080618062806380648065806680678068806980708071807280738074807580768077807880798080808180828083808480858086808780888089809080918092809380948095809680978098809981008101810281038104810581068107810881098110811181128113811481158116811781188119812081218122812381248125812681278128812981308131813281338134813581368137813881398140814181428143814481458146814781488149815081518152815381548155815681578158815981608161816281638164816581668167816881698170817181728173817481758176817781788179818081818182818381848185818681878188818981908191819281938194819581968197819881998200820182028203820482058206820782088209821082118212821382148215821682178218821982208221822282238224822582268227822882298230823182328233823482358236823782388239824082418242824382448245824682478248824982508251825282538254825582568257825882598260826182628263826482658266826782688269827082718272827382748275827682778278827982808281828282838284828582868287828882898290829182928293829482958296829782988299830083018302830383048305830683078308830983108311831283138314831583168317831883198320832183228323832483258326832783288329833083318332833383348335833683378338833983408341834283438344834583468347834883498350835183528353835483558356835783588359836083618362836383648365836683678368836983708371837283738374837583768377837883798380838183828383838483858386838783888389839083918392839383948395839683978398839984008401840284038404840584068407840884098410841184128413841484158416841784188419842084218422842384248425842684278428842984308431843284338434843584368437843884398440844184428443844484458446844784488449845084518452845384548455845684578458845984608461846284638464846584668467846884698470847184728473847484758476847784788479848084818482848384848485848684878488848984908491849284938494849584968497849884998500850185028503850485058506850785088509851085118512851385148515851685178518851985208521852285238524852585268527852885298530853185328533853485358536853785388539854085418542854385448545854685478548854985508551855285538554855585568557855885598560856185628563856485658566856785688569857085718572857385748575857685778578857985808581858285838584858585868587858885898590859185928593859485958596859785988599860086018602860386048605860686078608860986108611861286138614861586168617861886198620862186228623862486258626862786288629863086318632863386348635863686378638863986408641864286438644864586468647864886498650865186528653865486558656865786588659866086618662866386648665866686678668866986708671867286738674867586768677867886798680868186828683868486858686868786888689869086918692869386948695869686978698869987008701870287038704870587068707870887098710871187128713871487158716871787188719872087218722872387248725872687278728872987308731873287338734873587368737873887398740874187428743874487458746874787488749875087518752875387548755875687578758875987608761876287638764876587668767876887698770877187728773877487758776877787788779878087818782878387848785878687878788878987908791879287938794879587968797879887998800880188028803880488058806880788088809881088118812881388148815881688178818881988208821882288238824882588268827882888298830883188328833883488358836883788388839884088418842884388448845884688478848884988508851885288538854885588568857885888598860886188628863886488658866886788688869887088718872887388748875887688778878887988808881888288838884888588868887888888898890889188928893889488958896889788988899890089018902890389048905890689078908890989108911891289138914891589168917891889198920892189228923892489258926892789288929893089318932893389348935893689378938893989408941894289438944894589468947894889498950895189528953895489558956895789588959896089618962896389648965896689678968896989708971897289738974897589768977897889798980898189828983898489858986898789888989899089918992899389948995899689978998899990009001900290039004900590069007900890099010901190129013901490159016901790189019902090219022902390249025902690279028902990309031903290339034903590369037903890399040904190429043904490459046904790489049905090519052905390549055905690579058905990609061906290639064906590669067906890699070907190729073907490759076907790789079908090819082908390849085908690879088908990909091909290939094909590969097909890999100910191029103910491059106910791089109911091119112911391149115911691179118911991209121912291239124912591269127912891299130913191329133913491359136913791389139914091419142914391449145914691479148914991509151915291539154915591569157915891599160916191629163916491659166916791689169917091719172917391749175917691779178917991809181918291839184918591869187918891899190919191929193919491959196919791989199920092019202920392049205920692079208920992109211921292139214921592169217921892199220922192229223922492259226922792289229923092319232923392349235923692379238923992409241924292439244924592469247924892499250925192529253925492559256925792589259926092619262926392649265926692679268926992709271927292739274927592769277927892799280928192829283928492859286928792889289929092919292929392949295929692979298929993009301930293039304930593069307930893099310931193129313931493159316931793189319932093219322932393249325932693279328932993309331933293339334933593369337933893399340934193429343934493459346934793489349935093519352935393549355935693579358935993609361936293639364936593669367936893699370937193729373937493759376937793789379938093819382938393849385938693879388938993909391939293939394939593969397939893999400940194029403940494059406940794089409941094119412941394149415941694179418941994209421942294239424942594269427942894299430943194329433943494359436943794389439944094419442944394449445944694479448944994509451945294539454945594569457945894599460946194629463946494659466946794689469947094719472947394749475947694779478947994809481948294839484948594869487948894899490949194929493949494959496949794989499950095019502950395049505950695079508950995109511951295139514951595169517951895199520952195229523952495259526952795289529953095319532953395349535953695379538953995409541954295439544954595469547954895499550955195529553955495559556955795589559956095619562956395649565956695679568956995709571957295739574957595769577957895799580958195829583958495859586958795889589959095919592959395949595959695979598959996009601960296039604960596069607960896099610961196129613961496159616961796189619962096219622962396249625962696279628962996309631963296339634963596369637963896399640964196429643964496459646964796489649965096519652965396549655965696579658965996609661966296639664966596669667966896699670967196729673967496759676967796789679968096819682968396849685968696879688968996909691969296939694969596969697969896999700970197029703970497059706970797089709971097119712971397149715971697179718971997209721972297239724972597269727972897299730973197329733973497359736973797389739974097419742974397449745974697479748974997509751975297539754975597569757975897599760976197629763976497659766976797689769977097719772977397749775977697779778977997809781978297839784978597869787978897899790979197929793979497959796979797989799980098019802980398049805980698079808980998109811981298139814981598169817981898199820982198229823982498259826982798289829983098319832983398349835983698379838983998409841984298439844984598469847984898499850985198529853985498559856985798589859986098619862986398649865986698679868986998709871987298739874987598769877987898799880988198829883988498859886988798889889989098919892989398949895989698979898989999009901990299039904990599069907990899099910991199129913991499159916991799189919992099219922992399249925992699279928992999309931993299339934993599369937993899399940994199429943994499459946994799489949995099519952995399549955995699579958995999609961996299639964996599669967996899699970997199729973997499759976997799789979998099819982998399849985998699879988998999909991999299939994999599969997999899991000010001100021000310004100051000610007100081000910010100111001210013100141001510016100171001810019100201002110022100231002410025100261002710028100291003010031100321003310034100351003610037100381003910040100411004210043100441004510046100471004810049100501005110052100531005410055100561005710058100591006010061100621006310064100651006610067100681006910070100711007210073100741007510076100771007810079100801008110082100831008410085100861008710088100891009010091100921009310094100951009610097100981009910100101011010210103101041010510106101071010810109101101011110112101131011410115101161011710118101191012010121101221012310124101251012610127101281012910130101311013210133101341013510136101371013810139101401014110142101431014410145101461014710148101491015010151101521015310154101551015610157101581015910160101611016210163101641016510166101671016810169101701017110172101731017410175101761017710178101791018010181101821018310184101851018610187101881018910190101911019210193101941019510196101971019810199102001020110202102031020410205102061020710208102091021010211102121021310214102151021610217102181021910220102211022210223102241022510226102271022810229102301023110232102331023410235102361023710238102391024010241102421024310244102451024610247102481024910250102511025210253102541025510256102571025810259102601026110262102631026410265102661026710268102691027010271102721027310274102751027610277102781027910280102811028210283102841028510286102871028810289102901029110292102931029410295102961029710298102991030010301103021030310304103051030610307103081030910310103111031210313103141031510316103171031810319103201032110322103231032410325103261032710328103291033010331103321033310334103351033610337103381033910340103411034210343103441034510346103471034810349103501035110352103531035410355103561035710358103591036010361103621036310364103651036610367103681036910370103711037210373103741037510376103771037810379103801038110382103831038410385103861038710388103891039010391103921039310394103951039610397103981039910400104011040210403104041040510406104071040810409104101041110412104131041410415104161041710418104191042010421104221042310424104251042610427104281042910430104311043210433104341043510436104371043810439104401044110442104431044410445104461044710448104491045010451104521045310454104551045610457104581045910460104611046210463104641046510466104671046810469104701047110472104731047410475104761047710478104791048010481104821048310484104851048610487104881048910490104911049210493104941049510496104971049810499105001050110502105031050410505105061050710508105091051010511105121051310514105151051610517105181051910520105211052210523105241052510526105271052810529105301053110532105331053410535105361053710538105391054010541105421054310544105451054610547105481054910550105511055210553105541055510556105571055810559105601056110562105631056410565105661056710568105691057010571105721057310574105751057610577105781057910580105811058210583105841058510586105871058810589105901059110592105931059410595105961059710598105991060010601106021060310604106051060610607106081060910610106111061210613106141061510616106171061810619106201062110622106231062410625106261062710628106291063010631106321063310634106351063610637106381063910640106411064210643106441064510646106471064810649106501065110652106531065410655106561065710658106591066010661106621066310664106651066610667106681066910670106711067210673106741067510676106771067810679106801068110682
  1. /*
  2. * ipr.c -- driver for IBM Power Linux RAID adapters
  3. *
  4. * Written By: Brian King <brking@us.ibm.com>, IBM Corporation
  5. *
  6. * Copyright (C) 2003, 2004 IBM Corporation
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License as published by
  10. * the Free Software Foundation; either version 2 of the License, or
  11. * (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  21. *
  22. */
  23. /*
  24. * Notes:
  25. *
  26. * This driver is used to control the following SCSI adapters:
  27. *
  28. * IBM iSeries: 5702, 5703, 2780, 5709, 570A, 570B
  29. *
  30. * IBM pSeries: PCI-X Dual Channel Ultra 320 SCSI RAID Adapter
  31. * PCI-X Dual Channel Ultra 320 SCSI Adapter
  32. * PCI-X Dual Channel Ultra 320 SCSI RAID Enablement Card
  33. * Embedded SCSI adapter on p615 and p655 systems
  34. *
  35. * Supported Hardware Features:
  36. * - Ultra 320 SCSI controller
  37. * - PCI-X host interface
  38. * - Embedded PowerPC RISC Processor and Hardware XOR DMA Engine
  39. * - Non-Volatile Write Cache
  40. * - Supports attachment of non-RAID disks, tape, and optical devices
  41. * - RAID Levels 0, 5, 10
  42. * - Hot spare
  43. * - Background Parity Checking
  44. * - Background Data Scrubbing
  45. * - Ability to increase the capacity of an existing RAID 5 disk array
  46. * by adding disks
  47. *
  48. * Driver Features:
  49. * - Tagged command queuing
  50. * - Adapter microcode download
  51. * - PCI hot plug
  52. * - SCSI device hot plug
  53. *
  54. */
  55. #include <linux/fs.h>
  56. #include <linux/init.h>
  57. #include <linux/types.h>
  58. #include <linux/errno.h>
  59. #include <linux/kernel.h>
  60. #include <linux/slab.h>
  61. #include <linux/vmalloc.h>
  62. #include <linux/ioport.h>
  63. #include <linux/delay.h>
  64. #include <linux/pci.h>
  65. #include <linux/wait.h>
  66. #include <linux/spinlock.h>
  67. #include <linux/sched.h>
  68. #include <linux/interrupt.h>
  69. #include <linux/blkdev.h>
  70. #include <linux/firmware.h>
  71. #include <linux/module.h>
  72. #include <linux/moduleparam.h>
  73. #include <linux/libata.h>
  74. #include <linux/hdreg.h>
  75. #include <linux/reboot.h>
  76. #include <linux/stringify.h>
  77. #include <asm/io.h>
  78. #include <asm/irq.h>
  79. #include <asm/processor.h>
  80. #include <scsi/scsi.h>
  81. #include <scsi/scsi_host.h>
  82. #include <scsi/scsi_tcq.h>
  83. #include <scsi/scsi_eh.h>
  84. #include <scsi/scsi_cmnd.h>
  85. #include "ipr.h"
  86. /*
  87. * Global Data
  88. */
  89. static LIST_HEAD(ipr_ioa_head);
  90. static unsigned int ipr_log_level = IPR_DEFAULT_LOG_LEVEL;
  91. static unsigned int ipr_max_speed = 1;
  92. static int ipr_testmode = 0;
  93. static unsigned int ipr_fastfail = 0;
  94. static unsigned int ipr_transop_timeout = 0;
  95. static unsigned int ipr_debug = 0;
  96. static unsigned int ipr_max_devs = IPR_DEFAULT_SIS64_DEVS;
  97. static unsigned int ipr_dual_ioa_raid = 1;
  98. static unsigned int ipr_number_of_msix = 2;
  99. static unsigned int ipr_fast_reboot;
  100. static DEFINE_SPINLOCK(ipr_driver_lock);
  101. /* This table describes the differences between DMA controller chips */
  102. static const struct ipr_chip_cfg_t ipr_chip_cfg[] = {
  103. { /* Gemstone, Citrine, Obsidian, and Obsidian-E */
  104. .mailbox = 0x0042C,
  105. .max_cmds = 100,
  106. .cache_line_size = 0x20,
  107. .clear_isr = 1,
  108. .iopoll_weight = 0,
  109. {
  110. .set_interrupt_mask_reg = 0x0022C,
  111. .clr_interrupt_mask_reg = 0x00230,
  112. .clr_interrupt_mask_reg32 = 0x00230,
  113. .sense_interrupt_mask_reg = 0x0022C,
  114. .sense_interrupt_mask_reg32 = 0x0022C,
  115. .clr_interrupt_reg = 0x00228,
  116. .clr_interrupt_reg32 = 0x00228,
  117. .sense_interrupt_reg = 0x00224,
  118. .sense_interrupt_reg32 = 0x00224,
  119. .ioarrin_reg = 0x00404,
  120. .sense_uproc_interrupt_reg = 0x00214,
  121. .sense_uproc_interrupt_reg32 = 0x00214,
  122. .set_uproc_interrupt_reg = 0x00214,
  123. .set_uproc_interrupt_reg32 = 0x00214,
  124. .clr_uproc_interrupt_reg = 0x00218,
  125. .clr_uproc_interrupt_reg32 = 0x00218
  126. }
  127. },
  128. { /* Snipe and Scamp */
  129. .mailbox = 0x0052C,
  130. .max_cmds = 100,
  131. .cache_line_size = 0x20,
  132. .clear_isr = 1,
  133. .iopoll_weight = 0,
  134. {
  135. .set_interrupt_mask_reg = 0x00288,
  136. .clr_interrupt_mask_reg = 0x0028C,
  137. .clr_interrupt_mask_reg32 = 0x0028C,
  138. .sense_interrupt_mask_reg = 0x00288,
  139. .sense_interrupt_mask_reg32 = 0x00288,
  140. .clr_interrupt_reg = 0x00284,
  141. .clr_interrupt_reg32 = 0x00284,
  142. .sense_interrupt_reg = 0x00280,
  143. .sense_interrupt_reg32 = 0x00280,
  144. .ioarrin_reg = 0x00504,
  145. .sense_uproc_interrupt_reg = 0x00290,
  146. .sense_uproc_interrupt_reg32 = 0x00290,
  147. .set_uproc_interrupt_reg = 0x00290,
  148. .set_uproc_interrupt_reg32 = 0x00290,
  149. .clr_uproc_interrupt_reg = 0x00294,
  150. .clr_uproc_interrupt_reg32 = 0x00294
  151. }
  152. },
  153. { /* CRoC */
  154. .mailbox = 0x00044,
  155. .max_cmds = 1000,
  156. .cache_line_size = 0x20,
  157. .clear_isr = 0,
  158. .iopoll_weight = 64,
  159. {
  160. .set_interrupt_mask_reg = 0x00010,
  161. .clr_interrupt_mask_reg = 0x00018,
  162. .clr_interrupt_mask_reg32 = 0x0001C,
  163. .sense_interrupt_mask_reg = 0x00010,
  164. .sense_interrupt_mask_reg32 = 0x00014,
  165. .clr_interrupt_reg = 0x00008,
  166. .clr_interrupt_reg32 = 0x0000C,
  167. .sense_interrupt_reg = 0x00000,
  168. .sense_interrupt_reg32 = 0x00004,
  169. .ioarrin_reg = 0x00070,
  170. .sense_uproc_interrupt_reg = 0x00020,
  171. .sense_uproc_interrupt_reg32 = 0x00024,
  172. .set_uproc_interrupt_reg = 0x00020,
  173. .set_uproc_interrupt_reg32 = 0x00024,
  174. .clr_uproc_interrupt_reg = 0x00028,
  175. .clr_uproc_interrupt_reg32 = 0x0002C,
  176. .init_feedback_reg = 0x0005C,
  177. .dump_addr_reg = 0x00064,
  178. .dump_data_reg = 0x00068,
  179. .endian_swap_reg = 0x00084
  180. }
  181. },
  182. };
  183. static const struct ipr_chip_t ipr_chip[] = {
  184. { PCI_VENDOR_ID_MYLEX, PCI_DEVICE_ID_IBM_GEMSTONE, IPR_USE_LSI, IPR_SIS32, IPR_PCI_CFG, &ipr_chip_cfg[0] },
  185. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CITRINE, IPR_USE_LSI, IPR_SIS32, IPR_PCI_CFG, &ipr_chip_cfg[0] },
  186. { PCI_VENDOR_ID_ADAPTEC2, PCI_DEVICE_ID_ADAPTEC2_OBSIDIAN, IPR_USE_LSI, IPR_SIS32, IPR_PCI_CFG, &ipr_chip_cfg[0] },
  187. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_OBSIDIAN, IPR_USE_LSI, IPR_SIS32, IPR_PCI_CFG, &ipr_chip_cfg[0] },
  188. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_OBSIDIAN_E, IPR_USE_MSI, IPR_SIS32, IPR_PCI_CFG, &ipr_chip_cfg[0] },
  189. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_SNIPE, IPR_USE_LSI, IPR_SIS32, IPR_PCI_CFG, &ipr_chip_cfg[1] },
  190. { PCI_VENDOR_ID_ADAPTEC2, PCI_DEVICE_ID_ADAPTEC2_SCAMP, IPR_USE_LSI, IPR_SIS32, IPR_PCI_CFG, &ipr_chip_cfg[1] },
  191. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CROC_FPGA_E2, IPR_USE_MSI, IPR_SIS64, IPR_MMIO, &ipr_chip_cfg[2] },
  192. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CROCODILE, IPR_USE_MSI, IPR_SIS64, IPR_MMIO, &ipr_chip_cfg[2] }
  193. };
  194. static int ipr_max_bus_speeds[] = {
  195. IPR_80MBs_SCSI_RATE, IPR_U160_SCSI_RATE, IPR_U320_SCSI_RATE
  196. };
  197. MODULE_AUTHOR("Brian King <brking@us.ibm.com>");
  198. MODULE_DESCRIPTION("IBM Power RAID SCSI Adapter Driver");
  199. module_param_named(max_speed, ipr_max_speed, uint, 0);
  200. MODULE_PARM_DESC(max_speed, "Maximum bus speed (0-2). Default: 1=U160. Speeds: 0=80 MB/s, 1=U160, 2=U320");
  201. module_param_named(log_level, ipr_log_level, uint, 0);
  202. MODULE_PARM_DESC(log_level, "Set to 0 - 4 for increasing verbosity of device driver");
  203. module_param_named(testmode, ipr_testmode, int, 0);
  204. MODULE_PARM_DESC(testmode, "DANGEROUS!!! Allows unsupported configurations");
  205. module_param_named(fastfail, ipr_fastfail, int, S_IRUGO | S_IWUSR);
  206. MODULE_PARM_DESC(fastfail, "Reduce timeouts and retries");
  207. module_param_named(transop_timeout, ipr_transop_timeout, int, 0);
  208. MODULE_PARM_DESC(transop_timeout, "Time in seconds to wait for adapter to come operational (default: 300)");
  209. module_param_named(debug, ipr_debug, int, S_IRUGO | S_IWUSR);
  210. MODULE_PARM_DESC(debug, "Enable device driver debugging logging. Set to 1 to enable. (default: 0)");
  211. module_param_named(dual_ioa_raid, ipr_dual_ioa_raid, int, 0);
  212. MODULE_PARM_DESC(dual_ioa_raid, "Enable dual adapter RAID support. Set to 1 to enable. (default: 1)");
  213. module_param_named(max_devs, ipr_max_devs, int, 0);
  214. MODULE_PARM_DESC(max_devs, "Specify the maximum number of physical devices. "
  215. "[Default=" __stringify(IPR_DEFAULT_SIS64_DEVS) "]");
  216. module_param_named(number_of_msix, ipr_number_of_msix, int, 0);
  217. MODULE_PARM_DESC(number_of_msix, "Specify the number of MSIX interrupts to use on capable adapters (1 - 16). (default:2)");
  218. module_param_named(fast_reboot, ipr_fast_reboot, int, S_IRUGO | S_IWUSR);
  219. MODULE_PARM_DESC(fast_reboot, "Skip adapter shutdown during reboot. Set to 1 to enable. (default: 0)");
  220. MODULE_LICENSE("GPL");
  221. MODULE_VERSION(IPR_DRIVER_VERSION);
  222. /* A constant array of IOASCs/URCs/Error Messages */
  223. static const
  224. struct ipr_error_table_t ipr_error_table[] = {
  225. {0x00000000, 1, IPR_DEFAULT_LOG_LEVEL,
  226. "8155: An unknown error was received"},
  227. {0x00330000, 0, 0,
  228. "Soft underlength error"},
  229. {0x005A0000, 0, 0,
  230. "Command to be cancelled not found"},
  231. {0x00808000, 0, 0,
  232. "Qualified success"},
  233. {0x01080000, 1, IPR_DEFAULT_LOG_LEVEL,
  234. "FFFE: Soft device bus error recovered by the IOA"},
  235. {0x01088100, 0, IPR_DEFAULT_LOG_LEVEL,
  236. "4101: Soft device bus fabric error"},
  237. {0x01100100, 0, IPR_DEFAULT_LOG_LEVEL,
  238. "FFFC: Logical block guard error recovered by the device"},
  239. {0x01100300, 0, IPR_DEFAULT_LOG_LEVEL,
  240. "FFFC: Logical block reference tag error recovered by the device"},
  241. {0x01108300, 0, IPR_DEFAULT_LOG_LEVEL,
  242. "4171: Recovered scatter list tag / sequence number error"},
  243. {0x01109000, 0, IPR_DEFAULT_LOG_LEVEL,
  244. "FF3D: Recovered logical block CRC error on IOA to Host transfer"},
  245. {0x01109200, 0, IPR_DEFAULT_LOG_LEVEL,
  246. "4171: Recovered logical block sequence number error on IOA to Host transfer"},
  247. {0x0110A000, 0, IPR_DEFAULT_LOG_LEVEL,
  248. "FFFD: Recovered logical block reference tag error detected by the IOA"},
  249. {0x0110A100, 0, IPR_DEFAULT_LOG_LEVEL,
  250. "FFFD: Logical block guard error recovered by the IOA"},
  251. {0x01170600, 0, IPR_DEFAULT_LOG_LEVEL,
  252. "FFF9: Device sector reassign successful"},
  253. {0x01170900, 0, IPR_DEFAULT_LOG_LEVEL,
  254. "FFF7: Media error recovered by device rewrite procedures"},
  255. {0x01180200, 0, IPR_DEFAULT_LOG_LEVEL,
  256. "7001: IOA sector reassignment successful"},
  257. {0x01180500, 0, IPR_DEFAULT_LOG_LEVEL,
  258. "FFF9: Soft media error. Sector reassignment recommended"},
  259. {0x01180600, 0, IPR_DEFAULT_LOG_LEVEL,
  260. "FFF7: Media error recovered by IOA rewrite procedures"},
  261. {0x01418000, 0, IPR_DEFAULT_LOG_LEVEL,
  262. "FF3D: Soft PCI bus error recovered by the IOA"},
  263. {0x01440000, 1, IPR_DEFAULT_LOG_LEVEL,
  264. "FFF6: Device hardware error recovered by the IOA"},
  265. {0x01448100, 0, IPR_DEFAULT_LOG_LEVEL,
  266. "FFF6: Device hardware error recovered by the device"},
  267. {0x01448200, 1, IPR_DEFAULT_LOG_LEVEL,
  268. "FF3D: Soft IOA error recovered by the IOA"},
  269. {0x01448300, 0, IPR_DEFAULT_LOG_LEVEL,
  270. "FFFA: Undefined device response recovered by the IOA"},
  271. {0x014A0000, 1, IPR_DEFAULT_LOG_LEVEL,
  272. "FFF6: Device bus error, message or command phase"},
  273. {0x014A8000, 0, IPR_DEFAULT_LOG_LEVEL,
  274. "FFFE: Task Management Function failed"},
  275. {0x015D0000, 0, IPR_DEFAULT_LOG_LEVEL,
  276. "FFF6: Failure prediction threshold exceeded"},
  277. {0x015D9200, 0, IPR_DEFAULT_LOG_LEVEL,
  278. "8009: Impending cache battery pack failure"},
  279. {0x02040100, 0, 0,
  280. "Logical Unit in process of becoming ready"},
  281. {0x02040200, 0, 0,
  282. "Initializing command required"},
  283. {0x02040400, 0, 0,
  284. "34FF: Disk device format in progress"},
  285. {0x02040C00, 0, 0,
  286. "Logical unit not accessible, target port in unavailable state"},
  287. {0x02048000, 0, IPR_DEFAULT_LOG_LEVEL,
  288. "9070: IOA requested reset"},
  289. {0x023F0000, 0, 0,
  290. "Synchronization required"},
  291. {0x02408500, 0, 0,
  292. "IOA microcode download required"},
  293. {0x02408600, 0, 0,
  294. "Device bus connection is prohibited by host"},
  295. {0x024E0000, 0, 0,
  296. "No ready, IOA shutdown"},
  297. {0x025A0000, 0, 0,
  298. "Not ready, IOA has been shutdown"},
  299. {0x02670100, 0, IPR_DEFAULT_LOG_LEVEL,
  300. "3020: Storage subsystem configuration error"},
  301. {0x03110B00, 0, 0,
  302. "FFF5: Medium error, data unreadable, recommend reassign"},
  303. {0x03110C00, 0, 0,
  304. "7000: Medium error, data unreadable, do not reassign"},
  305. {0x03310000, 0, IPR_DEFAULT_LOG_LEVEL,
  306. "FFF3: Disk media format bad"},
  307. {0x04050000, 0, IPR_DEFAULT_LOG_LEVEL,
  308. "3002: Addressed device failed to respond to selection"},
  309. {0x04080000, 1, IPR_DEFAULT_LOG_LEVEL,
  310. "3100: Device bus error"},
  311. {0x04080100, 0, IPR_DEFAULT_LOG_LEVEL,
  312. "3109: IOA timed out a device command"},
  313. {0x04088000, 0, 0,
  314. "3120: SCSI bus is not operational"},
  315. {0x04088100, 0, IPR_DEFAULT_LOG_LEVEL,
  316. "4100: Hard device bus fabric error"},
  317. {0x04100100, 0, IPR_DEFAULT_LOG_LEVEL,
  318. "310C: Logical block guard error detected by the device"},
  319. {0x04100300, 0, IPR_DEFAULT_LOG_LEVEL,
  320. "310C: Logical block reference tag error detected by the device"},
  321. {0x04108300, 1, IPR_DEFAULT_LOG_LEVEL,
  322. "4170: Scatter list tag / sequence number error"},
  323. {0x04109000, 1, IPR_DEFAULT_LOG_LEVEL,
  324. "8150: Logical block CRC error on IOA to Host transfer"},
  325. {0x04109200, 1, IPR_DEFAULT_LOG_LEVEL,
  326. "4170: Logical block sequence number error on IOA to Host transfer"},
  327. {0x0410A000, 0, IPR_DEFAULT_LOG_LEVEL,
  328. "310D: Logical block reference tag error detected by the IOA"},
  329. {0x0410A100, 0, IPR_DEFAULT_LOG_LEVEL,
  330. "310D: Logical block guard error detected by the IOA"},
  331. {0x04118000, 0, IPR_DEFAULT_LOG_LEVEL,
  332. "9000: IOA reserved area data check"},
  333. {0x04118100, 0, IPR_DEFAULT_LOG_LEVEL,
  334. "9001: IOA reserved area invalid data pattern"},
  335. {0x04118200, 0, IPR_DEFAULT_LOG_LEVEL,
  336. "9002: IOA reserved area LRC error"},
  337. {0x04118300, 1, IPR_DEFAULT_LOG_LEVEL,
  338. "Hardware Error, IOA metadata access error"},
  339. {0x04320000, 0, IPR_DEFAULT_LOG_LEVEL,
  340. "102E: Out of alternate sectors for disk storage"},
  341. {0x04330000, 1, IPR_DEFAULT_LOG_LEVEL,
  342. "FFF4: Data transfer underlength error"},
  343. {0x04338000, 1, IPR_DEFAULT_LOG_LEVEL,
  344. "FFF4: Data transfer overlength error"},
  345. {0x043E0100, 0, IPR_DEFAULT_LOG_LEVEL,
  346. "3400: Logical unit failure"},
  347. {0x04408500, 0, IPR_DEFAULT_LOG_LEVEL,
  348. "FFF4: Device microcode is corrupt"},
  349. {0x04418000, 1, IPR_DEFAULT_LOG_LEVEL,
  350. "8150: PCI bus error"},
  351. {0x04430000, 1, 0,
  352. "Unsupported device bus message received"},
  353. {0x04440000, 1, IPR_DEFAULT_LOG_LEVEL,
  354. "FFF4: Disk device problem"},
  355. {0x04448200, 1, IPR_DEFAULT_LOG_LEVEL,
  356. "8150: Permanent IOA failure"},
  357. {0x04448300, 0, IPR_DEFAULT_LOG_LEVEL,
  358. "3010: Disk device returned wrong response to IOA"},
  359. {0x04448400, 0, IPR_DEFAULT_LOG_LEVEL,
  360. "8151: IOA microcode error"},
  361. {0x04448500, 0, 0,
  362. "Device bus status error"},
  363. {0x04448600, 0, IPR_DEFAULT_LOG_LEVEL,
  364. "8157: IOA error requiring IOA reset to recover"},
  365. {0x04448700, 0, 0,
  366. "ATA device status error"},
  367. {0x04490000, 0, 0,
  368. "Message reject received from the device"},
  369. {0x04449200, 0, IPR_DEFAULT_LOG_LEVEL,
  370. "8008: A permanent cache battery pack failure occurred"},
  371. {0x0444A000, 0, IPR_DEFAULT_LOG_LEVEL,
  372. "9090: Disk unit has been modified after the last known status"},
  373. {0x0444A200, 0, IPR_DEFAULT_LOG_LEVEL,
  374. "9081: IOA detected device error"},
  375. {0x0444A300, 0, IPR_DEFAULT_LOG_LEVEL,
  376. "9082: IOA detected device error"},
  377. {0x044A0000, 1, IPR_DEFAULT_LOG_LEVEL,
  378. "3110: Device bus error, message or command phase"},
  379. {0x044A8000, 1, IPR_DEFAULT_LOG_LEVEL,
  380. "3110: SAS Command / Task Management Function failed"},
  381. {0x04670400, 0, IPR_DEFAULT_LOG_LEVEL,
  382. "9091: Incorrect hardware configuration change has been detected"},
  383. {0x04678000, 0, IPR_DEFAULT_LOG_LEVEL,
  384. "9073: Invalid multi-adapter configuration"},
  385. {0x04678100, 0, IPR_DEFAULT_LOG_LEVEL,
  386. "4010: Incorrect connection between cascaded expanders"},
  387. {0x04678200, 0, IPR_DEFAULT_LOG_LEVEL,
  388. "4020: Connections exceed IOA design limits"},
  389. {0x04678300, 0, IPR_DEFAULT_LOG_LEVEL,
  390. "4030: Incorrect multipath connection"},
  391. {0x04679000, 0, IPR_DEFAULT_LOG_LEVEL,
  392. "4110: Unsupported enclosure function"},
  393. {0x04679800, 0, IPR_DEFAULT_LOG_LEVEL,
  394. "4120: SAS cable VPD cannot be read"},
  395. {0x046E0000, 0, IPR_DEFAULT_LOG_LEVEL,
  396. "FFF4: Command to logical unit failed"},
  397. {0x05240000, 1, 0,
  398. "Illegal request, invalid request type or request packet"},
  399. {0x05250000, 0, 0,
  400. "Illegal request, invalid resource handle"},
  401. {0x05258000, 0, 0,
  402. "Illegal request, commands not allowed to this device"},
  403. {0x05258100, 0, 0,
  404. "Illegal request, command not allowed to a secondary adapter"},
  405. {0x05258200, 0, 0,
  406. "Illegal request, command not allowed to a non-optimized resource"},
  407. {0x05260000, 0, 0,
  408. "Illegal request, invalid field in parameter list"},
  409. {0x05260100, 0, 0,
  410. "Illegal request, parameter not supported"},
  411. {0x05260200, 0, 0,
  412. "Illegal request, parameter value invalid"},
  413. {0x052C0000, 0, 0,
  414. "Illegal request, command sequence error"},
  415. {0x052C8000, 1, 0,
  416. "Illegal request, dual adapter support not enabled"},
  417. {0x052C8100, 1, 0,
  418. "Illegal request, another cable connector was physically disabled"},
  419. {0x054E8000, 1, 0,
  420. "Illegal request, inconsistent group id/group count"},
  421. {0x06040500, 0, IPR_DEFAULT_LOG_LEVEL,
  422. "9031: Array protection temporarily suspended, protection resuming"},
  423. {0x06040600, 0, IPR_DEFAULT_LOG_LEVEL,
  424. "9040: Array protection temporarily suspended, protection resuming"},
  425. {0x060B0100, 0, IPR_DEFAULT_LOG_LEVEL,
  426. "4080: IOA exceeded maximum operating temperature"},
  427. {0x060B8000, 0, IPR_DEFAULT_LOG_LEVEL,
  428. "4085: Service required"},
  429. {0x06288000, 0, IPR_DEFAULT_LOG_LEVEL,
  430. "3140: Device bus not ready to ready transition"},
  431. {0x06290000, 0, IPR_DEFAULT_LOG_LEVEL,
  432. "FFFB: SCSI bus was reset"},
  433. {0x06290500, 0, 0,
  434. "FFFE: SCSI bus transition to single ended"},
  435. {0x06290600, 0, 0,
  436. "FFFE: SCSI bus transition to LVD"},
  437. {0x06298000, 0, IPR_DEFAULT_LOG_LEVEL,
  438. "FFFB: SCSI bus was reset by another initiator"},
  439. {0x063F0300, 0, IPR_DEFAULT_LOG_LEVEL,
  440. "3029: A device replacement has occurred"},
  441. {0x063F8300, 0, IPR_DEFAULT_LOG_LEVEL,
  442. "4102: Device bus fabric performance degradation"},
  443. {0x064C8000, 0, IPR_DEFAULT_LOG_LEVEL,
  444. "9051: IOA cache data exists for a missing or failed device"},
  445. {0x064C8100, 0, IPR_DEFAULT_LOG_LEVEL,
  446. "9055: Auxiliary cache IOA contains cache data needed by the primary IOA"},
  447. {0x06670100, 0, IPR_DEFAULT_LOG_LEVEL,
  448. "9025: Disk unit is not supported at its physical location"},
  449. {0x06670600, 0, IPR_DEFAULT_LOG_LEVEL,
  450. "3020: IOA detected a SCSI bus configuration error"},
  451. {0x06678000, 0, IPR_DEFAULT_LOG_LEVEL,
  452. "3150: SCSI bus configuration error"},
  453. {0x06678100, 0, IPR_DEFAULT_LOG_LEVEL,
  454. "9074: Asymmetric advanced function disk configuration"},
  455. {0x06678300, 0, IPR_DEFAULT_LOG_LEVEL,
  456. "4040: Incomplete multipath connection between IOA and enclosure"},
  457. {0x06678400, 0, IPR_DEFAULT_LOG_LEVEL,
  458. "4041: Incomplete multipath connection between enclosure and device"},
  459. {0x06678500, 0, IPR_DEFAULT_LOG_LEVEL,
  460. "9075: Incomplete multipath connection between IOA and remote IOA"},
  461. {0x06678600, 0, IPR_DEFAULT_LOG_LEVEL,
  462. "9076: Configuration error, missing remote IOA"},
  463. {0x06679100, 0, IPR_DEFAULT_LOG_LEVEL,
  464. "4050: Enclosure does not support a required multipath function"},
  465. {0x06679800, 0, IPR_DEFAULT_LOG_LEVEL,
  466. "4121: Configuration error, required cable is missing"},
  467. {0x06679900, 0, IPR_DEFAULT_LOG_LEVEL,
  468. "4122: Cable is not plugged into the correct location on remote IOA"},
  469. {0x06679A00, 0, IPR_DEFAULT_LOG_LEVEL,
  470. "4123: Configuration error, invalid cable vital product data"},
  471. {0x06679B00, 0, IPR_DEFAULT_LOG_LEVEL,
  472. "4124: Configuration error, both cable ends are plugged into the same IOA"},
  473. {0x06690000, 0, IPR_DEFAULT_LOG_LEVEL,
  474. "4070: Logically bad block written on device"},
  475. {0x06690200, 0, IPR_DEFAULT_LOG_LEVEL,
  476. "9041: Array protection temporarily suspended"},
  477. {0x06698200, 0, IPR_DEFAULT_LOG_LEVEL,
  478. "9042: Corrupt array parity detected on specified device"},
  479. {0x066B0200, 0, IPR_DEFAULT_LOG_LEVEL,
  480. "9030: Array no longer protected due to missing or failed disk unit"},
  481. {0x066B8000, 0, IPR_DEFAULT_LOG_LEVEL,
  482. "9071: Link operational transition"},
  483. {0x066B8100, 0, IPR_DEFAULT_LOG_LEVEL,
  484. "9072: Link not operational transition"},
  485. {0x066B8200, 0, IPR_DEFAULT_LOG_LEVEL,
  486. "9032: Array exposed but still protected"},
  487. {0x066B8300, 0, IPR_DEFAULT_LOG_LEVEL + 1,
  488. "70DD: Device forced failed by disrupt device command"},
  489. {0x066B9100, 0, IPR_DEFAULT_LOG_LEVEL,
  490. "4061: Multipath redundancy level got better"},
  491. {0x066B9200, 0, IPR_DEFAULT_LOG_LEVEL,
  492. "4060: Multipath redundancy level got worse"},
  493. {0x06808100, 0, IPR_DEFAULT_LOG_LEVEL,
  494. "9083: Device raw mode enabled"},
  495. {0x06808200, 0, IPR_DEFAULT_LOG_LEVEL,
  496. "9084: Device raw mode disabled"},
  497. {0x07270000, 0, 0,
  498. "Failure due to other device"},
  499. {0x07278000, 0, IPR_DEFAULT_LOG_LEVEL,
  500. "9008: IOA does not support functions expected by devices"},
  501. {0x07278100, 0, IPR_DEFAULT_LOG_LEVEL,
  502. "9010: Cache data associated with attached devices cannot be found"},
  503. {0x07278200, 0, IPR_DEFAULT_LOG_LEVEL,
  504. "9011: Cache data belongs to devices other than those attached"},
  505. {0x07278400, 0, IPR_DEFAULT_LOG_LEVEL,
  506. "9020: Array missing 2 or more devices with only 1 device present"},
  507. {0x07278500, 0, IPR_DEFAULT_LOG_LEVEL,
  508. "9021: Array missing 2 or more devices with 2 or more devices present"},
  509. {0x07278600, 0, IPR_DEFAULT_LOG_LEVEL,
  510. "9022: Exposed array is missing a required device"},
  511. {0x07278700, 0, IPR_DEFAULT_LOG_LEVEL,
  512. "9023: Array member(s) not at required physical locations"},
  513. {0x07278800, 0, IPR_DEFAULT_LOG_LEVEL,
  514. "9024: Array not functional due to present hardware configuration"},
  515. {0x07278900, 0, IPR_DEFAULT_LOG_LEVEL,
  516. "9026: Array not functional due to present hardware configuration"},
  517. {0x07278A00, 0, IPR_DEFAULT_LOG_LEVEL,
  518. "9027: Array is missing a device and parity is out of sync"},
  519. {0x07278B00, 0, IPR_DEFAULT_LOG_LEVEL,
  520. "9028: Maximum number of arrays already exist"},
  521. {0x07278C00, 0, IPR_DEFAULT_LOG_LEVEL,
  522. "9050: Required cache data cannot be located for a disk unit"},
  523. {0x07278D00, 0, IPR_DEFAULT_LOG_LEVEL,
  524. "9052: Cache data exists for a device that has been modified"},
  525. {0x07278F00, 0, IPR_DEFAULT_LOG_LEVEL,
  526. "9054: IOA resources not available due to previous problems"},
  527. {0x07279100, 0, IPR_DEFAULT_LOG_LEVEL,
  528. "9092: Disk unit requires initialization before use"},
  529. {0x07279200, 0, IPR_DEFAULT_LOG_LEVEL,
  530. "9029: Incorrect hardware configuration change has been detected"},
  531. {0x07279600, 0, IPR_DEFAULT_LOG_LEVEL,
  532. "9060: One or more disk pairs are missing from an array"},
  533. {0x07279700, 0, IPR_DEFAULT_LOG_LEVEL,
  534. "9061: One or more disks are missing from an array"},
  535. {0x07279800, 0, IPR_DEFAULT_LOG_LEVEL,
  536. "9062: One or more disks are missing from an array"},
  537. {0x07279900, 0, IPR_DEFAULT_LOG_LEVEL,
  538. "9063: Maximum number of functional arrays has been exceeded"},
  539. {0x07279A00, 0, 0,
  540. "Data protect, other volume set problem"},
  541. {0x0B260000, 0, 0,
  542. "Aborted command, invalid descriptor"},
  543. {0x0B3F9000, 0, 0,
  544. "Target operating conditions have changed, dual adapter takeover"},
  545. {0x0B530200, 0, 0,
  546. "Aborted command, medium removal prevented"},
  547. {0x0B5A0000, 0, 0,
  548. "Command terminated by host"},
  549. {0x0B5B8000, 0, 0,
  550. "Aborted command, command terminated by host"}
  551. };
  552. static const struct ipr_ses_table_entry ipr_ses_table[] = {
  553. { "2104-DL1 ", "XXXXXXXXXXXXXXXX", 80 },
  554. { "2104-TL1 ", "XXXXXXXXXXXXXXXX", 80 },
  555. { "HSBP07M P U2SCSI", "XXXXXXXXXXXXXXXX", 80 }, /* Hidive 7 slot */
  556. { "HSBP05M P U2SCSI", "XXXXXXXXXXXXXXXX", 80 }, /* Hidive 5 slot */
  557. { "HSBP05M S U2SCSI", "XXXXXXXXXXXXXXXX", 80 }, /* Bowtie */
  558. { "HSBP06E ASU2SCSI", "XXXXXXXXXXXXXXXX", 80 }, /* MartinFenning */
  559. { "2104-DU3 ", "XXXXXXXXXXXXXXXX", 160 },
  560. { "2104-TU3 ", "XXXXXXXXXXXXXXXX", 160 },
  561. { "HSBP04C RSU2SCSI", "XXXXXXX*XXXXXXXX", 160 },
  562. { "HSBP06E RSU2SCSI", "XXXXXXX*XXXXXXXX", 160 },
  563. { "St V1S2 ", "XXXXXXXXXXXXXXXX", 160 },
  564. { "HSBPD4M PU3SCSI", "XXXXXXX*XXXXXXXX", 160 },
  565. { "VSBPD1H U3SCSI", "XXXXXXX*XXXXXXXX", 160 }
  566. };
  567. /*
  568. * Function Prototypes
  569. */
  570. static int ipr_reset_alert(struct ipr_cmnd *);
  571. static void ipr_process_ccn(struct ipr_cmnd *);
  572. static void ipr_process_error(struct ipr_cmnd *);
  573. static void ipr_reset_ioa_job(struct ipr_cmnd *);
  574. static void ipr_initiate_ioa_reset(struct ipr_ioa_cfg *,
  575. enum ipr_shutdown_type);
  576. #ifdef CONFIG_SCSI_IPR_TRACE
  577. /**
  578. * ipr_trc_hook - Add a trace entry to the driver trace
  579. * @ipr_cmd: ipr command struct
  580. * @type: trace type
  581. * @add_data: additional data
  582. *
  583. * Return value:
  584. * none
  585. **/
  586. static void ipr_trc_hook(struct ipr_cmnd *ipr_cmd,
  587. u8 type, u32 add_data)
  588. {
  589. struct ipr_trace_entry *trace_entry;
  590. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  591. unsigned int trace_index;
  592. trace_index = atomic_add_return(1, &ioa_cfg->trace_index) & IPR_TRACE_INDEX_MASK;
  593. trace_entry = &ioa_cfg->trace[trace_index];
  594. trace_entry->time = jiffies;
  595. trace_entry->op_code = ipr_cmd->ioarcb.cmd_pkt.cdb[0];
  596. trace_entry->type = type;
  597. if (ipr_cmd->ioa_cfg->sis64)
  598. trace_entry->ata_op_code = ipr_cmd->i.ata_ioadl.regs.command;
  599. else
  600. trace_entry->ata_op_code = ipr_cmd->ioarcb.u.add_data.u.regs.command;
  601. trace_entry->cmd_index = ipr_cmd->cmd_index & 0xff;
  602. trace_entry->res_handle = ipr_cmd->ioarcb.res_handle;
  603. trace_entry->u.add_data = add_data;
  604. wmb();
  605. }
  606. #else
  607. #define ipr_trc_hook(ipr_cmd, type, add_data) do { } while (0)
  608. #endif
  609. /**
  610. * ipr_lock_and_done - Acquire lock and complete command
  611. * @ipr_cmd: ipr command struct
  612. *
  613. * Return value:
  614. * none
  615. **/
  616. static void ipr_lock_and_done(struct ipr_cmnd *ipr_cmd)
  617. {
  618. unsigned long lock_flags;
  619. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  620. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  621. ipr_cmd->done(ipr_cmd);
  622. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  623. }
  624. /**
  625. * ipr_reinit_ipr_cmnd - Re-initialize an IPR Cmnd block for reuse
  626. * @ipr_cmd: ipr command struct
  627. *
  628. * Return value:
  629. * none
  630. **/
  631. static void ipr_reinit_ipr_cmnd(struct ipr_cmnd *ipr_cmd)
  632. {
  633. struct ipr_ioarcb *ioarcb = &ipr_cmd->ioarcb;
  634. struct ipr_ioasa *ioasa = &ipr_cmd->s.ioasa;
  635. struct ipr_ioasa64 *ioasa64 = &ipr_cmd->s.ioasa64;
  636. dma_addr_t dma_addr = ipr_cmd->dma_addr;
  637. int hrrq_id;
  638. hrrq_id = ioarcb->cmd_pkt.hrrq_id;
  639. memset(&ioarcb->cmd_pkt, 0, sizeof(struct ipr_cmd_pkt));
  640. ioarcb->cmd_pkt.hrrq_id = hrrq_id;
  641. ioarcb->data_transfer_length = 0;
  642. ioarcb->read_data_transfer_length = 0;
  643. ioarcb->ioadl_len = 0;
  644. ioarcb->read_ioadl_len = 0;
  645. if (ipr_cmd->ioa_cfg->sis64) {
  646. ioarcb->u.sis64_addr_data.data_ioadl_addr =
  647. cpu_to_be64(dma_addr + offsetof(struct ipr_cmnd, i.ioadl64));
  648. ioasa64->u.gata.status = 0;
  649. } else {
  650. ioarcb->write_ioadl_addr =
  651. cpu_to_be32(dma_addr + offsetof(struct ipr_cmnd, i.ioadl));
  652. ioarcb->read_ioadl_addr = ioarcb->write_ioadl_addr;
  653. ioasa->u.gata.status = 0;
  654. }
  655. ioasa->hdr.ioasc = 0;
  656. ioasa->hdr.residual_data_len = 0;
  657. ipr_cmd->scsi_cmd = NULL;
  658. ipr_cmd->qc = NULL;
  659. ipr_cmd->sense_buffer[0] = 0;
  660. ipr_cmd->dma_use_sg = 0;
  661. }
  662. /**
  663. * ipr_init_ipr_cmnd - Initialize an IPR Cmnd block
  664. * @ipr_cmd: ipr command struct
  665. *
  666. * Return value:
  667. * none
  668. **/
  669. static void ipr_init_ipr_cmnd(struct ipr_cmnd *ipr_cmd,
  670. void (*fast_done) (struct ipr_cmnd *))
  671. {
  672. ipr_reinit_ipr_cmnd(ipr_cmd);
  673. ipr_cmd->u.scratch = 0;
  674. ipr_cmd->sibling = NULL;
  675. ipr_cmd->eh_comp = NULL;
  676. ipr_cmd->fast_done = fast_done;
  677. init_timer(&ipr_cmd->timer);
  678. }
  679. /**
  680. * __ipr_get_free_ipr_cmnd - Get a free IPR Cmnd block
  681. * @ioa_cfg: ioa config struct
  682. *
  683. * Return value:
  684. * pointer to ipr command struct
  685. **/
  686. static
  687. struct ipr_cmnd *__ipr_get_free_ipr_cmnd(struct ipr_hrr_queue *hrrq)
  688. {
  689. struct ipr_cmnd *ipr_cmd = NULL;
  690. if (likely(!list_empty(&hrrq->hrrq_free_q))) {
  691. ipr_cmd = list_entry(hrrq->hrrq_free_q.next,
  692. struct ipr_cmnd, queue);
  693. list_del(&ipr_cmd->queue);
  694. }
  695. return ipr_cmd;
  696. }
  697. /**
  698. * ipr_get_free_ipr_cmnd - Get a free IPR Cmnd block and initialize it
  699. * @ioa_cfg: ioa config struct
  700. *
  701. * Return value:
  702. * pointer to ipr command struct
  703. **/
  704. static
  705. struct ipr_cmnd *ipr_get_free_ipr_cmnd(struct ipr_ioa_cfg *ioa_cfg)
  706. {
  707. struct ipr_cmnd *ipr_cmd =
  708. __ipr_get_free_ipr_cmnd(&ioa_cfg->hrrq[IPR_INIT_HRRQ]);
  709. ipr_init_ipr_cmnd(ipr_cmd, ipr_lock_and_done);
  710. return ipr_cmd;
  711. }
  712. /**
  713. * ipr_mask_and_clear_interrupts - Mask all and clear specified interrupts
  714. * @ioa_cfg: ioa config struct
  715. * @clr_ints: interrupts to clear
  716. *
  717. * This function masks all interrupts on the adapter, then clears the
  718. * interrupts specified in the mask
  719. *
  720. * Return value:
  721. * none
  722. **/
  723. static void ipr_mask_and_clear_interrupts(struct ipr_ioa_cfg *ioa_cfg,
  724. u32 clr_ints)
  725. {
  726. volatile u32 int_reg;
  727. int i;
  728. /* Stop new interrupts */
  729. for (i = 0; i < ioa_cfg->hrrq_num; i++) {
  730. spin_lock(&ioa_cfg->hrrq[i]._lock);
  731. ioa_cfg->hrrq[i].allow_interrupts = 0;
  732. spin_unlock(&ioa_cfg->hrrq[i]._lock);
  733. }
  734. wmb();
  735. /* Set interrupt mask to stop all new interrupts */
  736. if (ioa_cfg->sis64)
  737. writeq(~0, ioa_cfg->regs.set_interrupt_mask_reg);
  738. else
  739. writel(~0, ioa_cfg->regs.set_interrupt_mask_reg);
  740. /* Clear any pending interrupts */
  741. if (ioa_cfg->sis64)
  742. writel(~0, ioa_cfg->regs.clr_interrupt_reg);
  743. writel(clr_ints, ioa_cfg->regs.clr_interrupt_reg32);
  744. int_reg = readl(ioa_cfg->regs.sense_interrupt_reg);
  745. }
  746. /**
  747. * ipr_save_pcix_cmd_reg - Save PCI-X command register
  748. * @ioa_cfg: ioa config struct
  749. *
  750. * Return value:
  751. * 0 on success / -EIO on failure
  752. **/
  753. static int ipr_save_pcix_cmd_reg(struct ipr_ioa_cfg *ioa_cfg)
  754. {
  755. int pcix_cmd_reg = pci_find_capability(ioa_cfg->pdev, PCI_CAP_ID_PCIX);
  756. if (pcix_cmd_reg == 0)
  757. return 0;
  758. if (pci_read_config_word(ioa_cfg->pdev, pcix_cmd_reg + PCI_X_CMD,
  759. &ioa_cfg->saved_pcix_cmd_reg) != PCIBIOS_SUCCESSFUL) {
  760. dev_err(&ioa_cfg->pdev->dev, "Failed to save PCI-X command register\n");
  761. return -EIO;
  762. }
  763. ioa_cfg->saved_pcix_cmd_reg |= PCI_X_CMD_DPERR_E | PCI_X_CMD_ERO;
  764. return 0;
  765. }
  766. /**
  767. * ipr_set_pcix_cmd_reg - Setup PCI-X command register
  768. * @ioa_cfg: ioa config struct
  769. *
  770. * Return value:
  771. * 0 on success / -EIO on failure
  772. **/
  773. static int ipr_set_pcix_cmd_reg(struct ipr_ioa_cfg *ioa_cfg)
  774. {
  775. int pcix_cmd_reg = pci_find_capability(ioa_cfg->pdev, PCI_CAP_ID_PCIX);
  776. if (pcix_cmd_reg) {
  777. if (pci_write_config_word(ioa_cfg->pdev, pcix_cmd_reg + PCI_X_CMD,
  778. ioa_cfg->saved_pcix_cmd_reg) != PCIBIOS_SUCCESSFUL) {
  779. dev_err(&ioa_cfg->pdev->dev, "Failed to setup PCI-X command register\n");
  780. return -EIO;
  781. }
  782. }
  783. return 0;
  784. }
  785. /**
  786. * ipr_sata_eh_done - done function for aborted SATA commands
  787. * @ipr_cmd: ipr command struct
  788. *
  789. * This function is invoked for ops generated to SATA
  790. * devices which are being aborted.
  791. *
  792. * Return value:
  793. * none
  794. **/
  795. static void ipr_sata_eh_done(struct ipr_cmnd *ipr_cmd)
  796. {
  797. struct ata_queued_cmd *qc = ipr_cmd->qc;
  798. struct ipr_sata_port *sata_port = qc->ap->private_data;
  799. qc->err_mask |= AC_ERR_OTHER;
  800. sata_port->ioasa.status |= ATA_BUSY;
  801. ata_qc_complete(qc);
  802. if (ipr_cmd->eh_comp)
  803. complete(ipr_cmd->eh_comp);
  804. list_add_tail(&ipr_cmd->queue, &ipr_cmd->hrrq->hrrq_free_q);
  805. }
  806. /**
  807. * ipr_scsi_eh_done - mid-layer done function for aborted ops
  808. * @ipr_cmd: ipr command struct
  809. *
  810. * This function is invoked by the interrupt handler for
  811. * ops generated by the SCSI mid-layer which are being aborted.
  812. *
  813. * Return value:
  814. * none
  815. **/
  816. static void ipr_scsi_eh_done(struct ipr_cmnd *ipr_cmd)
  817. {
  818. struct scsi_cmnd *scsi_cmd = ipr_cmd->scsi_cmd;
  819. scsi_cmd->result |= (DID_ERROR << 16);
  820. scsi_dma_unmap(ipr_cmd->scsi_cmd);
  821. scsi_cmd->scsi_done(scsi_cmd);
  822. if (ipr_cmd->eh_comp)
  823. complete(ipr_cmd->eh_comp);
  824. list_add_tail(&ipr_cmd->queue, &ipr_cmd->hrrq->hrrq_free_q);
  825. }
  826. /**
  827. * ipr_fail_all_ops - Fails all outstanding ops.
  828. * @ioa_cfg: ioa config struct
  829. *
  830. * This function fails all outstanding ops.
  831. *
  832. * Return value:
  833. * none
  834. **/
  835. static void ipr_fail_all_ops(struct ipr_ioa_cfg *ioa_cfg)
  836. {
  837. struct ipr_cmnd *ipr_cmd, *temp;
  838. struct ipr_hrr_queue *hrrq;
  839. ENTER;
  840. for_each_hrrq(hrrq, ioa_cfg) {
  841. spin_lock(&hrrq->_lock);
  842. list_for_each_entry_safe(ipr_cmd,
  843. temp, &hrrq->hrrq_pending_q, queue) {
  844. list_del(&ipr_cmd->queue);
  845. ipr_cmd->s.ioasa.hdr.ioasc =
  846. cpu_to_be32(IPR_IOASC_IOA_WAS_RESET);
  847. ipr_cmd->s.ioasa.hdr.ilid =
  848. cpu_to_be32(IPR_DRIVER_ILID);
  849. if (ipr_cmd->scsi_cmd)
  850. ipr_cmd->done = ipr_scsi_eh_done;
  851. else if (ipr_cmd->qc)
  852. ipr_cmd->done = ipr_sata_eh_done;
  853. ipr_trc_hook(ipr_cmd, IPR_TRACE_FINISH,
  854. IPR_IOASC_IOA_WAS_RESET);
  855. del_timer(&ipr_cmd->timer);
  856. ipr_cmd->done(ipr_cmd);
  857. }
  858. spin_unlock(&hrrq->_lock);
  859. }
  860. LEAVE;
  861. }
  862. /**
  863. * ipr_send_command - Send driver initiated requests.
  864. * @ipr_cmd: ipr command struct
  865. *
  866. * This function sends a command to the adapter using the correct write call.
  867. * In the case of sis64, calculate the ioarcb size required. Then or in the
  868. * appropriate bits.
  869. *
  870. * Return value:
  871. * none
  872. **/
  873. static void ipr_send_command(struct ipr_cmnd *ipr_cmd)
  874. {
  875. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  876. dma_addr_t send_dma_addr = ipr_cmd->dma_addr;
  877. if (ioa_cfg->sis64) {
  878. /* The default size is 256 bytes */
  879. send_dma_addr |= 0x1;
  880. /* If the number of ioadls * size of ioadl > 128 bytes,
  881. then use a 512 byte ioarcb */
  882. if (ipr_cmd->dma_use_sg * sizeof(struct ipr_ioadl64_desc) > 128 )
  883. send_dma_addr |= 0x4;
  884. writeq(send_dma_addr, ioa_cfg->regs.ioarrin_reg);
  885. } else
  886. writel(send_dma_addr, ioa_cfg->regs.ioarrin_reg);
  887. }
  888. /**
  889. * ipr_do_req - Send driver initiated requests.
  890. * @ipr_cmd: ipr command struct
  891. * @done: done function
  892. * @timeout_func: timeout function
  893. * @timeout: timeout value
  894. *
  895. * This function sends the specified command to the adapter with the
  896. * timeout given. The done function is invoked on command completion.
  897. *
  898. * Return value:
  899. * none
  900. **/
  901. static void ipr_do_req(struct ipr_cmnd *ipr_cmd,
  902. void (*done) (struct ipr_cmnd *),
  903. void (*timeout_func) (struct ipr_cmnd *), u32 timeout)
  904. {
  905. list_add_tail(&ipr_cmd->queue, &ipr_cmd->hrrq->hrrq_pending_q);
  906. ipr_cmd->done = done;
  907. ipr_cmd->timer.data = (unsigned long) ipr_cmd;
  908. ipr_cmd->timer.expires = jiffies + timeout;
  909. ipr_cmd->timer.function = (void (*)(unsigned long))timeout_func;
  910. add_timer(&ipr_cmd->timer);
  911. ipr_trc_hook(ipr_cmd, IPR_TRACE_START, 0);
  912. ipr_send_command(ipr_cmd);
  913. }
  914. /**
  915. * ipr_internal_cmd_done - Op done function for an internally generated op.
  916. * @ipr_cmd: ipr command struct
  917. *
  918. * This function is the op done function for an internally generated,
  919. * blocking op. It simply wakes the sleeping thread.
  920. *
  921. * Return value:
  922. * none
  923. **/
  924. static void ipr_internal_cmd_done(struct ipr_cmnd *ipr_cmd)
  925. {
  926. if (ipr_cmd->sibling)
  927. ipr_cmd->sibling = NULL;
  928. else
  929. complete(&ipr_cmd->completion);
  930. }
  931. /**
  932. * ipr_init_ioadl - initialize the ioadl for the correct SIS type
  933. * @ipr_cmd: ipr command struct
  934. * @dma_addr: dma address
  935. * @len: transfer length
  936. * @flags: ioadl flag value
  937. *
  938. * This function initializes an ioadl in the case where there is only a single
  939. * descriptor.
  940. *
  941. * Return value:
  942. * nothing
  943. **/
  944. static void ipr_init_ioadl(struct ipr_cmnd *ipr_cmd, dma_addr_t dma_addr,
  945. u32 len, int flags)
  946. {
  947. struct ipr_ioadl_desc *ioadl = ipr_cmd->i.ioadl;
  948. struct ipr_ioadl64_desc *ioadl64 = ipr_cmd->i.ioadl64;
  949. ipr_cmd->dma_use_sg = 1;
  950. if (ipr_cmd->ioa_cfg->sis64) {
  951. ioadl64->flags = cpu_to_be32(flags);
  952. ioadl64->data_len = cpu_to_be32(len);
  953. ioadl64->address = cpu_to_be64(dma_addr);
  954. ipr_cmd->ioarcb.ioadl_len =
  955. cpu_to_be32(sizeof(struct ipr_ioadl64_desc));
  956. ipr_cmd->ioarcb.data_transfer_length = cpu_to_be32(len);
  957. } else {
  958. ioadl->flags_and_data_len = cpu_to_be32(flags | len);
  959. ioadl->address = cpu_to_be32(dma_addr);
  960. if (flags == IPR_IOADL_FLAGS_READ_LAST) {
  961. ipr_cmd->ioarcb.read_ioadl_len =
  962. cpu_to_be32(sizeof(struct ipr_ioadl_desc));
  963. ipr_cmd->ioarcb.read_data_transfer_length = cpu_to_be32(len);
  964. } else {
  965. ipr_cmd->ioarcb.ioadl_len =
  966. cpu_to_be32(sizeof(struct ipr_ioadl_desc));
  967. ipr_cmd->ioarcb.data_transfer_length = cpu_to_be32(len);
  968. }
  969. }
  970. }
  971. /**
  972. * ipr_send_blocking_cmd - Send command and sleep on its completion.
  973. * @ipr_cmd: ipr command struct
  974. * @timeout_func: function to invoke if command times out
  975. * @timeout: timeout
  976. *
  977. * Return value:
  978. * none
  979. **/
  980. static void ipr_send_blocking_cmd(struct ipr_cmnd *ipr_cmd,
  981. void (*timeout_func) (struct ipr_cmnd *ipr_cmd),
  982. u32 timeout)
  983. {
  984. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  985. init_completion(&ipr_cmd->completion);
  986. ipr_do_req(ipr_cmd, ipr_internal_cmd_done, timeout_func, timeout);
  987. spin_unlock_irq(ioa_cfg->host->host_lock);
  988. wait_for_completion(&ipr_cmd->completion);
  989. spin_lock_irq(ioa_cfg->host->host_lock);
  990. }
  991. static int ipr_get_hrrq_index(struct ipr_ioa_cfg *ioa_cfg)
  992. {
  993. unsigned int hrrq;
  994. if (ioa_cfg->hrrq_num == 1)
  995. hrrq = 0;
  996. else {
  997. hrrq = atomic_add_return(1, &ioa_cfg->hrrq_index);
  998. hrrq = (hrrq % (ioa_cfg->hrrq_num - 1)) + 1;
  999. }
  1000. return hrrq;
  1001. }
  1002. /**
  1003. * ipr_send_hcam - Send an HCAM to the adapter.
  1004. * @ioa_cfg: ioa config struct
  1005. * @type: HCAM type
  1006. * @hostrcb: hostrcb struct
  1007. *
  1008. * This function will send a Host Controlled Async command to the adapter.
  1009. * If HCAMs are currently not allowed to be issued to the adapter, it will
  1010. * place the hostrcb on the free queue.
  1011. *
  1012. * Return value:
  1013. * none
  1014. **/
  1015. static void ipr_send_hcam(struct ipr_ioa_cfg *ioa_cfg, u8 type,
  1016. struct ipr_hostrcb *hostrcb)
  1017. {
  1018. struct ipr_cmnd *ipr_cmd;
  1019. struct ipr_ioarcb *ioarcb;
  1020. if (ioa_cfg->hrrq[IPR_INIT_HRRQ].allow_cmds) {
  1021. ipr_cmd = ipr_get_free_ipr_cmnd(ioa_cfg);
  1022. list_add_tail(&ipr_cmd->queue, &ipr_cmd->hrrq->hrrq_pending_q);
  1023. list_add_tail(&hostrcb->queue, &ioa_cfg->hostrcb_pending_q);
  1024. ipr_cmd->u.hostrcb = hostrcb;
  1025. ioarcb = &ipr_cmd->ioarcb;
  1026. ioarcb->res_handle = cpu_to_be32(IPR_IOA_RES_HANDLE);
  1027. ioarcb->cmd_pkt.request_type = IPR_RQTYPE_HCAM;
  1028. ioarcb->cmd_pkt.cdb[0] = IPR_HOST_CONTROLLED_ASYNC;
  1029. ioarcb->cmd_pkt.cdb[1] = type;
  1030. ioarcb->cmd_pkt.cdb[7] = (sizeof(hostrcb->hcam) >> 8) & 0xff;
  1031. ioarcb->cmd_pkt.cdb[8] = sizeof(hostrcb->hcam) & 0xff;
  1032. ipr_init_ioadl(ipr_cmd, hostrcb->hostrcb_dma,
  1033. sizeof(hostrcb->hcam), IPR_IOADL_FLAGS_READ_LAST);
  1034. if (type == IPR_HCAM_CDB_OP_CODE_CONFIG_CHANGE)
  1035. ipr_cmd->done = ipr_process_ccn;
  1036. else
  1037. ipr_cmd->done = ipr_process_error;
  1038. ipr_trc_hook(ipr_cmd, IPR_TRACE_START, IPR_IOA_RES_ADDR);
  1039. ipr_send_command(ipr_cmd);
  1040. } else {
  1041. list_add_tail(&hostrcb->queue, &ioa_cfg->hostrcb_free_q);
  1042. }
  1043. }
  1044. /**
  1045. * ipr_update_ata_class - Update the ata class in the resource entry
  1046. * @res: resource entry struct
  1047. * @proto: cfgte device bus protocol value
  1048. *
  1049. * Return value:
  1050. * none
  1051. **/
  1052. static void ipr_update_ata_class(struct ipr_resource_entry *res, unsigned int proto)
  1053. {
  1054. switch (proto) {
  1055. case IPR_PROTO_SATA:
  1056. case IPR_PROTO_SAS_STP:
  1057. res->ata_class = ATA_DEV_ATA;
  1058. break;
  1059. case IPR_PROTO_SATA_ATAPI:
  1060. case IPR_PROTO_SAS_STP_ATAPI:
  1061. res->ata_class = ATA_DEV_ATAPI;
  1062. break;
  1063. default:
  1064. res->ata_class = ATA_DEV_UNKNOWN;
  1065. break;
  1066. };
  1067. }
  1068. /**
  1069. * ipr_init_res_entry - Initialize a resource entry struct.
  1070. * @res: resource entry struct
  1071. * @cfgtew: config table entry wrapper struct
  1072. *
  1073. * Return value:
  1074. * none
  1075. **/
  1076. static void ipr_init_res_entry(struct ipr_resource_entry *res,
  1077. struct ipr_config_table_entry_wrapper *cfgtew)
  1078. {
  1079. int found = 0;
  1080. unsigned int proto;
  1081. struct ipr_ioa_cfg *ioa_cfg = res->ioa_cfg;
  1082. struct ipr_resource_entry *gscsi_res = NULL;
  1083. res->needs_sync_complete = 0;
  1084. res->in_erp = 0;
  1085. res->add_to_ml = 0;
  1086. res->del_from_ml = 0;
  1087. res->resetting_device = 0;
  1088. res->reset_occurred = 0;
  1089. res->sdev = NULL;
  1090. res->sata_port = NULL;
  1091. if (ioa_cfg->sis64) {
  1092. proto = cfgtew->u.cfgte64->proto;
  1093. res->flags = be16_to_cpu(cfgtew->u.cfgte64->flags);
  1094. res->res_flags = be16_to_cpu(cfgtew->u.cfgte64->res_flags);
  1095. res->qmodel = IPR_QUEUEING_MODEL64(res);
  1096. res->type = cfgtew->u.cfgte64->res_type;
  1097. memcpy(res->res_path, &cfgtew->u.cfgte64->res_path,
  1098. sizeof(res->res_path));
  1099. res->bus = 0;
  1100. memcpy(&res->dev_lun.scsi_lun, &cfgtew->u.cfgte64->lun,
  1101. sizeof(res->dev_lun.scsi_lun));
  1102. res->lun = scsilun_to_int(&res->dev_lun);
  1103. if (res->type == IPR_RES_TYPE_GENERIC_SCSI) {
  1104. list_for_each_entry(gscsi_res, &ioa_cfg->used_res_q, queue) {
  1105. if (gscsi_res->dev_id == cfgtew->u.cfgte64->dev_id) {
  1106. found = 1;
  1107. res->target = gscsi_res->target;
  1108. break;
  1109. }
  1110. }
  1111. if (!found) {
  1112. res->target = find_first_zero_bit(ioa_cfg->target_ids,
  1113. ioa_cfg->max_devs_supported);
  1114. set_bit(res->target, ioa_cfg->target_ids);
  1115. }
  1116. } else if (res->type == IPR_RES_TYPE_IOAFP) {
  1117. res->bus = IPR_IOAFP_VIRTUAL_BUS;
  1118. res->target = 0;
  1119. } else if (res->type == IPR_RES_TYPE_ARRAY) {
  1120. res->bus = IPR_ARRAY_VIRTUAL_BUS;
  1121. res->target = find_first_zero_bit(ioa_cfg->array_ids,
  1122. ioa_cfg->max_devs_supported);
  1123. set_bit(res->target, ioa_cfg->array_ids);
  1124. } else if (res->type == IPR_RES_TYPE_VOLUME_SET) {
  1125. res->bus = IPR_VSET_VIRTUAL_BUS;
  1126. res->target = find_first_zero_bit(ioa_cfg->vset_ids,
  1127. ioa_cfg->max_devs_supported);
  1128. set_bit(res->target, ioa_cfg->vset_ids);
  1129. } else {
  1130. res->target = find_first_zero_bit(ioa_cfg->target_ids,
  1131. ioa_cfg->max_devs_supported);
  1132. set_bit(res->target, ioa_cfg->target_ids);
  1133. }
  1134. } else {
  1135. proto = cfgtew->u.cfgte->proto;
  1136. res->qmodel = IPR_QUEUEING_MODEL(res);
  1137. res->flags = cfgtew->u.cfgte->flags;
  1138. if (res->flags & IPR_IS_IOA_RESOURCE)
  1139. res->type = IPR_RES_TYPE_IOAFP;
  1140. else
  1141. res->type = cfgtew->u.cfgte->rsvd_subtype & 0x0f;
  1142. res->bus = cfgtew->u.cfgte->res_addr.bus;
  1143. res->target = cfgtew->u.cfgte->res_addr.target;
  1144. res->lun = cfgtew->u.cfgte->res_addr.lun;
  1145. res->lun_wwn = get_unaligned_be64(cfgtew->u.cfgte->lun_wwn);
  1146. }
  1147. ipr_update_ata_class(res, proto);
  1148. }
  1149. /**
  1150. * ipr_is_same_device - Determine if two devices are the same.
  1151. * @res: resource entry struct
  1152. * @cfgtew: config table entry wrapper struct
  1153. *
  1154. * Return value:
  1155. * 1 if the devices are the same / 0 otherwise
  1156. **/
  1157. static int ipr_is_same_device(struct ipr_resource_entry *res,
  1158. struct ipr_config_table_entry_wrapper *cfgtew)
  1159. {
  1160. if (res->ioa_cfg->sis64) {
  1161. if (!memcmp(&res->dev_id, &cfgtew->u.cfgte64->dev_id,
  1162. sizeof(cfgtew->u.cfgte64->dev_id)) &&
  1163. !memcmp(&res->dev_lun.scsi_lun, &cfgtew->u.cfgte64->lun,
  1164. sizeof(cfgtew->u.cfgte64->lun))) {
  1165. return 1;
  1166. }
  1167. } else {
  1168. if (res->bus == cfgtew->u.cfgte->res_addr.bus &&
  1169. res->target == cfgtew->u.cfgte->res_addr.target &&
  1170. res->lun == cfgtew->u.cfgte->res_addr.lun)
  1171. return 1;
  1172. }
  1173. return 0;
  1174. }
  1175. /**
  1176. * __ipr_format_res_path - Format the resource path for printing.
  1177. * @res_path: resource path
  1178. * @buf: buffer
  1179. * @len: length of buffer provided
  1180. *
  1181. * Return value:
  1182. * pointer to buffer
  1183. **/
  1184. static char *__ipr_format_res_path(u8 *res_path, char *buffer, int len)
  1185. {
  1186. int i;
  1187. char *p = buffer;
  1188. *p = '\0';
  1189. p += snprintf(p, buffer + len - p, "%02X", res_path[0]);
  1190. for (i = 1; res_path[i] != 0xff && ((i * 3) < len); i++)
  1191. p += snprintf(p, buffer + len - p, "-%02X", res_path[i]);
  1192. return buffer;
  1193. }
  1194. /**
  1195. * ipr_format_res_path - Format the resource path for printing.
  1196. * @ioa_cfg: ioa config struct
  1197. * @res_path: resource path
  1198. * @buf: buffer
  1199. * @len: length of buffer provided
  1200. *
  1201. * Return value:
  1202. * pointer to buffer
  1203. **/
  1204. static char *ipr_format_res_path(struct ipr_ioa_cfg *ioa_cfg,
  1205. u8 *res_path, char *buffer, int len)
  1206. {
  1207. char *p = buffer;
  1208. *p = '\0';
  1209. p += snprintf(p, buffer + len - p, "%d/", ioa_cfg->host->host_no);
  1210. __ipr_format_res_path(res_path, p, len - (buffer - p));
  1211. return buffer;
  1212. }
  1213. /**
  1214. * ipr_update_res_entry - Update the resource entry.
  1215. * @res: resource entry struct
  1216. * @cfgtew: config table entry wrapper struct
  1217. *
  1218. * Return value:
  1219. * none
  1220. **/
  1221. static void ipr_update_res_entry(struct ipr_resource_entry *res,
  1222. struct ipr_config_table_entry_wrapper *cfgtew)
  1223. {
  1224. char buffer[IPR_MAX_RES_PATH_LENGTH];
  1225. unsigned int proto;
  1226. int new_path = 0;
  1227. if (res->ioa_cfg->sis64) {
  1228. res->flags = be16_to_cpu(cfgtew->u.cfgte64->flags);
  1229. res->res_flags = be16_to_cpu(cfgtew->u.cfgte64->res_flags);
  1230. res->type = cfgtew->u.cfgte64->res_type;
  1231. memcpy(&res->std_inq_data, &cfgtew->u.cfgte64->std_inq_data,
  1232. sizeof(struct ipr_std_inq_data));
  1233. res->qmodel = IPR_QUEUEING_MODEL64(res);
  1234. proto = cfgtew->u.cfgte64->proto;
  1235. res->res_handle = cfgtew->u.cfgte64->res_handle;
  1236. res->dev_id = cfgtew->u.cfgte64->dev_id;
  1237. memcpy(&res->dev_lun.scsi_lun, &cfgtew->u.cfgte64->lun,
  1238. sizeof(res->dev_lun.scsi_lun));
  1239. if (memcmp(res->res_path, &cfgtew->u.cfgte64->res_path,
  1240. sizeof(res->res_path))) {
  1241. memcpy(res->res_path, &cfgtew->u.cfgte64->res_path,
  1242. sizeof(res->res_path));
  1243. new_path = 1;
  1244. }
  1245. if (res->sdev && new_path)
  1246. sdev_printk(KERN_INFO, res->sdev, "Resource path: %s\n",
  1247. ipr_format_res_path(res->ioa_cfg,
  1248. res->res_path, buffer, sizeof(buffer)));
  1249. } else {
  1250. res->flags = cfgtew->u.cfgte->flags;
  1251. if (res->flags & IPR_IS_IOA_RESOURCE)
  1252. res->type = IPR_RES_TYPE_IOAFP;
  1253. else
  1254. res->type = cfgtew->u.cfgte->rsvd_subtype & 0x0f;
  1255. memcpy(&res->std_inq_data, &cfgtew->u.cfgte->std_inq_data,
  1256. sizeof(struct ipr_std_inq_data));
  1257. res->qmodel = IPR_QUEUEING_MODEL(res);
  1258. proto = cfgtew->u.cfgte->proto;
  1259. res->res_handle = cfgtew->u.cfgte->res_handle;
  1260. }
  1261. ipr_update_ata_class(res, proto);
  1262. }
  1263. /**
  1264. * ipr_clear_res_target - Clear the bit in the bit map representing the target
  1265. * for the resource.
  1266. * @res: resource entry struct
  1267. * @cfgtew: config table entry wrapper struct
  1268. *
  1269. * Return value:
  1270. * none
  1271. **/
  1272. static void ipr_clear_res_target(struct ipr_resource_entry *res)
  1273. {
  1274. struct ipr_resource_entry *gscsi_res = NULL;
  1275. struct ipr_ioa_cfg *ioa_cfg = res->ioa_cfg;
  1276. if (!ioa_cfg->sis64)
  1277. return;
  1278. if (res->bus == IPR_ARRAY_VIRTUAL_BUS)
  1279. clear_bit(res->target, ioa_cfg->array_ids);
  1280. else if (res->bus == IPR_VSET_VIRTUAL_BUS)
  1281. clear_bit(res->target, ioa_cfg->vset_ids);
  1282. else if (res->bus == 0 && res->type == IPR_RES_TYPE_GENERIC_SCSI) {
  1283. list_for_each_entry(gscsi_res, &ioa_cfg->used_res_q, queue)
  1284. if (gscsi_res->dev_id == res->dev_id && gscsi_res != res)
  1285. return;
  1286. clear_bit(res->target, ioa_cfg->target_ids);
  1287. } else if (res->bus == 0)
  1288. clear_bit(res->target, ioa_cfg->target_ids);
  1289. }
  1290. /**
  1291. * ipr_handle_config_change - Handle a config change from the adapter
  1292. * @ioa_cfg: ioa config struct
  1293. * @hostrcb: hostrcb
  1294. *
  1295. * Return value:
  1296. * none
  1297. **/
  1298. static void ipr_handle_config_change(struct ipr_ioa_cfg *ioa_cfg,
  1299. struct ipr_hostrcb *hostrcb)
  1300. {
  1301. struct ipr_resource_entry *res = NULL;
  1302. struct ipr_config_table_entry_wrapper cfgtew;
  1303. __be32 cc_res_handle;
  1304. u32 is_ndn = 1;
  1305. if (ioa_cfg->sis64) {
  1306. cfgtew.u.cfgte64 = &hostrcb->hcam.u.ccn.u.cfgte64;
  1307. cc_res_handle = cfgtew.u.cfgte64->res_handle;
  1308. } else {
  1309. cfgtew.u.cfgte = &hostrcb->hcam.u.ccn.u.cfgte;
  1310. cc_res_handle = cfgtew.u.cfgte->res_handle;
  1311. }
  1312. list_for_each_entry(res, &ioa_cfg->used_res_q, queue) {
  1313. if (res->res_handle == cc_res_handle) {
  1314. is_ndn = 0;
  1315. break;
  1316. }
  1317. }
  1318. if (is_ndn) {
  1319. if (list_empty(&ioa_cfg->free_res_q)) {
  1320. ipr_send_hcam(ioa_cfg,
  1321. IPR_HCAM_CDB_OP_CODE_CONFIG_CHANGE,
  1322. hostrcb);
  1323. return;
  1324. }
  1325. res = list_entry(ioa_cfg->free_res_q.next,
  1326. struct ipr_resource_entry, queue);
  1327. list_del(&res->queue);
  1328. ipr_init_res_entry(res, &cfgtew);
  1329. list_add_tail(&res->queue, &ioa_cfg->used_res_q);
  1330. }
  1331. ipr_update_res_entry(res, &cfgtew);
  1332. if (hostrcb->hcam.notify_type == IPR_HOST_RCB_NOTIF_TYPE_REM_ENTRY) {
  1333. if (res->sdev) {
  1334. res->del_from_ml = 1;
  1335. res->res_handle = IPR_INVALID_RES_HANDLE;
  1336. schedule_work(&ioa_cfg->work_q);
  1337. } else {
  1338. ipr_clear_res_target(res);
  1339. list_move_tail(&res->queue, &ioa_cfg->free_res_q);
  1340. }
  1341. } else if (!res->sdev || res->del_from_ml) {
  1342. res->add_to_ml = 1;
  1343. schedule_work(&ioa_cfg->work_q);
  1344. }
  1345. ipr_send_hcam(ioa_cfg, IPR_HCAM_CDB_OP_CODE_CONFIG_CHANGE, hostrcb);
  1346. }
  1347. /**
  1348. * ipr_process_ccn - Op done function for a CCN.
  1349. * @ipr_cmd: ipr command struct
  1350. *
  1351. * This function is the op done function for a configuration
  1352. * change notification host controlled async from the adapter.
  1353. *
  1354. * Return value:
  1355. * none
  1356. **/
  1357. static void ipr_process_ccn(struct ipr_cmnd *ipr_cmd)
  1358. {
  1359. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  1360. struct ipr_hostrcb *hostrcb = ipr_cmd->u.hostrcb;
  1361. u32 ioasc = be32_to_cpu(ipr_cmd->s.ioasa.hdr.ioasc);
  1362. list_del(&hostrcb->queue);
  1363. list_add_tail(&ipr_cmd->queue, &ipr_cmd->hrrq->hrrq_free_q);
  1364. if (ioasc) {
  1365. if (ioasc != IPR_IOASC_IOA_WAS_RESET &&
  1366. ioasc != IPR_IOASC_ABORTED_CMD_TERM_BY_HOST)
  1367. dev_err(&ioa_cfg->pdev->dev,
  1368. "Host RCB failed with IOASC: 0x%08X\n", ioasc);
  1369. ipr_send_hcam(ioa_cfg, IPR_HCAM_CDB_OP_CODE_CONFIG_CHANGE, hostrcb);
  1370. } else {
  1371. ipr_handle_config_change(ioa_cfg, hostrcb);
  1372. }
  1373. }
  1374. /**
  1375. * strip_and_pad_whitespace - Strip and pad trailing whitespace.
  1376. * @i: index into buffer
  1377. * @buf: string to modify
  1378. *
  1379. * This function will strip all trailing whitespace, pad the end
  1380. * of the string with a single space, and NULL terminate the string.
  1381. *
  1382. * Return value:
  1383. * new length of string
  1384. **/
  1385. static int strip_and_pad_whitespace(int i, char *buf)
  1386. {
  1387. while (i && buf[i] == ' ')
  1388. i--;
  1389. buf[i+1] = ' ';
  1390. buf[i+2] = '\0';
  1391. return i + 2;
  1392. }
  1393. /**
  1394. * ipr_log_vpd_compact - Log the passed extended VPD compactly.
  1395. * @prefix: string to print at start of printk
  1396. * @hostrcb: hostrcb pointer
  1397. * @vpd: vendor/product id/sn struct
  1398. *
  1399. * Return value:
  1400. * none
  1401. **/
  1402. static void ipr_log_vpd_compact(char *prefix, struct ipr_hostrcb *hostrcb,
  1403. struct ipr_vpd *vpd)
  1404. {
  1405. char buffer[IPR_VENDOR_ID_LEN + IPR_PROD_ID_LEN + IPR_SERIAL_NUM_LEN + 3];
  1406. int i = 0;
  1407. memcpy(buffer, vpd->vpids.vendor_id, IPR_VENDOR_ID_LEN);
  1408. i = strip_and_pad_whitespace(IPR_VENDOR_ID_LEN - 1, buffer);
  1409. memcpy(&buffer[i], vpd->vpids.product_id, IPR_PROD_ID_LEN);
  1410. i = strip_and_pad_whitespace(i + IPR_PROD_ID_LEN - 1, buffer);
  1411. memcpy(&buffer[i], vpd->sn, IPR_SERIAL_NUM_LEN);
  1412. buffer[IPR_SERIAL_NUM_LEN + i] = '\0';
  1413. ipr_hcam_err(hostrcb, "%s VPID/SN: %s\n", prefix, buffer);
  1414. }
  1415. /**
  1416. * ipr_log_vpd - Log the passed VPD to the error log.
  1417. * @vpd: vendor/product id/sn struct
  1418. *
  1419. * Return value:
  1420. * none
  1421. **/
  1422. static void ipr_log_vpd(struct ipr_vpd *vpd)
  1423. {
  1424. char buffer[IPR_VENDOR_ID_LEN + IPR_PROD_ID_LEN
  1425. + IPR_SERIAL_NUM_LEN];
  1426. memcpy(buffer, vpd->vpids.vendor_id, IPR_VENDOR_ID_LEN);
  1427. memcpy(buffer + IPR_VENDOR_ID_LEN, vpd->vpids.product_id,
  1428. IPR_PROD_ID_LEN);
  1429. buffer[IPR_VENDOR_ID_LEN + IPR_PROD_ID_LEN] = '\0';
  1430. ipr_err("Vendor/Product ID: %s\n", buffer);
  1431. memcpy(buffer, vpd->sn, IPR_SERIAL_NUM_LEN);
  1432. buffer[IPR_SERIAL_NUM_LEN] = '\0';
  1433. ipr_err(" Serial Number: %s\n", buffer);
  1434. }
  1435. /**
  1436. * ipr_log_ext_vpd_compact - Log the passed extended VPD compactly.
  1437. * @prefix: string to print at start of printk
  1438. * @hostrcb: hostrcb pointer
  1439. * @vpd: vendor/product id/sn/wwn struct
  1440. *
  1441. * Return value:
  1442. * none
  1443. **/
  1444. static void ipr_log_ext_vpd_compact(char *prefix, struct ipr_hostrcb *hostrcb,
  1445. struct ipr_ext_vpd *vpd)
  1446. {
  1447. ipr_log_vpd_compact(prefix, hostrcb, &vpd->vpd);
  1448. ipr_hcam_err(hostrcb, "%s WWN: %08X%08X\n", prefix,
  1449. be32_to_cpu(vpd->wwid[0]), be32_to_cpu(vpd->wwid[1]));
  1450. }
  1451. /**
  1452. * ipr_log_ext_vpd - Log the passed extended VPD to the error log.
  1453. * @vpd: vendor/product id/sn/wwn struct
  1454. *
  1455. * Return value:
  1456. * none
  1457. **/
  1458. static void ipr_log_ext_vpd(struct ipr_ext_vpd *vpd)
  1459. {
  1460. ipr_log_vpd(&vpd->vpd);
  1461. ipr_err(" WWN: %08X%08X\n", be32_to_cpu(vpd->wwid[0]),
  1462. be32_to_cpu(vpd->wwid[1]));
  1463. }
  1464. /**
  1465. * ipr_log_enhanced_cache_error - Log a cache error.
  1466. * @ioa_cfg: ioa config struct
  1467. * @hostrcb: hostrcb struct
  1468. *
  1469. * Return value:
  1470. * none
  1471. **/
  1472. static void ipr_log_enhanced_cache_error(struct ipr_ioa_cfg *ioa_cfg,
  1473. struct ipr_hostrcb *hostrcb)
  1474. {
  1475. struct ipr_hostrcb_type_12_error *error;
  1476. if (ioa_cfg->sis64)
  1477. error = &hostrcb->hcam.u.error64.u.type_12_error;
  1478. else
  1479. error = &hostrcb->hcam.u.error.u.type_12_error;
  1480. ipr_err("-----Current Configuration-----\n");
  1481. ipr_err("Cache Directory Card Information:\n");
  1482. ipr_log_ext_vpd(&error->ioa_vpd);
  1483. ipr_err("Adapter Card Information:\n");
  1484. ipr_log_ext_vpd(&error->cfc_vpd);
  1485. ipr_err("-----Expected Configuration-----\n");
  1486. ipr_err("Cache Directory Card Information:\n");
  1487. ipr_log_ext_vpd(&error->ioa_last_attached_to_cfc_vpd);
  1488. ipr_err("Adapter Card Information:\n");
  1489. ipr_log_ext_vpd(&error->cfc_last_attached_to_ioa_vpd);
  1490. ipr_err("Additional IOA Data: %08X %08X %08X\n",
  1491. be32_to_cpu(error->ioa_data[0]),
  1492. be32_to_cpu(error->ioa_data[1]),
  1493. be32_to_cpu(error->ioa_data[2]));
  1494. }
  1495. /**
  1496. * ipr_log_cache_error - Log a cache error.
  1497. * @ioa_cfg: ioa config struct
  1498. * @hostrcb: hostrcb struct
  1499. *
  1500. * Return value:
  1501. * none
  1502. **/
  1503. static void ipr_log_cache_error(struct ipr_ioa_cfg *ioa_cfg,
  1504. struct ipr_hostrcb *hostrcb)
  1505. {
  1506. struct ipr_hostrcb_type_02_error *error =
  1507. &hostrcb->hcam.u.error.u.type_02_error;
  1508. ipr_err("-----Current Configuration-----\n");
  1509. ipr_err("Cache Directory Card Information:\n");
  1510. ipr_log_vpd(&error->ioa_vpd);
  1511. ipr_err("Adapter Card Information:\n");
  1512. ipr_log_vpd(&error->cfc_vpd);
  1513. ipr_err("-----Expected Configuration-----\n");
  1514. ipr_err("Cache Directory Card Information:\n");
  1515. ipr_log_vpd(&error->ioa_last_attached_to_cfc_vpd);
  1516. ipr_err("Adapter Card Information:\n");
  1517. ipr_log_vpd(&error->cfc_last_attached_to_ioa_vpd);
  1518. ipr_err("Additional IOA Data: %08X %08X %08X\n",
  1519. be32_to_cpu(error->ioa_data[0]),
  1520. be32_to_cpu(error->ioa_data[1]),
  1521. be32_to_cpu(error->ioa_data[2]));
  1522. }
  1523. /**
  1524. * ipr_log_enhanced_config_error - Log a configuration error.
  1525. * @ioa_cfg: ioa config struct
  1526. * @hostrcb: hostrcb struct
  1527. *
  1528. * Return value:
  1529. * none
  1530. **/
  1531. static void ipr_log_enhanced_config_error(struct ipr_ioa_cfg *ioa_cfg,
  1532. struct ipr_hostrcb *hostrcb)
  1533. {
  1534. int errors_logged, i;
  1535. struct ipr_hostrcb_device_data_entry_enhanced *dev_entry;
  1536. struct ipr_hostrcb_type_13_error *error;
  1537. error = &hostrcb->hcam.u.error.u.type_13_error;
  1538. errors_logged = be32_to_cpu(error->errors_logged);
  1539. ipr_err("Device Errors Detected/Logged: %d/%d\n",
  1540. be32_to_cpu(error->errors_detected), errors_logged);
  1541. dev_entry = error->dev;
  1542. for (i = 0; i < errors_logged; i++, dev_entry++) {
  1543. ipr_err_separator;
  1544. ipr_phys_res_err(ioa_cfg, dev_entry->dev_res_addr, "Device %d", i + 1);
  1545. ipr_log_ext_vpd(&dev_entry->vpd);
  1546. ipr_err("-----New Device Information-----\n");
  1547. ipr_log_ext_vpd(&dev_entry->new_vpd);
  1548. ipr_err("Cache Directory Card Information:\n");
  1549. ipr_log_ext_vpd(&dev_entry->ioa_last_with_dev_vpd);
  1550. ipr_err("Adapter Card Information:\n");
  1551. ipr_log_ext_vpd(&dev_entry->cfc_last_with_dev_vpd);
  1552. }
  1553. }
  1554. /**
  1555. * ipr_log_sis64_config_error - Log a device error.
  1556. * @ioa_cfg: ioa config struct
  1557. * @hostrcb: hostrcb struct
  1558. *
  1559. * Return value:
  1560. * none
  1561. **/
  1562. static void ipr_log_sis64_config_error(struct ipr_ioa_cfg *ioa_cfg,
  1563. struct ipr_hostrcb *hostrcb)
  1564. {
  1565. int errors_logged, i;
  1566. struct ipr_hostrcb64_device_data_entry_enhanced *dev_entry;
  1567. struct ipr_hostrcb_type_23_error *error;
  1568. char buffer[IPR_MAX_RES_PATH_LENGTH];
  1569. error = &hostrcb->hcam.u.error64.u.type_23_error;
  1570. errors_logged = be32_to_cpu(error->errors_logged);
  1571. ipr_err("Device Errors Detected/Logged: %d/%d\n",
  1572. be32_to_cpu(error->errors_detected), errors_logged);
  1573. dev_entry = error->dev;
  1574. for (i = 0; i < errors_logged; i++, dev_entry++) {
  1575. ipr_err_separator;
  1576. ipr_err("Device %d : %s", i + 1,
  1577. __ipr_format_res_path(dev_entry->res_path,
  1578. buffer, sizeof(buffer)));
  1579. ipr_log_ext_vpd(&dev_entry->vpd);
  1580. ipr_err("-----New Device Information-----\n");
  1581. ipr_log_ext_vpd(&dev_entry->new_vpd);
  1582. ipr_err("Cache Directory Card Information:\n");
  1583. ipr_log_ext_vpd(&dev_entry->ioa_last_with_dev_vpd);
  1584. ipr_err("Adapter Card Information:\n");
  1585. ipr_log_ext_vpd(&dev_entry->cfc_last_with_dev_vpd);
  1586. }
  1587. }
  1588. /**
  1589. * ipr_log_config_error - Log a configuration error.
  1590. * @ioa_cfg: ioa config struct
  1591. * @hostrcb: hostrcb struct
  1592. *
  1593. * Return value:
  1594. * none
  1595. **/
  1596. static void ipr_log_config_error(struct ipr_ioa_cfg *ioa_cfg,
  1597. struct ipr_hostrcb *hostrcb)
  1598. {
  1599. int errors_logged, i;
  1600. struct ipr_hostrcb_device_data_entry *dev_entry;
  1601. struct ipr_hostrcb_type_03_error *error;
  1602. error = &hostrcb->hcam.u.error.u.type_03_error;
  1603. errors_logged = be32_to_cpu(error->errors_logged);
  1604. ipr_err("Device Errors Detected/Logged: %d/%d\n",
  1605. be32_to_cpu(error->errors_detected), errors_logged);
  1606. dev_entry = error->dev;
  1607. for (i = 0; i < errors_logged; i++, dev_entry++) {
  1608. ipr_err_separator;
  1609. ipr_phys_res_err(ioa_cfg, dev_entry->dev_res_addr, "Device %d", i + 1);
  1610. ipr_log_vpd(&dev_entry->vpd);
  1611. ipr_err("-----New Device Information-----\n");
  1612. ipr_log_vpd(&dev_entry->new_vpd);
  1613. ipr_err("Cache Directory Card Information:\n");
  1614. ipr_log_vpd(&dev_entry->ioa_last_with_dev_vpd);
  1615. ipr_err("Adapter Card Information:\n");
  1616. ipr_log_vpd(&dev_entry->cfc_last_with_dev_vpd);
  1617. ipr_err("Additional IOA Data: %08X %08X %08X %08X %08X\n",
  1618. be32_to_cpu(dev_entry->ioa_data[0]),
  1619. be32_to_cpu(dev_entry->ioa_data[1]),
  1620. be32_to_cpu(dev_entry->ioa_data[2]),
  1621. be32_to_cpu(dev_entry->ioa_data[3]),
  1622. be32_to_cpu(dev_entry->ioa_data[4]));
  1623. }
  1624. }
  1625. /**
  1626. * ipr_log_enhanced_array_error - Log an array configuration error.
  1627. * @ioa_cfg: ioa config struct
  1628. * @hostrcb: hostrcb struct
  1629. *
  1630. * Return value:
  1631. * none
  1632. **/
  1633. static void ipr_log_enhanced_array_error(struct ipr_ioa_cfg *ioa_cfg,
  1634. struct ipr_hostrcb *hostrcb)
  1635. {
  1636. int i, num_entries;
  1637. struct ipr_hostrcb_type_14_error *error;
  1638. struct ipr_hostrcb_array_data_entry_enhanced *array_entry;
  1639. const u8 zero_sn[IPR_SERIAL_NUM_LEN] = { [0 ... IPR_SERIAL_NUM_LEN-1] = '0' };
  1640. error = &hostrcb->hcam.u.error.u.type_14_error;
  1641. ipr_err_separator;
  1642. ipr_err("RAID %s Array Configuration: %d:%d:%d:%d\n",
  1643. error->protection_level,
  1644. ioa_cfg->host->host_no,
  1645. error->last_func_vset_res_addr.bus,
  1646. error->last_func_vset_res_addr.target,
  1647. error->last_func_vset_res_addr.lun);
  1648. ipr_err_separator;
  1649. array_entry = error->array_member;
  1650. num_entries = min_t(u32, be32_to_cpu(error->num_entries),
  1651. ARRAY_SIZE(error->array_member));
  1652. for (i = 0; i < num_entries; i++, array_entry++) {
  1653. if (!memcmp(array_entry->vpd.vpd.sn, zero_sn, IPR_SERIAL_NUM_LEN))
  1654. continue;
  1655. if (be32_to_cpu(error->exposed_mode_adn) == i)
  1656. ipr_err("Exposed Array Member %d:\n", i);
  1657. else
  1658. ipr_err("Array Member %d:\n", i);
  1659. ipr_log_ext_vpd(&array_entry->vpd);
  1660. ipr_phys_res_err(ioa_cfg, array_entry->dev_res_addr, "Current Location");
  1661. ipr_phys_res_err(ioa_cfg, array_entry->expected_dev_res_addr,
  1662. "Expected Location");
  1663. ipr_err_separator;
  1664. }
  1665. }
  1666. /**
  1667. * ipr_log_array_error - Log an array configuration error.
  1668. * @ioa_cfg: ioa config struct
  1669. * @hostrcb: hostrcb struct
  1670. *
  1671. * Return value:
  1672. * none
  1673. **/
  1674. static void ipr_log_array_error(struct ipr_ioa_cfg *ioa_cfg,
  1675. struct ipr_hostrcb *hostrcb)
  1676. {
  1677. int i;
  1678. struct ipr_hostrcb_type_04_error *error;
  1679. struct ipr_hostrcb_array_data_entry *array_entry;
  1680. const u8 zero_sn[IPR_SERIAL_NUM_LEN] = { [0 ... IPR_SERIAL_NUM_LEN-1] = '0' };
  1681. error = &hostrcb->hcam.u.error.u.type_04_error;
  1682. ipr_err_separator;
  1683. ipr_err("RAID %s Array Configuration: %d:%d:%d:%d\n",
  1684. error->protection_level,
  1685. ioa_cfg->host->host_no,
  1686. error->last_func_vset_res_addr.bus,
  1687. error->last_func_vset_res_addr.target,
  1688. error->last_func_vset_res_addr.lun);
  1689. ipr_err_separator;
  1690. array_entry = error->array_member;
  1691. for (i = 0; i < 18; i++) {
  1692. if (!memcmp(array_entry->vpd.sn, zero_sn, IPR_SERIAL_NUM_LEN))
  1693. continue;
  1694. if (be32_to_cpu(error->exposed_mode_adn) == i)
  1695. ipr_err("Exposed Array Member %d:\n", i);
  1696. else
  1697. ipr_err("Array Member %d:\n", i);
  1698. ipr_log_vpd(&array_entry->vpd);
  1699. ipr_phys_res_err(ioa_cfg, array_entry->dev_res_addr, "Current Location");
  1700. ipr_phys_res_err(ioa_cfg, array_entry->expected_dev_res_addr,
  1701. "Expected Location");
  1702. ipr_err_separator;
  1703. if (i == 9)
  1704. array_entry = error->array_member2;
  1705. else
  1706. array_entry++;
  1707. }
  1708. }
  1709. /**
  1710. * ipr_log_hex_data - Log additional hex IOA error data.
  1711. * @ioa_cfg: ioa config struct
  1712. * @data: IOA error data
  1713. * @len: data length
  1714. *
  1715. * Return value:
  1716. * none
  1717. **/
  1718. static void ipr_log_hex_data(struct ipr_ioa_cfg *ioa_cfg, __be32 *data, int len)
  1719. {
  1720. int i;
  1721. if (len == 0)
  1722. return;
  1723. if (ioa_cfg->log_level <= IPR_DEFAULT_LOG_LEVEL)
  1724. len = min_t(int, len, IPR_DEFAULT_MAX_ERROR_DUMP);
  1725. for (i = 0; i < len / 4; i += 4) {
  1726. ipr_err("%08X: %08X %08X %08X %08X\n", i*4,
  1727. be32_to_cpu(data[i]),
  1728. be32_to_cpu(data[i+1]),
  1729. be32_to_cpu(data[i+2]),
  1730. be32_to_cpu(data[i+3]));
  1731. }
  1732. }
  1733. /**
  1734. * ipr_log_enhanced_dual_ioa_error - Log an enhanced dual adapter error.
  1735. * @ioa_cfg: ioa config struct
  1736. * @hostrcb: hostrcb struct
  1737. *
  1738. * Return value:
  1739. * none
  1740. **/
  1741. static void ipr_log_enhanced_dual_ioa_error(struct ipr_ioa_cfg *ioa_cfg,
  1742. struct ipr_hostrcb *hostrcb)
  1743. {
  1744. struct ipr_hostrcb_type_17_error *error;
  1745. if (ioa_cfg->sis64)
  1746. error = &hostrcb->hcam.u.error64.u.type_17_error;
  1747. else
  1748. error = &hostrcb->hcam.u.error.u.type_17_error;
  1749. error->failure_reason[sizeof(error->failure_reason) - 1] = '\0';
  1750. strim(error->failure_reason);
  1751. ipr_hcam_err(hostrcb, "%s [PRC: %08X]\n", error->failure_reason,
  1752. be32_to_cpu(hostrcb->hcam.u.error.prc));
  1753. ipr_log_ext_vpd_compact("Remote IOA", hostrcb, &error->vpd);
  1754. ipr_log_hex_data(ioa_cfg, error->data,
  1755. be32_to_cpu(hostrcb->hcam.length) -
  1756. (offsetof(struct ipr_hostrcb_error, u) +
  1757. offsetof(struct ipr_hostrcb_type_17_error, data)));
  1758. }
  1759. /**
  1760. * ipr_log_dual_ioa_error - Log a dual adapter error.
  1761. * @ioa_cfg: ioa config struct
  1762. * @hostrcb: hostrcb struct
  1763. *
  1764. * Return value:
  1765. * none
  1766. **/
  1767. static void ipr_log_dual_ioa_error(struct ipr_ioa_cfg *ioa_cfg,
  1768. struct ipr_hostrcb *hostrcb)
  1769. {
  1770. struct ipr_hostrcb_type_07_error *error;
  1771. error = &hostrcb->hcam.u.error.u.type_07_error;
  1772. error->failure_reason[sizeof(error->failure_reason) - 1] = '\0';
  1773. strim(error->failure_reason);
  1774. ipr_hcam_err(hostrcb, "%s [PRC: %08X]\n", error->failure_reason,
  1775. be32_to_cpu(hostrcb->hcam.u.error.prc));
  1776. ipr_log_vpd_compact("Remote IOA", hostrcb, &error->vpd);
  1777. ipr_log_hex_data(ioa_cfg, error->data,
  1778. be32_to_cpu(hostrcb->hcam.length) -
  1779. (offsetof(struct ipr_hostrcb_error, u) +
  1780. offsetof(struct ipr_hostrcb_type_07_error, data)));
  1781. }
  1782. static const struct {
  1783. u8 active;
  1784. char *desc;
  1785. } path_active_desc[] = {
  1786. { IPR_PATH_NO_INFO, "Path" },
  1787. { IPR_PATH_ACTIVE, "Active path" },
  1788. { IPR_PATH_NOT_ACTIVE, "Inactive path" }
  1789. };
  1790. static const struct {
  1791. u8 state;
  1792. char *desc;
  1793. } path_state_desc[] = {
  1794. { IPR_PATH_STATE_NO_INFO, "has no path state information available" },
  1795. { IPR_PATH_HEALTHY, "is healthy" },
  1796. { IPR_PATH_DEGRADED, "is degraded" },
  1797. { IPR_PATH_FAILED, "is failed" }
  1798. };
  1799. /**
  1800. * ipr_log_fabric_path - Log a fabric path error
  1801. * @hostrcb: hostrcb struct
  1802. * @fabric: fabric descriptor
  1803. *
  1804. * Return value:
  1805. * none
  1806. **/
  1807. static void ipr_log_fabric_path(struct ipr_hostrcb *hostrcb,
  1808. struct ipr_hostrcb_fabric_desc *fabric)
  1809. {
  1810. int i, j;
  1811. u8 path_state = fabric->path_state;
  1812. u8 active = path_state & IPR_PATH_ACTIVE_MASK;
  1813. u8 state = path_state & IPR_PATH_STATE_MASK;
  1814. for (i = 0; i < ARRAY_SIZE(path_active_desc); i++) {
  1815. if (path_active_desc[i].active != active)
  1816. continue;
  1817. for (j = 0; j < ARRAY_SIZE(path_state_desc); j++) {
  1818. if (path_state_desc[j].state != state)
  1819. continue;
  1820. if (fabric->cascaded_expander == 0xff && fabric->phy == 0xff) {
  1821. ipr_hcam_err(hostrcb, "%s %s: IOA Port=%d\n",
  1822. path_active_desc[i].desc, path_state_desc[j].desc,
  1823. fabric->ioa_port);
  1824. } else if (fabric->cascaded_expander == 0xff) {
  1825. ipr_hcam_err(hostrcb, "%s %s: IOA Port=%d, Phy=%d\n",
  1826. path_active_desc[i].desc, path_state_desc[j].desc,
  1827. fabric->ioa_port, fabric->phy);
  1828. } else if (fabric->phy == 0xff) {
  1829. ipr_hcam_err(hostrcb, "%s %s: IOA Port=%d, Cascade=%d\n",
  1830. path_active_desc[i].desc, path_state_desc[j].desc,
  1831. fabric->ioa_port, fabric->cascaded_expander);
  1832. } else {
  1833. ipr_hcam_err(hostrcb, "%s %s: IOA Port=%d, Cascade=%d, Phy=%d\n",
  1834. path_active_desc[i].desc, path_state_desc[j].desc,
  1835. fabric->ioa_port, fabric->cascaded_expander, fabric->phy);
  1836. }
  1837. return;
  1838. }
  1839. }
  1840. ipr_err("Path state=%02X IOA Port=%d Cascade=%d Phy=%d\n", path_state,
  1841. fabric->ioa_port, fabric->cascaded_expander, fabric->phy);
  1842. }
  1843. /**
  1844. * ipr_log64_fabric_path - Log a fabric path error
  1845. * @hostrcb: hostrcb struct
  1846. * @fabric: fabric descriptor
  1847. *
  1848. * Return value:
  1849. * none
  1850. **/
  1851. static void ipr_log64_fabric_path(struct ipr_hostrcb *hostrcb,
  1852. struct ipr_hostrcb64_fabric_desc *fabric)
  1853. {
  1854. int i, j;
  1855. u8 path_state = fabric->path_state;
  1856. u8 active = path_state & IPR_PATH_ACTIVE_MASK;
  1857. u8 state = path_state & IPR_PATH_STATE_MASK;
  1858. char buffer[IPR_MAX_RES_PATH_LENGTH];
  1859. for (i = 0; i < ARRAY_SIZE(path_active_desc); i++) {
  1860. if (path_active_desc[i].active != active)
  1861. continue;
  1862. for (j = 0; j < ARRAY_SIZE(path_state_desc); j++) {
  1863. if (path_state_desc[j].state != state)
  1864. continue;
  1865. ipr_hcam_err(hostrcb, "%s %s: Resource Path=%s\n",
  1866. path_active_desc[i].desc, path_state_desc[j].desc,
  1867. ipr_format_res_path(hostrcb->ioa_cfg,
  1868. fabric->res_path,
  1869. buffer, sizeof(buffer)));
  1870. return;
  1871. }
  1872. }
  1873. ipr_err("Path state=%02X Resource Path=%s\n", path_state,
  1874. ipr_format_res_path(hostrcb->ioa_cfg, fabric->res_path,
  1875. buffer, sizeof(buffer)));
  1876. }
  1877. static const struct {
  1878. u8 type;
  1879. char *desc;
  1880. } path_type_desc[] = {
  1881. { IPR_PATH_CFG_IOA_PORT, "IOA port" },
  1882. { IPR_PATH_CFG_EXP_PORT, "Expander port" },
  1883. { IPR_PATH_CFG_DEVICE_PORT, "Device port" },
  1884. { IPR_PATH_CFG_DEVICE_LUN, "Device LUN" }
  1885. };
  1886. static const struct {
  1887. u8 status;
  1888. char *desc;
  1889. } path_status_desc[] = {
  1890. { IPR_PATH_CFG_NO_PROB, "Functional" },
  1891. { IPR_PATH_CFG_DEGRADED, "Degraded" },
  1892. { IPR_PATH_CFG_FAILED, "Failed" },
  1893. { IPR_PATH_CFG_SUSPECT, "Suspect" },
  1894. { IPR_PATH_NOT_DETECTED, "Missing" },
  1895. { IPR_PATH_INCORRECT_CONN, "Incorrectly connected" }
  1896. };
  1897. static const char *link_rate[] = {
  1898. "unknown",
  1899. "disabled",
  1900. "phy reset problem",
  1901. "spinup hold",
  1902. "port selector",
  1903. "unknown",
  1904. "unknown",
  1905. "unknown",
  1906. "1.5Gbps",
  1907. "3.0Gbps",
  1908. "unknown",
  1909. "unknown",
  1910. "unknown",
  1911. "unknown",
  1912. "unknown",
  1913. "unknown"
  1914. };
  1915. /**
  1916. * ipr_log_path_elem - Log a fabric path element.
  1917. * @hostrcb: hostrcb struct
  1918. * @cfg: fabric path element struct
  1919. *
  1920. * Return value:
  1921. * none
  1922. **/
  1923. static void ipr_log_path_elem(struct ipr_hostrcb *hostrcb,
  1924. struct ipr_hostrcb_config_element *cfg)
  1925. {
  1926. int i, j;
  1927. u8 type = cfg->type_status & IPR_PATH_CFG_TYPE_MASK;
  1928. u8 status = cfg->type_status & IPR_PATH_CFG_STATUS_MASK;
  1929. if (type == IPR_PATH_CFG_NOT_EXIST)
  1930. return;
  1931. for (i = 0; i < ARRAY_SIZE(path_type_desc); i++) {
  1932. if (path_type_desc[i].type != type)
  1933. continue;
  1934. for (j = 0; j < ARRAY_SIZE(path_status_desc); j++) {
  1935. if (path_status_desc[j].status != status)
  1936. continue;
  1937. if (type == IPR_PATH_CFG_IOA_PORT) {
  1938. ipr_hcam_err(hostrcb, "%s %s: Phy=%d, Link rate=%s, WWN=%08X%08X\n",
  1939. path_status_desc[j].desc, path_type_desc[i].desc,
  1940. cfg->phy, link_rate[cfg->link_rate & IPR_PHY_LINK_RATE_MASK],
  1941. be32_to_cpu(cfg->wwid[0]), be32_to_cpu(cfg->wwid[1]));
  1942. } else {
  1943. if (cfg->cascaded_expander == 0xff && cfg->phy == 0xff) {
  1944. ipr_hcam_err(hostrcb, "%s %s: Link rate=%s, WWN=%08X%08X\n",
  1945. path_status_desc[j].desc, path_type_desc[i].desc,
  1946. link_rate[cfg->link_rate & IPR_PHY_LINK_RATE_MASK],
  1947. be32_to_cpu(cfg->wwid[0]), be32_to_cpu(cfg->wwid[1]));
  1948. } else if (cfg->cascaded_expander == 0xff) {
  1949. ipr_hcam_err(hostrcb, "%s %s: Phy=%d, Link rate=%s, "
  1950. "WWN=%08X%08X\n", path_status_desc[j].desc,
  1951. path_type_desc[i].desc, cfg->phy,
  1952. link_rate[cfg->link_rate & IPR_PHY_LINK_RATE_MASK],
  1953. be32_to_cpu(cfg->wwid[0]), be32_to_cpu(cfg->wwid[1]));
  1954. } else if (cfg->phy == 0xff) {
  1955. ipr_hcam_err(hostrcb, "%s %s: Cascade=%d, Link rate=%s, "
  1956. "WWN=%08X%08X\n", path_status_desc[j].desc,
  1957. path_type_desc[i].desc, cfg->cascaded_expander,
  1958. link_rate[cfg->link_rate & IPR_PHY_LINK_RATE_MASK],
  1959. be32_to_cpu(cfg->wwid[0]), be32_to_cpu(cfg->wwid[1]));
  1960. } else {
  1961. ipr_hcam_err(hostrcb, "%s %s: Cascade=%d, Phy=%d, Link rate=%s "
  1962. "WWN=%08X%08X\n", path_status_desc[j].desc,
  1963. path_type_desc[i].desc, cfg->cascaded_expander, cfg->phy,
  1964. link_rate[cfg->link_rate & IPR_PHY_LINK_RATE_MASK],
  1965. be32_to_cpu(cfg->wwid[0]), be32_to_cpu(cfg->wwid[1]));
  1966. }
  1967. }
  1968. return;
  1969. }
  1970. }
  1971. ipr_hcam_err(hostrcb, "Path element=%02X: Cascade=%d Phy=%d Link rate=%s "
  1972. "WWN=%08X%08X\n", cfg->type_status, cfg->cascaded_expander, cfg->phy,
  1973. link_rate[cfg->link_rate & IPR_PHY_LINK_RATE_MASK],
  1974. be32_to_cpu(cfg->wwid[0]), be32_to_cpu(cfg->wwid[1]));
  1975. }
  1976. /**
  1977. * ipr_log64_path_elem - Log a fabric path element.
  1978. * @hostrcb: hostrcb struct
  1979. * @cfg: fabric path element struct
  1980. *
  1981. * Return value:
  1982. * none
  1983. **/
  1984. static void ipr_log64_path_elem(struct ipr_hostrcb *hostrcb,
  1985. struct ipr_hostrcb64_config_element *cfg)
  1986. {
  1987. int i, j;
  1988. u8 desc_id = cfg->descriptor_id & IPR_DESCRIPTOR_MASK;
  1989. u8 type = cfg->type_status & IPR_PATH_CFG_TYPE_MASK;
  1990. u8 status = cfg->type_status & IPR_PATH_CFG_STATUS_MASK;
  1991. char buffer[IPR_MAX_RES_PATH_LENGTH];
  1992. if (type == IPR_PATH_CFG_NOT_EXIST || desc_id != IPR_DESCRIPTOR_SIS64)
  1993. return;
  1994. for (i = 0; i < ARRAY_SIZE(path_type_desc); i++) {
  1995. if (path_type_desc[i].type != type)
  1996. continue;
  1997. for (j = 0; j < ARRAY_SIZE(path_status_desc); j++) {
  1998. if (path_status_desc[j].status != status)
  1999. continue;
  2000. ipr_hcam_err(hostrcb, "%s %s: Resource Path=%s, Link rate=%s, WWN=%08X%08X\n",
  2001. path_status_desc[j].desc, path_type_desc[i].desc,
  2002. ipr_format_res_path(hostrcb->ioa_cfg,
  2003. cfg->res_path, buffer, sizeof(buffer)),
  2004. link_rate[cfg->link_rate & IPR_PHY_LINK_RATE_MASK],
  2005. be32_to_cpu(cfg->wwid[0]),
  2006. be32_to_cpu(cfg->wwid[1]));
  2007. return;
  2008. }
  2009. }
  2010. ipr_hcam_err(hostrcb, "Path element=%02X: Resource Path=%s, Link rate=%s "
  2011. "WWN=%08X%08X\n", cfg->type_status,
  2012. ipr_format_res_path(hostrcb->ioa_cfg,
  2013. cfg->res_path, buffer, sizeof(buffer)),
  2014. link_rate[cfg->link_rate & IPR_PHY_LINK_RATE_MASK],
  2015. be32_to_cpu(cfg->wwid[0]), be32_to_cpu(cfg->wwid[1]));
  2016. }
  2017. /**
  2018. * ipr_log_fabric_error - Log a fabric error.
  2019. * @ioa_cfg: ioa config struct
  2020. * @hostrcb: hostrcb struct
  2021. *
  2022. * Return value:
  2023. * none
  2024. **/
  2025. static void ipr_log_fabric_error(struct ipr_ioa_cfg *ioa_cfg,
  2026. struct ipr_hostrcb *hostrcb)
  2027. {
  2028. struct ipr_hostrcb_type_20_error *error;
  2029. struct ipr_hostrcb_fabric_desc *fabric;
  2030. struct ipr_hostrcb_config_element *cfg;
  2031. int i, add_len;
  2032. error = &hostrcb->hcam.u.error.u.type_20_error;
  2033. error->failure_reason[sizeof(error->failure_reason) - 1] = '\0';
  2034. ipr_hcam_err(hostrcb, "%s\n", error->failure_reason);
  2035. add_len = be32_to_cpu(hostrcb->hcam.length) -
  2036. (offsetof(struct ipr_hostrcb_error, u) +
  2037. offsetof(struct ipr_hostrcb_type_20_error, desc));
  2038. for (i = 0, fabric = error->desc; i < error->num_entries; i++) {
  2039. ipr_log_fabric_path(hostrcb, fabric);
  2040. for_each_fabric_cfg(fabric, cfg)
  2041. ipr_log_path_elem(hostrcb, cfg);
  2042. add_len -= be16_to_cpu(fabric->length);
  2043. fabric = (struct ipr_hostrcb_fabric_desc *)
  2044. ((unsigned long)fabric + be16_to_cpu(fabric->length));
  2045. }
  2046. ipr_log_hex_data(ioa_cfg, (__be32 *)fabric, add_len);
  2047. }
  2048. /**
  2049. * ipr_log_sis64_array_error - Log a sis64 array error.
  2050. * @ioa_cfg: ioa config struct
  2051. * @hostrcb: hostrcb struct
  2052. *
  2053. * Return value:
  2054. * none
  2055. **/
  2056. static void ipr_log_sis64_array_error(struct ipr_ioa_cfg *ioa_cfg,
  2057. struct ipr_hostrcb *hostrcb)
  2058. {
  2059. int i, num_entries;
  2060. struct ipr_hostrcb_type_24_error *error;
  2061. struct ipr_hostrcb64_array_data_entry *array_entry;
  2062. char buffer[IPR_MAX_RES_PATH_LENGTH];
  2063. const u8 zero_sn[IPR_SERIAL_NUM_LEN] = { [0 ... IPR_SERIAL_NUM_LEN-1] = '0' };
  2064. error = &hostrcb->hcam.u.error64.u.type_24_error;
  2065. ipr_err_separator;
  2066. ipr_err("RAID %s Array Configuration: %s\n",
  2067. error->protection_level,
  2068. ipr_format_res_path(ioa_cfg, error->last_res_path,
  2069. buffer, sizeof(buffer)));
  2070. ipr_err_separator;
  2071. array_entry = error->array_member;
  2072. num_entries = min_t(u32, error->num_entries,
  2073. ARRAY_SIZE(error->array_member));
  2074. for (i = 0; i < num_entries; i++, array_entry++) {
  2075. if (!memcmp(array_entry->vpd.vpd.sn, zero_sn, IPR_SERIAL_NUM_LEN))
  2076. continue;
  2077. if (error->exposed_mode_adn == i)
  2078. ipr_err("Exposed Array Member %d:\n", i);
  2079. else
  2080. ipr_err("Array Member %d:\n", i);
  2081. ipr_err("Array Member %d:\n", i);
  2082. ipr_log_ext_vpd(&array_entry->vpd);
  2083. ipr_err("Current Location: %s\n",
  2084. ipr_format_res_path(ioa_cfg, array_entry->res_path,
  2085. buffer, sizeof(buffer)));
  2086. ipr_err("Expected Location: %s\n",
  2087. ipr_format_res_path(ioa_cfg,
  2088. array_entry->expected_res_path,
  2089. buffer, sizeof(buffer)));
  2090. ipr_err_separator;
  2091. }
  2092. }
  2093. /**
  2094. * ipr_log_sis64_fabric_error - Log a sis64 fabric error.
  2095. * @ioa_cfg: ioa config struct
  2096. * @hostrcb: hostrcb struct
  2097. *
  2098. * Return value:
  2099. * none
  2100. **/
  2101. static void ipr_log_sis64_fabric_error(struct ipr_ioa_cfg *ioa_cfg,
  2102. struct ipr_hostrcb *hostrcb)
  2103. {
  2104. struct ipr_hostrcb_type_30_error *error;
  2105. struct ipr_hostrcb64_fabric_desc *fabric;
  2106. struct ipr_hostrcb64_config_element *cfg;
  2107. int i, add_len;
  2108. error = &hostrcb->hcam.u.error64.u.type_30_error;
  2109. error->failure_reason[sizeof(error->failure_reason) - 1] = '\0';
  2110. ipr_hcam_err(hostrcb, "%s\n", error->failure_reason);
  2111. add_len = be32_to_cpu(hostrcb->hcam.length) -
  2112. (offsetof(struct ipr_hostrcb64_error, u) +
  2113. offsetof(struct ipr_hostrcb_type_30_error, desc));
  2114. for (i = 0, fabric = error->desc; i < error->num_entries; i++) {
  2115. ipr_log64_fabric_path(hostrcb, fabric);
  2116. for_each_fabric_cfg(fabric, cfg)
  2117. ipr_log64_path_elem(hostrcb, cfg);
  2118. add_len -= be16_to_cpu(fabric->length);
  2119. fabric = (struct ipr_hostrcb64_fabric_desc *)
  2120. ((unsigned long)fabric + be16_to_cpu(fabric->length));
  2121. }
  2122. ipr_log_hex_data(ioa_cfg, (__be32 *)fabric, add_len);
  2123. }
  2124. /**
  2125. * ipr_log_generic_error - Log an adapter error.
  2126. * @ioa_cfg: ioa config struct
  2127. * @hostrcb: hostrcb struct
  2128. *
  2129. * Return value:
  2130. * none
  2131. **/
  2132. static void ipr_log_generic_error(struct ipr_ioa_cfg *ioa_cfg,
  2133. struct ipr_hostrcb *hostrcb)
  2134. {
  2135. ipr_log_hex_data(ioa_cfg, hostrcb->hcam.u.raw.data,
  2136. be32_to_cpu(hostrcb->hcam.length));
  2137. }
  2138. /**
  2139. * ipr_log_sis64_device_error - Log a cache error.
  2140. * @ioa_cfg: ioa config struct
  2141. * @hostrcb: hostrcb struct
  2142. *
  2143. * Return value:
  2144. * none
  2145. **/
  2146. static void ipr_log_sis64_device_error(struct ipr_ioa_cfg *ioa_cfg,
  2147. struct ipr_hostrcb *hostrcb)
  2148. {
  2149. struct ipr_hostrcb_type_21_error *error;
  2150. char buffer[IPR_MAX_RES_PATH_LENGTH];
  2151. error = &hostrcb->hcam.u.error64.u.type_21_error;
  2152. ipr_err("-----Failing Device Information-----\n");
  2153. ipr_err("World Wide Unique ID: %08X%08X%08X%08X\n",
  2154. be32_to_cpu(error->wwn[0]), be32_to_cpu(error->wwn[1]),
  2155. be32_to_cpu(error->wwn[2]), be32_to_cpu(error->wwn[3]));
  2156. ipr_err("Device Resource Path: %s\n",
  2157. __ipr_format_res_path(error->res_path,
  2158. buffer, sizeof(buffer)));
  2159. error->primary_problem_desc[sizeof(error->primary_problem_desc) - 1] = '\0';
  2160. error->second_problem_desc[sizeof(error->second_problem_desc) - 1] = '\0';
  2161. ipr_err("Primary Problem Description: %s\n", error->primary_problem_desc);
  2162. ipr_err("Secondary Problem Description: %s\n", error->second_problem_desc);
  2163. ipr_err("SCSI Sense Data:\n");
  2164. ipr_log_hex_data(ioa_cfg, error->sense_data, sizeof(error->sense_data));
  2165. ipr_err("SCSI Command Descriptor Block: \n");
  2166. ipr_log_hex_data(ioa_cfg, error->cdb, sizeof(error->cdb));
  2167. ipr_err("Additional IOA Data:\n");
  2168. ipr_log_hex_data(ioa_cfg, error->ioa_data, be32_to_cpu(error->length_of_error));
  2169. }
  2170. /**
  2171. * ipr_get_error - Find the specfied IOASC in the ipr_error_table.
  2172. * @ioasc: IOASC
  2173. *
  2174. * This function will return the index of into the ipr_error_table
  2175. * for the specified IOASC. If the IOASC is not in the table,
  2176. * 0 will be returned, which points to the entry used for unknown errors.
  2177. *
  2178. * Return value:
  2179. * index into the ipr_error_table
  2180. **/
  2181. static u32 ipr_get_error(u32 ioasc)
  2182. {
  2183. int i;
  2184. for (i = 0; i < ARRAY_SIZE(ipr_error_table); i++)
  2185. if (ipr_error_table[i].ioasc == (ioasc & IPR_IOASC_IOASC_MASK))
  2186. return i;
  2187. return 0;
  2188. }
  2189. /**
  2190. * ipr_handle_log_data - Log an adapter error.
  2191. * @ioa_cfg: ioa config struct
  2192. * @hostrcb: hostrcb struct
  2193. *
  2194. * This function logs an adapter error to the system.
  2195. *
  2196. * Return value:
  2197. * none
  2198. **/
  2199. static void ipr_handle_log_data(struct ipr_ioa_cfg *ioa_cfg,
  2200. struct ipr_hostrcb *hostrcb)
  2201. {
  2202. u32 ioasc;
  2203. int error_index;
  2204. struct ipr_hostrcb_type_21_error *error;
  2205. if (hostrcb->hcam.notify_type != IPR_HOST_RCB_NOTIF_TYPE_ERROR_LOG_ENTRY)
  2206. return;
  2207. if (hostrcb->hcam.notifications_lost == IPR_HOST_RCB_NOTIFICATIONS_LOST)
  2208. dev_err(&ioa_cfg->pdev->dev, "Error notifications lost\n");
  2209. if (ioa_cfg->sis64)
  2210. ioasc = be32_to_cpu(hostrcb->hcam.u.error64.fd_ioasc);
  2211. else
  2212. ioasc = be32_to_cpu(hostrcb->hcam.u.error.fd_ioasc);
  2213. if (!ioa_cfg->sis64 && (ioasc == IPR_IOASC_BUS_WAS_RESET ||
  2214. ioasc == IPR_IOASC_BUS_WAS_RESET_BY_OTHER)) {
  2215. /* Tell the midlayer we had a bus reset so it will handle the UA properly */
  2216. scsi_report_bus_reset(ioa_cfg->host,
  2217. hostrcb->hcam.u.error.fd_res_addr.bus);
  2218. }
  2219. error_index = ipr_get_error(ioasc);
  2220. if (!ipr_error_table[error_index].log_hcam)
  2221. return;
  2222. if (ioasc == IPR_IOASC_HW_CMD_FAILED &&
  2223. hostrcb->hcam.overlay_id == IPR_HOST_RCB_OVERLAY_ID_21) {
  2224. error = &hostrcb->hcam.u.error64.u.type_21_error;
  2225. if (((be32_to_cpu(error->sense_data[0]) & 0x0000ff00) >> 8) == ILLEGAL_REQUEST &&
  2226. ioa_cfg->log_level <= IPR_DEFAULT_LOG_LEVEL)
  2227. return;
  2228. }
  2229. ipr_hcam_err(hostrcb, "%s\n", ipr_error_table[error_index].error);
  2230. /* Set indication we have logged an error */
  2231. ioa_cfg->errors_logged++;
  2232. if (ioa_cfg->log_level < ipr_error_table[error_index].log_hcam)
  2233. return;
  2234. if (be32_to_cpu(hostrcb->hcam.length) > sizeof(hostrcb->hcam.u.raw))
  2235. hostrcb->hcam.length = cpu_to_be32(sizeof(hostrcb->hcam.u.raw));
  2236. switch (hostrcb->hcam.overlay_id) {
  2237. case IPR_HOST_RCB_OVERLAY_ID_2:
  2238. ipr_log_cache_error(ioa_cfg, hostrcb);
  2239. break;
  2240. case IPR_HOST_RCB_OVERLAY_ID_3:
  2241. ipr_log_config_error(ioa_cfg, hostrcb);
  2242. break;
  2243. case IPR_HOST_RCB_OVERLAY_ID_4:
  2244. case IPR_HOST_RCB_OVERLAY_ID_6:
  2245. ipr_log_array_error(ioa_cfg, hostrcb);
  2246. break;
  2247. case IPR_HOST_RCB_OVERLAY_ID_7:
  2248. ipr_log_dual_ioa_error(ioa_cfg, hostrcb);
  2249. break;
  2250. case IPR_HOST_RCB_OVERLAY_ID_12:
  2251. ipr_log_enhanced_cache_error(ioa_cfg, hostrcb);
  2252. break;
  2253. case IPR_HOST_RCB_OVERLAY_ID_13:
  2254. ipr_log_enhanced_config_error(ioa_cfg, hostrcb);
  2255. break;
  2256. case IPR_HOST_RCB_OVERLAY_ID_14:
  2257. case IPR_HOST_RCB_OVERLAY_ID_16:
  2258. ipr_log_enhanced_array_error(ioa_cfg, hostrcb);
  2259. break;
  2260. case IPR_HOST_RCB_OVERLAY_ID_17:
  2261. ipr_log_enhanced_dual_ioa_error(ioa_cfg, hostrcb);
  2262. break;
  2263. case IPR_HOST_RCB_OVERLAY_ID_20:
  2264. ipr_log_fabric_error(ioa_cfg, hostrcb);
  2265. break;
  2266. case IPR_HOST_RCB_OVERLAY_ID_21:
  2267. ipr_log_sis64_device_error(ioa_cfg, hostrcb);
  2268. break;
  2269. case IPR_HOST_RCB_OVERLAY_ID_23:
  2270. ipr_log_sis64_config_error(ioa_cfg, hostrcb);
  2271. break;
  2272. case IPR_HOST_RCB_OVERLAY_ID_24:
  2273. case IPR_HOST_RCB_OVERLAY_ID_26:
  2274. ipr_log_sis64_array_error(ioa_cfg, hostrcb);
  2275. break;
  2276. case IPR_HOST_RCB_OVERLAY_ID_30:
  2277. ipr_log_sis64_fabric_error(ioa_cfg, hostrcb);
  2278. break;
  2279. case IPR_HOST_RCB_OVERLAY_ID_1:
  2280. case IPR_HOST_RCB_OVERLAY_ID_DEFAULT:
  2281. default:
  2282. ipr_log_generic_error(ioa_cfg, hostrcb);
  2283. break;
  2284. }
  2285. }
  2286. /**
  2287. * ipr_process_error - Op done function for an adapter error log.
  2288. * @ipr_cmd: ipr command struct
  2289. *
  2290. * This function is the op done function for an error log host
  2291. * controlled async from the adapter. It will log the error and
  2292. * send the HCAM back to the adapter.
  2293. *
  2294. * Return value:
  2295. * none
  2296. **/
  2297. static void ipr_process_error(struct ipr_cmnd *ipr_cmd)
  2298. {
  2299. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  2300. struct ipr_hostrcb *hostrcb = ipr_cmd->u.hostrcb;
  2301. u32 ioasc = be32_to_cpu(ipr_cmd->s.ioasa.hdr.ioasc);
  2302. u32 fd_ioasc;
  2303. if (ioa_cfg->sis64)
  2304. fd_ioasc = be32_to_cpu(hostrcb->hcam.u.error64.fd_ioasc);
  2305. else
  2306. fd_ioasc = be32_to_cpu(hostrcb->hcam.u.error.fd_ioasc);
  2307. list_del(&hostrcb->queue);
  2308. list_add_tail(&ipr_cmd->queue, &ipr_cmd->hrrq->hrrq_free_q);
  2309. if (!ioasc) {
  2310. ipr_handle_log_data(ioa_cfg, hostrcb);
  2311. if (fd_ioasc == IPR_IOASC_NR_IOA_RESET_REQUIRED)
  2312. ipr_initiate_ioa_reset(ioa_cfg, IPR_SHUTDOWN_ABBREV);
  2313. } else if (ioasc != IPR_IOASC_IOA_WAS_RESET &&
  2314. ioasc != IPR_IOASC_ABORTED_CMD_TERM_BY_HOST) {
  2315. dev_err(&ioa_cfg->pdev->dev,
  2316. "Host RCB failed with IOASC: 0x%08X\n", ioasc);
  2317. }
  2318. ipr_send_hcam(ioa_cfg, IPR_HCAM_CDB_OP_CODE_LOG_DATA, hostrcb);
  2319. }
  2320. /**
  2321. * ipr_timeout - An internally generated op has timed out.
  2322. * @ipr_cmd: ipr command struct
  2323. *
  2324. * This function blocks host requests and initiates an
  2325. * adapter reset.
  2326. *
  2327. * Return value:
  2328. * none
  2329. **/
  2330. static void ipr_timeout(struct ipr_cmnd *ipr_cmd)
  2331. {
  2332. unsigned long lock_flags = 0;
  2333. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  2334. ENTER;
  2335. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  2336. ioa_cfg->errors_logged++;
  2337. dev_err(&ioa_cfg->pdev->dev,
  2338. "Adapter being reset due to command timeout.\n");
  2339. if (WAIT_FOR_DUMP == ioa_cfg->sdt_state)
  2340. ioa_cfg->sdt_state = GET_DUMP;
  2341. if (!ioa_cfg->in_reset_reload || ioa_cfg->reset_cmd == ipr_cmd)
  2342. ipr_initiate_ioa_reset(ioa_cfg, IPR_SHUTDOWN_NONE);
  2343. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  2344. LEAVE;
  2345. }
  2346. /**
  2347. * ipr_oper_timeout - Adapter timed out transitioning to operational
  2348. * @ipr_cmd: ipr command struct
  2349. *
  2350. * This function blocks host requests and initiates an
  2351. * adapter reset.
  2352. *
  2353. * Return value:
  2354. * none
  2355. **/
  2356. static void ipr_oper_timeout(struct ipr_cmnd *ipr_cmd)
  2357. {
  2358. unsigned long lock_flags = 0;
  2359. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  2360. ENTER;
  2361. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  2362. ioa_cfg->errors_logged++;
  2363. dev_err(&ioa_cfg->pdev->dev,
  2364. "Adapter timed out transitioning to operational.\n");
  2365. if (WAIT_FOR_DUMP == ioa_cfg->sdt_state)
  2366. ioa_cfg->sdt_state = GET_DUMP;
  2367. if (!ioa_cfg->in_reset_reload || ioa_cfg->reset_cmd == ipr_cmd) {
  2368. if (ipr_fastfail)
  2369. ioa_cfg->reset_retries += IPR_NUM_RESET_RELOAD_RETRIES;
  2370. ipr_initiate_ioa_reset(ioa_cfg, IPR_SHUTDOWN_NONE);
  2371. }
  2372. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  2373. LEAVE;
  2374. }
  2375. /**
  2376. * ipr_find_ses_entry - Find matching SES in SES table
  2377. * @res: resource entry struct of SES
  2378. *
  2379. * Return value:
  2380. * pointer to SES table entry / NULL on failure
  2381. **/
  2382. static const struct ipr_ses_table_entry *
  2383. ipr_find_ses_entry(struct ipr_resource_entry *res)
  2384. {
  2385. int i, j, matches;
  2386. struct ipr_std_inq_vpids *vpids;
  2387. const struct ipr_ses_table_entry *ste = ipr_ses_table;
  2388. for (i = 0; i < ARRAY_SIZE(ipr_ses_table); i++, ste++) {
  2389. for (j = 0, matches = 0; j < IPR_PROD_ID_LEN; j++) {
  2390. if (ste->compare_product_id_byte[j] == 'X') {
  2391. vpids = &res->std_inq_data.vpids;
  2392. if (vpids->product_id[j] == ste->product_id[j])
  2393. matches++;
  2394. else
  2395. break;
  2396. } else
  2397. matches++;
  2398. }
  2399. if (matches == IPR_PROD_ID_LEN)
  2400. return ste;
  2401. }
  2402. return NULL;
  2403. }
  2404. /**
  2405. * ipr_get_max_scsi_speed - Determine max SCSI speed for a given bus
  2406. * @ioa_cfg: ioa config struct
  2407. * @bus: SCSI bus
  2408. * @bus_width: bus width
  2409. *
  2410. * Return value:
  2411. * SCSI bus speed in units of 100KHz, 1600 is 160 MHz
  2412. * For a 2-byte wide SCSI bus, the maximum transfer speed is
  2413. * twice the maximum transfer rate (e.g. for a wide enabled bus,
  2414. * max 160MHz = max 320MB/sec).
  2415. **/
  2416. static u32 ipr_get_max_scsi_speed(struct ipr_ioa_cfg *ioa_cfg, u8 bus, u8 bus_width)
  2417. {
  2418. struct ipr_resource_entry *res;
  2419. const struct ipr_ses_table_entry *ste;
  2420. u32 max_xfer_rate = IPR_MAX_SCSI_RATE(bus_width);
  2421. /* Loop through each config table entry in the config table buffer */
  2422. list_for_each_entry(res, &ioa_cfg->used_res_q, queue) {
  2423. if (!(IPR_IS_SES_DEVICE(res->std_inq_data)))
  2424. continue;
  2425. if (bus != res->bus)
  2426. continue;
  2427. if (!(ste = ipr_find_ses_entry(res)))
  2428. continue;
  2429. max_xfer_rate = (ste->max_bus_speed_limit * 10) / (bus_width / 8);
  2430. }
  2431. return max_xfer_rate;
  2432. }
  2433. /**
  2434. * ipr_wait_iodbg_ack - Wait for an IODEBUG ACK from the IOA
  2435. * @ioa_cfg: ioa config struct
  2436. * @max_delay: max delay in micro-seconds to wait
  2437. *
  2438. * Waits for an IODEBUG ACK from the IOA, doing busy looping.
  2439. *
  2440. * Return value:
  2441. * 0 on success / other on failure
  2442. **/
  2443. static int ipr_wait_iodbg_ack(struct ipr_ioa_cfg *ioa_cfg, int max_delay)
  2444. {
  2445. volatile u32 pcii_reg;
  2446. int delay = 1;
  2447. /* Read interrupt reg until IOA signals IO Debug Acknowledge */
  2448. while (delay < max_delay) {
  2449. pcii_reg = readl(ioa_cfg->regs.sense_interrupt_reg);
  2450. if (pcii_reg & IPR_PCII_IO_DEBUG_ACKNOWLEDGE)
  2451. return 0;
  2452. /* udelay cannot be used if delay is more than a few milliseconds */
  2453. if ((delay / 1000) > MAX_UDELAY_MS)
  2454. mdelay(delay / 1000);
  2455. else
  2456. udelay(delay);
  2457. delay += delay;
  2458. }
  2459. return -EIO;
  2460. }
  2461. /**
  2462. * ipr_get_sis64_dump_data_section - Dump IOA memory
  2463. * @ioa_cfg: ioa config struct
  2464. * @start_addr: adapter address to dump
  2465. * @dest: destination kernel buffer
  2466. * @length_in_words: length to dump in 4 byte words
  2467. *
  2468. * Return value:
  2469. * 0 on success
  2470. **/
  2471. static int ipr_get_sis64_dump_data_section(struct ipr_ioa_cfg *ioa_cfg,
  2472. u32 start_addr,
  2473. __be32 *dest, u32 length_in_words)
  2474. {
  2475. int i;
  2476. for (i = 0; i < length_in_words; i++) {
  2477. writel(start_addr+(i*4), ioa_cfg->regs.dump_addr_reg);
  2478. *dest = cpu_to_be32(readl(ioa_cfg->regs.dump_data_reg));
  2479. dest++;
  2480. }
  2481. return 0;
  2482. }
  2483. /**
  2484. * ipr_get_ldump_data_section - Dump IOA memory
  2485. * @ioa_cfg: ioa config struct
  2486. * @start_addr: adapter address to dump
  2487. * @dest: destination kernel buffer
  2488. * @length_in_words: length to dump in 4 byte words
  2489. *
  2490. * Return value:
  2491. * 0 on success / -EIO on failure
  2492. **/
  2493. static int ipr_get_ldump_data_section(struct ipr_ioa_cfg *ioa_cfg,
  2494. u32 start_addr,
  2495. __be32 *dest, u32 length_in_words)
  2496. {
  2497. volatile u32 temp_pcii_reg;
  2498. int i, delay = 0;
  2499. if (ioa_cfg->sis64)
  2500. return ipr_get_sis64_dump_data_section(ioa_cfg, start_addr,
  2501. dest, length_in_words);
  2502. /* Write IOA interrupt reg starting LDUMP state */
  2503. writel((IPR_UPROCI_RESET_ALERT | IPR_UPROCI_IO_DEBUG_ALERT),
  2504. ioa_cfg->regs.set_uproc_interrupt_reg32);
  2505. /* Wait for IO debug acknowledge */
  2506. if (ipr_wait_iodbg_ack(ioa_cfg,
  2507. IPR_LDUMP_MAX_LONG_ACK_DELAY_IN_USEC)) {
  2508. dev_err(&ioa_cfg->pdev->dev,
  2509. "IOA dump long data transfer timeout\n");
  2510. return -EIO;
  2511. }
  2512. /* Signal LDUMP interlocked - clear IO debug ack */
  2513. writel(IPR_PCII_IO_DEBUG_ACKNOWLEDGE,
  2514. ioa_cfg->regs.clr_interrupt_reg);
  2515. /* Write Mailbox with starting address */
  2516. writel(start_addr, ioa_cfg->ioa_mailbox);
  2517. /* Signal address valid - clear IOA Reset alert */
  2518. writel(IPR_UPROCI_RESET_ALERT,
  2519. ioa_cfg->regs.clr_uproc_interrupt_reg32);
  2520. for (i = 0; i < length_in_words; i++) {
  2521. /* Wait for IO debug acknowledge */
  2522. if (ipr_wait_iodbg_ack(ioa_cfg,
  2523. IPR_LDUMP_MAX_SHORT_ACK_DELAY_IN_USEC)) {
  2524. dev_err(&ioa_cfg->pdev->dev,
  2525. "IOA dump short data transfer timeout\n");
  2526. return -EIO;
  2527. }
  2528. /* Read data from mailbox and increment destination pointer */
  2529. *dest = cpu_to_be32(readl(ioa_cfg->ioa_mailbox));
  2530. dest++;
  2531. /* For all but the last word of data, signal data received */
  2532. if (i < (length_in_words - 1)) {
  2533. /* Signal dump data received - Clear IO debug Ack */
  2534. writel(IPR_PCII_IO_DEBUG_ACKNOWLEDGE,
  2535. ioa_cfg->regs.clr_interrupt_reg);
  2536. }
  2537. }
  2538. /* Signal end of block transfer. Set reset alert then clear IO debug ack */
  2539. writel(IPR_UPROCI_RESET_ALERT,
  2540. ioa_cfg->regs.set_uproc_interrupt_reg32);
  2541. writel(IPR_UPROCI_IO_DEBUG_ALERT,
  2542. ioa_cfg->regs.clr_uproc_interrupt_reg32);
  2543. /* Signal dump data received - Clear IO debug Ack */
  2544. writel(IPR_PCII_IO_DEBUG_ACKNOWLEDGE,
  2545. ioa_cfg->regs.clr_interrupt_reg);
  2546. /* Wait for IOA to signal LDUMP exit - IOA reset alert will be cleared */
  2547. while (delay < IPR_LDUMP_MAX_SHORT_ACK_DELAY_IN_USEC) {
  2548. temp_pcii_reg =
  2549. readl(ioa_cfg->regs.sense_uproc_interrupt_reg32);
  2550. if (!(temp_pcii_reg & IPR_UPROCI_RESET_ALERT))
  2551. return 0;
  2552. udelay(10);
  2553. delay += 10;
  2554. }
  2555. return 0;
  2556. }
  2557. #ifdef CONFIG_SCSI_IPR_DUMP
  2558. /**
  2559. * ipr_sdt_copy - Copy Smart Dump Table to kernel buffer
  2560. * @ioa_cfg: ioa config struct
  2561. * @pci_address: adapter address
  2562. * @length: length of data to copy
  2563. *
  2564. * Copy data from PCI adapter to kernel buffer.
  2565. * Note: length MUST be a 4 byte multiple
  2566. * Return value:
  2567. * 0 on success / other on failure
  2568. **/
  2569. static int ipr_sdt_copy(struct ipr_ioa_cfg *ioa_cfg,
  2570. unsigned long pci_address, u32 length)
  2571. {
  2572. int bytes_copied = 0;
  2573. int cur_len, rc, rem_len, rem_page_len, max_dump_size;
  2574. __be32 *page;
  2575. unsigned long lock_flags = 0;
  2576. struct ipr_ioa_dump *ioa_dump = &ioa_cfg->dump->ioa_dump;
  2577. if (ioa_cfg->sis64)
  2578. max_dump_size = IPR_FMT3_MAX_IOA_DUMP_SIZE;
  2579. else
  2580. max_dump_size = IPR_FMT2_MAX_IOA_DUMP_SIZE;
  2581. while (bytes_copied < length &&
  2582. (ioa_dump->hdr.len + bytes_copied) < max_dump_size) {
  2583. if (ioa_dump->page_offset >= PAGE_SIZE ||
  2584. ioa_dump->page_offset == 0) {
  2585. page = (__be32 *)__get_free_page(GFP_ATOMIC);
  2586. if (!page) {
  2587. ipr_trace;
  2588. return bytes_copied;
  2589. }
  2590. ioa_dump->page_offset = 0;
  2591. ioa_dump->ioa_data[ioa_dump->next_page_index] = page;
  2592. ioa_dump->next_page_index++;
  2593. } else
  2594. page = ioa_dump->ioa_data[ioa_dump->next_page_index - 1];
  2595. rem_len = length - bytes_copied;
  2596. rem_page_len = PAGE_SIZE - ioa_dump->page_offset;
  2597. cur_len = min(rem_len, rem_page_len);
  2598. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  2599. if (ioa_cfg->sdt_state == ABORT_DUMP) {
  2600. rc = -EIO;
  2601. } else {
  2602. rc = ipr_get_ldump_data_section(ioa_cfg,
  2603. pci_address + bytes_copied,
  2604. &page[ioa_dump->page_offset / 4],
  2605. (cur_len / sizeof(u32)));
  2606. }
  2607. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  2608. if (!rc) {
  2609. ioa_dump->page_offset += cur_len;
  2610. bytes_copied += cur_len;
  2611. } else {
  2612. ipr_trace;
  2613. break;
  2614. }
  2615. schedule();
  2616. }
  2617. return bytes_copied;
  2618. }
  2619. /**
  2620. * ipr_init_dump_entry_hdr - Initialize a dump entry header.
  2621. * @hdr: dump entry header struct
  2622. *
  2623. * Return value:
  2624. * nothing
  2625. **/
  2626. static void ipr_init_dump_entry_hdr(struct ipr_dump_entry_header *hdr)
  2627. {
  2628. hdr->eye_catcher = IPR_DUMP_EYE_CATCHER;
  2629. hdr->num_elems = 1;
  2630. hdr->offset = sizeof(*hdr);
  2631. hdr->status = IPR_DUMP_STATUS_SUCCESS;
  2632. }
  2633. /**
  2634. * ipr_dump_ioa_type_data - Fill in the adapter type in the dump.
  2635. * @ioa_cfg: ioa config struct
  2636. * @driver_dump: driver dump struct
  2637. *
  2638. * Return value:
  2639. * nothing
  2640. **/
  2641. static void ipr_dump_ioa_type_data(struct ipr_ioa_cfg *ioa_cfg,
  2642. struct ipr_driver_dump *driver_dump)
  2643. {
  2644. struct ipr_inquiry_page3 *ucode_vpd = &ioa_cfg->vpd_cbs->page3_data;
  2645. ipr_init_dump_entry_hdr(&driver_dump->ioa_type_entry.hdr);
  2646. driver_dump->ioa_type_entry.hdr.len =
  2647. sizeof(struct ipr_dump_ioa_type_entry) -
  2648. sizeof(struct ipr_dump_entry_header);
  2649. driver_dump->ioa_type_entry.hdr.data_type = IPR_DUMP_DATA_TYPE_BINARY;
  2650. driver_dump->ioa_type_entry.hdr.id = IPR_DUMP_DRIVER_TYPE_ID;
  2651. driver_dump->ioa_type_entry.type = ioa_cfg->type;
  2652. driver_dump->ioa_type_entry.fw_version = (ucode_vpd->major_release << 24) |
  2653. (ucode_vpd->card_type << 16) | (ucode_vpd->minor_release[0] << 8) |
  2654. ucode_vpd->minor_release[1];
  2655. driver_dump->hdr.num_entries++;
  2656. }
  2657. /**
  2658. * ipr_dump_version_data - Fill in the driver version in the dump.
  2659. * @ioa_cfg: ioa config struct
  2660. * @driver_dump: driver dump struct
  2661. *
  2662. * Return value:
  2663. * nothing
  2664. **/
  2665. static void ipr_dump_version_data(struct ipr_ioa_cfg *ioa_cfg,
  2666. struct ipr_driver_dump *driver_dump)
  2667. {
  2668. ipr_init_dump_entry_hdr(&driver_dump->version_entry.hdr);
  2669. driver_dump->version_entry.hdr.len =
  2670. sizeof(struct ipr_dump_version_entry) -
  2671. sizeof(struct ipr_dump_entry_header);
  2672. driver_dump->version_entry.hdr.data_type = IPR_DUMP_DATA_TYPE_ASCII;
  2673. driver_dump->version_entry.hdr.id = IPR_DUMP_DRIVER_VERSION_ID;
  2674. strcpy(driver_dump->version_entry.version, IPR_DRIVER_VERSION);
  2675. driver_dump->hdr.num_entries++;
  2676. }
  2677. /**
  2678. * ipr_dump_trace_data - Fill in the IOA trace in the dump.
  2679. * @ioa_cfg: ioa config struct
  2680. * @driver_dump: driver dump struct
  2681. *
  2682. * Return value:
  2683. * nothing
  2684. **/
  2685. static void ipr_dump_trace_data(struct ipr_ioa_cfg *ioa_cfg,
  2686. struct ipr_driver_dump *driver_dump)
  2687. {
  2688. ipr_init_dump_entry_hdr(&driver_dump->trace_entry.hdr);
  2689. driver_dump->trace_entry.hdr.len =
  2690. sizeof(struct ipr_dump_trace_entry) -
  2691. sizeof(struct ipr_dump_entry_header);
  2692. driver_dump->trace_entry.hdr.data_type = IPR_DUMP_DATA_TYPE_BINARY;
  2693. driver_dump->trace_entry.hdr.id = IPR_DUMP_TRACE_ID;
  2694. memcpy(driver_dump->trace_entry.trace, ioa_cfg->trace, IPR_TRACE_SIZE);
  2695. driver_dump->hdr.num_entries++;
  2696. }
  2697. /**
  2698. * ipr_dump_location_data - Fill in the IOA location in the dump.
  2699. * @ioa_cfg: ioa config struct
  2700. * @driver_dump: driver dump struct
  2701. *
  2702. * Return value:
  2703. * nothing
  2704. **/
  2705. static void ipr_dump_location_data(struct ipr_ioa_cfg *ioa_cfg,
  2706. struct ipr_driver_dump *driver_dump)
  2707. {
  2708. ipr_init_dump_entry_hdr(&driver_dump->location_entry.hdr);
  2709. driver_dump->location_entry.hdr.len =
  2710. sizeof(struct ipr_dump_location_entry) -
  2711. sizeof(struct ipr_dump_entry_header);
  2712. driver_dump->location_entry.hdr.data_type = IPR_DUMP_DATA_TYPE_ASCII;
  2713. driver_dump->location_entry.hdr.id = IPR_DUMP_LOCATION_ID;
  2714. strcpy(driver_dump->location_entry.location, dev_name(&ioa_cfg->pdev->dev));
  2715. driver_dump->hdr.num_entries++;
  2716. }
  2717. /**
  2718. * ipr_get_ioa_dump - Perform a dump of the driver and adapter.
  2719. * @ioa_cfg: ioa config struct
  2720. * @dump: dump struct
  2721. *
  2722. * Return value:
  2723. * nothing
  2724. **/
  2725. static void ipr_get_ioa_dump(struct ipr_ioa_cfg *ioa_cfg, struct ipr_dump *dump)
  2726. {
  2727. unsigned long start_addr, sdt_word;
  2728. unsigned long lock_flags = 0;
  2729. struct ipr_driver_dump *driver_dump = &dump->driver_dump;
  2730. struct ipr_ioa_dump *ioa_dump = &dump->ioa_dump;
  2731. u32 num_entries, max_num_entries, start_off, end_off;
  2732. u32 max_dump_size, bytes_to_copy, bytes_copied, rc;
  2733. struct ipr_sdt *sdt;
  2734. int valid = 1;
  2735. int i;
  2736. ENTER;
  2737. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  2738. if (ioa_cfg->sdt_state != READ_DUMP) {
  2739. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  2740. return;
  2741. }
  2742. if (ioa_cfg->sis64) {
  2743. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  2744. ssleep(IPR_DUMP_DELAY_SECONDS);
  2745. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  2746. }
  2747. start_addr = readl(ioa_cfg->ioa_mailbox);
  2748. if (!ioa_cfg->sis64 && !ipr_sdt_is_fmt2(start_addr)) {
  2749. dev_err(&ioa_cfg->pdev->dev,
  2750. "Invalid dump table format: %lx\n", start_addr);
  2751. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  2752. return;
  2753. }
  2754. dev_err(&ioa_cfg->pdev->dev, "Dump of IOA initiated\n");
  2755. driver_dump->hdr.eye_catcher = IPR_DUMP_EYE_CATCHER;
  2756. /* Initialize the overall dump header */
  2757. driver_dump->hdr.len = sizeof(struct ipr_driver_dump);
  2758. driver_dump->hdr.num_entries = 1;
  2759. driver_dump->hdr.first_entry_offset = sizeof(struct ipr_dump_header);
  2760. driver_dump->hdr.status = IPR_DUMP_STATUS_SUCCESS;
  2761. driver_dump->hdr.os = IPR_DUMP_OS_LINUX;
  2762. driver_dump->hdr.driver_name = IPR_DUMP_DRIVER_NAME;
  2763. ipr_dump_version_data(ioa_cfg, driver_dump);
  2764. ipr_dump_location_data(ioa_cfg, driver_dump);
  2765. ipr_dump_ioa_type_data(ioa_cfg, driver_dump);
  2766. ipr_dump_trace_data(ioa_cfg, driver_dump);
  2767. /* Update dump_header */
  2768. driver_dump->hdr.len += sizeof(struct ipr_dump_entry_header);
  2769. /* IOA Dump entry */
  2770. ipr_init_dump_entry_hdr(&ioa_dump->hdr);
  2771. ioa_dump->hdr.len = 0;
  2772. ioa_dump->hdr.data_type = IPR_DUMP_DATA_TYPE_BINARY;
  2773. ioa_dump->hdr.id = IPR_DUMP_IOA_DUMP_ID;
  2774. /* First entries in sdt are actually a list of dump addresses and
  2775. lengths to gather the real dump data. sdt represents the pointer
  2776. to the ioa generated dump table. Dump data will be extracted based
  2777. on entries in this table */
  2778. sdt = &ioa_dump->sdt;
  2779. if (ioa_cfg->sis64) {
  2780. max_num_entries = IPR_FMT3_NUM_SDT_ENTRIES;
  2781. max_dump_size = IPR_FMT3_MAX_IOA_DUMP_SIZE;
  2782. } else {
  2783. max_num_entries = IPR_FMT2_NUM_SDT_ENTRIES;
  2784. max_dump_size = IPR_FMT2_MAX_IOA_DUMP_SIZE;
  2785. }
  2786. bytes_to_copy = offsetof(struct ipr_sdt, entry) +
  2787. (max_num_entries * sizeof(struct ipr_sdt_entry));
  2788. rc = ipr_get_ldump_data_section(ioa_cfg, start_addr, (__be32 *)sdt,
  2789. bytes_to_copy / sizeof(__be32));
  2790. /* Smart Dump table is ready to use and the first entry is valid */
  2791. if (rc || ((be32_to_cpu(sdt->hdr.state) != IPR_FMT3_SDT_READY_TO_USE) &&
  2792. (be32_to_cpu(sdt->hdr.state) != IPR_FMT2_SDT_READY_TO_USE))) {
  2793. dev_err(&ioa_cfg->pdev->dev,
  2794. "Dump of IOA failed. Dump table not valid: %d, %X.\n",
  2795. rc, be32_to_cpu(sdt->hdr.state));
  2796. driver_dump->hdr.status = IPR_DUMP_STATUS_FAILED;
  2797. ioa_cfg->sdt_state = DUMP_OBTAINED;
  2798. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  2799. return;
  2800. }
  2801. num_entries = be32_to_cpu(sdt->hdr.num_entries_used);
  2802. if (num_entries > max_num_entries)
  2803. num_entries = max_num_entries;
  2804. /* Update dump length to the actual data to be copied */
  2805. dump->driver_dump.hdr.len += sizeof(struct ipr_sdt_header);
  2806. if (ioa_cfg->sis64)
  2807. dump->driver_dump.hdr.len += num_entries * sizeof(struct ipr_sdt_entry);
  2808. else
  2809. dump->driver_dump.hdr.len += max_num_entries * sizeof(struct ipr_sdt_entry);
  2810. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  2811. for (i = 0; i < num_entries; i++) {
  2812. if (ioa_dump->hdr.len > max_dump_size) {
  2813. driver_dump->hdr.status = IPR_DUMP_STATUS_QUAL_SUCCESS;
  2814. break;
  2815. }
  2816. if (sdt->entry[i].flags & IPR_SDT_VALID_ENTRY) {
  2817. sdt_word = be32_to_cpu(sdt->entry[i].start_token);
  2818. if (ioa_cfg->sis64)
  2819. bytes_to_copy = be32_to_cpu(sdt->entry[i].end_token);
  2820. else {
  2821. start_off = sdt_word & IPR_FMT2_MBX_ADDR_MASK;
  2822. end_off = be32_to_cpu(sdt->entry[i].end_token);
  2823. if (ipr_sdt_is_fmt2(sdt_word) && sdt_word)
  2824. bytes_to_copy = end_off - start_off;
  2825. else
  2826. valid = 0;
  2827. }
  2828. if (valid) {
  2829. if (bytes_to_copy > max_dump_size) {
  2830. sdt->entry[i].flags &= ~IPR_SDT_VALID_ENTRY;
  2831. continue;
  2832. }
  2833. /* Copy data from adapter to driver buffers */
  2834. bytes_copied = ipr_sdt_copy(ioa_cfg, sdt_word,
  2835. bytes_to_copy);
  2836. ioa_dump->hdr.len += bytes_copied;
  2837. if (bytes_copied != bytes_to_copy) {
  2838. driver_dump->hdr.status = IPR_DUMP_STATUS_QUAL_SUCCESS;
  2839. break;
  2840. }
  2841. }
  2842. }
  2843. }
  2844. dev_err(&ioa_cfg->pdev->dev, "Dump of IOA completed.\n");
  2845. /* Update dump_header */
  2846. driver_dump->hdr.len += ioa_dump->hdr.len;
  2847. wmb();
  2848. ioa_cfg->sdt_state = DUMP_OBTAINED;
  2849. LEAVE;
  2850. }
  2851. #else
  2852. #define ipr_get_ioa_dump(ioa_cfg, dump) do { } while (0)
  2853. #endif
  2854. /**
  2855. * ipr_release_dump - Free adapter dump memory
  2856. * @kref: kref struct
  2857. *
  2858. * Return value:
  2859. * nothing
  2860. **/
  2861. static void ipr_release_dump(struct kref *kref)
  2862. {
  2863. struct ipr_dump *dump = container_of(kref, struct ipr_dump, kref);
  2864. struct ipr_ioa_cfg *ioa_cfg = dump->ioa_cfg;
  2865. unsigned long lock_flags = 0;
  2866. int i;
  2867. ENTER;
  2868. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  2869. ioa_cfg->dump = NULL;
  2870. ioa_cfg->sdt_state = INACTIVE;
  2871. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  2872. for (i = 0; i < dump->ioa_dump.next_page_index; i++)
  2873. free_page((unsigned long) dump->ioa_dump.ioa_data[i]);
  2874. vfree(dump->ioa_dump.ioa_data);
  2875. kfree(dump);
  2876. LEAVE;
  2877. }
  2878. /**
  2879. * ipr_worker_thread - Worker thread
  2880. * @work: ioa config struct
  2881. *
  2882. * Called at task level from a work thread. This function takes care
  2883. * of adding and removing device from the mid-layer as configuration
  2884. * changes are detected by the adapter.
  2885. *
  2886. * Return value:
  2887. * nothing
  2888. **/
  2889. static void ipr_worker_thread(struct work_struct *work)
  2890. {
  2891. unsigned long lock_flags;
  2892. struct ipr_resource_entry *res;
  2893. struct scsi_device *sdev;
  2894. struct ipr_dump *dump;
  2895. struct ipr_ioa_cfg *ioa_cfg =
  2896. container_of(work, struct ipr_ioa_cfg, work_q);
  2897. u8 bus, target, lun;
  2898. int did_work;
  2899. ENTER;
  2900. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  2901. if (ioa_cfg->sdt_state == READ_DUMP) {
  2902. dump = ioa_cfg->dump;
  2903. if (!dump) {
  2904. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  2905. return;
  2906. }
  2907. kref_get(&dump->kref);
  2908. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  2909. ipr_get_ioa_dump(ioa_cfg, dump);
  2910. kref_put(&dump->kref, ipr_release_dump);
  2911. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  2912. if (ioa_cfg->sdt_state == DUMP_OBTAINED && !ioa_cfg->dump_timeout)
  2913. ipr_initiate_ioa_reset(ioa_cfg, IPR_SHUTDOWN_NONE);
  2914. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  2915. return;
  2916. }
  2917. restart:
  2918. do {
  2919. did_work = 0;
  2920. if (!ioa_cfg->hrrq[IPR_INIT_HRRQ].allow_cmds) {
  2921. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  2922. return;
  2923. }
  2924. list_for_each_entry(res, &ioa_cfg->used_res_q, queue) {
  2925. if (res->del_from_ml && res->sdev) {
  2926. did_work = 1;
  2927. sdev = res->sdev;
  2928. if (!scsi_device_get(sdev)) {
  2929. if (!res->add_to_ml)
  2930. list_move_tail(&res->queue, &ioa_cfg->free_res_q);
  2931. else
  2932. res->del_from_ml = 0;
  2933. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  2934. scsi_remove_device(sdev);
  2935. scsi_device_put(sdev);
  2936. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  2937. }
  2938. break;
  2939. }
  2940. }
  2941. } while (did_work);
  2942. list_for_each_entry(res, &ioa_cfg->used_res_q, queue) {
  2943. if (res->add_to_ml) {
  2944. bus = res->bus;
  2945. target = res->target;
  2946. lun = res->lun;
  2947. res->add_to_ml = 0;
  2948. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  2949. scsi_add_device(ioa_cfg->host, bus, target, lun);
  2950. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  2951. goto restart;
  2952. }
  2953. }
  2954. ioa_cfg->scan_done = 1;
  2955. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  2956. kobject_uevent(&ioa_cfg->host->shost_dev.kobj, KOBJ_CHANGE);
  2957. LEAVE;
  2958. }
  2959. #ifdef CONFIG_SCSI_IPR_TRACE
  2960. /**
  2961. * ipr_read_trace - Dump the adapter trace
  2962. * @filp: open sysfs file
  2963. * @kobj: kobject struct
  2964. * @bin_attr: bin_attribute struct
  2965. * @buf: buffer
  2966. * @off: offset
  2967. * @count: buffer size
  2968. *
  2969. * Return value:
  2970. * number of bytes printed to buffer
  2971. **/
  2972. static ssize_t ipr_read_trace(struct file *filp, struct kobject *kobj,
  2973. struct bin_attribute *bin_attr,
  2974. char *buf, loff_t off, size_t count)
  2975. {
  2976. struct device *dev = container_of(kobj, struct device, kobj);
  2977. struct Scsi_Host *shost = class_to_shost(dev);
  2978. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *)shost->hostdata;
  2979. unsigned long lock_flags = 0;
  2980. ssize_t ret;
  2981. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  2982. ret = memory_read_from_buffer(buf, count, &off, ioa_cfg->trace,
  2983. IPR_TRACE_SIZE);
  2984. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  2985. return ret;
  2986. }
  2987. static struct bin_attribute ipr_trace_attr = {
  2988. .attr = {
  2989. .name = "trace",
  2990. .mode = S_IRUGO,
  2991. },
  2992. .size = 0,
  2993. .read = ipr_read_trace,
  2994. };
  2995. #endif
  2996. /**
  2997. * ipr_show_fw_version - Show the firmware version
  2998. * @dev: class device struct
  2999. * @buf: buffer
  3000. *
  3001. * Return value:
  3002. * number of bytes printed to buffer
  3003. **/
  3004. static ssize_t ipr_show_fw_version(struct device *dev,
  3005. struct device_attribute *attr, char *buf)
  3006. {
  3007. struct Scsi_Host *shost = class_to_shost(dev);
  3008. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *)shost->hostdata;
  3009. struct ipr_inquiry_page3 *ucode_vpd = &ioa_cfg->vpd_cbs->page3_data;
  3010. unsigned long lock_flags = 0;
  3011. int len;
  3012. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  3013. len = snprintf(buf, PAGE_SIZE, "%02X%02X%02X%02X\n",
  3014. ucode_vpd->major_release, ucode_vpd->card_type,
  3015. ucode_vpd->minor_release[0],
  3016. ucode_vpd->minor_release[1]);
  3017. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3018. return len;
  3019. }
  3020. static struct device_attribute ipr_fw_version_attr = {
  3021. .attr = {
  3022. .name = "fw_version",
  3023. .mode = S_IRUGO,
  3024. },
  3025. .show = ipr_show_fw_version,
  3026. };
  3027. /**
  3028. * ipr_show_log_level - Show the adapter's error logging level
  3029. * @dev: class device struct
  3030. * @buf: buffer
  3031. *
  3032. * Return value:
  3033. * number of bytes printed to buffer
  3034. **/
  3035. static ssize_t ipr_show_log_level(struct device *dev,
  3036. struct device_attribute *attr, char *buf)
  3037. {
  3038. struct Scsi_Host *shost = class_to_shost(dev);
  3039. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *)shost->hostdata;
  3040. unsigned long lock_flags = 0;
  3041. int len;
  3042. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  3043. len = snprintf(buf, PAGE_SIZE, "%d\n", ioa_cfg->log_level);
  3044. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3045. return len;
  3046. }
  3047. /**
  3048. * ipr_store_log_level - Change the adapter's error logging level
  3049. * @dev: class device struct
  3050. * @buf: buffer
  3051. *
  3052. * Return value:
  3053. * number of bytes printed to buffer
  3054. **/
  3055. static ssize_t ipr_store_log_level(struct device *dev,
  3056. struct device_attribute *attr,
  3057. const char *buf, size_t count)
  3058. {
  3059. struct Scsi_Host *shost = class_to_shost(dev);
  3060. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *)shost->hostdata;
  3061. unsigned long lock_flags = 0;
  3062. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  3063. ioa_cfg->log_level = simple_strtoul(buf, NULL, 10);
  3064. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3065. return strlen(buf);
  3066. }
  3067. static struct device_attribute ipr_log_level_attr = {
  3068. .attr = {
  3069. .name = "log_level",
  3070. .mode = S_IRUGO | S_IWUSR,
  3071. },
  3072. .show = ipr_show_log_level,
  3073. .store = ipr_store_log_level
  3074. };
  3075. /**
  3076. * ipr_store_diagnostics - IOA Diagnostics interface
  3077. * @dev: device struct
  3078. * @buf: buffer
  3079. * @count: buffer size
  3080. *
  3081. * This function will reset the adapter and wait a reasonable
  3082. * amount of time for any errors that the adapter might log.
  3083. *
  3084. * Return value:
  3085. * count on success / other on failure
  3086. **/
  3087. static ssize_t ipr_store_diagnostics(struct device *dev,
  3088. struct device_attribute *attr,
  3089. const char *buf, size_t count)
  3090. {
  3091. struct Scsi_Host *shost = class_to_shost(dev);
  3092. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *)shost->hostdata;
  3093. unsigned long lock_flags = 0;
  3094. int rc = count;
  3095. if (!capable(CAP_SYS_ADMIN))
  3096. return -EACCES;
  3097. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  3098. while (ioa_cfg->in_reset_reload) {
  3099. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3100. wait_event(ioa_cfg->reset_wait_q, !ioa_cfg->in_reset_reload);
  3101. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  3102. }
  3103. ioa_cfg->errors_logged = 0;
  3104. ipr_initiate_ioa_reset(ioa_cfg, IPR_SHUTDOWN_NORMAL);
  3105. if (ioa_cfg->in_reset_reload) {
  3106. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3107. wait_event(ioa_cfg->reset_wait_q, !ioa_cfg->in_reset_reload);
  3108. /* Wait for a second for any errors to be logged */
  3109. msleep(1000);
  3110. } else {
  3111. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3112. return -EIO;
  3113. }
  3114. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  3115. if (ioa_cfg->in_reset_reload || ioa_cfg->errors_logged)
  3116. rc = -EIO;
  3117. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3118. return rc;
  3119. }
  3120. static struct device_attribute ipr_diagnostics_attr = {
  3121. .attr = {
  3122. .name = "run_diagnostics",
  3123. .mode = S_IWUSR,
  3124. },
  3125. .store = ipr_store_diagnostics
  3126. };
  3127. /**
  3128. * ipr_show_adapter_state - Show the adapter's state
  3129. * @class_dev: device struct
  3130. * @buf: buffer
  3131. *
  3132. * Return value:
  3133. * number of bytes printed to buffer
  3134. **/
  3135. static ssize_t ipr_show_adapter_state(struct device *dev,
  3136. struct device_attribute *attr, char *buf)
  3137. {
  3138. struct Scsi_Host *shost = class_to_shost(dev);
  3139. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *)shost->hostdata;
  3140. unsigned long lock_flags = 0;
  3141. int len;
  3142. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  3143. if (ioa_cfg->hrrq[IPR_INIT_HRRQ].ioa_is_dead)
  3144. len = snprintf(buf, PAGE_SIZE, "offline\n");
  3145. else
  3146. len = snprintf(buf, PAGE_SIZE, "online\n");
  3147. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3148. return len;
  3149. }
  3150. /**
  3151. * ipr_store_adapter_state - Change adapter state
  3152. * @dev: device struct
  3153. * @buf: buffer
  3154. * @count: buffer size
  3155. *
  3156. * This function will change the adapter's state.
  3157. *
  3158. * Return value:
  3159. * count on success / other on failure
  3160. **/
  3161. static ssize_t ipr_store_adapter_state(struct device *dev,
  3162. struct device_attribute *attr,
  3163. const char *buf, size_t count)
  3164. {
  3165. struct Scsi_Host *shost = class_to_shost(dev);
  3166. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *)shost->hostdata;
  3167. unsigned long lock_flags;
  3168. int result = count, i;
  3169. if (!capable(CAP_SYS_ADMIN))
  3170. return -EACCES;
  3171. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  3172. if (ioa_cfg->hrrq[IPR_INIT_HRRQ].ioa_is_dead &&
  3173. !strncmp(buf, "online", 6)) {
  3174. for (i = 0; i < ioa_cfg->hrrq_num; i++) {
  3175. spin_lock(&ioa_cfg->hrrq[i]._lock);
  3176. ioa_cfg->hrrq[i].ioa_is_dead = 0;
  3177. spin_unlock(&ioa_cfg->hrrq[i]._lock);
  3178. }
  3179. wmb();
  3180. ioa_cfg->reset_retries = 0;
  3181. ioa_cfg->in_ioa_bringdown = 0;
  3182. ipr_initiate_ioa_reset(ioa_cfg, IPR_SHUTDOWN_NONE);
  3183. }
  3184. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3185. wait_event(ioa_cfg->reset_wait_q, !ioa_cfg->in_reset_reload);
  3186. return result;
  3187. }
  3188. static struct device_attribute ipr_ioa_state_attr = {
  3189. .attr = {
  3190. .name = "online_state",
  3191. .mode = S_IRUGO | S_IWUSR,
  3192. },
  3193. .show = ipr_show_adapter_state,
  3194. .store = ipr_store_adapter_state
  3195. };
  3196. /**
  3197. * ipr_store_reset_adapter - Reset the adapter
  3198. * @dev: device struct
  3199. * @buf: buffer
  3200. * @count: buffer size
  3201. *
  3202. * This function will reset the adapter.
  3203. *
  3204. * Return value:
  3205. * count on success / other on failure
  3206. **/
  3207. static ssize_t ipr_store_reset_adapter(struct device *dev,
  3208. struct device_attribute *attr,
  3209. const char *buf, size_t count)
  3210. {
  3211. struct Scsi_Host *shost = class_to_shost(dev);
  3212. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *)shost->hostdata;
  3213. unsigned long lock_flags;
  3214. int result = count;
  3215. if (!capable(CAP_SYS_ADMIN))
  3216. return -EACCES;
  3217. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  3218. if (!ioa_cfg->in_reset_reload)
  3219. ipr_initiate_ioa_reset(ioa_cfg, IPR_SHUTDOWN_NORMAL);
  3220. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3221. wait_event(ioa_cfg->reset_wait_q, !ioa_cfg->in_reset_reload);
  3222. return result;
  3223. }
  3224. static struct device_attribute ipr_ioa_reset_attr = {
  3225. .attr = {
  3226. .name = "reset_host",
  3227. .mode = S_IWUSR,
  3228. },
  3229. .store = ipr_store_reset_adapter
  3230. };
  3231. static int ipr_iopoll(struct blk_iopoll *iop, int budget);
  3232. /**
  3233. * ipr_show_iopoll_weight - Show ipr polling mode
  3234. * @dev: class device struct
  3235. * @buf: buffer
  3236. *
  3237. * Return value:
  3238. * number of bytes printed to buffer
  3239. **/
  3240. static ssize_t ipr_show_iopoll_weight(struct device *dev,
  3241. struct device_attribute *attr, char *buf)
  3242. {
  3243. struct Scsi_Host *shost = class_to_shost(dev);
  3244. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *)shost->hostdata;
  3245. unsigned long lock_flags = 0;
  3246. int len;
  3247. spin_lock_irqsave(shost->host_lock, lock_flags);
  3248. len = snprintf(buf, PAGE_SIZE, "%d\n", ioa_cfg->iopoll_weight);
  3249. spin_unlock_irqrestore(shost->host_lock, lock_flags);
  3250. return len;
  3251. }
  3252. /**
  3253. * ipr_store_iopoll_weight - Change the adapter's polling mode
  3254. * @dev: class device struct
  3255. * @buf: buffer
  3256. *
  3257. * Return value:
  3258. * number of bytes printed to buffer
  3259. **/
  3260. static ssize_t ipr_store_iopoll_weight(struct device *dev,
  3261. struct device_attribute *attr,
  3262. const char *buf, size_t count)
  3263. {
  3264. struct Scsi_Host *shost = class_to_shost(dev);
  3265. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *)shost->hostdata;
  3266. unsigned long user_iopoll_weight;
  3267. unsigned long lock_flags = 0;
  3268. int i;
  3269. if (!ioa_cfg->sis64) {
  3270. dev_info(&ioa_cfg->pdev->dev, "blk-iopoll not supported on this adapter\n");
  3271. return -EINVAL;
  3272. }
  3273. if (kstrtoul(buf, 10, &user_iopoll_weight))
  3274. return -EINVAL;
  3275. if (user_iopoll_weight > 256) {
  3276. dev_info(&ioa_cfg->pdev->dev, "Invalid blk-iopoll weight. It must be less than 256\n");
  3277. return -EINVAL;
  3278. }
  3279. if (user_iopoll_weight == ioa_cfg->iopoll_weight) {
  3280. dev_info(&ioa_cfg->pdev->dev, "Current blk-iopoll weight has the same weight\n");
  3281. return strlen(buf);
  3282. }
  3283. if (ioa_cfg->iopoll_weight && ioa_cfg->sis64 && ioa_cfg->nvectors > 1) {
  3284. for (i = 1; i < ioa_cfg->hrrq_num; i++)
  3285. blk_iopoll_disable(&ioa_cfg->hrrq[i].iopoll);
  3286. }
  3287. spin_lock_irqsave(shost->host_lock, lock_flags);
  3288. ioa_cfg->iopoll_weight = user_iopoll_weight;
  3289. if (ioa_cfg->iopoll_weight && ioa_cfg->sis64 && ioa_cfg->nvectors > 1) {
  3290. for (i = 1; i < ioa_cfg->hrrq_num; i++) {
  3291. blk_iopoll_init(&ioa_cfg->hrrq[i].iopoll,
  3292. ioa_cfg->iopoll_weight, ipr_iopoll);
  3293. blk_iopoll_enable(&ioa_cfg->hrrq[i].iopoll);
  3294. }
  3295. }
  3296. spin_unlock_irqrestore(shost->host_lock, lock_flags);
  3297. return strlen(buf);
  3298. }
  3299. static struct device_attribute ipr_iopoll_weight_attr = {
  3300. .attr = {
  3301. .name = "iopoll_weight",
  3302. .mode = S_IRUGO | S_IWUSR,
  3303. },
  3304. .show = ipr_show_iopoll_weight,
  3305. .store = ipr_store_iopoll_weight
  3306. };
  3307. /**
  3308. * ipr_alloc_ucode_buffer - Allocates a microcode download buffer
  3309. * @buf_len: buffer length
  3310. *
  3311. * Allocates a DMA'able buffer in chunks and assembles a scatter/gather
  3312. * list to use for microcode download
  3313. *
  3314. * Return value:
  3315. * pointer to sglist / NULL on failure
  3316. **/
  3317. static struct ipr_sglist *ipr_alloc_ucode_buffer(int buf_len)
  3318. {
  3319. int sg_size, order, bsize_elem, num_elem, i, j;
  3320. struct ipr_sglist *sglist;
  3321. struct scatterlist *scatterlist;
  3322. struct page *page;
  3323. /* Get the minimum size per scatter/gather element */
  3324. sg_size = buf_len / (IPR_MAX_SGLIST - 1);
  3325. /* Get the actual size per element */
  3326. order = get_order(sg_size);
  3327. /* Determine the actual number of bytes per element */
  3328. bsize_elem = PAGE_SIZE * (1 << order);
  3329. /* Determine the actual number of sg entries needed */
  3330. if (buf_len % bsize_elem)
  3331. num_elem = (buf_len / bsize_elem) + 1;
  3332. else
  3333. num_elem = buf_len / bsize_elem;
  3334. /* Allocate a scatter/gather list for the DMA */
  3335. sglist = kzalloc(sizeof(struct ipr_sglist) +
  3336. (sizeof(struct scatterlist) * (num_elem - 1)),
  3337. GFP_KERNEL);
  3338. if (sglist == NULL) {
  3339. ipr_trace;
  3340. return NULL;
  3341. }
  3342. scatterlist = sglist->scatterlist;
  3343. sg_init_table(scatterlist, num_elem);
  3344. sglist->order = order;
  3345. sglist->num_sg = num_elem;
  3346. /* Allocate a bunch of sg elements */
  3347. for (i = 0; i < num_elem; i++) {
  3348. page = alloc_pages(GFP_KERNEL, order);
  3349. if (!page) {
  3350. ipr_trace;
  3351. /* Free up what we already allocated */
  3352. for (j = i - 1; j >= 0; j--)
  3353. __free_pages(sg_page(&scatterlist[j]), order);
  3354. kfree(sglist);
  3355. return NULL;
  3356. }
  3357. sg_set_page(&scatterlist[i], page, 0, 0);
  3358. }
  3359. return sglist;
  3360. }
  3361. /**
  3362. * ipr_free_ucode_buffer - Frees a microcode download buffer
  3363. * @p_dnld: scatter/gather list pointer
  3364. *
  3365. * Free a DMA'able ucode download buffer previously allocated with
  3366. * ipr_alloc_ucode_buffer
  3367. *
  3368. * Return value:
  3369. * nothing
  3370. **/
  3371. static void ipr_free_ucode_buffer(struct ipr_sglist *sglist)
  3372. {
  3373. int i;
  3374. for (i = 0; i < sglist->num_sg; i++)
  3375. __free_pages(sg_page(&sglist->scatterlist[i]), sglist->order);
  3376. kfree(sglist);
  3377. }
  3378. /**
  3379. * ipr_copy_ucode_buffer - Copy user buffer to kernel buffer
  3380. * @sglist: scatter/gather list pointer
  3381. * @buffer: buffer pointer
  3382. * @len: buffer length
  3383. *
  3384. * Copy a microcode image from a user buffer into a buffer allocated by
  3385. * ipr_alloc_ucode_buffer
  3386. *
  3387. * Return value:
  3388. * 0 on success / other on failure
  3389. **/
  3390. static int ipr_copy_ucode_buffer(struct ipr_sglist *sglist,
  3391. u8 *buffer, u32 len)
  3392. {
  3393. int bsize_elem, i, result = 0;
  3394. struct scatterlist *scatterlist;
  3395. void *kaddr;
  3396. /* Determine the actual number of bytes per element */
  3397. bsize_elem = PAGE_SIZE * (1 << sglist->order);
  3398. scatterlist = sglist->scatterlist;
  3399. for (i = 0; i < (len / bsize_elem); i++, buffer += bsize_elem) {
  3400. struct page *page = sg_page(&scatterlist[i]);
  3401. kaddr = kmap(page);
  3402. memcpy(kaddr, buffer, bsize_elem);
  3403. kunmap(page);
  3404. scatterlist[i].length = bsize_elem;
  3405. if (result != 0) {
  3406. ipr_trace;
  3407. return result;
  3408. }
  3409. }
  3410. if (len % bsize_elem) {
  3411. struct page *page = sg_page(&scatterlist[i]);
  3412. kaddr = kmap(page);
  3413. memcpy(kaddr, buffer, len % bsize_elem);
  3414. kunmap(page);
  3415. scatterlist[i].length = len % bsize_elem;
  3416. }
  3417. sglist->buffer_len = len;
  3418. return result;
  3419. }
  3420. /**
  3421. * ipr_build_ucode_ioadl64 - Build a microcode download IOADL
  3422. * @ipr_cmd: ipr command struct
  3423. * @sglist: scatter/gather list
  3424. *
  3425. * Builds a microcode download IOA data list (IOADL).
  3426. *
  3427. **/
  3428. static void ipr_build_ucode_ioadl64(struct ipr_cmnd *ipr_cmd,
  3429. struct ipr_sglist *sglist)
  3430. {
  3431. struct ipr_ioarcb *ioarcb = &ipr_cmd->ioarcb;
  3432. struct ipr_ioadl64_desc *ioadl64 = ipr_cmd->i.ioadl64;
  3433. struct scatterlist *scatterlist = sglist->scatterlist;
  3434. int i;
  3435. ipr_cmd->dma_use_sg = sglist->num_dma_sg;
  3436. ioarcb->cmd_pkt.flags_hi |= IPR_FLAGS_HI_WRITE_NOT_READ;
  3437. ioarcb->data_transfer_length = cpu_to_be32(sglist->buffer_len);
  3438. ioarcb->ioadl_len =
  3439. cpu_to_be32(sizeof(struct ipr_ioadl64_desc) * ipr_cmd->dma_use_sg);
  3440. for (i = 0; i < ipr_cmd->dma_use_sg; i++) {
  3441. ioadl64[i].flags = cpu_to_be32(IPR_IOADL_FLAGS_WRITE);
  3442. ioadl64[i].data_len = cpu_to_be32(sg_dma_len(&scatterlist[i]));
  3443. ioadl64[i].address = cpu_to_be64(sg_dma_address(&scatterlist[i]));
  3444. }
  3445. ioadl64[i-1].flags |= cpu_to_be32(IPR_IOADL_FLAGS_LAST);
  3446. }
  3447. /**
  3448. * ipr_build_ucode_ioadl - Build a microcode download IOADL
  3449. * @ipr_cmd: ipr command struct
  3450. * @sglist: scatter/gather list
  3451. *
  3452. * Builds a microcode download IOA data list (IOADL).
  3453. *
  3454. **/
  3455. static void ipr_build_ucode_ioadl(struct ipr_cmnd *ipr_cmd,
  3456. struct ipr_sglist *sglist)
  3457. {
  3458. struct ipr_ioarcb *ioarcb = &ipr_cmd->ioarcb;
  3459. struct ipr_ioadl_desc *ioadl = ipr_cmd->i.ioadl;
  3460. struct scatterlist *scatterlist = sglist->scatterlist;
  3461. int i;
  3462. ipr_cmd->dma_use_sg = sglist->num_dma_sg;
  3463. ioarcb->cmd_pkt.flags_hi |= IPR_FLAGS_HI_WRITE_NOT_READ;
  3464. ioarcb->data_transfer_length = cpu_to_be32(sglist->buffer_len);
  3465. ioarcb->ioadl_len =
  3466. cpu_to_be32(sizeof(struct ipr_ioadl_desc) * ipr_cmd->dma_use_sg);
  3467. for (i = 0; i < ipr_cmd->dma_use_sg; i++) {
  3468. ioadl[i].flags_and_data_len =
  3469. cpu_to_be32(IPR_IOADL_FLAGS_WRITE | sg_dma_len(&scatterlist[i]));
  3470. ioadl[i].address =
  3471. cpu_to_be32(sg_dma_address(&scatterlist[i]));
  3472. }
  3473. ioadl[i-1].flags_and_data_len |=
  3474. cpu_to_be32(IPR_IOADL_FLAGS_LAST);
  3475. }
  3476. /**
  3477. * ipr_update_ioa_ucode - Update IOA's microcode
  3478. * @ioa_cfg: ioa config struct
  3479. * @sglist: scatter/gather list
  3480. *
  3481. * Initiate an adapter reset to update the IOA's microcode
  3482. *
  3483. * Return value:
  3484. * 0 on success / -EIO on failure
  3485. **/
  3486. static int ipr_update_ioa_ucode(struct ipr_ioa_cfg *ioa_cfg,
  3487. struct ipr_sglist *sglist)
  3488. {
  3489. unsigned long lock_flags;
  3490. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  3491. while (ioa_cfg->in_reset_reload) {
  3492. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3493. wait_event(ioa_cfg->reset_wait_q, !ioa_cfg->in_reset_reload);
  3494. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  3495. }
  3496. if (ioa_cfg->ucode_sglist) {
  3497. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3498. dev_err(&ioa_cfg->pdev->dev,
  3499. "Microcode download already in progress\n");
  3500. return -EIO;
  3501. }
  3502. sglist->num_dma_sg = dma_map_sg(&ioa_cfg->pdev->dev,
  3503. sglist->scatterlist, sglist->num_sg,
  3504. DMA_TO_DEVICE);
  3505. if (!sglist->num_dma_sg) {
  3506. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3507. dev_err(&ioa_cfg->pdev->dev,
  3508. "Failed to map microcode download buffer!\n");
  3509. return -EIO;
  3510. }
  3511. ioa_cfg->ucode_sglist = sglist;
  3512. ipr_initiate_ioa_reset(ioa_cfg, IPR_SHUTDOWN_NORMAL);
  3513. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3514. wait_event(ioa_cfg->reset_wait_q, !ioa_cfg->in_reset_reload);
  3515. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  3516. ioa_cfg->ucode_sglist = NULL;
  3517. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3518. return 0;
  3519. }
  3520. /**
  3521. * ipr_store_update_fw - Update the firmware on the adapter
  3522. * @class_dev: device struct
  3523. * @buf: buffer
  3524. * @count: buffer size
  3525. *
  3526. * This function will update the firmware on the adapter.
  3527. *
  3528. * Return value:
  3529. * count on success / other on failure
  3530. **/
  3531. static ssize_t ipr_store_update_fw(struct device *dev,
  3532. struct device_attribute *attr,
  3533. const char *buf, size_t count)
  3534. {
  3535. struct Scsi_Host *shost = class_to_shost(dev);
  3536. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *)shost->hostdata;
  3537. struct ipr_ucode_image_header *image_hdr;
  3538. const struct firmware *fw_entry;
  3539. struct ipr_sglist *sglist;
  3540. char fname[100];
  3541. char *src;
  3542. char *endline;
  3543. int result, dnld_size;
  3544. if (!capable(CAP_SYS_ADMIN))
  3545. return -EACCES;
  3546. snprintf(fname, sizeof(fname), "%s", buf);
  3547. endline = strchr(fname, '\n');
  3548. if (endline)
  3549. *endline = '\0';
  3550. if (request_firmware(&fw_entry, fname, &ioa_cfg->pdev->dev)) {
  3551. dev_err(&ioa_cfg->pdev->dev, "Firmware file %s not found\n", fname);
  3552. return -EIO;
  3553. }
  3554. image_hdr = (struct ipr_ucode_image_header *)fw_entry->data;
  3555. src = (u8 *)image_hdr + be32_to_cpu(image_hdr->header_length);
  3556. dnld_size = fw_entry->size - be32_to_cpu(image_hdr->header_length);
  3557. sglist = ipr_alloc_ucode_buffer(dnld_size);
  3558. if (!sglist) {
  3559. dev_err(&ioa_cfg->pdev->dev, "Microcode buffer allocation failed\n");
  3560. release_firmware(fw_entry);
  3561. return -ENOMEM;
  3562. }
  3563. result = ipr_copy_ucode_buffer(sglist, src, dnld_size);
  3564. if (result) {
  3565. dev_err(&ioa_cfg->pdev->dev,
  3566. "Microcode buffer copy to DMA buffer failed\n");
  3567. goto out;
  3568. }
  3569. ipr_info("Updating microcode, please be patient. This may take up to 30 minutes.\n");
  3570. result = ipr_update_ioa_ucode(ioa_cfg, sglist);
  3571. if (!result)
  3572. result = count;
  3573. out:
  3574. ipr_free_ucode_buffer(sglist);
  3575. release_firmware(fw_entry);
  3576. return result;
  3577. }
  3578. static struct device_attribute ipr_update_fw_attr = {
  3579. .attr = {
  3580. .name = "update_fw",
  3581. .mode = S_IWUSR,
  3582. },
  3583. .store = ipr_store_update_fw
  3584. };
  3585. /**
  3586. * ipr_show_fw_type - Show the adapter's firmware type.
  3587. * @dev: class device struct
  3588. * @buf: buffer
  3589. *
  3590. * Return value:
  3591. * number of bytes printed to buffer
  3592. **/
  3593. static ssize_t ipr_show_fw_type(struct device *dev,
  3594. struct device_attribute *attr, char *buf)
  3595. {
  3596. struct Scsi_Host *shost = class_to_shost(dev);
  3597. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *)shost->hostdata;
  3598. unsigned long lock_flags = 0;
  3599. int len;
  3600. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  3601. len = snprintf(buf, PAGE_SIZE, "%d\n", ioa_cfg->sis64);
  3602. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3603. return len;
  3604. }
  3605. static struct device_attribute ipr_ioa_fw_type_attr = {
  3606. .attr = {
  3607. .name = "fw_type",
  3608. .mode = S_IRUGO,
  3609. },
  3610. .show = ipr_show_fw_type
  3611. };
  3612. static struct device_attribute *ipr_ioa_attrs[] = {
  3613. &ipr_fw_version_attr,
  3614. &ipr_log_level_attr,
  3615. &ipr_diagnostics_attr,
  3616. &ipr_ioa_state_attr,
  3617. &ipr_ioa_reset_attr,
  3618. &ipr_update_fw_attr,
  3619. &ipr_ioa_fw_type_attr,
  3620. &ipr_iopoll_weight_attr,
  3621. NULL,
  3622. };
  3623. #ifdef CONFIG_SCSI_IPR_DUMP
  3624. /**
  3625. * ipr_read_dump - Dump the adapter
  3626. * @filp: open sysfs file
  3627. * @kobj: kobject struct
  3628. * @bin_attr: bin_attribute struct
  3629. * @buf: buffer
  3630. * @off: offset
  3631. * @count: buffer size
  3632. *
  3633. * Return value:
  3634. * number of bytes printed to buffer
  3635. **/
  3636. static ssize_t ipr_read_dump(struct file *filp, struct kobject *kobj,
  3637. struct bin_attribute *bin_attr,
  3638. char *buf, loff_t off, size_t count)
  3639. {
  3640. struct device *cdev = container_of(kobj, struct device, kobj);
  3641. struct Scsi_Host *shost = class_to_shost(cdev);
  3642. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *)shost->hostdata;
  3643. struct ipr_dump *dump;
  3644. unsigned long lock_flags = 0;
  3645. char *src;
  3646. int len, sdt_end;
  3647. size_t rc = count;
  3648. if (!capable(CAP_SYS_ADMIN))
  3649. return -EACCES;
  3650. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  3651. dump = ioa_cfg->dump;
  3652. if (ioa_cfg->sdt_state != DUMP_OBTAINED || !dump) {
  3653. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3654. return 0;
  3655. }
  3656. kref_get(&dump->kref);
  3657. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3658. if (off > dump->driver_dump.hdr.len) {
  3659. kref_put(&dump->kref, ipr_release_dump);
  3660. return 0;
  3661. }
  3662. if (off + count > dump->driver_dump.hdr.len) {
  3663. count = dump->driver_dump.hdr.len - off;
  3664. rc = count;
  3665. }
  3666. if (count && off < sizeof(dump->driver_dump)) {
  3667. if (off + count > sizeof(dump->driver_dump))
  3668. len = sizeof(dump->driver_dump) - off;
  3669. else
  3670. len = count;
  3671. src = (u8 *)&dump->driver_dump + off;
  3672. memcpy(buf, src, len);
  3673. buf += len;
  3674. off += len;
  3675. count -= len;
  3676. }
  3677. off -= sizeof(dump->driver_dump);
  3678. if (ioa_cfg->sis64)
  3679. sdt_end = offsetof(struct ipr_ioa_dump, sdt.entry) +
  3680. (be32_to_cpu(dump->ioa_dump.sdt.hdr.num_entries_used) *
  3681. sizeof(struct ipr_sdt_entry));
  3682. else
  3683. sdt_end = offsetof(struct ipr_ioa_dump, sdt.entry) +
  3684. (IPR_FMT2_NUM_SDT_ENTRIES * sizeof(struct ipr_sdt_entry));
  3685. if (count && off < sdt_end) {
  3686. if (off + count > sdt_end)
  3687. len = sdt_end - off;
  3688. else
  3689. len = count;
  3690. src = (u8 *)&dump->ioa_dump + off;
  3691. memcpy(buf, src, len);
  3692. buf += len;
  3693. off += len;
  3694. count -= len;
  3695. }
  3696. off -= sdt_end;
  3697. while (count) {
  3698. if ((off & PAGE_MASK) != ((off + count) & PAGE_MASK))
  3699. len = PAGE_ALIGN(off) - off;
  3700. else
  3701. len = count;
  3702. src = (u8 *)dump->ioa_dump.ioa_data[(off & PAGE_MASK) >> PAGE_SHIFT];
  3703. src += off & ~PAGE_MASK;
  3704. memcpy(buf, src, len);
  3705. buf += len;
  3706. off += len;
  3707. count -= len;
  3708. }
  3709. kref_put(&dump->kref, ipr_release_dump);
  3710. return rc;
  3711. }
  3712. /**
  3713. * ipr_alloc_dump - Prepare for adapter dump
  3714. * @ioa_cfg: ioa config struct
  3715. *
  3716. * Return value:
  3717. * 0 on success / other on failure
  3718. **/
  3719. static int ipr_alloc_dump(struct ipr_ioa_cfg *ioa_cfg)
  3720. {
  3721. struct ipr_dump *dump;
  3722. __be32 **ioa_data;
  3723. unsigned long lock_flags = 0;
  3724. dump = kzalloc(sizeof(struct ipr_dump), GFP_KERNEL);
  3725. if (!dump) {
  3726. ipr_err("Dump memory allocation failed\n");
  3727. return -ENOMEM;
  3728. }
  3729. if (ioa_cfg->sis64)
  3730. ioa_data = vmalloc(IPR_FMT3_MAX_NUM_DUMP_PAGES * sizeof(__be32 *));
  3731. else
  3732. ioa_data = vmalloc(IPR_FMT2_MAX_NUM_DUMP_PAGES * sizeof(__be32 *));
  3733. if (!ioa_data) {
  3734. ipr_err("Dump memory allocation failed\n");
  3735. kfree(dump);
  3736. return -ENOMEM;
  3737. }
  3738. dump->ioa_dump.ioa_data = ioa_data;
  3739. kref_init(&dump->kref);
  3740. dump->ioa_cfg = ioa_cfg;
  3741. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  3742. if (INACTIVE != ioa_cfg->sdt_state) {
  3743. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3744. vfree(dump->ioa_dump.ioa_data);
  3745. kfree(dump);
  3746. return 0;
  3747. }
  3748. ioa_cfg->dump = dump;
  3749. ioa_cfg->sdt_state = WAIT_FOR_DUMP;
  3750. if (ioa_cfg->hrrq[IPR_INIT_HRRQ].ioa_is_dead && !ioa_cfg->dump_taken) {
  3751. ioa_cfg->dump_taken = 1;
  3752. schedule_work(&ioa_cfg->work_q);
  3753. }
  3754. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3755. return 0;
  3756. }
  3757. /**
  3758. * ipr_free_dump - Free adapter dump memory
  3759. * @ioa_cfg: ioa config struct
  3760. *
  3761. * Return value:
  3762. * 0 on success / other on failure
  3763. **/
  3764. static int ipr_free_dump(struct ipr_ioa_cfg *ioa_cfg)
  3765. {
  3766. struct ipr_dump *dump;
  3767. unsigned long lock_flags = 0;
  3768. ENTER;
  3769. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  3770. dump = ioa_cfg->dump;
  3771. if (!dump) {
  3772. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3773. return 0;
  3774. }
  3775. ioa_cfg->dump = NULL;
  3776. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3777. kref_put(&dump->kref, ipr_release_dump);
  3778. LEAVE;
  3779. return 0;
  3780. }
  3781. /**
  3782. * ipr_write_dump - Setup dump state of adapter
  3783. * @filp: open sysfs file
  3784. * @kobj: kobject struct
  3785. * @bin_attr: bin_attribute struct
  3786. * @buf: buffer
  3787. * @off: offset
  3788. * @count: buffer size
  3789. *
  3790. * Return value:
  3791. * number of bytes printed to buffer
  3792. **/
  3793. static ssize_t ipr_write_dump(struct file *filp, struct kobject *kobj,
  3794. struct bin_attribute *bin_attr,
  3795. char *buf, loff_t off, size_t count)
  3796. {
  3797. struct device *cdev = container_of(kobj, struct device, kobj);
  3798. struct Scsi_Host *shost = class_to_shost(cdev);
  3799. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *)shost->hostdata;
  3800. int rc;
  3801. if (!capable(CAP_SYS_ADMIN))
  3802. return -EACCES;
  3803. if (buf[0] == '1')
  3804. rc = ipr_alloc_dump(ioa_cfg);
  3805. else if (buf[0] == '0')
  3806. rc = ipr_free_dump(ioa_cfg);
  3807. else
  3808. return -EINVAL;
  3809. if (rc)
  3810. return rc;
  3811. else
  3812. return count;
  3813. }
  3814. static struct bin_attribute ipr_dump_attr = {
  3815. .attr = {
  3816. .name = "dump",
  3817. .mode = S_IRUSR | S_IWUSR,
  3818. },
  3819. .size = 0,
  3820. .read = ipr_read_dump,
  3821. .write = ipr_write_dump
  3822. };
  3823. #else
  3824. static int ipr_free_dump(struct ipr_ioa_cfg *ioa_cfg) { return 0; };
  3825. #endif
  3826. /**
  3827. * ipr_change_queue_depth - Change the device's queue depth
  3828. * @sdev: scsi device struct
  3829. * @qdepth: depth to set
  3830. * @reason: calling context
  3831. *
  3832. * Return value:
  3833. * actual depth set
  3834. **/
  3835. static int ipr_change_queue_depth(struct scsi_device *sdev, int qdepth)
  3836. {
  3837. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *)sdev->host->hostdata;
  3838. struct ipr_resource_entry *res;
  3839. unsigned long lock_flags = 0;
  3840. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  3841. res = (struct ipr_resource_entry *)sdev->hostdata;
  3842. if (res && ipr_is_gata(res) && qdepth > IPR_MAX_CMD_PER_ATA_LUN)
  3843. qdepth = IPR_MAX_CMD_PER_ATA_LUN;
  3844. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3845. scsi_change_queue_depth(sdev, qdepth);
  3846. return sdev->queue_depth;
  3847. }
  3848. /**
  3849. * ipr_show_adapter_handle - Show the adapter's resource handle for this device
  3850. * @dev: device struct
  3851. * @attr: device attribute structure
  3852. * @buf: buffer
  3853. *
  3854. * Return value:
  3855. * number of bytes printed to buffer
  3856. **/
  3857. static ssize_t ipr_show_adapter_handle(struct device *dev, struct device_attribute *attr, char *buf)
  3858. {
  3859. struct scsi_device *sdev = to_scsi_device(dev);
  3860. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *)sdev->host->hostdata;
  3861. struct ipr_resource_entry *res;
  3862. unsigned long lock_flags = 0;
  3863. ssize_t len = -ENXIO;
  3864. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  3865. res = (struct ipr_resource_entry *)sdev->hostdata;
  3866. if (res)
  3867. len = snprintf(buf, PAGE_SIZE, "%08X\n", res->res_handle);
  3868. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3869. return len;
  3870. }
  3871. static struct device_attribute ipr_adapter_handle_attr = {
  3872. .attr = {
  3873. .name = "adapter_handle",
  3874. .mode = S_IRUSR,
  3875. },
  3876. .show = ipr_show_adapter_handle
  3877. };
  3878. /**
  3879. * ipr_show_resource_path - Show the resource path or the resource address for
  3880. * this device.
  3881. * @dev: device struct
  3882. * @attr: device attribute structure
  3883. * @buf: buffer
  3884. *
  3885. * Return value:
  3886. * number of bytes printed to buffer
  3887. **/
  3888. static ssize_t ipr_show_resource_path(struct device *dev, struct device_attribute *attr, char *buf)
  3889. {
  3890. struct scsi_device *sdev = to_scsi_device(dev);
  3891. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *)sdev->host->hostdata;
  3892. struct ipr_resource_entry *res;
  3893. unsigned long lock_flags = 0;
  3894. ssize_t len = -ENXIO;
  3895. char buffer[IPR_MAX_RES_PATH_LENGTH];
  3896. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  3897. res = (struct ipr_resource_entry *)sdev->hostdata;
  3898. if (res && ioa_cfg->sis64)
  3899. len = snprintf(buf, PAGE_SIZE, "%s\n",
  3900. __ipr_format_res_path(res->res_path, buffer,
  3901. sizeof(buffer)));
  3902. else if (res)
  3903. len = snprintf(buf, PAGE_SIZE, "%d:%d:%d:%d\n", ioa_cfg->host->host_no,
  3904. res->bus, res->target, res->lun);
  3905. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3906. return len;
  3907. }
  3908. static struct device_attribute ipr_resource_path_attr = {
  3909. .attr = {
  3910. .name = "resource_path",
  3911. .mode = S_IRUGO,
  3912. },
  3913. .show = ipr_show_resource_path
  3914. };
  3915. /**
  3916. * ipr_show_device_id - Show the device_id for this device.
  3917. * @dev: device struct
  3918. * @attr: device attribute structure
  3919. * @buf: buffer
  3920. *
  3921. * Return value:
  3922. * number of bytes printed to buffer
  3923. **/
  3924. static ssize_t ipr_show_device_id(struct device *dev, struct device_attribute *attr, char *buf)
  3925. {
  3926. struct scsi_device *sdev = to_scsi_device(dev);
  3927. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *)sdev->host->hostdata;
  3928. struct ipr_resource_entry *res;
  3929. unsigned long lock_flags = 0;
  3930. ssize_t len = -ENXIO;
  3931. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  3932. res = (struct ipr_resource_entry *)sdev->hostdata;
  3933. if (res && ioa_cfg->sis64)
  3934. len = snprintf(buf, PAGE_SIZE, "0x%llx\n", be64_to_cpu(res->dev_id));
  3935. else if (res)
  3936. len = snprintf(buf, PAGE_SIZE, "0x%llx\n", res->lun_wwn);
  3937. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3938. return len;
  3939. }
  3940. static struct device_attribute ipr_device_id_attr = {
  3941. .attr = {
  3942. .name = "device_id",
  3943. .mode = S_IRUGO,
  3944. },
  3945. .show = ipr_show_device_id
  3946. };
  3947. /**
  3948. * ipr_show_resource_type - Show the resource type for this device.
  3949. * @dev: device struct
  3950. * @attr: device attribute structure
  3951. * @buf: buffer
  3952. *
  3953. * Return value:
  3954. * number of bytes printed to buffer
  3955. **/
  3956. static ssize_t ipr_show_resource_type(struct device *dev, struct device_attribute *attr, char *buf)
  3957. {
  3958. struct scsi_device *sdev = to_scsi_device(dev);
  3959. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *)sdev->host->hostdata;
  3960. struct ipr_resource_entry *res;
  3961. unsigned long lock_flags = 0;
  3962. ssize_t len = -ENXIO;
  3963. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  3964. res = (struct ipr_resource_entry *)sdev->hostdata;
  3965. if (res)
  3966. len = snprintf(buf, PAGE_SIZE, "%x\n", res->type);
  3967. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3968. return len;
  3969. }
  3970. static struct device_attribute ipr_resource_type_attr = {
  3971. .attr = {
  3972. .name = "resource_type",
  3973. .mode = S_IRUGO,
  3974. },
  3975. .show = ipr_show_resource_type
  3976. };
  3977. /**
  3978. * ipr_show_raw_mode - Show the adapter's raw mode
  3979. * @dev: class device struct
  3980. * @buf: buffer
  3981. *
  3982. * Return value:
  3983. * number of bytes printed to buffer
  3984. **/
  3985. static ssize_t ipr_show_raw_mode(struct device *dev,
  3986. struct device_attribute *attr, char *buf)
  3987. {
  3988. struct scsi_device *sdev = to_scsi_device(dev);
  3989. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *)sdev->host->hostdata;
  3990. struct ipr_resource_entry *res;
  3991. unsigned long lock_flags = 0;
  3992. ssize_t len;
  3993. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  3994. res = (struct ipr_resource_entry *)sdev->hostdata;
  3995. if (res)
  3996. len = snprintf(buf, PAGE_SIZE, "%d\n", res->raw_mode);
  3997. else
  3998. len = -ENXIO;
  3999. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  4000. return len;
  4001. }
  4002. /**
  4003. * ipr_store_raw_mode - Change the adapter's raw mode
  4004. * @dev: class device struct
  4005. * @buf: buffer
  4006. *
  4007. * Return value:
  4008. * number of bytes printed to buffer
  4009. **/
  4010. static ssize_t ipr_store_raw_mode(struct device *dev,
  4011. struct device_attribute *attr,
  4012. const char *buf, size_t count)
  4013. {
  4014. struct scsi_device *sdev = to_scsi_device(dev);
  4015. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *)sdev->host->hostdata;
  4016. struct ipr_resource_entry *res;
  4017. unsigned long lock_flags = 0;
  4018. ssize_t len;
  4019. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  4020. res = (struct ipr_resource_entry *)sdev->hostdata;
  4021. if (res) {
  4022. if (ipr_is_af_dasd_device(res)) {
  4023. res->raw_mode = simple_strtoul(buf, NULL, 10);
  4024. len = strlen(buf);
  4025. if (res->sdev)
  4026. sdev_printk(KERN_INFO, res->sdev, "raw mode is %s\n",
  4027. res->raw_mode ? "enabled" : "disabled");
  4028. } else
  4029. len = -EINVAL;
  4030. } else
  4031. len = -ENXIO;
  4032. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  4033. return len;
  4034. }
  4035. static struct device_attribute ipr_raw_mode_attr = {
  4036. .attr = {
  4037. .name = "raw_mode",
  4038. .mode = S_IRUGO | S_IWUSR,
  4039. },
  4040. .show = ipr_show_raw_mode,
  4041. .store = ipr_store_raw_mode
  4042. };
  4043. static struct device_attribute *ipr_dev_attrs[] = {
  4044. &ipr_adapter_handle_attr,
  4045. &ipr_resource_path_attr,
  4046. &ipr_device_id_attr,
  4047. &ipr_resource_type_attr,
  4048. &ipr_raw_mode_attr,
  4049. NULL,
  4050. };
  4051. /**
  4052. * ipr_biosparam - Return the HSC mapping
  4053. * @sdev: scsi device struct
  4054. * @block_device: block device pointer
  4055. * @capacity: capacity of the device
  4056. * @parm: Array containing returned HSC values.
  4057. *
  4058. * This function generates the HSC parms that fdisk uses.
  4059. * We want to make sure we return something that places partitions
  4060. * on 4k boundaries for best performance with the IOA.
  4061. *
  4062. * Return value:
  4063. * 0 on success
  4064. **/
  4065. static int ipr_biosparam(struct scsi_device *sdev,
  4066. struct block_device *block_device,
  4067. sector_t capacity, int *parm)
  4068. {
  4069. int heads, sectors;
  4070. sector_t cylinders;
  4071. heads = 128;
  4072. sectors = 32;
  4073. cylinders = capacity;
  4074. sector_div(cylinders, (128 * 32));
  4075. /* return result */
  4076. parm[0] = heads;
  4077. parm[1] = sectors;
  4078. parm[2] = cylinders;
  4079. return 0;
  4080. }
  4081. /**
  4082. * ipr_find_starget - Find target based on bus/target.
  4083. * @starget: scsi target struct
  4084. *
  4085. * Return value:
  4086. * resource entry pointer if found / NULL if not found
  4087. **/
  4088. static struct ipr_resource_entry *ipr_find_starget(struct scsi_target *starget)
  4089. {
  4090. struct Scsi_Host *shost = dev_to_shost(&starget->dev);
  4091. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *) shost->hostdata;
  4092. struct ipr_resource_entry *res;
  4093. list_for_each_entry(res, &ioa_cfg->used_res_q, queue) {
  4094. if ((res->bus == starget->channel) &&
  4095. (res->target == starget->id)) {
  4096. return res;
  4097. }
  4098. }
  4099. return NULL;
  4100. }
  4101. static struct ata_port_info sata_port_info;
  4102. /**
  4103. * ipr_target_alloc - Prepare for commands to a SCSI target
  4104. * @starget: scsi target struct
  4105. *
  4106. * If the device is a SATA device, this function allocates an
  4107. * ATA port with libata, else it does nothing.
  4108. *
  4109. * Return value:
  4110. * 0 on success / non-0 on failure
  4111. **/
  4112. static int ipr_target_alloc(struct scsi_target *starget)
  4113. {
  4114. struct Scsi_Host *shost = dev_to_shost(&starget->dev);
  4115. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *) shost->hostdata;
  4116. struct ipr_sata_port *sata_port;
  4117. struct ata_port *ap;
  4118. struct ipr_resource_entry *res;
  4119. unsigned long lock_flags;
  4120. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  4121. res = ipr_find_starget(starget);
  4122. starget->hostdata = NULL;
  4123. if (res && ipr_is_gata(res)) {
  4124. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  4125. sata_port = kzalloc(sizeof(*sata_port), GFP_KERNEL);
  4126. if (!sata_port)
  4127. return -ENOMEM;
  4128. ap = ata_sas_port_alloc(&ioa_cfg->ata_host, &sata_port_info, shost);
  4129. if (ap) {
  4130. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  4131. sata_port->ioa_cfg = ioa_cfg;
  4132. sata_port->ap = ap;
  4133. sata_port->res = res;
  4134. res->sata_port = sata_port;
  4135. ap->private_data = sata_port;
  4136. starget->hostdata = sata_port;
  4137. } else {
  4138. kfree(sata_port);
  4139. return -ENOMEM;
  4140. }
  4141. }
  4142. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  4143. return 0;
  4144. }
  4145. /**
  4146. * ipr_target_destroy - Destroy a SCSI target
  4147. * @starget: scsi target struct
  4148. *
  4149. * If the device was a SATA device, this function frees the libata
  4150. * ATA port, else it does nothing.
  4151. *
  4152. **/
  4153. static void ipr_target_destroy(struct scsi_target *starget)
  4154. {
  4155. struct ipr_sata_port *sata_port = starget->hostdata;
  4156. struct Scsi_Host *shost = dev_to_shost(&starget->dev);
  4157. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *) shost->hostdata;
  4158. if (ioa_cfg->sis64) {
  4159. if (!ipr_find_starget(starget)) {
  4160. if (starget->channel == IPR_ARRAY_VIRTUAL_BUS)
  4161. clear_bit(starget->id, ioa_cfg->array_ids);
  4162. else if (starget->channel == IPR_VSET_VIRTUAL_BUS)
  4163. clear_bit(starget->id, ioa_cfg->vset_ids);
  4164. else if (starget->channel == 0)
  4165. clear_bit(starget->id, ioa_cfg->target_ids);
  4166. }
  4167. }
  4168. if (sata_port) {
  4169. starget->hostdata = NULL;
  4170. ata_sas_port_destroy(sata_port->ap);
  4171. kfree(sata_port);
  4172. }
  4173. }
  4174. /**
  4175. * ipr_find_sdev - Find device based on bus/target/lun.
  4176. * @sdev: scsi device struct
  4177. *
  4178. * Return value:
  4179. * resource entry pointer if found / NULL if not found
  4180. **/
  4181. static struct ipr_resource_entry *ipr_find_sdev(struct scsi_device *sdev)
  4182. {
  4183. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *) sdev->host->hostdata;
  4184. struct ipr_resource_entry *res;
  4185. list_for_each_entry(res, &ioa_cfg->used_res_q, queue) {
  4186. if ((res->bus == sdev->channel) &&
  4187. (res->target == sdev->id) &&
  4188. (res->lun == sdev->lun))
  4189. return res;
  4190. }
  4191. return NULL;
  4192. }
  4193. /**
  4194. * ipr_slave_destroy - Unconfigure a SCSI device
  4195. * @sdev: scsi device struct
  4196. *
  4197. * Return value:
  4198. * nothing
  4199. **/
  4200. static void ipr_slave_destroy(struct scsi_device *sdev)
  4201. {
  4202. struct ipr_resource_entry *res;
  4203. struct ipr_ioa_cfg *ioa_cfg;
  4204. unsigned long lock_flags = 0;
  4205. ioa_cfg = (struct ipr_ioa_cfg *) sdev->host->hostdata;
  4206. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  4207. res = (struct ipr_resource_entry *) sdev->hostdata;
  4208. if (res) {
  4209. if (res->sata_port)
  4210. res->sata_port->ap->link.device[0].class = ATA_DEV_NONE;
  4211. sdev->hostdata = NULL;
  4212. res->sdev = NULL;
  4213. res->sata_port = NULL;
  4214. }
  4215. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  4216. }
  4217. /**
  4218. * ipr_slave_configure - Configure a SCSI device
  4219. * @sdev: scsi device struct
  4220. *
  4221. * This function configures the specified scsi device.
  4222. *
  4223. * Return value:
  4224. * 0 on success
  4225. **/
  4226. static int ipr_slave_configure(struct scsi_device *sdev)
  4227. {
  4228. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *) sdev->host->hostdata;
  4229. struct ipr_resource_entry *res;
  4230. struct ata_port *ap = NULL;
  4231. unsigned long lock_flags = 0;
  4232. char buffer[IPR_MAX_RES_PATH_LENGTH];
  4233. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  4234. res = sdev->hostdata;
  4235. if (res) {
  4236. if (ipr_is_af_dasd_device(res))
  4237. sdev->type = TYPE_RAID;
  4238. if (ipr_is_af_dasd_device(res) || ipr_is_ioa_resource(res)) {
  4239. sdev->scsi_level = 4;
  4240. sdev->no_uld_attach = 1;
  4241. }
  4242. if (ipr_is_vset_device(res)) {
  4243. sdev->scsi_level = SCSI_SPC_3;
  4244. blk_queue_rq_timeout(sdev->request_queue,
  4245. IPR_VSET_RW_TIMEOUT);
  4246. blk_queue_max_hw_sectors(sdev->request_queue, IPR_VSET_MAX_SECTORS);
  4247. }
  4248. if (ipr_is_gata(res) && res->sata_port)
  4249. ap = res->sata_port->ap;
  4250. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  4251. if (ap) {
  4252. scsi_change_queue_depth(sdev, IPR_MAX_CMD_PER_ATA_LUN);
  4253. ata_sas_slave_configure(sdev, ap);
  4254. }
  4255. if (ioa_cfg->sis64)
  4256. sdev_printk(KERN_INFO, sdev, "Resource path: %s\n",
  4257. ipr_format_res_path(ioa_cfg,
  4258. res->res_path, buffer, sizeof(buffer)));
  4259. return 0;
  4260. }
  4261. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  4262. return 0;
  4263. }
  4264. /**
  4265. * ipr_ata_slave_alloc - Prepare for commands to a SATA device
  4266. * @sdev: scsi device struct
  4267. *
  4268. * This function initializes an ATA port so that future commands
  4269. * sent through queuecommand will work.
  4270. *
  4271. * Return value:
  4272. * 0 on success
  4273. **/
  4274. static int ipr_ata_slave_alloc(struct scsi_device *sdev)
  4275. {
  4276. struct ipr_sata_port *sata_port = NULL;
  4277. int rc = -ENXIO;
  4278. ENTER;
  4279. if (sdev->sdev_target)
  4280. sata_port = sdev->sdev_target->hostdata;
  4281. if (sata_port) {
  4282. rc = ata_sas_port_init(sata_port->ap);
  4283. if (rc == 0)
  4284. rc = ata_sas_sync_probe(sata_port->ap);
  4285. }
  4286. if (rc)
  4287. ipr_slave_destroy(sdev);
  4288. LEAVE;
  4289. return rc;
  4290. }
  4291. /**
  4292. * ipr_slave_alloc - Prepare for commands to a device.
  4293. * @sdev: scsi device struct
  4294. *
  4295. * This function saves a pointer to the resource entry
  4296. * in the scsi device struct if the device exists. We
  4297. * can then use this pointer in ipr_queuecommand when
  4298. * handling new commands.
  4299. *
  4300. * Return value:
  4301. * 0 on success / -ENXIO if device does not exist
  4302. **/
  4303. static int ipr_slave_alloc(struct scsi_device *sdev)
  4304. {
  4305. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *) sdev->host->hostdata;
  4306. struct ipr_resource_entry *res;
  4307. unsigned long lock_flags;
  4308. int rc = -ENXIO;
  4309. sdev->hostdata = NULL;
  4310. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  4311. res = ipr_find_sdev(sdev);
  4312. if (res) {
  4313. res->sdev = sdev;
  4314. res->add_to_ml = 0;
  4315. res->in_erp = 0;
  4316. sdev->hostdata = res;
  4317. if (!ipr_is_naca_model(res))
  4318. res->needs_sync_complete = 1;
  4319. rc = 0;
  4320. if (ipr_is_gata(res)) {
  4321. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  4322. return ipr_ata_slave_alloc(sdev);
  4323. }
  4324. }
  4325. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  4326. return rc;
  4327. }
  4328. /**
  4329. * ipr_match_lun - Match function for specified LUN
  4330. * @ipr_cmd: ipr command struct
  4331. * @device: device to match (sdev)
  4332. *
  4333. * Returns:
  4334. * 1 if command matches sdev / 0 if command does not match sdev
  4335. **/
  4336. static int ipr_match_lun(struct ipr_cmnd *ipr_cmd, void *device)
  4337. {
  4338. if (ipr_cmd->scsi_cmd && ipr_cmd->scsi_cmd->device == device)
  4339. return 1;
  4340. return 0;
  4341. }
  4342. /**
  4343. * ipr_wait_for_ops - Wait for matching commands to complete
  4344. * @ipr_cmd: ipr command struct
  4345. * @device: device to match (sdev)
  4346. * @match: match function to use
  4347. *
  4348. * Returns:
  4349. * SUCCESS / FAILED
  4350. **/
  4351. static int ipr_wait_for_ops(struct ipr_ioa_cfg *ioa_cfg, void *device,
  4352. int (*match)(struct ipr_cmnd *, void *))
  4353. {
  4354. struct ipr_cmnd *ipr_cmd;
  4355. int wait;
  4356. unsigned long flags;
  4357. struct ipr_hrr_queue *hrrq;
  4358. signed long timeout = IPR_ABORT_TASK_TIMEOUT;
  4359. DECLARE_COMPLETION_ONSTACK(comp);
  4360. ENTER;
  4361. do {
  4362. wait = 0;
  4363. for_each_hrrq(hrrq, ioa_cfg) {
  4364. spin_lock_irqsave(hrrq->lock, flags);
  4365. list_for_each_entry(ipr_cmd, &hrrq->hrrq_pending_q, queue) {
  4366. if (match(ipr_cmd, device)) {
  4367. ipr_cmd->eh_comp = &comp;
  4368. wait++;
  4369. }
  4370. }
  4371. spin_unlock_irqrestore(hrrq->lock, flags);
  4372. }
  4373. if (wait) {
  4374. timeout = wait_for_completion_timeout(&comp, timeout);
  4375. if (!timeout) {
  4376. wait = 0;
  4377. for_each_hrrq(hrrq, ioa_cfg) {
  4378. spin_lock_irqsave(hrrq->lock, flags);
  4379. list_for_each_entry(ipr_cmd, &hrrq->hrrq_pending_q, queue) {
  4380. if (match(ipr_cmd, device)) {
  4381. ipr_cmd->eh_comp = NULL;
  4382. wait++;
  4383. }
  4384. }
  4385. spin_unlock_irqrestore(hrrq->lock, flags);
  4386. }
  4387. if (wait)
  4388. dev_err(&ioa_cfg->pdev->dev, "Timed out waiting for aborted commands\n");
  4389. LEAVE;
  4390. return wait ? FAILED : SUCCESS;
  4391. }
  4392. }
  4393. } while (wait);
  4394. LEAVE;
  4395. return SUCCESS;
  4396. }
  4397. static int ipr_eh_host_reset(struct scsi_cmnd *cmd)
  4398. {
  4399. struct ipr_ioa_cfg *ioa_cfg;
  4400. unsigned long lock_flags = 0;
  4401. int rc = SUCCESS;
  4402. ENTER;
  4403. ioa_cfg = (struct ipr_ioa_cfg *) cmd->device->host->hostdata;
  4404. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  4405. if (!ioa_cfg->in_reset_reload && !ioa_cfg->hrrq[IPR_INIT_HRRQ].ioa_is_dead) {
  4406. ipr_initiate_ioa_reset(ioa_cfg, IPR_SHUTDOWN_ABBREV);
  4407. dev_err(&ioa_cfg->pdev->dev,
  4408. "Adapter being reset as a result of error recovery.\n");
  4409. if (WAIT_FOR_DUMP == ioa_cfg->sdt_state)
  4410. ioa_cfg->sdt_state = GET_DUMP;
  4411. }
  4412. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  4413. wait_event(ioa_cfg->reset_wait_q, !ioa_cfg->in_reset_reload);
  4414. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  4415. /* If we got hit with a host reset while we were already resetting
  4416. the adapter for some reason, and the reset failed. */
  4417. if (ioa_cfg->hrrq[IPR_INIT_HRRQ].ioa_is_dead) {
  4418. ipr_trace;
  4419. rc = FAILED;
  4420. }
  4421. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  4422. LEAVE;
  4423. return rc;
  4424. }
  4425. /**
  4426. * ipr_device_reset - Reset the device
  4427. * @ioa_cfg: ioa config struct
  4428. * @res: resource entry struct
  4429. *
  4430. * This function issues a device reset to the affected device.
  4431. * If the device is a SCSI device, a LUN reset will be sent
  4432. * to the device first. If that does not work, a target reset
  4433. * will be sent. If the device is a SATA device, a PHY reset will
  4434. * be sent.
  4435. *
  4436. * Return value:
  4437. * 0 on success / non-zero on failure
  4438. **/
  4439. static int ipr_device_reset(struct ipr_ioa_cfg *ioa_cfg,
  4440. struct ipr_resource_entry *res)
  4441. {
  4442. struct ipr_cmnd *ipr_cmd;
  4443. struct ipr_ioarcb *ioarcb;
  4444. struct ipr_cmd_pkt *cmd_pkt;
  4445. struct ipr_ioarcb_ata_regs *regs;
  4446. u32 ioasc;
  4447. ENTER;
  4448. ipr_cmd = ipr_get_free_ipr_cmnd(ioa_cfg);
  4449. ioarcb = &ipr_cmd->ioarcb;
  4450. cmd_pkt = &ioarcb->cmd_pkt;
  4451. if (ipr_cmd->ioa_cfg->sis64) {
  4452. regs = &ipr_cmd->i.ata_ioadl.regs;
  4453. ioarcb->add_cmd_parms_offset = cpu_to_be16(sizeof(*ioarcb));
  4454. } else
  4455. regs = &ioarcb->u.add_data.u.regs;
  4456. ioarcb->res_handle = res->res_handle;
  4457. cmd_pkt->request_type = IPR_RQTYPE_IOACMD;
  4458. cmd_pkt->cdb[0] = IPR_RESET_DEVICE;
  4459. if (ipr_is_gata(res)) {
  4460. cmd_pkt->cdb[2] = IPR_ATA_PHY_RESET;
  4461. ioarcb->add_cmd_parms_len = cpu_to_be16(sizeof(regs->flags));
  4462. regs->flags |= IPR_ATA_FLAG_STATUS_ON_GOOD_COMPLETION;
  4463. }
  4464. ipr_send_blocking_cmd(ipr_cmd, ipr_timeout, IPR_DEVICE_RESET_TIMEOUT);
  4465. ioasc = be32_to_cpu(ipr_cmd->s.ioasa.hdr.ioasc);
  4466. list_add_tail(&ipr_cmd->queue, &ipr_cmd->hrrq->hrrq_free_q);
  4467. if (ipr_is_gata(res) && res->sata_port && ioasc != IPR_IOASC_IOA_WAS_RESET) {
  4468. if (ipr_cmd->ioa_cfg->sis64)
  4469. memcpy(&res->sata_port->ioasa, &ipr_cmd->s.ioasa64.u.gata,
  4470. sizeof(struct ipr_ioasa_gata));
  4471. else
  4472. memcpy(&res->sata_port->ioasa, &ipr_cmd->s.ioasa.u.gata,
  4473. sizeof(struct ipr_ioasa_gata));
  4474. }
  4475. LEAVE;
  4476. return IPR_IOASC_SENSE_KEY(ioasc) ? -EIO : 0;
  4477. }
  4478. /**
  4479. * ipr_sata_reset - Reset the SATA port
  4480. * @link: SATA link to reset
  4481. * @classes: class of the attached device
  4482. *
  4483. * This function issues a SATA phy reset to the affected ATA link.
  4484. *
  4485. * Return value:
  4486. * 0 on success / non-zero on failure
  4487. **/
  4488. static int ipr_sata_reset(struct ata_link *link, unsigned int *classes,
  4489. unsigned long deadline)
  4490. {
  4491. struct ipr_sata_port *sata_port = link->ap->private_data;
  4492. struct ipr_ioa_cfg *ioa_cfg = sata_port->ioa_cfg;
  4493. struct ipr_resource_entry *res;
  4494. unsigned long lock_flags = 0;
  4495. int rc = -ENXIO;
  4496. ENTER;
  4497. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  4498. while (ioa_cfg->in_reset_reload) {
  4499. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  4500. wait_event(ioa_cfg->reset_wait_q, !ioa_cfg->in_reset_reload);
  4501. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  4502. }
  4503. res = sata_port->res;
  4504. if (res) {
  4505. rc = ipr_device_reset(ioa_cfg, res);
  4506. *classes = res->ata_class;
  4507. }
  4508. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  4509. LEAVE;
  4510. return rc;
  4511. }
  4512. /**
  4513. * ipr_eh_dev_reset - Reset the device
  4514. * @scsi_cmd: scsi command struct
  4515. *
  4516. * This function issues a device reset to the affected device.
  4517. * A LUN reset will be sent to the device first. If that does
  4518. * not work, a target reset will be sent.
  4519. *
  4520. * Return value:
  4521. * SUCCESS / FAILED
  4522. **/
  4523. static int __ipr_eh_dev_reset(struct scsi_cmnd *scsi_cmd)
  4524. {
  4525. struct ipr_cmnd *ipr_cmd;
  4526. struct ipr_ioa_cfg *ioa_cfg;
  4527. struct ipr_resource_entry *res;
  4528. struct ata_port *ap;
  4529. int rc = 0;
  4530. struct ipr_hrr_queue *hrrq;
  4531. ENTER;
  4532. ioa_cfg = (struct ipr_ioa_cfg *) scsi_cmd->device->host->hostdata;
  4533. res = scsi_cmd->device->hostdata;
  4534. if (!res)
  4535. return FAILED;
  4536. /*
  4537. * If we are currently going through reset/reload, return failed. This will force the
  4538. * mid-layer to call ipr_eh_host_reset, which will then go to sleep and wait for the
  4539. * reset to complete
  4540. */
  4541. if (ioa_cfg->in_reset_reload)
  4542. return FAILED;
  4543. if (ioa_cfg->hrrq[IPR_INIT_HRRQ].ioa_is_dead)
  4544. return FAILED;
  4545. for_each_hrrq(hrrq, ioa_cfg) {
  4546. spin_lock(&hrrq->_lock);
  4547. list_for_each_entry(ipr_cmd, &hrrq->hrrq_pending_q, queue) {
  4548. if (ipr_cmd->ioarcb.res_handle == res->res_handle) {
  4549. if (ipr_cmd->scsi_cmd)
  4550. ipr_cmd->done = ipr_scsi_eh_done;
  4551. if (ipr_cmd->qc)
  4552. ipr_cmd->done = ipr_sata_eh_done;
  4553. if (ipr_cmd->qc &&
  4554. !(ipr_cmd->qc->flags & ATA_QCFLAG_FAILED)) {
  4555. ipr_cmd->qc->err_mask |= AC_ERR_TIMEOUT;
  4556. ipr_cmd->qc->flags |= ATA_QCFLAG_FAILED;
  4557. }
  4558. }
  4559. }
  4560. spin_unlock(&hrrq->_lock);
  4561. }
  4562. res->resetting_device = 1;
  4563. scmd_printk(KERN_ERR, scsi_cmd, "Resetting device\n");
  4564. if (ipr_is_gata(res) && res->sata_port) {
  4565. ap = res->sata_port->ap;
  4566. spin_unlock_irq(scsi_cmd->device->host->host_lock);
  4567. ata_std_error_handler(ap);
  4568. spin_lock_irq(scsi_cmd->device->host->host_lock);
  4569. for_each_hrrq(hrrq, ioa_cfg) {
  4570. spin_lock(&hrrq->_lock);
  4571. list_for_each_entry(ipr_cmd,
  4572. &hrrq->hrrq_pending_q, queue) {
  4573. if (ipr_cmd->ioarcb.res_handle ==
  4574. res->res_handle) {
  4575. rc = -EIO;
  4576. break;
  4577. }
  4578. }
  4579. spin_unlock(&hrrq->_lock);
  4580. }
  4581. } else
  4582. rc = ipr_device_reset(ioa_cfg, res);
  4583. res->resetting_device = 0;
  4584. res->reset_occurred = 1;
  4585. LEAVE;
  4586. return rc ? FAILED : SUCCESS;
  4587. }
  4588. static int ipr_eh_dev_reset(struct scsi_cmnd *cmd)
  4589. {
  4590. int rc;
  4591. struct ipr_ioa_cfg *ioa_cfg;
  4592. ioa_cfg = (struct ipr_ioa_cfg *) cmd->device->host->hostdata;
  4593. spin_lock_irq(cmd->device->host->host_lock);
  4594. rc = __ipr_eh_dev_reset(cmd);
  4595. spin_unlock_irq(cmd->device->host->host_lock);
  4596. if (rc == SUCCESS)
  4597. rc = ipr_wait_for_ops(ioa_cfg, cmd->device, ipr_match_lun);
  4598. return rc;
  4599. }
  4600. /**
  4601. * ipr_bus_reset_done - Op done function for bus reset.
  4602. * @ipr_cmd: ipr command struct
  4603. *
  4604. * This function is the op done function for a bus reset
  4605. *
  4606. * Return value:
  4607. * none
  4608. **/
  4609. static void ipr_bus_reset_done(struct ipr_cmnd *ipr_cmd)
  4610. {
  4611. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  4612. struct ipr_resource_entry *res;
  4613. ENTER;
  4614. if (!ioa_cfg->sis64)
  4615. list_for_each_entry(res, &ioa_cfg->used_res_q, queue) {
  4616. if (res->res_handle == ipr_cmd->ioarcb.res_handle) {
  4617. scsi_report_bus_reset(ioa_cfg->host, res->bus);
  4618. break;
  4619. }
  4620. }
  4621. /*
  4622. * If abort has not completed, indicate the reset has, else call the
  4623. * abort's done function to wake the sleeping eh thread
  4624. */
  4625. if (ipr_cmd->sibling->sibling)
  4626. ipr_cmd->sibling->sibling = NULL;
  4627. else
  4628. ipr_cmd->sibling->done(ipr_cmd->sibling);
  4629. list_add_tail(&ipr_cmd->queue, &ipr_cmd->hrrq->hrrq_free_q);
  4630. LEAVE;
  4631. }
  4632. /**
  4633. * ipr_abort_timeout - An abort task has timed out
  4634. * @ipr_cmd: ipr command struct
  4635. *
  4636. * This function handles when an abort task times out. If this
  4637. * happens we issue a bus reset since we have resources tied
  4638. * up that must be freed before returning to the midlayer.
  4639. *
  4640. * Return value:
  4641. * none
  4642. **/
  4643. static void ipr_abort_timeout(struct ipr_cmnd *ipr_cmd)
  4644. {
  4645. struct ipr_cmnd *reset_cmd;
  4646. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  4647. struct ipr_cmd_pkt *cmd_pkt;
  4648. unsigned long lock_flags = 0;
  4649. ENTER;
  4650. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  4651. if (ipr_cmd->completion.done || ioa_cfg->in_reset_reload) {
  4652. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  4653. return;
  4654. }
  4655. sdev_printk(KERN_ERR, ipr_cmd->u.sdev, "Abort timed out. Resetting bus.\n");
  4656. reset_cmd = ipr_get_free_ipr_cmnd(ioa_cfg);
  4657. ipr_cmd->sibling = reset_cmd;
  4658. reset_cmd->sibling = ipr_cmd;
  4659. reset_cmd->ioarcb.res_handle = ipr_cmd->ioarcb.res_handle;
  4660. cmd_pkt = &reset_cmd->ioarcb.cmd_pkt;
  4661. cmd_pkt->request_type = IPR_RQTYPE_IOACMD;
  4662. cmd_pkt->cdb[0] = IPR_RESET_DEVICE;
  4663. cmd_pkt->cdb[2] = IPR_RESET_TYPE_SELECT | IPR_BUS_RESET;
  4664. ipr_do_req(reset_cmd, ipr_bus_reset_done, ipr_timeout, IPR_DEVICE_RESET_TIMEOUT);
  4665. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  4666. LEAVE;
  4667. }
  4668. /**
  4669. * ipr_cancel_op - Cancel specified op
  4670. * @scsi_cmd: scsi command struct
  4671. *
  4672. * This function cancels specified op.
  4673. *
  4674. * Return value:
  4675. * SUCCESS / FAILED
  4676. **/
  4677. static int ipr_cancel_op(struct scsi_cmnd *scsi_cmd)
  4678. {
  4679. struct ipr_cmnd *ipr_cmd;
  4680. struct ipr_ioa_cfg *ioa_cfg;
  4681. struct ipr_resource_entry *res;
  4682. struct ipr_cmd_pkt *cmd_pkt;
  4683. u32 ioasc, int_reg;
  4684. int op_found = 0;
  4685. struct ipr_hrr_queue *hrrq;
  4686. ENTER;
  4687. ioa_cfg = (struct ipr_ioa_cfg *)scsi_cmd->device->host->hostdata;
  4688. res = scsi_cmd->device->hostdata;
  4689. /* If we are currently going through reset/reload, return failed.
  4690. * This will force the mid-layer to call ipr_eh_host_reset,
  4691. * which will then go to sleep and wait for the reset to complete
  4692. */
  4693. if (ioa_cfg->in_reset_reload ||
  4694. ioa_cfg->hrrq[IPR_INIT_HRRQ].ioa_is_dead)
  4695. return FAILED;
  4696. if (!res)
  4697. return FAILED;
  4698. /*
  4699. * If we are aborting a timed out op, chances are that the timeout was caused
  4700. * by a still not detected EEH error. In such cases, reading a register will
  4701. * trigger the EEH recovery infrastructure.
  4702. */
  4703. int_reg = readl(ioa_cfg->regs.sense_interrupt_reg);
  4704. if (!ipr_is_gscsi(res))
  4705. return FAILED;
  4706. for_each_hrrq(hrrq, ioa_cfg) {
  4707. spin_lock(&hrrq->_lock);
  4708. list_for_each_entry(ipr_cmd, &hrrq->hrrq_pending_q, queue) {
  4709. if (ipr_cmd->scsi_cmd == scsi_cmd) {
  4710. ipr_cmd->done = ipr_scsi_eh_done;
  4711. op_found = 1;
  4712. break;
  4713. }
  4714. }
  4715. spin_unlock(&hrrq->_lock);
  4716. }
  4717. if (!op_found)
  4718. return SUCCESS;
  4719. ipr_cmd = ipr_get_free_ipr_cmnd(ioa_cfg);
  4720. ipr_cmd->ioarcb.res_handle = res->res_handle;
  4721. cmd_pkt = &ipr_cmd->ioarcb.cmd_pkt;
  4722. cmd_pkt->request_type = IPR_RQTYPE_IOACMD;
  4723. cmd_pkt->cdb[0] = IPR_CANCEL_ALL_REQUESTS;
  4724. ipr_cmd->u.sdev = scsi_cmd->device;
  4725. scmd_printk(KERN_ERR, scsi_cmd, "Aborting command: %02X\n",
  4726. scsi_cmd->cmnd[0]);
  4727. ipr_send_blocking_cmd(ipr_cmd, ipr_abort_timeout, IPR_CANCEL_ALL_TIMEOUT);
  4728. ioasc = be32_to_cpu(ipr_cmd->s.ioasa.hdr.ioasc);
  4729. /*
  4730. * If the abort task timed out and we sent a bus reset, we will get
  4731. * one the following responses to the abort
  4732. */
  4733. if (ioasc == IPR_IOASC_BUS_WAS_RESET || ioasc == IPR_IOASC_SYNC_REQUIRED) {
  4734. ioasc = 0;
  4735. ipr_trace;
  4736. }
  4737. list_add_tail(&ipr_cmd->queue, &ipr_cmd->hrrq->hrrq_free_q);
  4738. if (!ipr_is_naca_model(res))
  4739. res->needs_sync_complete = 1;
  4740. LEAVE;
  4741. return IPR_IOASC_SENSE_KEY(ioasc) ? FAILED : SUCCESS;
  4742. }
  4743. /**
  4744. * ipr_eh_abort - Abort a single op
  4745. * @scsi_cmd: scsi command struct
  4746. *
  4747. * Return value:
  4748. * 0 if scan in progress / 1 if scan is complete
  4749. **/
  4750. static int ipr_scan_finished(struct Scsi_Host *shost, unsigned long elapsed_time)
  4751. {
  4752. unsigned long lock_flags;
  4753. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *) shost->hostdata;
  4754. int rc = 0;
  4755. spin_lock_irqsave(shost->host_lock, lock_flags);
  4756. if (ioa_cfg->hrrq[IPR_INIT_HRRQ].ioa_is_dead || ioa_cfg->scan_done)
  4757. rc = 1;
  4758. if ((elapsed_time/HZ) > (ioa_cfg->transop_timeout * 2))
  4759. rc = 1;
  4760. spin_unlock_irqrestore(shost->host_lock, lock_flags);
  4761. return rc;
  4762. }
  4763. /**
  4764. * ipr_eh_host_reset - Reset the host adapter
  4765. * @scsi_cmd: scsi command struct
  4766. *
  4767. * Return value:
  4768. * SUCCESS / FAILED
  4769. **/
  4770. static int ipr_eh_abort(struct scsi_cmnd *scsi_cmd)
  4771. {
  4772. unsigned long flags;
  4773. int rc;
  4774. struct ipr_ioa_cfg *ioa_cfg;
  4775. ENTER;
  4776. ioa_cfg = (struct ipr_ioa_cfg *) scsi_cmd->device->host->hostdata;
  4777. spin_lock_irqsave(scsi_cmd->device->host->host_lock, flags);
  4778. rc = ipr_cancel_op(scsi_cmd);
  4779. spin_unlock_irqrestore(scsi_cmd->device->host->host_lock, flags);
  4780. if (rc == SUCCESS)
  4781. rc = ipr_wait_for_ops(ioa_cfg, scsi_cmd->device, ipr_match_lun);
  4782. LEAVE;
  4783. return rc;
  4784. }
  4785. /**
  4786. * ipr_handle_other_interrupt - Handle "other" interrupts
  4787. * @ioa_cfg: ioa config struct
  4788. * @int_reg: interrupt register
  4789. *
  4790. * Return value:
  4791. * IRQ_NONE / IRQ_HANDLED
  4792. **/
  4793. static irqreturn_t ipr_handle_other_interrupt(struct ipr_ioa_cfg *ioa_cfg,
  4794. u32 int_reg)
  4795. {
  4796. irqreturn_t rc = IRQ_HANDLED;
  4797. u32 int_mask_reg;
  4798. int_mask_reg = readl(ioa_cfg->regs.sense_interrupt_mask_reg32);
  4799. int_reg &= ~int_mask_reg;
  4800. /* If an interrupt on the adapter did not occur, ignore it.
  4801. * Or in the case of SIS 64, check for a stage change interrupt.
  4802. */
  4803. if ((int_reg & IPR_PCII_OPER_INTERRUPTS) == 0) {
  4804. if (ioa_cfg->sis64) {
  4805. int_mask_reg = readl(ioa_cfg->regs.sense_interrupt_mask_reg);
  4806. int_reg = readl(ioa_cfg->regs.sense_interrupt_reg) & ~int_mask_reg;
  4807. if (int_reg & IPR_PCII_IPL_STAGE_CHANGE) {
  4808. /* clear stage change */
  4809. writel(IPR_PCII_IPL_STAGE_CHANGE, ioa_cfg->regs.clr_interrupt_reg);
  4810. int_reg = readl(ioa_cfg->regs.sense_interrupt_reg) & ~int_mask_reg;
  4811. list_del(&ioa_cfg->reset_cmd->queue);
  4812. del_timer(&ioa_cfg->reset_cmd->timer);
  4813. ipr_reset_ioa_job(ioa_cfg->reset_cmd);
  4814. return IRQ_HANDLED;
  4815. }
  4816. }
  4817. return IRQ_NONE;
  4818. }
  4819. if (int_reg & IPR_PCII_IOA_TRANS_TO_OPER) {
  4820. /* Mask the interrupt */
  4821. writel(IPR_PCII_IOA_TRANS_TO_OPER, ioa_cfg->regs.set_interrupt_mask_reg);
  4822. int_reg = readl(ioa_cfg->regs.sense_interrupt_reg);
  4823. list_del(&ioa_cfg->reset_cmd->queue);
  4824. del_timer(&ioa_cfg->reset_cmd->timer);
  4825. ipr_reset_ioa_job(ioa_cfg->reset_cmd);
  4826. } else if ((int_reg & IPR_PCII_HRRQ_UPDATED) == int_reg) {
  4827. if (ioa_cfg->clear_isr) {
  4828. if (ipr_debug && printk_ratelimit())
  4829. dev_err(&ioa_cfg->pdev->dev,
  4830. "Spurious interrupt detected. 0x%08X\n", int_reg);
  4831. writel(IPR_PCII_HRRQ_UPDATED, ioa_cfg->regs.clr_interrupt_reg32);
  4832. int_reg = readl(ioa_cfg->regs.sense_interrupt_reg32);
  4833. return IRQ_NONE;
  4834. }
  4835. } else {
  4836. if (int_reg & IPR_PCII_IOA_UNIT_CHECKED)
  4837. ioa_cfg->ioa_unit_checked = 1;
  4838. else if (int_reg & IPR_PCII_NO_HOST_RRQ)
  4839. dev_err(&ioa_cfg->pdev->dev,
  4840. "No Host RRQ. 0x%08X\n", int_reg);
  4841. else
  4842. dev_err(&ioa_cfg->pdev->dev,
  4843. "Permanent IOA failure. 0x%08X\n", int_reg);
  4844. if (WAIT_FOR_DUMP == ioa_cfg->sdt_state)
  4845. ioa_cfg->sdt_state = GET_DUMP;
  4846. ipr_mask_and_clear_interrupts(ioa_cfg, ~0);
  4847. ipr_initiate_ioa_reset(ioa_cfg, IPR_SHUTDOWN_NONE);
  4848. }
  4849. return rc;
  4850. }
  4851. /**
  4852. * ipr_isr_eh - Interrupt service routine error handler
  4853. * @ioa_cfg: ioa config struct
  4854. * @msg: message to log
  4855. *
  4856. * Return value:
  4857. * none
  4858. **/
  4859. static void ipr_isr_eh(struct ipr_ioa_cfg *ioa_cfg, char *msg, u16 number)
  4860. {
  4861. ioa_cfg->errors_logged++;
  4862. dev_err(&ioa_cfg->pdev->dev, "%s %d\n", msg, number);
  4863. if (WAIT_FOR_DUMP == ioa_cfg->sdt_state)
  4864. ioa_cfg->sdt_state = GET_DUMP;
  4865. ipr_initiate_ioa_reset(ioa_cfg, IPR_SHUTDOWN_NONE);
  4866. }
  4867. static int ipr_process_hrrq(struct ipr_hrr_queue *hrr_queue, int budget,
  4868. struct list_head *doneq)
  4869. {
  4870. u32 ioasc;
  4871. u16 cmd_index;
  4872. struct ipr_cmnd *ipr_cmd;
  4873. struct ipr_ioa_cfg *ioa_cfg = hrr_queue->ioa_cfg;
  4874. int num_hrrq = 0;
  4875. /* If interrupts are disabled, ignore the interrupt */
  4876. if (!hrr_queue->allow_interrupts)
  4877. return 0;
  4878. while ((be32_to_cpu(*hrr_queue->hrrq_curr) & IPR_HRRQ_TOGGLE_BIT) ==
  4879. hrr_queue->toggle_bit) {
  4880. cmd_index = (be32_to_cpu(*hrr_queue->hrrq_curr) &
  4881. IPR_HRRQ_REQ_RESP_HANDLE_MASK) >>
  4882. IPR_HRRQ_REQ_RESP_HANDLE_SHIFT;
  4883. if (unlikely(cmd_index > hrr_queue->max_cmd_id ||
  4884. cmd_index < hrr_queue->min_cmd_id)) {
  4885. ipr_isr_eh(ioa_cfg,
  4886. "Invalid response handle from IOA: ",
  4887. cmd_index);
  4888. break;
  4889. }
  4890. ipr_cmd = ioa_cfg->ipr_cmnd_list[cmd_index];
  4891. ioasc = be32_to_cpu(ipr_cmd->s.ioasa.hdr.ioasc);
  4892. ipr_trc_hook(ipr_cmd, IPR_TRACE_FINISH, ioasc);
  4893. list_move_tail(&ipr_cmd->queue, doneq);
  4894. if (hrr_queue->hrrq_curr < hrr_queue->hrrq_end) {
  4895. hrr_queue->hrrq_curr++;
  4896. } else {
  4897. hrr_queue->hrrq_curr = hrr_queue->hrrq_start;
  4898. hrr_queue->toggle_bit ^= 1u;
  4899. }
  4900. num_hrrq++;
  4901. if (budget > 0 && num_hrrq >= budget)
  4902. break;
  4903. }
  4904. return num_hrrq;
  4905. }
  4906. static int ipr_iopoll(struct blk_iopoll *iop, int budget)
  4907. {
  4908. struct ipr_ioa_cfg *ioa_cfg;
  4909. struct ipr_hrr_queue *hrrq;
  4910. struct ipr_cmnd *ipr_cmd, *temp;
  4911. unsigned long hrrq_flags;
  4912. int completed_ops;
  4913. LIST_HEAD(doneq);
  4914. hrrq = container_of(iop, struct ipr_hrr_queue, iopoll);
  4915. ioa_cfg = hrrq->ioa_cfg;
  4916. spin_lock_irqsave(hrrq->lock, hrrq_flags);
  4917. completed_ops = ipr_process_hrrq(hrrq, budget, &doneq);
  4918. if (completed_ops < budget)
  4919. blk_iopoll_complete(iop);
  4920. spin_unlock_irqrestore(hrrq->lock, hrrq_flags);
  4921. list_for_each_entry_safe(ipr_cmd, temp, &doneq, queue) {
  4922. list_del(&ipr_cmd->queue);
  4923. del_timer(&ipr_cmd->timer);
  4924. ipr_cmd->fast_done(ipr_cmd);
  4925. }
  4926. return completed_ops;
  4927. }
  4928. /**
  4929. * ipr_isr - Interrupt service routine
  4930. * @irq: irq number
  4931. * @devp: pointer to ioa config struct
  4932. *
  4933. * Return value:
  4934. * IRQ_NONE / IRQ_HANDLED
  4935. **/
  4936. static irqreturn_t ipr_isr(int irq, void *devp)
  4937. {
  4938. struct ipr_hrr_queue *hrrq = (struct ipr_hrr_queue *)devp;
  4939. struct ipr_ioa_cfg *ioa_cfg = hrrq->ioa_cfg;
  4940. unsigned long hrrq_flags = 0;
  4941. u32 int_reg = 0;
  4942. int num_hrrq = 0;
  4943. int irq_none = 0;
  4944. struct ipr_cmnd *ipr_cmd, *temp;
  4945. irqreturn_t rc = IRQ_NONE;
  4946. LIST_HEAD(doneq);
  4947. spin_lock_irqsave(hrrq->lock, hrrq_flags);
  4948. /* If interrupts are disabled, ignore the interrupt */
  4949. if (!hrrq->allow_interrupts) {
  4950. spin_unlock_irqrestore(hrrq->lock, hrrq_flags);
  4951. return IRQ_NONE;
  4952. }
  4953. while (1) {
  4954. if (ipr_process_hrrq(hrrq, -1, &doneq)) {
  4955. rc = IRQ_HANDLED;
  4956. if (!ioa_cfg->clear_isr)
  4957. break;
  4958. /* Clear the PCI interrupt */
  4959. num_hrrq = 0;
  4960. do {
  4961. writel(IPR_PCII_HRRQ_UPDATED,
  4962. ioa_cfg->regs.clr_interrupt_reg32);
  4963. int_reg = readl(ioa_cfg->regs.sense_interrupt_reg32);
  4964. } while (int_reg & IPR_PCII_HRRQ_UPDATED &&
  4965. num_hrrq++ < IPR_MAX_HRRQ_RETRIES);
  4966. } else if (rc == IRQ_NONE && irq_none == 0) {
  4967. int_reg = readl(ioa_cfg->regs.sense_interrupt_reg32);
  4968. irq_none++;
  4969. } else if (num_hrrq == IPR_MAX_HRRQ_RETRIES &&
  4970. int_reg & IPR_PCII_HRRQ_UPDATED) {
  4971. ipr_isr_eh(ioa_cfg,
  4972. "Error clearing HRRQ: ", num_hrrq);
  4973. rc = IRQ_HANDLED;
  4974. break;
  4975. } else
  4976. break;
  4977. }
  4978. if (unlikely(rc == IRQ_NONE))
  4979. rc = ipr_handle_other_interrupt(ioa_cfg, int_reg);
  4980. spin_unlock_irqrestore(hrrq->lock, hrrq_flags);
  4981. list_for_each_entry_safe(ipr_cmd, temp, &doneq, queue) {
  4982. list_del(&ipr_cmd->queue);
  4983. del_timer(&ipr_cmd->timer);
  4984. ipr_cmd->fast_done(ipr_cmd);
  4985. }
  4986. return rc;
  4987. }
  4988. /**
  4989. * ipr_isr_mhrrq - Interrupt service routine
  4990. * @irq: irq number
  4991. * @devp: pointer to ioa config struct
  4992. *
  4993. * Return value:
  4994. * IRQ_NONE / IRQ_HANDLED
  4995. **/
  4996. static irqreturn_t ipr_isr_mhrrq(int irq, void *devp)
  4997. {
  4998. struct ipr_hrr_queue *hrrq = (struct ipr_hrr_queue *)devp;
  4999. struct ipr_ioa_cfg *ioa_cfg = hrrq->ioa_cfg;
  5000. unsigned long hrrq_flags = 0;
  5001. struct ipr_cmnd *ipr_cmd, *temp;
  5002. irqreturn_t rc = IRQ_NONE;
  5003. LIST_HEAD(doneq);
  5004. spin_lock_irqsave(hrrq->lock, hrrq_flags);
  5005. /* If interrupts are disabled, ignore the interrupt */
  5006. if (!hrrq->allow_interrupts) {
  5007. spin_unlock_irqrestore(hrrq->lock, hrrq_flags);
  5008. return IRQ_NONE;
  5009. }
  5010. if (ioa_cfg->iopoll_weight && ioa_cfg->sis64 && ioa_cfg->nvectors > 1) {
  5011. if ((be32_to_cpu(*hrrq->hrrq_curr) & IPR_HRRQ_TOGGLE_BIT) ==
  5012. hrrq->toggle_bit) {
  5013. if (!blk_iopoll_sched_prep(&hrrq->iopoll))
  5014. blk_iopoll_sched(&hrrq->iopoll);
  5015. spin_unlock_irqrestore(hrrq->lock, hrrq_flags);
  5016. return IRQ_HANDLED;
  5017. }
  5018. } else {
  5019. if ((be32_to_cpu(*hrrq->hrrq_curr) & IPR_HRRQ_TOGGLE_BIT) ==
  5020. hrrq->toggle_bit)
  5021. if (ipr_process_hrrq(hrrq, -1, &doneq))
  5022. rc = IRQ_HANDLED;
  5023. }
  5024. spin_unlock_irqrestore(hrrq->lock, hrrq_flags);
  5025. list_for_each_entry_safe(ipr_cmd, temp, &doneq, queue) {
  5026. list_del(&ipr_cmd->queue);
  5027. del_timer(&ipr_cmd->timer);
  5028. ipr_cmd->fast_done(ipr_cmd);
  5029. }
  5030. return rc;
  5031. }
  5032. /**
  5033. * ipr_build_ioadl64 - Build a scatter/gather list and map the buffer
  5034. * @ioa_cfg: ioa config struct
  5035. * @ipr_cmd: ipr command struct
  5036. *
  5037. * Return value:
  5038. * 0 on success / -1 on failure
  5039. **/
  5040. static int ipr_build_ioadl64(struct ipr_ioa_cfg *ioa_cfg,
  5041. struct ipr_cmnd *ipr_cmd)
  5042. {
  5043. int i, nseg;
  5044. struct scatterlist *sg;
  5045. u32 length;
  5046. u32 ioadl_flags = 0;
  5047. struct scsi_cmnd *scsi_cmd = ipr_cmd->scsi_cmd;
  5048. struct ipr_ioarcb *ioarcb = &ipr_cmd->ioarcb;
  5049. struct ipr_ioadl64_desc *ioadl64 = ipr_cmd->i.ioadl64;
  5050. length = scsi_bufflen(scsi_cmd);
  5051. if (!length)
  5052. return 0;
  5053. nseg = scsi_dma_map(scsi_cmd);
  5054. if (nseg < 0) {
  5055. if (printk_ratelimit())
  5056. dev_err(&ioa_cfg->pdev->dev, "scsi_dma_map failed!\n");
  5057. return -1;
  5058. }
  5059. ipr_cmd->dma_use_sg = nseg;
  5060. ioarcb->data_transfer_length = cpu_to_be32(length);
  5061. ioarcb->ioadl_len =
  5062. cpu_to_be32(sizeof(struct ipr_ioadl64_desc) * ipr_cmd->dma_use_sg);
  5063. if (scsi_cmd->sc_data_direction == DMA_TO_DEVICE) {
  5064. ioadl_flags = IPR_IOADL_FLAGS_WRITE;
  5065. ioarcb->cmd_pkt.flags_hi |= IPR_FLAGS_HI_WRITE_NOT_READ;
  5066. } else if (scsi_cmd->sc_data_direction == DMA_FROM_DEVICE)
  5067. ioadl_flags = IPR_IOADL_FLAGS_READ;
  5068. scsi_for_each_sg(scsi_cmd, sg, ipr_cmd->dma_use_sg, i) {
  5069. ioadl64[i].flags = cpu_to_be32(ioadl_flags);
  5070. ioadl64[i].data_len = cpu_to_be32(sg_dma_len(sg));
  5071. ioadl64[i].address = cpu_to_be64(sg_dma_address(sg));
  5072. }
  5073. ioadl64[i-1].flags |= cpu_to_be32(IPR_IOADL_FLAGS_LAST);
  5074. return 0;
  5075. }
  5076. /**
  5077. * ipr_build_ioadl - Build a scatter/gather list and map the buffer
  5078. * @ioa_cfg: ioa config struct
  5079. * @ipr_cmd: ipr command struct
  5080. *
  5081. * Return value:
  5082. * 0 on success / -1 on failure
  5083. **/
  5084. static int ipr_build_ioadl(struct ipr_ioa_cfg *ioa_cfg,
  5085. struct ipr_cmnd *ipr_cmd)
  5086. {
  5087. int i, nseg;
  5088. struct scatterlist *sg;
  5089. u32 length;
  5090. u32 ioadl_flags = 0;
  5091. struct scsi_cmnd *scsi_cmd = ipr_cmd->scsi_cmd;
  5092. struct ipr_ioarcb *ioarcb = &ipr_cmd->ioarcb;
  5093. struct ipr_ioadl_desc *ioadl = ipr_cmd->i.ioadl;
  5094. length = scsi_bufflen(scsi_cmd);
  5095. if (!length)
  5096. return 0;
  5097. nseg = scsi_dma_map(scsi_cmd);
  5098. if (nseg < 0) {
  5099. dev_err(&ioa_cfg->pdev->dev, "scsi_dma_map failed!\n");
  5100. return -1;
  5101. }
  5102. ipr_cmd->dma_use_sg = nseg;
  5103. if (scsi_cmd->sc_data_direction == DMA_TO_DEVICE) {
  5104. ioadl_flags = IPR_IOADL_FLAGS_WRITE;
  5105. ioarcb->cmd_pkt.flags_hi |= IPR_FLAGS_HI_WRITE_NOT_READ;
  5106. ioarcb->data_transfer_length = cpu_to_be32(length);
  5107. ioarcb->ioadl_len =
  5108. cpu_to_be32(sizeof(struct ipr_ioadl_desc) * ipr_cmd->dma_use_sg);
  5109. } else if (scsi_cmd->sc_data_direction == DMA_FROM_DEVICE) {
  5110. ioadl_flags = IPR_IOADL_FLAGS_READ;
  5111. ioarcb->read_data_transfer_length = cpu_to_be32(length);
  5112. ioarcb->read_ioadl_len =
  5113. cpu_to_be32(sizeof(struct ipr_ioadl_desc) * ipr_cmd->dma_use_sg);
  5114. }
  5115. if (ipr_cmd->dma_use_sg <= ARRAY_SIZE(ioarcb->u.add_data.u.ioadl)) {
  5116. ioadl = ioarcb->u.add_data.u.ioadl;
  5117. ioarcb->write_ioadl_addr = cpu_to_be32((ipr_cmd->dma_addr) +
  5118. offsetof(struct ipr_ioarcb, u.add_data));
  5119. ioarcb->read_ioadl_addr = ioarcb->write_ioadl_addr;
  5120. }
  5121. scsi_for_each_sg(scsi_cmd, sg, ipr_cmd->dma_use_sg, i) {
  5122. ioadl[i].flags_and_data_len =
  5123. cpu_to_be32(ioadl_flags | sg_dma_len(sg));
  5124. ioadl[i].address = cpu_to_be32(sg_dma_address(sg));
  5125. }
  5126. ioadl[i-1].flags_and_data_len |= cpu_to_be32(IPR_IOADL_FLAGS_LAST);
  5127. return 0;
  5128. }
  5129. /**
  5130. * ipr_erp_done - Process completion of ERP for a device
  5131. * @ipr_cmd: ipr command struct
  5132. *
  5133. * This function copies the sense buffer into the scsi_cmd
  5134. * struct and pushes the scsi_done function.
  5135. *
  5136. * Return value:
  5137. * nothing
  5138. **/
  5139. static void ipr_erp_done(struct ipr_cmnd *ipr_cmd)
  5140. {
  5141. struct scsi_cmnd *scsi_cmd = ipr_cmd->scsi_cmd;
  5142. struct ipr_resource_entry *res = scsi_cmd->device->hostdata;
  5143. u32 ioasc = be32_to_cpu(ipr_cmd->s.ioasa.hdr.ioasc);
  5144. if (IPR_IOASC_SENSE_KEY(ioasc) > 0) {
  5145. scsi_cmd->result |= (DID_ERROR << 16);
  5146. scmd_printk(KERN_ERR, scsi_cmd,
  5147. "Request Sense failed with IOASC: 0x%08X\n", ioasc);
  5148. } else {
  5149. memcpy(scsi_cmd->sense_buffer, ipr_cmd->sense_buffer,
  5150. SCSI_SENSE_BUFFERSIZE);
  5151. }
  5152. if (res) {
  5153. if (!ipr_is_naca_model(res))
  5154. res->needs_sync_complete = 1;
  5155. res->in_erp = 0;
  5156. }
  5157. scsi_dma_unmap(ipr_cmd->scsi_cmd);
  5158. scsi_cmd->scsi_done(scsi_cmd);
  5159. if (ipr_cmd->eh_comp)
  5160. complete(ipr_cmd->eh_comp);
  5161. list_add_tail(&ipr_cmd->queue, &ipr_cmd->hrrq->hrrq_free_q);
  5162. }
  5163. /**
  5164. * ipr_reinit_ipr_cmnd_for_erp - Re-initialize a cmnd block to be used for ERP
  5165. * @ipr_cmd: ipr command struct
  5166. *
  5167. * Return value:
  5168. * none
  5169. **/
  5170. static void ipr_reinit_ipr_cmnd_for_erp(struct ipr_cmnd *ipr_cmd)
  5171. {
  5172. struct ipr_ioarcb *ioarcb = &ipr_cmd->ioarcb;
  5173. struct ipr_ioasa *ioasa = &ipr_cmd->s.ioasa;
  5174. dma_addr_t dma_addr = ipr_cmd->dma_addr;
  5175. memset(&ioarcb->cmd_pkt, 0, sizeof(struct ipr_cmd_pkt));
  5176. ioarcb->data_transfer_length = 0;
  5177. ioarcb->read_data_transfer_length = 0;
  5178. ioarcb->ioadl_len = 0;
  5179. ioarcb->read_ioadl_len = 0;
  5180. ioasa->hdr.ioasc = 0;
  5181. ioasa->hdr.residual_data_len = 0;
  5182. if (ipr_cmd->ioa_cfg->sis64)
  5183. ioarcb->u.sis64_addr_data.data_ioadl_addr =
  5184. cpu_to_be64(dma_addr + offsetof(struct ipr_cmnd, i.ioadl64));
  5185. else {
  5186. ioarcb->write_ioadl_addr =
  5187. cpu_to_be32(dma_addr + offsetof(struct ipr_cmnd, i.ioadl));
  5188. ioarcb->read_ioadl_addr = ioarcb->write_ioadl_addr;
  5189. }
  5190. }
  5191. /**
  5192. * ipr_erp_request_sense - Send request sense to a device
  5193. * @ipr_cmd: ipr command struct
  5194. *
  5195. * This function sends a request sense to a device as a result
  5196. * of a check condition.
  5197. *
  5198. * Return value:
  5199. * nothing
  5200. **/
  5201. static void ipr_erp_request_sense(struct ipr_cmnd *ipr_cmd)
  5202. {
  5203. struct ipr_cmd_pkt *cmd_pkt = &ipr_cmd->ioarcb.cmd_pkt;
  5204. u32 ioasc = be32_to_cpu(ipr_cmd->s.ioasa.hdr.ioasc);
  5205. if (IPR_IOASC_SENSE_KEY(ioasc) > 0) {
  5206. ipr_erp_done(ipr_cmd);
  5207. return;
  5208. }
  5209. ipr_reinit_ipr_cmnd_for_erp(ipr_cmd);
  5210. cmd_pkt->request_type = IPR_RQTYPE_SCSICDB;
  5211. cmd_pkt->cdb[0] = REQUEST_SENSE;
  5212. cmd_pkt->cdb[4] = SCSI_SENSE_BUFFERSIZE;
  5213. cmd_pkt->flags_hi |= IPR_FLAGS_HI_SYNC_OVERRIDE;
  5214. cmd_pkt->flags_hi |= IPR_FLAGS_HI_NO_ULEN_CHK;
  5215. cmd_pkt->timeout = cpu_to_be16(IPR_REQUEST_SENSE_TIMEOUT / HZ);
  5216. ipr_init_ioadl(ipr_cmd, ipr_cmd->sense_buffer_dma,
  5217. SCSI_SENSE_BUFFERSIZE, IPR_IOADL_FLAGS_READ_LAST);
  5218. ipr_do_req(ipr_cmd, ipr_erp_done, ipr_timeout,
  5219. IPR_REQUEST_SENSE_TIMEOUT * 2);
  5220. }
  5221. /**
  5222. * ipr_erp_cancel_all - Send cancel all to a device
  5223. * @ipr_cmd: ipr command struct
  5224. *
  5225. * This function sends a cancel all to a device to clear the
  5226. * queue. If we are running TCQ on the device, QERR is set to 1,
  5227. * which means all outstanding ops have been dropped on the floor.
  5228. * Cancel all will return them to us.
  5229. *
  5230. * Return value:
  5231. * nothing
  5232. **/
  5233. static void ipr_erp_cancel_all(struct ipr_cmnd *ipr_cmd)
  5234. {
  5235. struct scsi_cmnd *scsi_cmd = ipr_cmd->scsi_cmd;
  5236. struct ipr_resource_entry *res = scsi_cmd->device->hostdata;
  5237. struct ipr_cmd_pkt *cmd_pkt;
  5238. res->in_erp = 1;
  5239. ipr_reinit_ipr_cmnd_for_erp(ipr_cmd);
  5240. if (!scsi_cmd->device->simple_tags) {
  5241. ipr_erp_request_sense(ipr_cmd);
  5242. return;
  5243. }
  5244. cmd_pkt = &ipr_cmd->ioarcb.cmd_pkt;
  5245. cmd_pkt->request_type = IPR_RQTYPE_IOACMD;
  5246. cmd_pkt->cdb[0] = IPR_CANCEL_ALL_REQUESTS;
  5247. ipr_do_req(ipr_cmd, ipr_erp_request_sense, ipr_timeout,
  5248. IPR_CANCEL_ALL_TIMEOUT);
  5249. }
  5250. /**
  5251. * ipr_dump_ioasa - Dump contents of IOASA
  5252. * @ioa_cfg: ioa config struct
  5253. * @ipr_cmd: ipr command struct
  5254. * @res: resource entry struct
  5255. *
  5256. * This function is invoked by the interrupt handler when ops
  5257. * fail. It will log the IOASA if appropriate. Only called
  5258. * for GPDD ops.
  5259. *
  5260. * Return value:
  5261. * none
  5262. **/
  5263. static void ipr_dump_ioasa(struct ipr_ioa_cfg *ioa_cfg,
  5264. struct ipr_cmnd *ipr_cmd, struct ipr_resource_entry *res)
  5265. {
  5266. int i;
  5267. u16 data_len;
  5268. u32 ioasc, fd_ioasc;
  5269. struct ipr_ioasa *ioasa = &ipr_cmd->s.ioasa;
  5270. __be32 *ioasa_data = (__be32 *)ioasa;
  5271. int error_index;
  5272. ioasc = be32_to_cpu(ioasa->hdr.ioasc) & IPR_IOASC_IOASC_MASK;
  5273. fd_ioasc = be32_to_cpu(ioasa->hdr.fd_ioasc) & IPR_IOASC_IOASC_MASK;
  5274. if (0 == ioasc)
  5275. return;
  5276. if (ioa_cfg->log_level < IPR_DEFAULT_LOG_LEVEL)
  5277. return;
  5278. if (ioasc == IPR_IOASC_BUS_WAS_RESET && fd_ioasc)
  5279. error_index = ipr_get_error(fd_ioasc);
  5280. else
  5281. error_index = ipr_get_error(ioasc);
  5282. if (ioa_cfg->log_level < IPR_MAX_LOG_LEVEL) {
  5283. /* Don't log an error if the IOA already logged one */
  5284. if (ioasa->hdr.ilid != 0)
  5285. return;
  5286. if (!ipr_is_gscsi(res))
  5287. return;
  5288. if (ipr_error_table[error_index].log_ioasa == 0)
  5289. return;
  5290. }
  5291. ipr_res_err(ioa_cfg, res, "%s\n", ipr_error_table[error_index].error);
  5292. data_len = be16_to_cpu(ioasa->hdr.ret_stat_len);
  5293. if (ioa_cfg->sis64 && sizeof(struct ipr_ioasa64) < data_len)
  5294. data_len = sizeof(struct ipr_ioasa64);
  5295. else if (!ioa_cfg->sis64 && sizeof(struct ipr_ioasa) < data_len)
  5296. data_len = sizeof(struct ipr_ioasa);
  5297. ipr_err("IOASA Dump:\n");
  5298. for (i = 0; i < data_len / 4; i += 4) {
  5299. ipr_err("%08X: %08X %08X %08X %08X\n", i*4,
  5300. be32_to_cpu(ioasa_data[i]),
  5301. be32_to_cpu(ioasa_data[i+1]),
  5302. be32_to_cpu(ioasa_data[i+2]),
  5303. be32_to_cpu(ioasa_data[i+3]));
  5304. }
  5305. }
  5306. /**
  5307. * ipr_gen_sense - Generate SCSI sense data from an IOASA
  5308. * @ioasa: IOASA
  5309. * @sense_buf: sense data buffer
  5310. *
  5311. * Return value:
  5312. * none
  5313. **/
  5314. static void ipr_gen_sense(struct ipr_cmnd *ipr_cmd)
  5315. {
  5316. u32 failing_lba;
  5317. u8 *sense_buf = ipr_cmd->scsi_cmd->sense_buffer;
  5318. struct ipr_resource_entry *res = ipr_cmd->scsi_cmd->device->hostdata;
  5319. struct ipr_ioasa *ioasa = &ipr_cmd->s.ioasa;
  5320. u32 ioasc = be32_to_cpu(ioasa->hdr.ioasc);
  5321. memset(sense_buf, 0, SCSI_SENSE_BUFFERSIZE);
  5322. if (ioasc >= IPR_FIRST_DRIVER_IOASC)
  5323. return;
  5324. ipr_cmd->scsi_cmd->result = SAM_STAT_CHECK_CONDITION;
  5325. if (ipr_is_vset_device(res) &&
  5326. ioasc == IPR_IOASC_MED_DO_NOT_REALLOC &&
  5327. ioasa->u.vset.failing_lba_hi != 0) {
  5328. sense_buf[0] = 0x72;
  5329. sense_buf[1] = IPR_IOASC_SENSE_KEY(ioasc);
  5330. sense_buf[2] = IPR_IOASC_SENSE_CODE(ioasc);
  5331. sense_buf[3] = IPR_IOASC_SENSE_QUAL(ioasc);
  5332. sense_buf[7] = 12;
  5333. sense_buf[8] = 0;
  5334. sense_buf[9] = 0x0A;
  5335. sense_buf[10] = 0x80;
  5336. failing_lba = be32_to_cpu(ioasa->u.vset.failing_lba_hi);
  5337. sense_buf[12] = (failing_lba & 0xff000000) >> 24;
  5338. sense_buf[13] = (failing_lba & 0x00ff0000) >> 16;
  5339. sense_buf[14] = (failing_lba & 0x0000ff00) >> 8;
  5340. sense_buf[15] = failing_lba & 0x000000ff;
  5341. failing_lba = be32_to_cpu(ioasa->u.vset.failing_lba_lo);
  5342. sense_buf[16] = (failing_lba & 0xff000000) >> 24;
  5343. sense_buf[17] = (failing_lba & 0x00ff0000) >> 16;
  5344. sense_buf[18] = (failing_lba & 0x0000ff00) >> 8;
  5345. sense_buf[19] = failing_lba & 0x000000ff;
  5346. } else {
  5347. sense_buf[0] = 0x70;
  5348. sense_buf[2] = IPR_IOASC_SENSE_KEY(ioasc);
  5349. sense_buf[12] = IPR_IOASC_SENSE_CODE(ioasc);
  5350. sense_buf[13] = IPR_IOASC_SENSE_QUAL(ioasc);
  5351. /* Illegal request */
  5352. if ((IPR_IOASC_SENSE_KEY(ioasc) == 0x05) &&
  5353. (be32_to_cpu(ioasa->hdr.ioasc_specific) & IPR_FIELD_POINTER_VALID)) {
  5354. sense_buf[7] = 10; /* additional length */
  5355. /* IOARCB was in error */
  5356. if (IPR_IOASC_SENSE_CODE(ioasc) == 0x24)
  5357. sense_buf[15] = 0xC0;
  5358. else /* Parameter data was invalid */
  5359. sense_buf[15] = 0x80;
  5360. sense_buf[16] =
  5361. ((IPR_FIELD_POINTER_MASK &
  5362. be32_to_cpu(ioasa->hdr.ioasc_specific)) >> 8) & 0xff;
  5363. sense_buf[17] =
  5364. (IPR_FIELD_POINTER_MASK &
  5365. be32_to_cpu(ioasa->hdr.ioasc_specific)) & 0xff;
  5366. } else {
  5367. if (ioasc == IPR_IOASC_MED_DO_NOT_REALLOC) {
  5368. if (ipr_is_vset_device(res))
  5369. failing_lba = be32_to_cpu(ioasa->u.vset.failing_lba_lo);
  5370. else
  5371. failing_lba = be32_to_cpu(ioasa->u.dasd.failing_lba);
  5372. sense_buf[0] |= 0x80; /* Or in the Valid bit */
  5373. sense_buf[3] = (failing_lba & 0xff000000) >> 24;
  5374. sense_buf[4] = (failing_lba & 0x00ff0000) >> 16;
  5375. sense_buf[5] = (failing_lba & 0x0000ff00) >> 8;
  5376. sense_buf[6] = failing_lba & 0x000000ff;
  5377. }
  5378. sense_buf[7] = 6; /* additional length */
  5379. }
  5380. }
  5381. }
  5382. /**
  5383. * ipr_get_autosense - Copy autosense data to sense buffer
  5384. * @ipr_cmd: ipr command struct
  5385. *
  5386. * This function copies the autosense buffer to the buffer
  5387. * in the scsi_cmd, if there is autosense available.
  5388. *
  5389. * Return value:
  5390. * 1 if autosense was available / 0 if not
  5391. **/
  5392. static int ipr_get_autosense(struct ipr_cmnd *ipr_cmd)
  5393. {
  5394. struct ipr_ioasa *ioasa = &ipr_cmd->s.ioasa;
  5395. struct ipr_ioasa64 *ioasa64 = &ipr_cmd->s.ioasa64;
  5396. if ((be32_to_cpu(ioasa->hdr.ioasc_specific) & IPR_AUTOSENSE_VALID) == 0)
  5397. return 0;
  5398. if (ipr_cmd->ioa_cfg->sis64)
  5399. memcpy(ipr_cmd->scsi_cmd->sense_buffer, ioasa64->auto_sense.data,
  5400. min_t(u16, be16_to_cpu(ioasa64->auto_sense.auto_sense_len),
  5401. SCSI_SENSE_BUFFERSIZE));
  5402. else
  5403. memcpy(ipr_cmd->scsi_cmd->sense_buffer, ioasa->auto_sense.data,
  5404. min_t(u16, be16_to_cpu(ioasa->auto_sense.auto_sense_len),
  5405. SCSI_SENSE_BUFFERSIZE));
  5406. return 1;
  5407. }
  5408. /**
  5409. * ipr_erp_start - Process an error response for a SCSI op
  5410. * @ioa_cfg: ioa config struct
  5411. * @ipr_cmd: ipr command struct
  5412. *
  5413. * This function determines whether or not to initiate ERP
  5414. * on the affected device.
  5415. *
  5416. * Return value:
  5417. * nothing
  5418. **/
  5419. static void ipr_erp_start(struct ipr_ioa_cfg *ioa_cfg,
  5420. struct ipr_cmnd *ipr_cmd)
  5421. {
  5422. struct scsi_cmnd *scsi_cmd = ipr_cmd->scsi_cmd;
  5423. struct ipr_resource_entry *res = scsi_cmd->device->hostdata;
  5424. u32 ioasc = be32_to_cpu(ipr_cmd->s.ioasa.hdr.ioasc);
  5425. u32 masked_ioasc = ioasc & IPR_IOASC_IOASC_MASK;
  5426. if (!res) {
  5427. ipr_scsi_eh_done(ipr_cmd);
  5428. return;
  5429. }
  5430. if (!ipr_is_gscsi(res) && masked_ioasc != IPR_IOASC_HW_DEV_BUS_STATUS)
  5431. ipr_gen_sense(ipr_cmd);
  5432. ipr_dump_ioasa(ioa_cfg, ipr_cmd, res);
  5433. switch (masked_ioasc) {
  5434. case IPR_IOASC_ABORTED_CMD_TERM_BY_HOST:
  5435. if (ipr_is_naca_model(res))
  5436. scsi_cmd->result |= (DID_ABORT << 16);
  5437. else
  5438. scsi_cmd->result |= (DID_IMM_RETRY << 16);
  5439. break;
  5440. case IPR_IOASC_IR_RESOURCE_HANDLE:
  5441. case IPR_IOASC_IR_NO_CMDS_TO_2ND_IOA:
  5442. scsi_cmd->result |= (DID_NO_CONNECT << 16);
  5443. break;
  5444. case IPR_IOASC_HW_SEL_TIMEOUT:
  5445. scsi_cmd->result |= (DID_NO_CONNECT << 16);
  5446. if (!ipr_is_naca_model(res))
  5447. res->needs_sync_complete = 1;
  5448. break;
  5449. case IPR_IOASC_SYNC_REQUIRED:
  5450. if (!res->in_erp)
  5451. res->needs_sync_complete = 1;
  5452. scsi_cmd->result |= (DID_IMM_RETRY << 16);
  5453. break;
  5454. case IPR_IOASC_MED_DO_NOT_REALLOC: /* prevent retries */
  5455. case IPR_IOASA_IR_DUAL_IOA_DISABLED:
  5456. scsi_cmd->result |= (DID_PASSTHROUGH << 16);
  5457. break;
  5458. case IPR_IOASC_BUS_WAS_RESET:
  5459. case IPR_IOASC_BUS_WAS_RESET_BY_OTHER:
  5460. /*
  5461. * Report the bus reset and ask for a retry. The device
  5462. * will give CC/UA the next command.
  5463. */
  5464. if (!res->resetting_device)
  5465. scsi_report_bus_reset(ioa_cfg->host, scsi_cmd->device->channel);
  5466. scsi_cmd->result |= (DID_ERROR << 16);
  5467. if (!ipr_is_naca_model(res))
  5468. res->needs_sync_complete = 1;
  5469. break;
  5470. case IPR_IOASC_HW_DEV_BUS_STATUS:
  5471. scsi_cmd->result |= IPR_IOASC_SENSE_STATUS(ioasc);
  5472. if (IPR_IOASC_SENSE_STATUS(ioasc) == SAM_STAT_CHECK_CONDITION) {
  5473. if (!ipr_get_autosense(ipr_cmd)) {
  5474. if (!ipr_is_naca_model(res)) {
  5475. ipr_erp_cancel_all(ipr_cmd);
  5476. return;
  5477. }
  5478. }
  5479. }
  5480. if (!ipr_is_naca_model(res))
  5481. res->needs_sync_complete = 1;
  5482. break;
  5483. case IPR_IOASC_NR_INIT_CMD_REQUIRED:
  5484. break;
  5485. case IPR_IOASC_IR_NON_OPTIMIZED:
  5486. if (res->raw_mode) {
  5487. res->raw_mode = 0;
  5488. scsi_cmd->result |= (DID_IMM_RETRY << 16);
  5489. } else
  5490. scsi_cmd->result |= (DID_ERROR << 16);
  5491. break;
  5492. default:
  5493. if (IPR_IOASC_SENSE_KEY(ioasc) > RECOVERED_ERROR)
  5494. scsi_cmd->result |= (DID_ERROR << 16);
  5495. if (!ipr_is_vset_device(res) && !ipr_is_naca_model(res))
  5496. res->needs_sync_complete = 1;
  5497. break;
  5498. }
  5499. scsi_dma_unmap(ipr_cmd->scsi_cmd);
  5500. scsi_cmd->scsi_done(scsi_cmd);
  5501. if (ipr_cmd->eh_comp)
  5502. complete(ipr_cmd->eh_comp);
  5503. list_add_tail(&ipr_cmd->queue, &ipr_cmd->hrrq->hrrq_free_q);
  5504. }
  5505. /**
  5506. * ipr_scsi_done - mid-layer done function
  5507. * @ipr_cmd: ipr command struct
  5508. *
  5509. * This function is invoked by the interrupt handler for
  5510. * ops generated by the SCSI mid-layer
  5511. *
  5512. * Return value:
  5513. * none
  5514. **/
  5515. static void ipr_scsi_done(struct ipr_cmnd *ipr_cmd)
  5516. {
  5517. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  5518. struct scsi_cmnd *scsi_cmd = ipr_cmd->scsi_cmd;
  5519. u32 ioasc = be32_to_cpu(ipr_cmd->s.ioasa.hdr.ioasc);
  5520. unsigned long lock_flags;
  5521. scsi_set_resid(scsi_cmd, be32_to_cpu(ipr_cmd->s.ioasa.hdr.residual_data_len));
  5522. if (likely(IPR_IOASC_SENSE_KEY(ioasc) == 0)) {
  5523. scsi_dma_unmap(scsi_cmd);
  5524. spin_lock_irqsave(ipr_cmd->hrrq->lock, lock_flags);
  5525. scsi_cmd->scsi_done(scsi_cmd);
  5526. if (ipr_cmd->eh_comp)
  5527. complete(ipr_cmd->eh_comp);
  5528. list_add_tail(&ipr_cmd->queue, &ipr_cmd->hrrq->hrrq_free_q);
  5529. spin_unlock_irqrestore(ipr_cmd->hrrq->lock, lock_flags);
  5530. } else {
  5531. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  5532. spin_lock(&ipr_cmd->hrrq->_lock);
  5533. ipr_erp_start(ioa_cfg, ipr_cmd);
  5534. spin_unlock(&ipr_cmd->hrrq->_lock);
  5535. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  5536. }
  5537. }
  5538. /**
  5539. * ipr_queuecommand - Queue a mid-layer request
  5540. * @shost: scsi host struct
  5541. * @scsi_cmd: scsi command struct
  5542. *
  5543. * This function queues a request generated by the mid-layer.
  5544. *
  5545. * Return value:
  5546. * 0 on success
  5547. * SCSI_MLQUEUE_DEVICE_BUSY if device is busy
  5548. * SCSI_MLQUEUE_HOST_BUSY if host is busy
  5549. **/
  5550. static int ipr_queuecommand(struct Scsi_Host *shost,
  5551. struct scsi_cmnd *scsi_cmd)
  5552. {
  5553. struct ipr_ioa_cfg *ioa_cfg;
  5554. struct ipr_resource_entry *res;
  5555. struct ipr_ioarcb *ioarcb;
  5556. struct ipr_cmnd *ipr_cmd;
  5557. unsigned long hrrq_flags, lock_flags;
  5558. int rc;
  5559. struct ipr_hrr_queue *hrrq;
  5560. int hrrq_id;
  5561. ioa_cfg = (struct ipr_ioa_cfg *)shost->hostdata;
  5562. scsi_cmd->result = (DID_OK << 16);
  5563. res = scsi_cmd->device->hostdata;
  5564. if (ipr_is_gata(res) && res->sata_port) {
  5565. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  5566. rc = ata_sas_queuecmd(scsi_cmd, res->sata_port->ap);
  5567. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  5568. return rc;
  5569. }
  5570. hrrq_id = ipr_get_hrrq_index(ioa_cfg);
  5571. hrrq = &ioa_cfg->hrrq[hrrq_id];
  5572. spin_lock_irqsave(hrrq->lock, hrrq_flags);
  5573. /*
  5574. * We are currently blocking all devices due to a host reset
  5575. * We have told the host to stop giving us new requests, but
  5576. * ERP ops don't count. FIXME
  5577. */
  5578. if (unlikely(!hrrq->allow_cmds && !hrrq->ioa_is_dead && !hrrq->removing_ioa)) {
  5579. spin_unlock_irqrestore(hrrq->lock, hrrq_flags);
  5580. return SCSI_MLQUEUE_HOST_BUSY;
  5581. }
  5582. /*
  5583. * FIXME - Create scsi_set_host_offline interface
  5584. * and the ioa_is_dead check can be removed
  5585. */
  5586. if (unlikely(hrrq->ioa_is_dead || hrrq->removing_ioa || !res)) {
  5587. spin_unlock_irqrestore(hrrq->lock, hrrq_flags);
  5588. goto err_nodev;
  5589. }
  5590. ipr_cmd = __ipr_get_free_ipr_cmnd(hrrq);
  5591. if (ipr_cmd == NULL) {
  5592. spin_unlock_irqrestore(hrrq->lock, hrrq_flags);
  5593. return SCSI_MLQUEUE_HOST_BUSY;
  5594. }
  5595. spin_unlock_irqrestore(hrrq->lock, hrrq_flags);
  5596. ipr_init_ipr_cmnd(ipr_cmd, ipr_scsi_done);
  5597. ioarcb = &ipr_cmd->ioarcb;
  5598. memcpy(ioarcb->cmd_pkt.cdb, scsi_cmd->cmnd, scsi_cmd->cmd_len);
  5599. ipr_cmd->scsi_cmd = scsi_cmd;
  5600. ipr_cmd->done = ipr_scsi_eh_done;
  5601. if (ipr_is_gscsi(res)) {
  5602. if (scsi_cmd->underflow == 0)
  5603. ioarcb->cmd_pkt.flags_hi |= IPR_FLAGS_HI_NO_ULEN_CHK;
  5604. if (res->reset_occurred) {
  5605. res->reset_occurred = 0;
  5606. ioarcb->cmd_pkt.flags_lo |= IPR_FLAGS_LO_DELAY_AFTER_RST;
  5607. }
  5608. }
  5609. if (ipr_is_gscsi(res) || ipr_is_vset_device(res)) {
  5610. ioarcb->cmd_pkt.flags_hi |= IPR_FLAGS_HI_NO_LINK_DESC;
  5611. ioarcb->cmd_pkt.flags_lo |= IPR_FLAGS_LO_ALIGNED_BFR;
  5612. if (scsi_cmd->flags & SCMD_TAGGED)
  5613. ioarcb->cmd_pkt.flags_lo |= IPR_FLAGS_LO_SIMPLE_TASK;
  5614. else
  5615. ioarcb->cmd_pkt.flags_lo |= IPR_FLAGS_LO_UNTAGGED_TASK;
  5616. }
  5617. if (scsi_cmd->cmnd[0] >= 0xC0 &&
  5618. (!ipr_is_gscsi(res) || scsi_cmd->cmnd[0] == IPR_QUERY_RSRC_STATE)) {
  5619. ioarcb->cmd_pkt.request_type = IPR_RQTYPE_IOACMD;
  5620. }
  5621. if (res->raw_mode && ipr_is_af_dasd_device(res)) {
  5622. ioarcb->cmd_pkt.request_type = IPR_RQTYPE_PIPE;
  5623. if (scsi_cmd->underflow == 0)
  5624. ioarcb->cmd_pkt.flags_hi |= IPR_FLAGS_HI_NO_ULEN_CHK;
  5625. }
  5626. if (ioa_cfg->sis64)
  5627. rc = ipr_build_ioadl64(ioa_cfg, ipr_cmd);
  5628. else
  5629. rc = ipr_build_ioadl(ioa_cfg, ipr_cmd);
  5630. spin_lock_irqsave(hrrq->lock, hrrq_flags);
  5631. if (unlikely(rc || (!hrrq->allow_cmds && !hrrq->ioa_is_dead))) {
  5632. list_add_tail(&ipr_cmd->queue, &hrrq->hrrq_free_q);
  5633. spin_unlock_irqrestore(hrrq->lock, hrrq_flags);
  5634. if (!rc)
  5635. scsi_dma_unmap(scsi_cmd);
  5636. return SCSI_MLQUEUE_HOST_BUSY;
  5637. }
  5638. if (unlikely(hrrq->ioa_is_dead)) {
  5639. list_add_tail(&ipr_cmd->queue, &hrrq->hrrq_free_q);
  5640. spin_unlock_irqrestore(hrrq->lock, hrrq_flags);
  5641. scsi_dma_unmap(scsi_cmd);
  5642. goto err_nodev;
  5643. }
  5644. ioarcb->res_handle = res->res_handle;
  5645. if (res->needs_sync_complete) {
  5646. ioarcb->cmd_pkt.flags_hi |= IPR_FLAGS_HI_SYNC_COMPLETE;
  5647. res->needs_sync_complete = 0;
  5648. }
  5649. list_add_tail(&ipr_cmd->queue, &hrrq->hrrq_pending_q);
  5650. ipr_trc_hook(ipr_cmd, IPR_TRACE_START, IPR_GET_RES_PHYS_LOC(res));
  5651. ipr_send_command(ipr_cmd);
  5652. spin_unlock_irqrestore(hrrq->lock, hrrq_flags);
  5653. return 0;
  5654. err_nodev:
  5655. spin_lock_irqsave(hrrq->lock, hrrq_flags);
  5656. memset(scsi_cmd->sense_buffer, 0, SCSI_SENSE_BUFFERSIZE);
  5657. scsi_cmd->result = (DID_NO_CONNECT << 16);
  5658. scsi_cmd->scsi_done(scsi_cmd);
  5659. spin_unlock_irqrestore(hrrq->lock, hrrq_flags);
  5660. return 0;
  5661. }
  5662. /**
  5663. * ipr_ioctl - IOCTL handler
  5664. * @sdev: scsi device struct
  5665. * @cmd: IOCTL cmd
  5666. * @arg: IOCTL arg
  5667. *
  5668. * Return value:
  5669. * 0 on success / other on failure
  5670. **/
  5671. static int ipr_ioctl(struct scsi_device *sdev, int cmd, void __user *arg)
  5672. {
  5673. struct ipr_resource_entry *res;
  5674. res = (struct ipr_resource_entry *)sdev->hostdata;
  5675. if (res && ipr_is_gata(res)) {
  5676. if (cmd == HDIO_GET_IDENTITY)
  5677. return -ENOTTY;
  5678. return ata_sas_scsi_ioctl(res->sata_port->ap, sdev, cmd, arg);
  5679. }
  5680. return -EINVAL;
  5681. }
  5682. /**
  5683. * ipr_info - Get information about the card/driver
  5684. * @scsi_host: scsi host struct
  5685. *
  5686. * Return value:
  5687. * pointer to buffer with description string
  5688. **/
  5689. static const char *ipr_ioa_info(struct Scsi_Host *host)
  5690. {
  5691. static char buffer[512];
  5692. struct ipr_ioa_cfg *ioa_cfg;
  5693. unsigned long lock_flags = 0;
  5694. ioa_cfg = (struct ipr_ioa_cfg *) host->hostdata;
  5695. spin_lock_irqsave(host->host_lock, lock_flags);
  5696. sprintf(buffer, "IBM %X Storage Adapter", ioa_cfg->type);
  5697. spin_unlock_irqrestore(host->host_lock, lock_flags);
  5698. return buffer;
  5699. }
  5700. static struct scsi_host_template driver_template = {
  5701. .module = THIS_MODULE,
  5702. .name = "IPR",
  5703. .info = ipr_ioa_info,
  5704. .ioctl = ipr_ioctl,
  5705. .queuecommand = ipr_queuecommand,
  5706. .eh_abort_handler = ipr_eh_abort,
  5707. .eh_device_reset_handler = ipr_eh_dev_reset,
  5708. .eh_host_reset_handler = ipr_eh_host_reset,
  5709. .slave_alloc = ipr_slave_alloc,
  5710. .slave_configure = ipr_slave_configure,
  5711. .slave_destroy = ipr_slave_destroy,
  5712. .scan_finished = ipr_scan_finished,
  5713. .target_alloc = ipr_target_alloc,
  5714. .target_destroy = ipr_target_destroy,
  5715. .change_queue_depth = ipr_change_queue_depth,
  5716. .bios_param = ipr_biosparam,
  5717. .can_queue = IPR_MAX_COMMANDS,
  5718. .this_id = -1,
  5719. .sg_tablesize = IPR_MAX_SGLIST,
  5720. .max_sectors = IPR_IOA_MAX_SECTORS,
  5721. .cmd_per_lun = IPR_MAX_CMD_PER_LUN,
  5722. .use_clustering = ENABLE_CLUSTERING,
  5723. .shost_attrs = ipr_ioa_attrs,
  5724. .sdev_attrs = ipr_dev_attrs,
  5725. .proc_name = IPR_NAME,
  5726. };
  5727. /**
  5728. * ipr_ata_phy_reset - libata phy_reset handler
  5729. * @ap: ata port to reset
  5730. *
  5731. **/
  5732. static void ipr_ata_phy_reset(struct ata_port *ap)
  5733. {
  5734. unsigned long flags;
  5735. struct ipr_sata_port *sata_port = ap->private_data;
  5736. struct ipr_resource_entry *res = sata_port->res;
  5737. struct ipr_ioa_cfg *ioa_cfg = sata_port->ioa_cfg;
  5738. int rc;
  5739. ENTER;
  5740. spin_lock_irqsave(ioa_cfg->host->host_lock, flags);
  5741. while (ioa_cfg->in_reset_reload) {
  5742. spin_unlock_irqrestore(ioa_cfg->host->host_lock, flags);
  5743. wait_event(ioa_cfg->reset_wait_q, !ioa_cfg->in_reset_reload);
  5744. spin_lock_irqsave(ioa_cfg->host->host_lock, flags);
  5745. }
  5746. if (!ioa_cfg->hrrq[IPR_INIT_HRRQ].allow_cmds)
  5747. goto out_unlock;
  5748. rc = ipr_device_reset(ioa_cfg, res);
  5749. if (rc) {
  5750. ap->link.device[0].class = ATA_DEV_NONE;
  5751. goto out_unlock;
  5752. }
  5753. ap->link.device[0].class = res->ata_class;
  5754. if (ap->link.device[0].class == ATA_DEV_UNKNOWN)
  5755. ap->link.device[0].class = ATA_DEV_NONE;
  5756. out_unlock:
  5757. spin_unlock_irqrestore(ioa_cfg->host->host_lock, flags);
  5758. LEAVE;
  5759. }
  5760. /**
  5761. * ipr_ata_post_internal - Cleanup after an internal command
  5762. * @qc: ATA queued command
  5763. *
  5764. * Return value:
  5765. * none
  5766. **/
  5767. static void ipr_ata_post_internal(struct ata_queued_cmd *qc)
  5768. {
  5769. struct ipr_sata_port *sata_port = qc->ap->private_data;
  5770. struct ipr_ioa_cfg *ioa_cfg = sata_port->ioa_cfg;
  5771. struct ipr_cmnd *ipr_cmd;
  5772. struct ipr_hrr_queue *hrrq;
  5773. unsigned long flags;
  5774. spin_lock_irqsave(ioa_cfg->host->host_lock, flags);
  5775. while (ioa_cfg->in_reset_reload) {
  5776. spin_unlock_irqrestore(ioa_cfg->host->host_lock, flags);
  5777. wait_event(ioa_cfg->reset_wait_q, !ioa_cfg->in_reset_reload);
  5778. spin_lock_irqsave(ioa_cfg->host->host_lock, flags);
  5779. }
  5780. for_each_hrrq(hrrq, ioa_cfg) {
  5781. spin_lock(&hrrq->_lock);
  5782. list_for_each_entry(ipr_cmd, &hrrq->hrrq_pending_q, queue) {
  5783. if (ipr_cmd->qc == qc) {
  5784. ipr_device_reset(ioa_cfg, sata_port->res);
  5785. break;
  5786. }
  5787. }
  5788. spin_unlock(&hrrq->_lock);
  5789. }
  5790. spin_unlock_irqrestore(ioa_cfg->host->host_lock, flags);
  5791. }
  5792. /**
  5793. * ipr_copy_sata_tf - Copy a SATA taskfile to an IOA data structure
  5794. * @regs: destination
  5795. * @tf: source ATA taskfile
  5796. *
  5797. * Return value:
  5798. * none
  5799. **/
  5800. static void ipr_copy_sata_tf(struct ipr_ioarcb_ata_regs *regs,
  5801. struct ata_taskfile *tf)
  5802. {
  5803. regs->feature = tf->feature;
  5804. regs->nsect = tf->nsect;
  5805. regs->lbal = tf->lbal;
  5806. regs->lbam = tf->lbam;
  5807. regs->lbah = tf->lbah;
  5808. regs->device = tf->device;
  5809. regs->command = tf->command;
  5810. regs->hob_feature = tf->hob_feature;
  5811. regs->hob_nsect = tf->hob_nsect;
  5812. regs->hob_lbal = tf->hob_lbal;
  5813. regs->hob_lbam = tf->hob_lbam;
  5814. regs->hob_lbah = tf->hob_lbah;
  5815. regs->ctl = tf->ctl;
  5816. }
  5817. /**
  5818. * ipr_sata_done - done function for SATA commands
  5819. * @ipr_cmd: ipr command struct
  5820. *
  5821. * This function is invoked by the interrupt handler for
  5822. * ops generated by the SCSI mid-layer to SATA devices
  5823. *
  5824. * Return value:
  5825. * none
  5826. **/
  5827. static void ipr_sata_done(struct ipr_cmnd *ipr_cmd)
  5828. {
  5829. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  5830. struct ata_queued_cmd *qc = ipr_cmd->qc;
  5831. struct ipr_sata_port *sata_port = qc->ap->private_data;
  5832. struct ipr_resource_entry *res = sata_port->res;
  5833. u32 ioasc = be32_to_cpu(ipr_cmd->s.ioasa.hdr.ioasc);
  5834. spin_lock(&ipr_cmd->hrrq->_lock);
  5835. if (ipr_cmd->ioa_cfg->sis64)
  5836. memcpy(&sata_port->ioasa, &ipr_cmd->s.ioasa64.u.gata,
  5837. sizeof(struct ipr_ioasa_gata));
  5838. else
  5839. memcpy(&sata_port->ioasa, &ipr_cmd->s.ioasa.u.gata,
  5840. sizeof(struct ipr_ioasa_gata));
  5841. ipr_dump_ioasa(ioa_cfg, ipr_cmd, res);
  5842. if (be32_to_cpu(ipr_cmd->s.ioasa.hdr.ioasc_specific) & IPR_ATA_DEVICE_WAS_RESET)
  5843. scsi_report_device_reset(ioa_cfg->host, res->bus, res->target);
  5844. if (IPR_IOASC_SENSE_KEY(ioasc) > RECOVERED_ERROR)
  5845. qc->err_mask |= __ac_err_mask(sata_port->ioasa.status);
  5846. else
  5847. qc->err_mask |= ac_err_mask(sata_port->ioasa.status);
  5848. list_add_tail(&ipr_cmd->queue, &ipr_cmd->hrrq->hrrq_free_q);
  5849. spin_unlock(&ipr_cmd->hrrq->_lock);
  5850. ata_qc_complete(qc);
  5851. }
  5852. /**
  5853. * ipr_build_ata_ioadl64 - Build an ATA scatter/gather list
  5854. * @ipr_cmd: ipr command struct
  5855. * @qc: ATA queued command
  5856. *
  5857. **/
  5858. static void ipr_build_ata_ioadl64(struct ipr_cmnd *ipr_cmd,
  5859. struct ata_queued_cmd *qc)
  5860. {
  5861. u32 ioadl_flags = 0;
  5862. struct ipr_ioarcb *ioarcb = &ipr_cmd->ioarcb;
  5863. struct ipr_ioadl64_desc *ioadl64 = ipr_cmd->i.ata_ioadl.ioadl64;
  5864. struct ipr_ioadl64_desc *last_ioadl64 = NULL;
  5865. int len = qc->nbytes;
  5866. struct scatterlist *sg;
  5867. unsigned int si;
  5868. dma_addr_t dma_addr = ipr_cmd->dma_addr;
  5869. if (len == 0)
  5870. return;
  5871. if (qc->dma_dir == DMA_TO_DEVICE) {
  5872. ioadl_flags = IPR_IOADL_FLAGS_WRITE;
  5873. ioarcb->cmd_pkt.flags_hi |= IPR_FLAGS_HI_WRITE_NOT_READ;
  5874. } else if (qc->dma_dir == DMA_FROM_DEVICE)
  5875. ioadl_flags = IPR_IOADL_FLAGS_READ;
  5876. ioarcb->data_transfer_length = cpu_to_be32(len);
  5877. ioarcb->ioadl_len =
  5878. cpu_to_be32(sizeof(struct ipr_ioadl64_desc) * ipr_cmd->dma_use_sg);
  5879. ioarcb->u.sis64_addr_data.data_ioadl_addr =
  5880. cpu_to_be64(dma_addr + offsetof(struct ipr_cmnd, i.ata_ioadl.ioadl64));
  5881. for_each_sg(qc->sg, sg, qc->n_elem, si) {
  5882. ioadl64->flags = cpu_to_be32(ioadl_flags);
  5883. ioadl64->data_len = cpu_to_be32(sg_dma_len(sg));
  5884. ioadl64->address = cpu_to_be64(sg_dma_address(sg));
  5885. last_ioadl64 = ioadl64;
  5886. ioadl64++;
  5887. }
  5888. if (likely(last_ioadl64))
  5889. last_ioadl64->flags |= cpu_to_be32(IPR_IOADL_FLAGS_LAST);
  5890. }
  5891. /**
  5892. * ipr_build_ata_ioadl - Build an ATA scatter/gather list
  5893. * @ipr_cmd: ipr command struct
  5894. * @qc: ATA queued command
  5895. *
  5896. **/
  5897. static void ipr_build_ata_ioadl(struct ipr_cmnd *ipr_cmd,
  5898. struct ata_queued_cmd *qc)
  5899. {
  5900. u32 ioadl_flags = 0;
  5901. struct ipr_ioarcb *ioarcb = &ipr_cmd->ioarcb;
  5902. struct ipr_ioadl_desc *ioadl = ipr_cmd->i.ioadl;
  5903. struct ipr_ioadl_desc *last_ioadl = NULL;
  5904. int len = qc->nbytes;
  5905. struct scatterlist *sg;
  5906. unsigned int si;
  5907. if (len == 0)
  5908. return;
  5909. if (qc->dma_dir == DMA_TO_DEVICE) {
  5910. ioadl_flags = IPR_IOADL_FLAGS_WRITE;
  5911. ioarcb->cmd_pkt.flags_hi |= IPR_FLAGS_HI_WRITE_NOT_READ;
  5912. ioarcb->data_transfer_length = cpu_to_be32(len);
  5913. ioarcb->ioadl_len =
  5914. cpu_to_be32(sizeof(struct ipr_ioadl_desc) * ipr_cmd->dma_use_sg);
  5915. } else if (qc->dma_dir == DMA_FROM_DEVICE) {
  5916. ioadl_flags = IPR_IOADL_FLAGS_READ;
  5917. ioarcb->read_data_transfer_length = cpu_to_be32(len);
  5918. ioarcb->read_ioadl_len =
  5919. cpu_to_be32(sizeof(struct ipr_ioadl_desc) * ipr_cmd->dma_use_sg);
  5920. }
  5921. for_each_sg(qc->sg, sg, qc->n_elem, si) {
  5922. ioadl->flags_and_data_len = cpu_to_be32(ioadl_flags | sg_dma_len(sg));
  5923. ioadl->address = cpu_to_be32(sg_dma_address(sg));
  5924. last_ioadl = ioadl;
  5925. ioadl++;
  5926. }
  5927. if (likely(last_ioadl))
  5928. last_ioadl->flags_and_data_len |= cpu_to_be32(IPR_IOADL_FLAGS_LAST);
  5929. }
  5930. /**
  5931. * ipr_qc_defer - Get a free ipr_cmd
  5932. * @qc: queued command
  5933. *
  5934. * Return value:
  5935. * 0 if success
  5936. **/
  5937. static int ipr_qc_defer(struct ata_queued_cmd *qc)
  5938. {
  5939. struct ata_port *ap = qc->ap;
  5940. struct ipr_sata_port *sata_port = ap->private_data;
  5941. struct ipr_ioa_cfg *ioa_cfg = sata_port->ioa_cfg;
  5942. struct ipr_cmnd *ipr_cmd;
  5943. struct ipr_hrr_queue *hrrq;
  5944. int hrrq_id;
  5945. hrrq_id = ipr_get_hrrq_index(ioa_cfg);
  5946. hrrq = &ioa_cfg->hrrq[hrrq_id];
  5947. qc->lldd_task = NULL;
  5948. spin_lock(&hrrq->_lock);
  5949. if (unlikely(hrrq->ioa_is_dead)) {
  5950. spin_unlock(&hrrq->_lock);
  5951. return 0;
  5952. }
  5953. if (unlikely(!hrrq->allow_cmds)) {
  5954. spin_unlock(&hrrq->_lock);
  5955. return ATA_DEFER_LINK;
  5956. }
  5957. ipr_cmd = __ipr_get_free_ipr_cmnd(hrrq);
  5958. if (ipr_cmd == NULL) {
  5959. spin_unlock(&hrrq->_lock);
  5960. return ATA_DEFER_LINK;
  5961. }
  5962. qc->lldd_task = ipr_cmd;
  5963. spin_unlock(&hrrq->_lock);
  5964. return 0;
  5965. }
  5966. /**
  5967. * ipr_qc_issue - Issue a SATA qc to a device
  5968. * @qc: queued command
  5969. *
  5970. * Return value:
  5971. * 0 if success
  5972. **/
  5973. static unsigned int ipr_qc_issue(struct ata_queued_cmd *qc)
  5974. {
  5975. struct ata_port *ap = qc->ap;
  5976. struct ipr_sata_port *sata_port = ap->private_data;
  5977. struct ipr_resource_entry *res = sata_port->res;
  5978. struct ipr_ioa_cfg *ioa_cfg = sata_port->ioa_cfg;
  5979. struct ipr_cmnd *ipr_cmd;
  5980. struct ipr_ioarcb *ioarcb;
  5981. struct ipr_ioarcb_ata_regs *regs;
  5982. if (qc->lldd_task == NULL)
  5983. ipr_qc_defer(qc);
  5984. ipr_cmd = qc->lldd_task;
  5985. if (ipr_cmd == NULL)
  5986. return AC_ERR_SYSTEM;
  5987. qc->lldd_task = NULL;
  5988. spin_lock(&ipr_cmd->hrrq->_lock);
  5989. if (unlikely(!ipr_cmd->hrrq->allow_cmds ||
  5990. ipr_cmd->hrrq->ioa_is_dead)) {
  5991. list_add_tail(&ipr_cmd->queue, &ipr_cmd->hrrq->hrrq_free_q);
  5992. spin_unlock(&ipr_cmd->hrrq->_lock);
  5993. return AC_ERR_SYSTEM;
  5994. }
  5995. ipr_init_ipr_cmnd(ipr_cmd, ipr_lock_and_done);
  5996. ioarcb = &ipr_cmd->ioarcb;
  5997. if (ioa_cfg->sis64) {
  5998. regs = &ipr_cmd->i.ata_ioadl.regs;
  5999. ioarcb->add_cmd_parms_offset = cpu_to_be16(sizeof(*ioarcb));
  6000. } else
  6001. regs = &ioarcb->u.add_data.u.regs;
  6002. memset(regs, 0, sizeof(*regs));
  6003. ioarcb->add_cmd_parms_len = cpu_to_be16(sizeof(*regs));
  6004. list_add_tail(&ipr_cmd->queue, &ipr_cmd->hrrq->hrrq_pending_q);
  6005. ipr_cmd->qc = qc;
  6006. ipr_cmd->done = ipr_sata_done;
  6007. ipr_cmd->ioarcb.res_handle = res->res_handle;
  6008. ioarcb->cmd_pkt.request_type = IPR_RQTYPE_ATA_PASSTHRU;
  6009. ioarcb->cmd_pkt.flags_hi |= IPR_FLAGS_HI_NO_LINK_DESC;
  6010. ioarcb->cmd_pkt.flags_hi |= IPR_FLAGS_HI_NO_ULEN_CHK;
  6011. ipr_cmd->dma_use_sg = qc->n_elem;
  6012. if (ioa_cfg->sis64)
  6013. ipr_build_ata_ioadl64(ipr_cmd, qc);
  6014. else
  6015. ipr_build_ata_ioadl(ipr_cmd, qc);
  6016. regs->flags |= IPR_ATA_FLAG_STATUS_ON_GOOD_COMPLETION;
  6017. ipr_copy_sata_tf(regs, &qc->tf);
  6018. memcpy(ioarcb->cmd_pkt.cdb, qc->cdb, IPR_MAX_CDB_LEN);
  6019. ipr_trc_hook(ipr_cmd, IPR_TRACE_START, IPR_GET_RES_PHYS_LOC(res));
  6020. switch (qc->tf.protocol) {
  6021. case ATA_PROT_NODATA:
  6022. case ATA_PROT_PIO:
  6023. break;
  6024. case ATA_PROT_DMA:
  6025. regs->flags |= IPR_ATA_FLAG_XFER_TYPE_DMA;
  6026. break;
  6027. case ATAPI_PROT_PIO:
  6028. case ATAPI_PROT_NODATA:
  6029. regs->flags |= IPR_ATA_FLAG_PACKET_CMD;
  6030. break;
  6031. case ATAPI_PROT_DMA:
  6032. regs->flags |= IPR_ATA_FLAG_PACKET_CMD;
  6033. regs->flags |= IPR_ATA_FLAG_XFER_TYPE_DMA;
  6034. break;
  6035. default:
  6036. WARN_ON(1);
  6037. spin_unlock(&ipr_cmd->hrrq->_lock);
  6038. return AC_ERR_INVALID;
  6039. }
  6040. ipr_send_command(ipr_cmd);
  6041. spin_unlock(&ipr_cmd->hrrq->_lock);
  6042. return 0;
  6043. }
  6044. /**
  6045. * ipr_qc_fill_rtf - Read result TF
  6046. * @qc: ATA queued command
  6047. *
  6048. * Return value:
  6049. * true
  6050. **/
  6051. static bool ipr_qc_fill_rtf(struct ata_queued_cmd *qc)
  6052. {
  6053. struct ipr_sata_port *sata_port = qc->ap->private_data;
  6054. struct ipr_ioasa_gata *g = &sata_port->ioasa;
  6055. struct ata_taskfile *tf = &qc->result_tf;
  6056. tf->feature = g->error;
  6057. tf->nsect = g->nsect;
  6058. tf->lbal = g->lbal;
  6059. tf->lbam = g->lbam;
  6060. tf->lbah = g->lbah;
  6061. tf->device = g->device;
  6062. tf->command = g->status;
  6063. tf->hob_nsect = g->hob_nsect;
  6064. tf->hob_lbal = g->hob_lbal;
  6065. tf->hob_lbam = g->hob_lbam;
  6066. tf->hob_lbah = g->hob_lbah;
  6067. return true;
  6068. }
  6069. static struct ata_port_operations ipr_sata_ops = {
  6070. .phy_reset = ipr_ata_phy_reset,
  6071. .hardreset = ipr_sata_reset,
  6072. .post_internal_cmd = ipr_ata_post_internal,
  6073. .qc_prep = ata_noop_qc_prep,
  6074. .qc_defer = ipr_qc_defer,
  6075. .qc_issue = ipr_qc_issue,
  6076. .qc_fill_rtf = ipr_qc_fill_rtf,
  6077. .port_start = ata_sas_port_start,
  6078. .port_stop = ata_sas_port_stop
  6079. };
  6080. static struct ata_port_info sata_port_info = {
  6081. .flags = ATA_FLAG_SATA | ATA_FLAG_PIO_DMA |
  6082. ATA_FLAG_SAS_HOST,
  6083. .pio_mask = ATA_PIO4_ONLY,
  6084. .mwdma_mask = ATA_MWDMA2,
  6085. .udma_mask = ATA_UDMA6,
  6086. .port_ops = &ipr_sata_ops
  6087. };
  6088. #ifdef CONFIG_PPC_PSERIES
  6089. static const u16 ipr_blocked_processors[] = {
  6090. PVR_NORTHSTAR,
  6091. PVR_PULSAR,
  6092. PVR_POWER4,
  6093. PVR_ICESTAR,
  6094. PVR_SSTAR,
  6095. PVR_POWER4p,
  6096. PVR_630,
  6097. PVR_630p
  6098. };
  6099. /**
  6100. * ipr_invalid_adapter - Determine if this adapter is supported on this hardware
  6101. * @ioa_cfg: ioa cfg struct
  6102. *
  6103. * Adapters that use Gemstone revision < 3.1 do not work reliably on
  6104. * certain pSeries hardware. This function determines if the given
  6105. * adapter is in one of these confgurations or not.
  6106. *
  6107. * Return value:
  6108. * 1 if adapter is not supported / 0 if adapter is supported
  6109. **/
  6110. static int ipr_invalid_adapter(struct ipr_ioa_cfg *ioa_cfg)
  6111. {
  6112. int i;
  6113. if ((ioa_cfg->type == 0x5702) && (ioa_cfg->pdev->revision < 4)) {
  6114. for (i = 0; i < ARRAY_SIZE(ipr_blocked_processors); i++) {
  6115. if (pvr_version_is(ipr_blocked_processors[i]))
  6116. return 1;
  6117. }
  6118. }
  6119. return 0;
  6120. }
  6121. #else
  6122. #define ipr_invalid_adapter(ioa_cfg) 0
  6123. #endif
  6124. /**
  6125. * ipr_ioa_bringdown_done - IOA bring down completion.
  6126. * @ipr_cmd: ipr command struct
  6127. *
  6128. * This function processes the completion of an adapter bring down.
  6129. * It wakes any reset sleepers.
  6130. *
  6131. * Return value:
  6132. * IPR_RC_JOB_RETURN
  6133. **/
  6134. static int ipr_ioa_bringdown_done(struct ipr_cmnd *ipr_cmd)
  6135. {
  6136. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  6137. int i;
  6138. ENTER;
  6139. if (!ioa_cfg->hrrq[IPR_INIT_HRRQ].removing_ioa) {
  6140. ipr_trace;
  6141. spin_unlock_irq(ioa_cfg->host->host_lock);
  6142. scsi_unblock_requests(ioa_cfg->host);
  6143. spin_lock_irq(ioa_cfg->host->host_lock);
  6144. }
  6145. ioa_cfg->in_reset_reload = 0;
  6146. ioa_cfg->reset_retries = 0;
  6147. for (i = 0; i < ioa_cfg->hrrq_num; i++) {
  6148. spin_lock(&ioa_cfg->hrrq[i]._lock);
  6149. ioa_cfg->hrrq[i].ioa_is_dead = 1;
  6150. spin_unlock(&ioa_cfg->hrrq[i]._lock);
  6151. }
  6152. wmb();
  6153. list_add_tail(&ipr_cmd->queue, &ipr_cmd->hrrq->hrrq_free_q);
  6154. wake_up_all(&ioa_cfg->reset_wait_q);
  6155. LEAVE;
  6156. return IPR_RC_JOB_RETURN;
  6157. }
  6158. /**
  6159. * ipr_ioa_reset_done - IOA reset completion.
  6160. * @ipr_cmd: ipr command struct
  6161. *
  6162. * This function processes the completion of an adapter reset.
  6163. * It schedules any necessary mid-layer add/removes and
  6164. * wakes any reset sleepers.
  6165. *
  6166. * Return value:
  6167. * IPR_RC_JOB_RETURN
  6168. **/
  6169. static int ipr_ioa_reset_done(struct ipr_cmnd *ipr_cmd)
  6170. {
  6171. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  6172. struct ipr_resource_entry *res;
  6173. struct ipr_hostrcb *hostrcb, *temp;
  6174. int i = 0, j;
  6175. ENTER;
  6176. ioa_cfg->in_reset_reload = 0;
  6177. for (j = 0; j < ioa_cfg->hrrq_num; j++) {
  6178. spin_lock(&ioa_cfg->hrrq[j]._lock);
  6179. ioa_cfg->hrrq[j].allow_cmds = 1;
  6180. spin_unlock(&ioa_cfg->hrrq[j]._lock);
  6181. }
  6182. wmb();
  6183. ioa_cfg->reset_cmd = NULL;
  6184. ioa_cfg->doorbell |= IPR_RUNTIME_RESET;
  6185. list_for_each_entry(res, &ioa_cfg->used_res_q, queue) {
  6186. if (res->add_to_ml || res->del_from_ml) {
  6187. ipr_trace;
  6188. break;
  6189. }
  6190. }
  6191. schedule_work(&ioa_cfg->work_q);
  6192. list_for_each_entry_safe(hostrcb, temp, &ioa_cfg->hostrcb_free_q, queue) {
  6193. list_del(&hostrcb->queue);
  6194. if (i++ < IPR_NUM_LOG_HCAMS)
  6195. ipr_send_hcam(ioa_cfg, IPR_HCAM_CDB_OP_CODE_LOG_DATA, hostrcb);
  6196. else
  6197. ipr_send_hcam(ioa_cfg, IPR_HCAM_CDB_OP_CODE_CONFIG_CHANGE, hostrcb);
  6198. }
  6199. scsi_report_bus_reset(ioa_cfg->host, IPR_VSET_BUS);
  6200. dev_info(&ioa_cfg->pdev->dev, "IOA initialized.\n");
  6201. ioa_cfg->reset_retries = 0;
  6202. list_add_tail(&ipr_cmd->queue, &ipr_cmd->hrrq->hrrq_free_q);
  6203. wake_up_all(&ioa_cfg->reset_wait_q);
  6204. spin_unlock(ioa_cfg->host->host_lock);
  6205. scsi_unblock_requests(ioa_cfg->host);
  6206. spin_lock(ioa_cfg->host->host_lock);
  6207. if (!ioa_cfg->hrrq[IPR_INIT_HRRQ].allow_cmds)
  6208. scsi_block_requests(ioa_cfg->host);
  6209. schedule_work(&ioa_cfg->work_q);
  6210. LEAVE;
  6211. return IPR_RC_JOB_RETURN;
  6212. }
  6213. /**
  6214. * ipr_set_sup_dev_dflt - Initialize a Set Supported Device buffer
  6215. * @supported_dev: supported device struct
  6216. * @vpids: vendor product id struct
  6217. *
  6218. * Return value:
  6219. * none
  6220. **/
  6221. static void ipr_set_sup_dev_dflt(struct ipr_supported_device *supported_dev,
  6222. struct ipr_std_inq_vpids *vpids)
  6223. {
  6224. memset(supported_dev, 0, sizeof(struct ipr_supported_device));
  6225. memcpy(&supported_dev->vpids, vpids, sizeof(struct ipr_std_inq_vpids));
  6226. supported_dev->num_records = 1;
  6227. supported_dev->data_length =
  6228. cpu_to_be16(sizeof(struct ipr_supported_device));
  6229. supported_dev->reserved = 0;
  6230. }
  6231. /**
  6232. * ipr_set_supported_devs - Send Set Supported Devices for a device
  6233. * @ipr_cmd: ipr command struct
  6234. *
  6235. * This function sends a Set Supported Devices to the adapter
  6236. *
  6237. * Return value:
  6238. * IPR_RC_JOB_CONTINUE / IPR_RC_JOB_RETURN
  6239. **/
  6240. static int ipr_set_supported_devs(struct ipr_cmnd *ipr_cmd)
  6241. {
  6242. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  6243. struct ipr_supported_device *supp_dev = &ioa_cfg->vpd_cbs->supp_dev;
  6244. struct ipr_ioarcb *ioarcb = &ipr_cmd->ioarcb;
  6245. struct ipr_resource_entry *res = ipr_cmd->u.res;
  6246. ipr_cmd->job_step = ipr_ioa_reset_done;
  6247. list_for_each_entry_continue(res, &ioa_cfg->used_res_q, queue) {
  6248. if (!ipr_is_scsi_disk(res))
  6249. continue;
  6250. ipr_cmd->u.res = res;
  6251. ipr_set_sup_dev_dflt(supp_dev, &res->std_inq_data.vpids);
  6252. ioarcb->res_handle = cpu_to_be32(IPR_IOA_RES_HANDLE);
  6253. ioarcb->cmd_pkt.flags_hi |= IPR_FLAGS_HI_WRITE_NOT_READ;
  6254. ioarcb->cmd_pkt.request_type = IPR_RQTYPE_IOACMD;
  6255. ioarcb->cmd_pkt.cdb[0] = IPR_SET_SUPPORTED_DEVICES;
  6256. ioarcb->cmd_pkt.cdb[1] = IPR_SET_ALL_SUPPORTED_DEVICES;
  6257. ioarcb->cmd_pkt.cdb[7] = (sizeof(struct ipr_supported_device) >> 8) & 0xff;
  6258. ioarcb->cmd_pkt.cdb[8] = sizeof(struct ipr_supported_device) & 0xff;
  6259. ipr_init_ioadl(ipr_cmd,
  6260. ioa_cfg->vpd_cbs_dma +
  6261. offsetof(struct ipr_misc_cbs, supp_dev),
  6262. sizeof(struct ipr_supported_device),
  6263. IPR_IOADL_FLAGS_WRITE_LAST);
  6264. ipr_do_req(ipr_cmd, ipr_reset_ioa_job, ipr_timeout,
  6265. IPR_SET_SUP_DEVICE_TIMEOUT);
  6266. if (!ioa_cfg->sis64)
  6267. ipr_cmd->job_step = ipr_set_supported_devs;
  6268. LEAVE;
  6269. return IPR_RC_JOB_RETURN;
  6270. }
  6271. LEAVE;
  6272. return IPR_RC_JOB_CONTINUE;
  6273. }
  6274. /**
  6275. * ipr_get_mode_page - Locate specified mode page
  6276. * @mode_pages: mode page buffer
  6277. * @page_code: page code to find
  6278. * @len: minimum required length for mode page
  6279. *
  6280. * Return value:
  6281. * pointer to mode page / NULL on failure
  6282. **/
  6283. static void *ipr_get_mode_page(struct ipr_mode_pages *mode_pages,
  6284. u32 page_code, u32 len)
  6285. {
  6286. struct ipr_mode_page_hdr *mode_hdr;
  6287. u32 page_length;
  6288. u32 length;
  6289. if (!mode_pages || (mode_pages->hdr.length == 0))
  6290. return NULL;
  6291. length = (mode_pages->hdr.length + 1) - 4 - mode_pages->hdr.block_desc_len;
  6292. mode_hdr = (struct ipr_mode_page_hdr *)
  6293. (mode_pages->data + mode_pages->hdr.block_desc_len);
  6294. while (length) {
  6295. if (IPR_GET_MODE_PAGE_CODE(mode_hdr) == page_code) {
  6296. if (mode_hdr->page_length >= (len - sizeof(struct ipr_mode_page_hdr)))
  6297. return mode_hdr;
  6298. break;
  6299. } else {
  6300. page_length = (sizeof(struct ipr_mode_page_hdr) +
  6301. mode_hdr->page_length);
  6302. length -= page_length;
  6303. mode_hdr = (struct ipr_mode_page_hdr *)
  6304. ((unsigned long)mode_hdr + page_length);
  6305. }
  6306. }
  6307. return NULL;
  6308. }
  6309. /**
  6310. * ipr_check_term_power - Check for term power errors
  6311. * @ioa_cfg: ioa config struct
  6312. * @mode_pages: IOAFP mode pages buffer
  6313. *
  6314. * Check the IOAFP's mode page 28 for term power errors
  6315. *
  6316. * Return value:
  6317. * nothing
  6318. **/
  6319. static void ipr_check_term_power(struct ipr_ioa_cfg *ioa_cfg,
  6320. struct ipr_mode_pages *mode_pages)
  6321. {
  6322. int i;
  6323. int entry_length;
  6324. struct ipr_dev_bus_entry *bus;
  6325. struct ipr_mode_page28 *mode_page;
  6326. mode_page = ipr_get_mode_page(mode_pages, 0x28,
  6327. sizeof(struct ipr_mode_page28));
  6328. entry_length = mode_page->entry_length;
  6329. bus = mode_page->bus;
  6330. for (i = 0; i < mode_page->num_entries; i++) {
  6331. if (bus->flags & IPR_SCSI_ATTR_NO_TERM_PWR) {
  6332. dev_err(&ioa_cfg->pdev->dev,
  6333. "Term power is absent on scsi bus %d\n",
  6334. bus->res_addr.bus);
  6335. }
  6336. bus = (struct ipr_dev_bus_entry *)((char *)bus + entry_length);
  6337. }
  6338. }
  6339. /**
  6340. * ipr_scsi_bus_speed_limit - Limit the SCSI speed based on SES table
  6341. * @ioa_cfg: ioa config struct
  6342. *
  6343. * Looks through the config table checking for SES devices. If
  6344. * the SES device is in the SES table indicating a maximum SCSI
  6345. * bus speed, the speed is limited for the bus.
  6346. *
  6347. * Return value:
  6348. * none
  6349. **/
  6350. static void ipr_scsi_bus_speed_limit(struct ipr_ioa_cfg *ioa_cfg)
  6351. {
  6352. u32 max_xfer_rate;
  6353. int i;
  6354. for (i = 0; i < IPR_MAX_NUM_BUSES; i++) {
  6355. max_xfer_rate = ipr_get_max_scsi_speed(ioa_cfg, i,
  6356. ioa_cfg->bus_attr[i].bus_width);
  6357. if (max_xfer_rate < ioa_cfg->bus_attr[i].max_xfer_rate)
  6358. ioa_cfg->bus_attr[i].max_xfer_rate = max_xfer_rate;
  6359. }
  6360. }
  6361. /**
  6362. * ipr_modify_ioafp_mode_page_28 - Modify IOAFP Mode Page 28
  6363. * @ioa_cfg: ioa config struct
  6364. * @mode_pages: mode page 28 buffer
  6365. *
  6366. * Updates mode page 28 based on driver configuration
  6367. *
  6368. * Return value:
  6369. * none
  6370. **/
  6371. static void ipr_modify_ioafp_mode_page_28(struct ipr_ioa_cfg *ioa_cfg,
  6372. struct ipr_mode_pages *mode_pages)
  6373. {
  6374. int i, entry_length;
  6375. struct ipr_dev_bus_entry *bus;
  6376. struct ipr_bus_attributes *bus_attr;
  6377. struct ipr_mode_page28 *mode_page;
  6378. mode_page = ipr_get_mode_page(mode_pages, 0x28,
  6379. sizeof(struct ipr_mode_page28));
  6380. entry_length = mode_page->entry_length;
  6381. /* Loop for each device bus entry */
  6382. for (i = 0, bus = mode_page->bus;
  6383. i < mode_page->num_entries;
  6384. i++, bus = (struct ipr_dev_bus_entry *)((u8 *)bus + entry_length)) {
  6385. if (bus->res_addr.bus > IPR_MAX_NUM_BUSES) {
  6386. dev_err(&ioa_cfg->pdev->dev,
  6387. "Invalid resource address reported: 0x%08X\n",
  6388. IPR_GET_PHYS_LOC(bus->res_addr));
  6389. continue;
  6390. }
  6391. bus_attr = &ioa_cfg->bus_attr[i];
  6392. bus->extended_reset_delay = IPR_EXTENDED_RESET_DELAY;
  6393. bus->bus_width = bus_attr->bus_width;
  6394. bus->max_xfer_rate = cpu_to_be32(bus_attr->max_xfer_rate);
  6395. bus->flags &= ~IPR_SCSI_ATTR_QAS_MASK;
  6396. if (bus_attr->qas_enabled)
  6397. bus->flags |= IPR_SCSI_ATTR_ENABLE_QAS;
  6398. else
  6399. bus->flags |= IPR_SCSI_ATTR_DISABLE_QAS;
  6400. }
  6401. }
  6402. /**
  6403. * ipr_build_mode_select - Build a mode select command
  6404. * @ipr_cmd: ipr command struct
  6405. * @res_handle: resource handle to send command to
  6406. * @parm: Byte 2 of Mode Sense command
  6407. * @dma_addr: DMA buffer address
  6408. * @xfer_len: data transfer length
  6409. *
  6410. * Return value:
  6411. * none
  6412. **/
  6413. static void ipr_build_mode_select(struct ipr_cmnd *ipr_cmd,
  6414. __be32 res_handle, u8 parm,
  6415. dma_addr_t dma_addr, u8 xfer_len)
  6416. {
  6417. struct ipr_ioarcb *ioarcb = &ipr_cmd->ioarcb;
  6418. ioarcb->res_handle = res_handle;
  6419. ioarcb->cmd_pkt.request_type = IPR_RQTYPE_SCSICDB;
  6420. ioarcb->cmd_pkt.flags_hi |= IPR_FLAGS_HI_WRITE_NOT_READ;
  6421. ioarcb->cmd_pkt.cdb[0] = MODE_SELECT;
  6422. ioarcb->cmd_pkt.cdb[1] = parm;
  6423. ioarcb->cmd_pkt.cdb[4] = xfer_len;
  6424. ipr_init_ioadl(ipr_cmd, dma_addr, xfer_len, IPR_IOADL_FLAGS_WRITE_LAST);
  6425. }
  6426. /**
  6427. * ipr_ioafp_mode_select_page28 - Issue Mode Select Page 28 to IOA
  6428. * @ipr_cmd: ipr command struct
  6429. *
  6430. * This function sets up the SCSI bus attributes and sends
  6431. * a Mode Select for Page 28 to activate them.
  6432. *
  6433. * Return value:
  6434. * IPR_RC_JOB_RETURN
  6435. **/
  6436. static int ipr_ioafp_mode_select_page28(struct ipr_cmnd *ipr_cmd)
  6437. {
  6438. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  6439. struct ipr_mode_pages *mode_pages = &ioa_cfg->vpd_cbs->mode_pages;
  6440. int length;
  6441. ENTER;
  6442. ipr_scsi_bus_speed_limit(ioa_cfg);
  6443. ipr_check_term_power(ioa_cfg, mode_pages);
  6444. ipr_modify_ioafp_mode_page_28(ioa_cfg, mode_pages);
  6445. length = mode_pages->hdr.length + 1;
  6446. mode_pages->hdr.length = 0;
  6447. ipr_build_mode_select(ipr_cmd, cpu_to_be32(IPR_IOA_RES_HANDLE), 0x11,
  6448. ioa_cfg->vpd_cbs_dma + offsetof(struct ipr_misc_cbs, mode_pages),
  6449. length);
  6450. ipr_cmd->job_step = ipr_set_supported_devs;
  6451. ipr_cmd->u.res = list_entry(ioa_cfg->used_res_q.next,
  6452. struct ipr_resource_entry, queue);
  6453. ipr_do_req(ipr_cmd, ipr_reset_ioa_job, ipr_timeout, IPR_INTERNAL_TIMEOUT);
  6454. LEAVE;
  6455. return IPR_RC_JOB_RETURN;
  6456. }
  6457. /**
  6458. * ipr_build_mode_sense - Builds a mode sense command
  6459. * @ipr_cmd: ipr command struct
  6460. * @res: resource entry struct
  6461. * @parm: Byte 2 of mode sense command
  6462. * @dma_addr: DMA address of mode sense buffer
  6463. * @xfer_len: Size of DMA buffer
  6464. *
  6465. * Return value:
  6466. * none
  6467. **/
  6468. static void ipr_build_mode_sense(struct ipr_cmnd *ipr_cmd,
  6469. __be32 res_handle,
  6470. u8 parm, dma_addr_t dma_addr, u8 xfer_len)
  6471. {
  6472. struct ipr_ioarcb *ioarcb = &ipr_cmd->ioarcb;
  6473. ioarcb->res_handle = res_handle;
  6474. ioarcb->cmd_pkt.cdb[0] = MODE_SENSE;
  6475. ioarcb->cmd_pkt.cdb[2] = parm;
  6476. ioarcb->cmd_pkt.cdb[4] = xfer_len;
  6477. ioarcb->cmd_pkt.request_type = IPR_RQTYPE_SCSICDB;
  6478. ipr_init_ioadl(ipr_cmd, dma_addr, xfer_len, IPR_IOADL_FLAGS_READ_LAST);
  6479. }
  6480. /**
  6481. * ipr_reset_cmd_failed - Handle failure of IOA reset command
  6482. * @ipr_cmd: ipr command struct
  6483. *
  6484. * This function handles the failure of an IOA bringup command.
  6485. *
  6486. * Return value:
  6487. * IPR_RC_JOB_RETURN
  6488. **/
  6489. static int ipr_reset_cmd_failed(struct ipr_cmnd *ipr_cmd)
  6490. {
  6491. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  6492. u32 ioasc = be32_to_cpu(ipr_cmd->s.ioasa.hdr.ioasc);
  6493. dev_err(&ioa_cfg->pdev->dev,
  6494. "0x%02X failed with IOASC: 0x%08X\n",
  6495. ipr_cmd->ioarcb.cmd_pkt.cdb[0], ioasc);
  6496. ipr_initiate_ioa_reset(ioa_cfg, IPR_SHUTDOWN_NONE);
  6497. list_add_tail(&ipr_cmd->queue, &ipr_cmd->hrrq->hrrq_free_q);
  6498. return IPR_RC_JOB_RETURN;
  6499. }
  6500. /**
  6501. * ipr_reset_mode_sense_failed - Handle failure of IOAFP mode sense
  6502. * @ipr_cmd: ipr command struct
  6503. *
  6504. * This function handles the failure of a Mode Sense to the IOAFP.
  6505. * Some adapters do not handle all mode pages.
  6506. *
  6507. * Return value:
  6508. * IPR_RC_JOB_CONTINUE / IPR_RC_JOB_RETURN
  6509. **/
  6510. static int ipr_reset_mode_sense_failed(struct ipr_cmnd *ipr_cmd)
  6511. {
  6512. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  6513. u32 ioasc = be32_to_cpu(ipr_cmd->s.ioasa.hdr.ioasc);
  6514. if (ioasc == IPR_IOASC_IR_INVALID_REQ_TYPE_OR_PKT) {
  6515. ipr_cmd->job_step = ipr_set_supported_devs;
  6516. ipr_cmd->u.res = list_entry(ioa_cfg->used_res_q.next,
  6517. struct ipr_resource_entry, queue);
  6518. return IPR_RC_JOB_CONTINUE;
  6519. }
  6520. return ipr_reset_cmd_failed(ipr_cmd);
  6521. }
  6522. /**
  6523. * ipr_ioafp_mode_sense_page28 - Issue Mode Sense Page 28 to IOA
  6524. * @ipr_cmd: ipr command struct
  6525. *
  6526. * This function send a Page 28 mode sense to the IOA to
  6527. * retrieve SCSI bus attributes.
  6528. *
  6529. * Return value:
  6530. * IPR_RC_JOB_RETURN
  6531. **/
  6532. static int ipr_ioafp_mode_sense_page28(struct ipr_cmnd *ipr_cmd)
  6533. {
  6534. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  6535. ENTER;
  6536. ipr_build_mode_sense(ipr_cmd, cpu_to_be32(IPR_IOA_RES_HANDLE),
  6537. 0x28, ioa_cfg->vpd_cbs_dma +
  6538. offsetof(struct ipr_misc_cbs, mode_pages),
  6539. sizeof(struct ipr_mode_pages));
  6540. ipr_cmd->job_step = ipr_ioafp_mode_select_page28;
  6541. ipr_cmd->job_step_failed = ipr_reset_mode_sense_failed;
  6542. ipr_do_req(ipr_cmd, ipr_reset_ioa_job, ipr_timeout, IPR_INTERNAL_TIMEOUT);
  6543. LEAVE;
  6544. return IPR_RC_JOB_RETURN;
  6545. }
  6546. /**
  6547. * ipr_ioafp_mode_select_page24 - Issue Mode Select to IOA
  6548. * @ipr_cmd: ipr command struct
  6549. *
  6550. * This function enables dual IOA RAID support if possible.
  6551. *
  6552. * Return value:
  6553. * IPR_RC_JOB_RETURN
  6554. **/
  6555. static int ipr_ioafp_mode_select_page24(struct ipr_cmnd *ipr_cmd)
  6556. {
  6557. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  6558. struct ipr_mode_pages *mode_pages = &ioa_cfg->vpd_cbs->mode_pages;
  6559. struct ipr_mode_page24 *mode_page;
  6560. int length;
  6561. ENTER;
  6562. mode_page = ipr_get_mode_page(mode_pages, 0x24,
  6563. sizeof(struct ipr_mode_page24));
  6564. if (mode_page)
  6565. mode_page->flags |= IPR_ENABLE_DUAL_IOA_AF;
  6566. length = mode_pages->hdr.length + 1;
  6567. mode_pages->hdr.length = 0;
  6568. ipr_build_mode_select(ipr_cmd, cpu_to_be32(IPR_IOA_RES_HANDLE), 0x11,
  6569. ioa_cfg->vpd_cbs_dma + offsetof(struct ipr_misc_cbs, mode_pages),
  6570. length);
  6571. ipr_cmd->job_step = ipr_ioafp_mode_sense_page28;
  6572. ipr_do_req(ipr_cmd, ipr_reset_ioa_job, ipr_timeout, IPR_INTERNAL_TIMEOUT);
  6573. LEAVE;
  6574. return IPR_RC_JOB_RETURN;
  6575. }
  6576. /**
  6577. * ipr_reset_mode_sense_page24_failed - Handle failure of IOAFP mode sense
  6578. * @ipr_cmd: ipr command struct
  6579. *
  6580. * This function handles the failure of a Mode Sense to the IOAFP.
  6581. * Some adapters do not handle all mode pages.
  6582. *
  6583. * Return value:
  6584. * IPR_RC_JOB_CONTINUE / IPR_RC_JOB_RETURN
  6585. **/
  6586. static int ipr_reset_mode_sense_page24_failed(struct ipr_cmnd *ipr_cmd)
  6587. {
  6588. u32 ioasc = be32_to_cpu(ipr_cmd->s.ioasa.hdr.ioasc);
  6589. if (ioasc == IPR_IOASC_IR_INVALID_REQ_TYPE_OR_PKT) {
  6590. ipr_cmd->job_step = ipr_ioafp_mode_sense_page28;
  6591. return IPR_RC_JOB_CONTINUE;
  6592. }
  6593. return ipr_reset_cmd_failed(ipr_cmd);
  6594. }
  6595. /**
  6596. * ipr_ioafp_mode_sense_page24 - Issue Page 24 Mode Sense to IOA
  6597. * @ipr_cmd: ipr command struct
  6598. *
  6599. * This function send a mode sense to the IOA to retrieve
  6600. * the IOA Advanced Function Control mode page.
  6601. *
  6602. * Return value:
  6603. * IPR_RC_JOB_RETURN
  6604. **/
  6605. static int ipr_ioafp_mode_sense_page24(struct ipr_cmnd *ipr_cmd)
  6606. {
  6607. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  6608. ENTER;
  6609. ipr_build_mode_sense(ipr_cmd, cpu_to_be32(IPR_IOA_RES_HANDLE),
  6610. 0x24, ioa_cfg->vpd_cbs_dma +
  6611. offsetof(struct ipr_misc_cbs, mode_pages),
  6612. sizeof(struct ipr_mode_pages));
  6613. ipr_cmd->job_step = ipr_ioafp_mode_select_page24;
  6614. ipr_cmd->job_step_failed = ipr_reset_mode_sense_page24_failed;
  6615. ipr_do_req(ipr_cmd, ipr_reset_ioa_job, ipr_timeout, IPR_INTERNAL_TIMEOUT);
  6616. LEAVE;
  6617. return IPR_RC_JOB_RETURN;
  6618. }
  6619. /**
  6620. * ipr_init_res_table - Initialize the resource table
  6621. * @ipr_cmd: ipr command struct
  6622. *
  6623. * This function looks through the existing resource table, comparing
  6624. * it with the config table. This function will take care of old/new
  6625. * devices and schedule adding/removing them from the mid-layer
  6626. * as appropriate.
  6627. *
  6628. * Return value:
  6629. * IPR_RC_JOB_CONTINUE
  6630. **/
  6631. static int ipr_init_res_table(struct ipr_cmnd *ipr_cmd)
  6632. {
  6633. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  6634. struct ipr_resource_entry *res, *temp;
  6635. struct ipr_config_table_entry_wrapper cfgtew;
  6636. int entries, found, flag, i;
  6637. LIST_HEAD(old_res);
  6638. ENTER;
  6639. if (ioa_cfg->sis64)
  6640. flag = ioa_cfg->u.cfg_table64->hdr64.flags;
  6641. else
  6642. flag = ioa_cfg->u.cfg_table->hdr.flags;
  6643. if (flag & IPR_UCODE_DOWNLOAD_REQ)
  6644. dev_err(&ioa_cfg->pdev->dev, "Microcode download required\n");
  6645. list_for_each_entry_safe(res, temp, &ioa_cfg->used_res_q, queue)
  6646. list_move_tail(&res->queue, &old_res);
  6647. if (ioa_cfg->sis64)
  6648. entries = be16_to_cpu(ioa_cfg->u.cfg_table64->hdr64.num_entries);
  6649. else
  6650. entries = ioa_cfg->u.cfg_table->hdr.num_entries;
  6651. for (i = 0; i < entries; i++) {
  6652. if (ioa_cfg->sis64)
  6653. cfgtew.u.cfgte64 = &ioa_cfg->u.cfg_table64->dev[i];
  6654. else
  6655. cfgtew.u.cfgte = &ioa_cfg->u.cfg_table->dev[i];
  6656. found = 0;
  6657. list_for_each_entry_safe(res, temp, &old_res, queue) {
  6658. if (ipr_is_same_device(res, &cfgtew)) {
  6659. list_move_tail(&res->queue, &ioa_cfg->used_res_q);
  6660. found = 1;
  6661. break;
  6662. }
  6663. }
  6664. if (!found) {
  6665. if (list_empty(&ioa_cfg->free_res_q)) {
  6666. dev_err(&ioa_cfg->pdev->dev, "Too many devices attached\n");
  6667. break;
  6668. }
  6669. found = 1;
  6670. res = list_entry(ioa_cfg->free_res_q.next,
  6671. struct ipr_resource_entry, queue);
  6672. list_move_tail(&res->queue, &ioa_cfg->used_res_q);
  6673. ipr_init_res_entry(res, &cfgtew);
  6674. res->add_to_ml = 1;
  6675. } else if (res->sdev && (ipr_is_vset_device(res) || ipr_is_scsi_disk(res)))
  6676. res->sdev->allow_restart = 1;
  6677. if (found)
  6678. ipr_update_res_entry(res, &cfgtew);
  6679. }
  6680. list_for_each_entry_safe(res, temp, &old_res, queue) {
  6681. if (res->sdev) {
  6682. res->del_from_ml = 1;
  6683. res->res_handle = IPR_INVALID_RES_HANDLE;
  6684. list_move_tail(&res->queue, &ioa_cfg->used_res_q);
  6685. }
  6686. }
  6687. list_for_each_entry_safe(res, temp, &old_res, queue) {
  6688. ipr_clear_res_target(res);
  6689. list_move_tail(&res->queue, &ioa_cfg->free_res_q);
  6690. }
  6691. if (ioa_cfg->dual_raid && ipr_dual_ioa_raid)
  6692. ipr_cmd->job_step = ipr_ioafp_mode_sense_page24;
  6693. else
  6694. ipr_cmd->job_step = ipr_ioafp_mode_sense_page28;
  6695. LEAVE;
  6696. return IPR_RC_JOB_CONTINUE;
  6697. }
  6698. /**
  6699. * ipr_ioafp_query_ioa_cfg - Send a Query IOA Config to the adapter.
  6700. * @ipr_cmd: ipr command struct
  6701. *
  6702. * This function sends a Query IOA Configuration command
  6703. * to the adapter to retrieve the IOA configuration table.
  6704. *
  6705. * Return value:
  6706. * IPR_RC_JOB_RETURN
  6707. **/
  6708. static int ipr_ioafp_query_ioa_cfg(struct ipr_cmnd *ipr_cmd)
  6709. {
  6710. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  6711. struct ipr_ioarcb *ioarcb = &ipr_cmd->ioarcb;
  6712. struct ipr_inquiry_page3 *ucode_vpd = &ioa_cfg->vpd_cbs->page3_data;
  6713. struct ipr_inquiry_cap *cap = &ioa_cfg->vpd_cbs->cap;
  6714. ENTER;
  6715. if (cap->cap & IPR_CAP_DUAL_IOA_RAID)
  6716. ioa_cfg->dual_raid = 1;
  6717. dev_info(&ioa_cfg->pdev->dev, "Adapter firmware version: %02X%02X%02X%02X\n",
  6718. ucode_vpd->major_release, ucode_vpd->card_type,
  6719. ucode_vpd->minor_release[0], ucode_vpd->minor_release[1]);
  6720. ioarcb->cmd_pkt.request_type = IPR_RQTYPE_IOACMD;
  6721. ioarcb->res_handle = cpu_to_be32(IPR_IOA_RES_HANDLE);
  6722. ioarcb->cmd_pkt.cdb[0] = IPR_QUERY_IOA_CONFIG;
  6723. ioarcb->cmd_pkt.cdb[6] = (ioa_cfg->cfg_table_size >> 16) & 0xff;
  6724. ioarcb->cmd_pkt.cdb[7] = (ioa_cfg->cfg_table_size >> 8) & 0xff;
  6725. ioarcb->cmd_pkt.cdb[8] = ioa_cfg->cfg_table_size & 0xff;
  6726. ipr_init_ioadl(ipr_cmd, ioa_cfg->cfg_table_dma, ioa_cfg->cfg_table_size,
  6727. IPR_IOADL_FLAGS_READ_LAST);
  6728. ipr_cmd->job_step = ipr_init_res_table;
  6729. ipr_do_req(ipr_cmd, ipr_reset_ioa_job, ipr_timeout, IPR_INTERNAL_TIMEOUT);
  6730. LEAVE;
  6731. return IPR_RC_JOB_RETURN;
  6732. }
  6733. static int ipr_ioa_service_action_failed(struct ipr_cmnd *ipr_cmd)
  6734. {
  6735. u32 ioasc = be32_to_cpu(ipr_cmd->s.ioasa.hdr.ioasc);
  6736. if (ioasc == IPR_IOASC_IR_INVALID_REQ_TYPE_OR_PKT)
  6737. return IPR_RC_JOB_CONTINUE;
  6738. return ipr_reset_cmd_failed(ipr_cmd);
  6739. }
  6740. static void ipr_build_ioa_service_action(struct ipr_cmnd *ipr_cmd,
  6741. __be32 res_handle, u8 sa_code)
  6742. {
  6743. struct ipr_ioarcb *ioarcb = &ipr_cmd->ioarcb;
  6744. ioarcb->res_handle = res_handle;
  6745. ioarcb->cmd_pkt.cdb[0] = IPR_IOA_SERVICE_ACTION;
  6746. ioarcb->cmd_pkt.cdb[1] = sa_code;
  6747. ioarcb->cmd_pkt.request_type = IPR_RQTYPE_IOACMD;
  6748. }
  6749. /**
  6750. * ipr_ioafp_set_caching_parameters - Issue Set Cache parameters service
  6751. * action
  6752. *
  6753. * Return value:
  6754. * none
  6755. **/
  6756. static int ipr_ioafp_set_caching_parameters(struct ipr_cmnd *ipr_cmd)
  6757. {
  6758. struct ipr_ioarcb *ioarcb = &ipr_cmd->ioarcb;
  6759. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  6760. struct ipr_inquiry_pageC4 *pageC4 = &ioa_cfg->vpd_cbs->pageC4_data;
  6761. ENTER;
  6762. ipr_cmd->job_step = ipr_ioafp_query_ioa_cfg;
  6763. if (pageC4->cache_cap[0] & IPR_CAP_SYNC_CACHE) {
  6764. ipr_build_ioa_service_action(ipr_cmd,
  6765. cpu_to_be32(IPR_IOA_RES_HANDLE),
  6766. IPR_IOA_SA_CHANGE_CACHE_PARAMS);
  6767. ioarcb->cmd_pkt.cdb[2] = 0x40;
  6768. ipr_cmd->job_step_failed = ipr_ioa_service_action_failed;
  6769. ipr_do_req(ipr_cmd, ipr_reset_ioa_job, ipr_timeout,
  6770. IPR_SET_SUP_DEVICE_TIMEOUT);
  6771. LEAVE;
  6772. return IPR_RC_JOB_RETURN;
  6773. }
  6774. LEAVE;
  6775. return IPR_RC_JOB_CONTINUE;
  6776. }
  6777. /**
  6778. * ipr_ioafp_inquiry - Send an Inquiry to the adapter.
  6779. * @ipr_cmd: ipr command struct
  6780. *
  6781. * This utility function sends an inquiry to the adapter.
  6782. *
  6783. * Return value:
  6784. * none
  6785. **/
  6786. static void ipr_ioafp_inquiry(struct ipr_cmnd *ipr_cmd, u8 flags, u8 page,
  6787. dma_addr_t dma_addr, u8 xfer_len)
  6788. {
  6789. struct ipr_ioarcb *ioarcb = &ipr_cmd->ioarcb;
  6790. ENTER;
  6791. ioarcb->cmd_pkt.request_type = IPR_RQTYPE_SCSICDB;
  6792. ioarcb->res_handle = cpu_to_be32(IPR_IOA_RES_HANDLE);
  6793. ioarcb->cmd_pkt.cdb[0] = INQUIRY;
  6794. ioarcb->cmd_pkt.cdb[1] = flags;
  6795. ioarcb->cmd_pkt.cdb[2] = page;
  6796. ioarcb->cmd_pkt.cdb[4] = xfer_len;
  6797. ipr_init_ioadl(ipr_cmd, dma_addr, xfer_len, IPR_IOADL_FLAGS_READ_LAST);
  6798. ipr_do_req(ipr_cmd, ipr_reset_ioa_job, ipr_timeout, IPR_INTERNAL_TIMEOUT);
  6799. LEAVE;
  6800. }
  6801. /**
  6802. * ipr_inquiry_page_supported - Is the given inquiry page supported
  6803. * @page0: inquiry page 0 buffer
  6804. * @page: page code.
  6805. *
  6806. * This function determines if the specified inquiry page is supported.
  6807. *
  6808. * Return value:
  6809. * 1 if page is supported / 0 if not
  6810. **/
  6811. static int ipr_inquiry_page_supported(struct ipr_inquiry_page0 *page0, u8 page)
  6812. {
  6813. int i;
  6814. for (i = 0; i < min_t(u8, page0->len, IPR_INQUIRY_PAGE0_ENTRIES); i++)
  6815. if (page0->page[i] == page)
  6816. return 1;
  6817. return 0;
  6818. }
  6819. /**
  6820. * ipr_ioafp_pageC4_inquiry - Send a Page 0xC4 Inquiry to the adapter.
  6821. * @ipr_cmd: ipr command struct
  6822. *
  6823. * This function sends a Page 0xC4 inquiry to the adapter
  6824. * to retrieve software VPD information.
  6825. *
  6826. * Return value:
  6827. * IPR_RC_JOB_CONTINUE / IPR_RC_JOB_RETURN
  6828. **/
  6829. static int ipr_ioafp_pageC4_inquiry(struct ipr_cmnd *ipr_cmd)
  6830. {
  6831. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  6832. struct ipr_inquiry_page0 *page0 = &ioa_cfg->vpd_cbs->page0_data;
  6833. struct ipr_inquiry_pageC4 *pageC4 = &ioa_cfg->vpd_cbs->pageC4_data;
  6834. ENTER;
  6835. ipr_cmd->job_step = ipr_ioafp_set_caching_parameters;
  6836. memset(pageC4, 0, sizeof(*pageC4));
  6837. if (ipr_inquiry_page_supported(page0, 0xC4)) {
  6838. ipr_ioafp_inquiry(ipr_cmd, 1, 0xC4,
  6839. (ioa_cfg->vpd_cbs_dma
  6840. + offsetof(struct ipr_misc_cbs,
  6841. pageC4_data)),
  6842. sizeof(struct ipr_inquiry_pageC4));
  6843. return IPR_RC_JOB_RETURN;
  6844. }
  6845. LEAVE;
  6846. return IPR_RC_JOB_CONTINUE;
  6847. }
  6848. /**
  6849. * ipr_ioafp_cap_inquiry - Send a Page 0xD0 Inquiry to the adapter.
  6850. * @ipr_cmd: ipr command struct
  6851. *
  6852. * This function sends a Page 0xD0 inquiry to the adapter
  6853. * to retrieve adapter capabilities.
  6854. *
  6855. * Return value:
  6856. * IPR_RC_JOB_CONTINUE / IPR_RC_JOB_RETURN
  6857. **/
  6858. static int ipr_ioafp_cap_inquiry(struct ipr_cmnd *ipr_cmd)
  6859. {
  6860. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  6861. struct ipr_inquiry_page0 *page0 = &ioa_cfg->vpd_cbs->page0_data;
  6862. struct ipr_inquiry_cap *cap = &ioa_cfg->vpd_cbs->cap;
  6863. ENTER;
  6864. ipr_cmd->job_step = ipr_ioafp_pageC4_inquiry;
  6865. memset(cap, 0, sizeof(*cap));
  6866. if (ipr_inquiry_page_supported(page0, 0xD0)) {
  6867. ipr_ioafp_inquiry(ipr_cmd, 1, 0xD0,
  6868. ioa_cfg->vpd_cbs_dma + offsetof(struct ipr_misc_cbs, cap),
  6869. sizeof(struct ipr_inquiry_cap));
  6870. return IPR_RC_JOB_RETURN;
  6871. }
  6872. LEAVE;
  6873. return IPR_RC_JOB_CONTINUE;
  6874. }
  6875. /**
  6876. * ipr_ioafp_page3_inquiry - Send a Page 3 Inquiry to the adapter.
  6877. * @ipr_cmd: ipr command struct
  6878. *
  6879. * This function sends a Page 3 inquiry to the adapter
  6880. * to retrieve software VPD information.
  6881. *
  6882. * Return value:
  6883. * IPR_RC_JOB_CONTINUE / IPR_RC_JOB_RETURN
  6884. **/
  6885. static int ipr_ioafp_page3_inquiry(struct ipr_cmnd *ipr_cmd)
  6886. {
  6887. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  6888. ENTER;
  6889. ipr_cmd->job_step = ipr_ioafp_cap_inquiry;
  6890. ipr_ioafp_inquiry(ipr_cmd, 1, 3,
  6891. ioa_cfg->vpd_cbs_dma + offsetof(struct ipr_misc_cbs, page3_data),
  6892. sizeof(struct ipr_inquiry_page3));
  6893. LEAVE;
  6894. return IPR_RC_JOB_RETURN;
  6895. }
  6896. /**
  6897. * ipr_ioafp_page0_inquiry - Send a Page 0 Inquiry to the adapter.
  6898. * @ipr_cmd: ipr command struct
  6899. *
  6900. * This function sends a Page 0 inquiry to the adapter
  6901. * to retrieve supported inquiry pages.
  6902. *
  6903. * Return value:
  6904. * IPR_RC_JOB_CONTINUE / IPR_RC_JOB_RETURN
  6905. **/
  6906. static int ipr_ioafp_page0_inquiry(struct ipr_cmnd *ipr_cmd)
  6907. {
  6908. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  6909. char type[5];
  6910. ENTER;
  6911. /* Grab the type out of the VPD and store it away */
  6912. memcpy(type, ioa_cfg->vpd_cbs->ioa_vpd.std_inq_data.vpids.product_id, 4);
  6913. type[4] = '\0';
  6914. ioa_cfg->type = simple_strtoul((char *)type, NULL, 16);
  6915. if (ipr_invalid_adapter(ioa_cfg)) {
  6916. dev_err(&ioa_cfg->pdev->dev,
  6917. "Adapter not supported in this hardware configuration.\n");
  6918. if (!ipr_testmode) {
  6919. ioa_cfg->reset_retries += IPR_NUM_RESET_RELOAD_RETRIES;
  6920. ipr_initiate_ioa_reset(ioa_cfg, IPR_SHUTDOWN_NONE);
  6921. list_add_tail(&ipr_cmd->queue,
  6922. &ioa_cfg->hrrq->hrrq_free_q);
  6923. return IPR_RC_JOB_RETURN;
  6924. }
  6925. }
  6926. ipr_cmd->job_step = ipr_ioafp_page3_inquiry;
  6927. ipr_ioafp_inquiry(ipr_cmd, 1, 0,
  6928. ioa_cfg->vpd_cbs_dma + offsetof(struct ipr_misc_cbs, page0_data),
  6929. sizeof(struct ipr_inquiry_page0));
  6930. LEAVE;
  6931. return IPR_RC_JOB_RETURN;
  6932. }
  6933. /**
  6934. * ipr_ioafp_std_inquiry - Send a Standard Inquiry to the adapter.
  6935. * @ipr_cmd: ipr command struct
  6936. *
  6937. * This function sends a standard inquiry to the adapter.
  6938. *
  6939. * Return value:
  6940. * IPR_RC_JOB_RETURN
  6941. **/
  6942. static int ipr_ioafp_std_inquiry(struct ipr_cmnd *ipr_cmd)
  6943. {
  6944. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  6945. ENTER;
  6946. ipr_cmd->job_step = ipr_ioafp_page0_inquiry;
  6947. ipr_ioafp_inquiry(ipr_cmd, 0, 0,
  6948. ioa_cfg->vpd_cbs_dma + offsetof(struct ipr_misc_cbs, ioa_vpd),
  6949. sizeof(struct ipr_ioa_vpd));
  6950. LEAVE;
  6951. return IPR_RC_JOB_RETURN;
  6952. }
  6953. /**
  6954. * ipr_ioafp_identify_hrrq - Send Identify Host RRQ.
  6955. * @ipr_cmd: ipr command struct
  6956. *
  6957. * This function send an Identify Host Request Response Queue
  6958. * command to establish the HRRQ with the adapter.
  6959. *
  6960. * Return value:
  6961. * IPR_RC_JOB_RETURN
  6962. **/
  6963. static int ipr_ioafp_identify_hrrq(struct ipr_cmnd *ipr_cmd)
  6964. {
  6965. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  6966. struct ipr_ioarcb *ioarcb = &ipr_cmd->ioarcb;
  6967. struct ipr_hrr_queue *hrrq;
  6968. ENTER;
  6969. ipr_cmd->job_step = ipr_ioafp_std_inquiry;
  6970. dev_info(&ioa_cfg->pdev->dev, "Starting IOA initialization sequence.\n");
  6971. if (ioa_cfg->identify_hrrq_index < ioa_cfg->hrrq_num) {
  6972. hrrq = &ioa_cfg->hrrq[ioa_cfg->identify_hrrq_index];
  6973. ioarcb->cmd_pkt.cdb[0] = IPR_ID_HOST_RR_Q;
  6974. ioarcb->res_handle = cpu_to_be32(IPR_IOA_RES_HANDLE);
  6975. ioarcb->cmd_pkt.request_type = IPR_RQTYPE_IOACMD;
  6976. if (ioa_cfg->sis64)
  6977. ioarcb->cmd_pkt.cdb[1] = 0x1;
  6978. if (ioa_cfg->nvectors == 1)
  6979. ioarcb->cmd_pkt.cdb[1] &= ~IPR_ID_HRRQ_SELE_ENABLE;
  6980. else
  6981. ioarcb->cmd_pkt.cdb[1] |= IPR_ID_HRRQ_SELE_ENABLE;
  6982. ioarcb->cmd_pkt.cdb[2] =
  6983. ((u64) hrrq->host_rrq_dma >> 24) & 0xff;
  6984. ioarcb->cmd_pkt.cdb[3] =
  6985. ((u64) hrrq->host_rrq_dma >> 16) & 0xff;
  6986. ioarcb->cmd_pkt.cdb[4] =
  6987. ((u64) hrrq->host_rrq_dma >> 8) & 0xff;
  6988. ioarcb->cmd_pkt.cdb[5] =
  6989. ((u64) hrrq->host_rrq_dma) & 0xff;
  6990. ioarcb->cmd_pkt.cdb[7] =
  6991. ((sizeof(u32) * hrrq->size) >> 8) & 0xff;
  6992. ioarcb->cmd_pkt.cdb[8] =
  6993. (sizeof(u32) * hrrq->size) & 0xff;
  6994. if (ioarcb->cmd_pkt.cdb[1] & IPR_ID_HRRQ_SELE_ENABLE)
  6995. ioarcb->cmd_pkt.cdb[9] =
  6996. ioa_cfg->identify_hrrq_index;
  6997. if (ioa_cfg->sis64) {
  6998. ioarcb->cmd_pkt.cdb[10] =
  6999. ((u64) hrrq->host_rrq_dma >> 56) & 0xff;
  7000. ioarcb->cmd_pkt.cdb[11] =
  7001. ((u64) hrrq->host_rrq_dma >> 48) & 0xff;
  7002. ioarcb->cmd_pkt.cdb[12] =
  7003. ((u64) hrrq->host_rrq_dma >> 40) & 0xff;
  7004. ioarcb->cmd_pkt.cdb[13] =
  7005. ((u64) hrrq->host_rrq_dma >> 32) & 0xff;
  7006. }
  7007. if (ioarcb->cmd_pkt.cdb[1] & IPR_ID_HRRQ_SELE_ENABLE)
  7008. ioarcb->cmd_pkt.cdb[14] =
  7009. ioa_cfg->identify_hrrq_index;
  7010. ipr_do_req(ipr_cmd, ipr_reset_ioa_job, ipr_timeout,
  7011. IPR_INTERNAL_TIMEOUT);
  7012. if (++ioa_cfg->identify_hrrq_index < ioa_cfg->hrrq_num)
  7013. ipr_cmd->job_step = ipr_ioafp_identify_hrrq;
  7014. LEAVE;
  7015. return IPR_RC_JOB_RETURN;
  7016. }
  7017. LEAVE;
  7018. return IPR_RC_JOB_CONTINUE;
  7019. }
  7020. /**
  7021. * ipr_reset_timer_done - Adapter reset timer function
  7022. * @ipr_cmd: ipr command struct
  7023. *
  7024. * Description: This function is used in adapter reset processing
  7025. * for timing events. If the reset_cmd pointer in the IOA
  7026. * config struct is not this adapter's we are doing nested
  7027. * resets and fail_all_ops will take care of freeing the
  7028. * command block.
  7029. *
  7030. * Return value:
  7031. * none
  7032. **/
  7033. static void ipr_reset_timer_done(struct ipr_cmnd *ipr_cmd)
  7034. {
  7035. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  7036. unsigned long lock_flags = 0;
  7037. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  7038. if (ioa_cfg->reset_cmd == ipr_cmd) {
  7039. list_del(&ipr_cmd->queue);
  7040. ipr_cmd->done(ipr_cmd);
  7041. }
  7042. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  7043. }
  7044. /**
  7045. * ipr_reset_start_timer - Start a timer for adapter reset job
  7046. * @ipr_cmd: ipr command struct
  7047. * @timeout: timeout value
  7048. *
  7049. * Description: This function is used in adapter reset processing
  7050. * for timing events. If the reset_cmd pointer in the IOA
  7051. * config struct is not this adapter's we are doing nested
  7052. * resets and fail_all_ops will take care of freeing the
  7053. * command block.
  7054. *
  7055. * Return value:
  7056. * none
  7057. **/
  7058. static void ipr_reset_start_timer(struct ipr_cmnd *ipr_cmd,
  7059. unsigned long timeout)
  7060. {
  7061. ENTER;
  7062. list_add_tail(&ipr_cmd->queue, &ipr_cmd->hrrq->hrrq_pending_q);
  7063. ipr_cmd->done = ipr_reset_ioa_job;
  7064. ipr_cmd->timer.data = (unsigned long) ipr_cmd;
  7065. ipr_cmd->timer.expires = jiffies + timeout;
  7066. ipr_cmd->timer.function = (void (*)(unsigned long))ipr_reset_timer_done;
  7067. add_timer(&ipr_cmd->timer);
  7068. }
  7069. /**
  7070. * ipr_init_ioa_mem - Initialize ioa_cfg control block
  7071. * @ioa_cfg: ioa cfg struct
  7072. *
  7073. * Return value:
  7074. * nothing
  7075. **/
  7076. static void ipr_init_ioa_mem(struct ipr_ioa_cfg *ioa_cfg)
  7077. {
  7078. struct ipr_hrr_queue *hrrq;
  7079. for_each_hrrq(hrrq, ioa_cfg) {
  7080. spin_lock(&hrrq->_lock);
  7081. memset(hrrq->host_rrq, 0, sizeof(u32) * hrrq->size);
  7082. /* Initialize Host RRQ pointers */
  7083. hrrq->hrrq_start = hrrq->host_rrq;
  7084. hrrq->hrrq_end = &hrrq->host_rrq[hrrq->size - 1];
  7085. hrrq->hrrq_curr = hrrq->hrrq_start;
  7086. hrrq->toggle_bit = 1;
  7087. spin_unlock(&hrrq->_lock);
  7088. }
  7089. wmb();
  7090. ioa_cfg->identify_hrrq_index = 0;
  7091. if (ioa_cfg->hrrq_num == 1)
  7092. atomic_set(&ioa_cfg->hrrq_index, 0);
  7093. else
  7094. atomic_set(&ioa_cfg->hrrq_index, 1);
  7095. /* Zero out config table */
  7096. memset(ioa_cfg->u.cfg_table, 0, ioa_cfg->cfg_table_size);
  7097. }
  7098. /**
  7099. * ipr_reset_next_stage - Process IPL stage change based on feedback register.
  7100. * @ipr_cmd: ipr command struct
  7101. *
  7102. * Return value:
  7103. * IPR_RC_JOB_CONTINUE / IPR_RC_JOB_RETURN
  7104. **/
  7105. static int ipr_reset_next_stage(struct ipr_cmnd *ipr_cmd)
  7106. {
  7107. unsigned long stage, stage_time;
  7108. u32 feedback;
  7109. volatile u32 int_reg;
  7110. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  7111. u64 maskval = 0;
  7112. feedback = readl(ioa_cfg->regs.init_feedback_reg);
  7113. stage = feedback & IPR_IPL_INIT_STAGE_MASK;
  7114. stage_time = feedback & IPR_IPL_INIT_STAGE_TIME_MASK;
  7115. ipr_dbg("IPL stage = 0x%lx, IPL stage time = %ld\n", stage, stage_time);
  7116. /* sanity check the stage_time value */
  7117. if (stage_time == 0)
  7118. stage_time = IPR_IPL_INIT_DEFAULT_STAGE_TIME;
  7119. else if (stage_time < IPR_IPL_INIT_MIN_STAGE_TIME)
  7120. stage_time = IPR_IPL_INIT_MIN_STAGE_TIME;
  7121. else if (stage_time > IPR_LONG_OPERATIONAL_TIMEOUT)
  7122. stage_time = IPR_LONG_OPERATIONAL_TIMEOUT;
  7123. if (stage == IPR_IPL_INIT_STAGE_UNKNOWN) {
  7124. writel(IPR_PCII_IPL_STAGE_CHANGE, ioa_cfg->regs.set_interrupt_mask_reg);
  7125. int_reg = readl(ioa_cfg->regs.sense_interrupt_mask_reg);
  7126. stage_time = ioa_cfg->transop_timeout;
  7127. ipr_cmd->job_step = ipr_ioafp_identify_hrrq;
  7128. } else if (stage == IPR_IPL_INIT_STAGE_TRANSOP) {
  7129. int_reg = readl(ioa_cfg->regs.sense_interrupt_reg32);
  7130. if (int_reg & IPR_PCII_IOA_TRANS_TO_OPER) {
  7131. ipr_cmd->job_step = ipr_ioafp_identify_hrrq;
  7132. maskval = IPR_PCII_IPL_STAGE_CHANGE;
  7133. maskval = (maskval << 32) | IPR_PCII_IOA_TRANS_TO_OPER;
  7134. writeq(maskval, ioa_cfg->regs.set_interrupt_mask_reg);
  7135. int_reg = readl(ioa_cfg->regs.sense_interrupt_mask_reg);
  7136. return IPR_RC_JOB_CONTINUE;
  7137. }
  7138. }
  7139. ipr_cmd->timer.data = (unsigned long) ipr_cmd;
  7140. ipr_cmd->timer.expires = jiffies + stage_time * HZ;
  7141. ipr_cmd->timer.function = (void (*)(unsigned long))ipr_oper_timeout;
  7142. ipr_cmd->done = ipr_reset_ioa_job;
  7143. add_timer(&ipr_cmd->timer);
  7144. list_add_tail(&ipr_cmd->queue, &ipr_cmd->hrrq->hrrq_pending_q);
  7145. return IPR_RC_JOB_RETURN;
  7146. }
  7147. /**
  7148. * ipr_reset_enable_ioa - Enable the IOA following a reset.
  7149. * @ipr_cmd: ipr command struct
  7150. *
  7151. * This function reinitializes some control blocks and
  7152. * enables destructive diagnostics on the adapter.
  7153. *
  7154. * Return value:
  7155. * IPR_RC_JOB_RETURN
  7156. **/
  7157. static int ipr_reset_enable_ioa(struct ipr_cmnd *ipr_cmd)
  7158. {
  7159. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  7160. volatile u32 int_reg;
  7161. volatile u64 maskval;
  7162. int i;
  7163. ENTER;
  7164. ipr_cmd->job_step = ipr_ioafp_identify_hrrq;
  7165. ipr_init_ioa_mem(ioa_cfg);
  7166. for (i = 0; i < ioa_cfg->hrrq_num; i++) {
  7167. spin_lock(&ioa_cfg->hrrq[i]._lock);
  7168. ioa_cfg->hrrq[i].allow_interrupts = 1;
  7169. spin_unlock(&ioa_cfg->hrrq[i]._lock);
  7170. }
  7171. wmb();
  7172. if (ioa_cfg->sis64) {
  7173. /* Set the adapter to the correct endian mode. */
  7174. writel(IPR_ENDIAN_SWAP_KEY, ioa_cfg->regs.endian_swap_reg);
  7175. int_reg = readl(ioa_cfg->regs.endian_swap_reg);
  7176. }
  7177. int_reg = readl(ioa_cfg->regs.sense_interrupt_reg32);
  7178. if (int_reg & IPR_PCII_IOA_TRANS_TO_OPER) {
  7179. writel((IPR_PCII_ERROR_INTERRUPTS | IPR_PCII_HRRQ_UPDATED),
  7180. ioa_cfg->regs.clr_interrupt_mask_reg32);
  7181. int_reg = readl(ioa_cfg->regs.sense_interrupt_mask_reg);
  7182. return IPR_RC_JOB_CONTINUE;
  7183. }
  7184. /* Enable destructive diagnostics on IOA */
  7185. writel(ioa_cfg->doorbell, ioa_cfg->regs.set_uproc_interrupt_reg32);
  7186. if (ioa_cfg->sis64) {
  7187. maskval = IPR_PCII_IPL_STAGE_CHANGE;
  7188. maskval = (maskval << 32) | IPR_PCII_OPER_INTERRUPTS;
  7189. writeq(maskval, ioa_cfg->regs.clr_interrupt_mask_reg);
  7190. } else
  7191. writel(IPR_PCII_OPER_INTERRUPTS, ioa_cfg->regs.clr_interrupt_mask_reg32);
  7192. int_reg = readl(ioa_cfg->regs.sense_interrupt_mask_reg);
  7193. dev_info(&ioa_cfg->pdev->dev, "Initializing IOA.\n");
  7194. if (ioa_cfg->sis64) {
  7195. ipr_cmd->job_step = ipr_reset_next_stage;
  7196. return IPR_RC_JOB_CONTINUE;
  7197. }
  7198. ipr_cmd->timer.data = (unsigned long) ipr_cmd;
  7199. ipr_cmd->timer.expires = jiffies + (ioa_cfg->transop_timeout * HZ);
  7200. ipr_cmd->timer.function = (void (*)(unsigned long))ipr_oper_timeout;
  7201. ipr_cmd->done = ipr_reset_ioa_job;
  7202. add_timer(&ipr_cmd->timer);
  7203. list_add_tail(&ipr_cmd->queue, &ipr_cmd->hrrq->hrrq_pending_q);
  7204. LEAVE;
  7205. return IPR_RC_JOB_RETURN;
  7206. }
  7207. /**
  7208. * ipr_reset_wait_for_dump - Wait for a dump to timeout.
  7209. * @ipr_cmd: ipr command struct
  7210. *
  7211. * This function is invoked when an adapter dump has run out
  7212. * of processing time.
  7213. *
  7214. * Return value:
  7215. * IPR_RC_JOB_CONTINUE
  7216. **/
  7217. static int ipr_reset_wait_for_dump(struct ipr_cmnd *ipr_cmd)
  7218. {
  7219. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  7220. if (ioa_cfg->sdt_state == GET_DUMP)
  7221. ioa_cfg->sdt_state = WAIT_FOR_DUMP;
  7222. else if (ioa_cfg->sdt_state == READ_DUMP)
  7223. ioa_cfg->sdt_state = ABORT_DUMP;
  7224. ioa_cfg->dump_timeout = 1;
  7225. ipr_cmd->job_step = ipr_reset_alert;
  7226. return IPR_RC_JOB_CONTINUE;
  7227. }
  7228. /**
  7229. * ipr_unit_check_no_data - Log a unit check/no data error log
  7230. * @ioa_cfg: ioa config struct
  7231. *
  7232. * Logs an error indicating the adapter unit checked, but for some
  7233. * reason, we were unable to fetch the unit check buffer.
  7234. *
  7235. * Return value:
  7236. * nothing
  7237. **/
  7238. static void ipr_unit_check_no_data(struct ipr_ioa_cfg *ioa_cfg)
  7239. {
  7240. ioa_cfg->errors_logged++;
  7241. dev_err(&ioa_cfg->pdev->dev, "IOA unit check with no data\n");
  7242. }
  7243. /**
  7244. * ipr_get_unit_check_buffer - Get the unit check buffer from the IOA
  7245. * @ioa_cfg: ioa config struct
  7246. *
  7247. * Fetches the unit check buffer from the adapter by clocking the data
  7248. * through the mailbox register.
  7249. *
  7250. * Return value:
  7251. * nothing
  7252. **/
  7253. static void ipr_get_unit_check_buffer(struct ipr_ioa_cfg *ioa_cfg)
  7254. {
  7255. unsigned long mailbox;
  7256. struct ipr_hostrcb *hostrcb;
  7257. struct ipr_uc_sdt sdt;
  7258. int rc, length;
  7259. u32 ioasc;
  7260. mailbox = readl(ioa_cfg->ioa_mailbox);
  7261. if (!ioa_cfg->sis64 && !ipr_sdt_is_fmt2(mailbox)) {
  7262. ipr_unit_check_no_data(ioa_cfg);
  7263. return;
  7264. }
  7265. memset(&sdt, 0, sizeof(struct ipr_uc_sdt));
  7266. rc = ipr_get_ldump_data_section(ioa_cfg, mailbox, (__be32 *) &sdt,
  7267. (sizeof(struct ipr_uc_sdt)) / sizeof(__be32));
  7268. if (rc || !(sdt.entry[0].flags & IPR_SDT_VALID_ENTRY) ||
  7269. ((be32_to_cpu(sdt.hdr.state) != IPR_FMT3_SDT_READY_TO_USE) &&
  7270. (be32_to_cpu(sdt.hdr.state) != IPR_FMT2_SDT_READY_TO_USE))) {
  7271. ipr_unit_check_no_data(ioa_cfg);
  7272. return;
  7273. }
  7274. /* Find length of the first sdt entry (UC buffer) */
  7275. if (be32_to_cpu(sdt.hdr.state) == IPR_FMT3_SDT_READY_TO_USE)
  7276. length = be32_to_cpu(sdt.entry[0].end_token);
  7277. else
  7278. length = (be32_to_cpu(sdt.entry[0].end_token) -
  7279. be32_to_cpu(sdt.entry[0].start_token)) &
  7280. IPR_FMT2_MBX_ADDR_MASK;
  7281. hostrcb = list_entry(ioa_cfg->hostrcb_free_q.next,
  7282. struct ipr_hostrcb, queue);
  7283. list_del(&hostrcb->queue);
  7284. memset(&hostrcb->hcam, 0, sizeof(hostrcb->hcam));
  7285. rc = ipr_get_ldump_data_section(ioa_cfg,
  7286. be32_to_cpu(sdt.entry[0].start_token),
  7287. (__be32 *)&hostrcb->hcam,
  7288. min(length, (int)sizeof(hostrcb->hcam)) / sizeof(__be32));
  7289. if (!rc) {
  7290. ipr_handle_log_data(ioa_cfg, hostrcb);
  7291. ioasc = be32_to_cpu(hostrcb->hcam.u.error.fd_ioasc);
  7292. if (ioasc == IPR_IOASC_NR_IOA_RESET_REQUIRED &&
  7293. ioa_cfg->sdt_state == GET_DUMP)
  7294. ioa_cfg->sdt_state = WAIT_FOR_DUMP;
  7295. } else
  7296. ipr_unit_check_no_data(ioa_cfg);
  7297. list_add_tail(&hostrcb->queue, &ioa_cfg->hostrcb_free_q);
  7298. }
  7299. /**
  7300. * ipr_reset_get_unit_check_job - Call to get the unit check buffer.
  7301. * @ipr_cmd: ipr command struct
  7302. *
  7303. * Description: This function will call to get the unit check buffer.
  7304. *
  7305. * Return value:
  7306. * IPR_RC_JOB_RETURN
  7307. **/
  7308. static int ipr_reset_get_unit_check_job(struct ipr_cmnd *ipr_cmd)
  7309. {
  7310. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  7311. ENTER;
  7312. ioa_cfg->ioa_unit_checked = 0;
  7313. ipr_get_unit_check_buffer(ioa_cfg);
  7314. ipr_cmd->job_step = ipr_reset_alert;
  7315. ipr_reset_start_timer(ipr_cmd, 0);
  7316. LEAVE;
  7317. return IPR_RC_JOB_RETURN;
  7318. }
  7319. static int ipr_dump_mailbox_wait(struct ipr_cmnd *ipr_cmd)
  7320. {
  7321. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  7322. ENTER;
  7323. if (ioa_cfg->sdt_state != GET_DUMP)
  7324. return IPR_RC_JOB_RETURN;
  7325. if (!ioa_cfg->sis64 || !ipr_cmd->u.time_left ||
  7326. (readl(ioa_cfg->regs.sense_interrupt_reg) &
  7327. IPR_PCII_MAILBOX_STABLE)) {
  7328. if (!ipr_cmd->u.time_left)
  7329. dev_err(&ioa_cfg->pdev->dev,
  7330. "Timed out waiting for Mailbox register.\n");
  7331. ioa_cfg->sdt_state = READ_DUMP;
  7332. ioa_cfg->dump_timeout = 0;
  7333. if (ioa_cfg->sis64)
  7334. ipr_reset_start_timer(ipr_cmd, IPR_SIS64_DUMP_TIMEOUT);
  7335. else
  7336. ipr_reset_start_timer(ipr_cmd, IPR_SIS32_DUMP_TIMEOUT);
  7337. ipr_cmd->job_step = ipr_reset_wait_for_dump;
  7338. schedule_work(&ioa_cfg->work_q);
  7339. } else {
  7340. ipr_cmd->u.time_left -= IPR_CHECK_FOR_RESET_TIMEOUT;
  7341. ipr_reset_start_timer(ipr_cmd,
  7342. IPR_CHECK_FOR_RESET_TIMEOUT);
  7343. }
  7344. LEAVE;
  7345. return IPR_RC_JOB_RETURN;
  7346. }
  7347. /**
  7348. * ipr_reset_restore_cfg_space - Restore PCI config space.
  7349. * @ipr_cmd: ipr command struct
  7350. *
  7351. * Description: This function restores the saved PCI config space of
  7352. * the adapter, fails all outstanding ops back to the callers, and
  7353. * fetches the dump/unit check if applicable to this reset.
  7354. *
  7355. * Return value:
  7356. * IPR_RC_JOB_CONTINUE / IPR_RC_JOB_RETURN
  7357. **/
  7358. static int ipr_reset_restore_cfg_space(struct ipr_cmnd *ipr_cmd)
  7359. {
  7360. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  7361. u32 int_reg;
  7362. ENTER;
  7363. ioa_cfg->pdev->state_saved = true;
  7364. pci_restore_state(ioa_cfg->pdev);
  7365. if (ipr_set_pcix_cmd_reg(ioa_cfg)) {
  7366. ipr_cmd->s.ioasa.hdr.ioasc = cpu_to_be32(IPR_IOASC_PCI_ACCESS_ERROR);
  7367. return IPR_RC_JOB_CONTINUE;
  7368. }
  7369. ipr_fail_all_ops(ioa_cfg);
  7370. if (ioa_cfg->sis64) {
  7371. /* Set the adapter to the correct endian mode. */
  7372. writel(IPR_ENDIAN_SWAP_KEY, ioa_cfg->regs.endian_swap_reg);
  7373. int_reg = readl(ioa_cfg->regs.endian_swap_reg);
  7374. }
  7375. if (ioa_cfg->ioa_unit_checked) {
  7376. if (ioa_cfg->sis64) {
  7377. ipr_cmd->job_step = ipr_reset_get_unit_check_job;
  7378. ipr_reset_start_timer(ipr_cmd, IPR_DUMP_DELAY_TIMEOUT);
  7379. return IPR_RC_JOB_RETURN;
  7380. } else {
  7381. ioa_cfg->ioa_unit_checked = 0;
  7382. ipr_get_unit_check_buffer(ioa_cfg);
  7383. ipr_cmd->job_step = ipr_reset_alert;
  7384. ipr_reset_start_timer(ipr_cmd, 0);
  7385. return IPR_RC_JOB_RETURN;
  7386. }
  7387. }
  7388. if (ioa_cfg->in_ioa_bringdown) {
  7389. ipr_cmd->job_step = ipr_ioa_bringdown_done;
  7390. } else if (ioa_cfg->sdt_state == GET_DUMP) {
  7391. ipr_cmd->job_step = ipr_dump_mailbox_wait;
  7392. ipr_cmd->u.time_left = IPR_WAIT_FOR_MAILBOX;
  7393. } else {
  7394. ipr_cmd->job_step = ipr_reset_enable_ioa;
  7395. }
  7396. LEAVE;
  7397. return IPR_RC_JOB_CONTINUE;
  7398. }
  7399. /**
  7400. * ipr_reset_bist_done - BIST has completed on the adapter.
  7401. * @ipr_cmd: ipr command struct
  7402. *
  7403. * Description: Unblock config space and resume the reset process.
  7404. *
  7405. * Return value:
  7406. * IPR_RC_JOB_CONTINUE
  7407. **/
  7408. static int ipr_reset_bist_done(struct ipr_cmnd *ipr_cmd)
  7409. {
  7410. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  7411. ENTER;
  7412. if (ioa_cfg->cfg_locked)
  7413. pci_cfg_access_unlock(ioa_cfg->pdev);
  7414. ioa_cfg->cfg_locked = 0;
  7415. ipr_cmd->job_step = ipr_reset_restore_cfg_space;
  7416. LEAVE;
  7417. return IPR_RC_JOB_CONTINUE;
  7418. }
  7419. /**
  7420. * ipr_reset_start_bist - Run BIST on the adapter.
  7421. * @ipr_cmd: ipr command struct
  7422. *
  7423. * Description: This function runs BIST on the adapter, then delays 2 seconds.
  7424. *
  7425. * Return value:
  7426. * IPR_RC_JOB_CONTINUE / IPR_RC_JOB_RETURN
  7427. **/
  7428. static int ipr_reset_start_bist(struct ipr_cmnd *ipr_cmd)
  7429. {
  7430. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  7431. int rc = PCIBIOS_SUCCESSFUL;
  7432. ENTER;
  7433. if (ioa_cfg->ipr_chip->bist_method == IPR_MMIO)
  7434. writel(IPR_UPROCI_SIS64_START_BIST,
  7435. ioa_cfg->regs.set_uproc_interrupt_reg32);
  7436. else
  7437. rc = pci_write_config_byte(ioa_cfg->pdev, PCI_BIST, PCI_BIST_START);
  7438. if (rc == PCIBIOS_SUCCESSFUL) {
  7439. ipr_cmd->job_step = ipr_reset_bist_done;
  7440. ipr_reset_start_timer(ipr_cmd, IPR_WAIT_FOR_BIST_TIMEOUT);
  7441. rc = IPR_RC_JOB_RETURN;
  7442. } else {
  7443. if (ioa_cfg->cfg_locked)
  7444. pci_cfg_access_unlock(ipr_cmd->ioa_cfg->pdev);
  7445. ioa_cfg->cfg_locked = 0;
  7446. ipr_cmd->s.ioasa.hdr.ioasc = cpu_to_be32(IPR_IOASC_PCI_ACCESS_ERROR);
  7447. rc = IPR_RC_JOB_CONTINUE;
  7448. }
  7449. LEAVE;
  7450. return rc;
  7451. }
  7452. /**
  7453. * ipr_reset_slot_reset_done - Clear PCI reset to the adapter
  7454. * @ipr_cmd: ipr command struct
  7455. *
  7456. * Description: This clears PCI reset to the adapter and delays two seconds.
  7457. *
  7458. * Return value:
  7459. * IPR_RC_JOB_RETURN
  7460. **/
  7461. static int ipr_reset_slot_reset_done(struct ipr_cmnd *ipr_cmd)
  7462. {
  7463. ENTER;
  7464. ipr_cmd->job_step = ipr_reset_bist_done;
  7465. ipr_reset_start_timer(ipr_cmd, IPR_WAIT_FOR_BIST_TIMEOUT);
  7466. LEAVE;
  7467. return IPR_RC_JOB_RETURN;
  7468. }
  7469. /**
  7470. * ipr_reset_reset_work - Pulse a PCIe fundamental reset
  7471. * @work: work struct
  7472. *
  7473. * Description: This pulses warm reset to a slot.
  7474. *
  7475. **/
  7476. static void ipr_reset_reset_work(struct work_struct *work)
  7477. {
  7478. struct ipr_cmnd *ipr_cmd = container_of(work, struct ipr_cmnd, work);
  7479. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  7480. struct pci_dev *pdev = ioa_cfg->pdev;
  7481. unsigned long lock_flags = 0;
  7482. ENTER;
  7483. pci_set_pcie_reset_state(pdev, pcie_warm_reset);
  7484. msleep(jiffies_to_msecs(IPR_PCI_RESET_TIMEOUT));
  7485. pci_set_pcie_reset_state(pdev, pcie_deassert_reset);
  7486. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  7487. if (ioa_cfg->reset_cmd == ipr_cmd)
  7488. ipr_reset_ioa_job(ipr_cmd);
  7489. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  7490. LEAVE;
  7491. }
  7492. /**
  7493. * ipr_reset_slot_reset - Reset the PCI slot of the adapter.
  7494. * @ipr_cmd: ipr command struct
  7495. *
  7496. * Description: This asserts PCI reset to the adapter.
  7497. *
  7498. * Return value:
  7499. * IPR_RC_JOB_RETURN
  7500. **/
  7501. static int ipr_reset_slot_reset(struct ipr_cmnd *ipr_cmd)
  7502. {
  7503. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  7504. ENTER;
  7505. INIT_WORK(&ipr_cmd->work, ipr_reset_reset_work);
  7506. queue_work(ioa_cfg->reset_work_q, &ipr_cmd->work);
  7507. ipr_cmd->job_step = ipr_reset_slot_reset_done;
  7508. LEAVE;
  7509. return IPR_RC_JOB_RETURN;
  7510. }
  7511. /**
  7512. * ipr_reset_block_config_access_wait - Wait for permission to block config access
  7513. * @ipr_cmd: ipr command struct
  7514. *
  7515. * Description: This attempts to block config access to the IOA.
  7516. *
  7517. * Return value:
  7518. * IPR_RC_JOB_CONTINUE / IPR_RC_JOB_RETURN
  7519. **/
  7520. static int ipr_reset_block_config_access_wait(struct ipr_cmnd *ipr_cmd)
  7521. {
  7522. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  7523. int rc = IPR_RC_JOB_CONTINUE;
  7524. if (pci_cfg_access_trylock(ioa_cfg->pdev)) {
  7525. ioa_cfg->cfg_locked = 1;
  7526. ipr_cmd->job_step = ioa_cfg->reset;
  7527. } else {
  7528. if (ipr_cmd->u.time_left) {
  7529. rc = IPR_RC_JOB_RETURN;
  7530. ipr_cmd->u.time_left -= IPR_CHECK_FOR_RESET_TIMEOUT;
  7531. ipr_reset_start_timer(ipr_cmd,
  7532. IPR_CHECK_FOR_RESET_TIMEOUT);
  7533. } else {
  7534. ipr_cmd->job_step = ioa_cfg->reset;
  7535. dev_err(&ioa_cfg->pdev->dev,
  7536. "Timed out waiting to lock config access. Resetting anyway.\n");
  7537. }
  7538. }
  7539. return rc;
  7540. }
  7541. /**
  7542. * ipr_reset_block_config_access - Block config access to the IOA
  7543. * @ipr_cmd: ipr command struct
  7544. *
  7545. * Description: This attempts to block config access to the IOA
  7546. *
  7547. * Return value:
  7548. * IPR_RC_JOB_CONTINUE
  7549. **/
  7550. static int ipr_reset_block_config_access(struct ipr_cmnd *ipr_cmd)
  7551. {
  7552. ipr_cmd->ioa_cfg->cfg_locked = 0;
  7553. ipr_cmd->job_step = ipr_reset_block_config_access_wait;
  7554. ipr_cmd->u.time_left = IPR_WAIT_FOR_RESET_TIMEOUT;
  7555. return IPR_RC_JOB_CONTINUE;
  7556. }
  7557. /**
  7558. * ipr_reset_allowed - Query whether or not IOA can be reset
  7559. * @ioa_cfg: ioa config struct
  7560. *
  7561. * Return value:
  7562. * 0 if reset not allowed / non-zero if reset is allowed
  7563. **/
  7564. static int ipr_reset_allowed(struct ipr_ioa_cfg *ioa_cfg)
  7565. {
  7566. volatile u32 temp_reg;
  7567. temp_reg = readl(ioa_cfg->regs.sense_interrupt_reg);
  7568. return ((temp_reg & IPR_PCII_CRITICAL_OPERATION) == 0);
  7569. }
  7570. /**
  7571. * ipr_reset_wait_to_start_bist - Wait for permission to reset IOA.
  7572. * @ipr_cmd: ipr command struct
  7573. *
  7574. * Description: This function waits for adapter permission to run BIST,
  7575. * then runs BIST. If the adapter does not give permission after a
  7576. * reasonable time, we will reset the adapter anyway. The impact of
  7577. * resetting the adapter without warning the adapter is the risk of
  7578. * losing the persistent error log on the adapter. If the adapter is
  7579. * reset while it is writing to the flash on the adapter, the flash
  7580. * segment will have bad ECC and be zeroed.
  7581. *
  7582. * Return value:
  7583. * IPR_RC_JOB_CONTINUE / IPR_RC_JOB_RETURN
  7584. **/
  7585. static int ipr_reset_wait_to_start_bist(struct ipr_cmnd *ipr_cmd)
  7586. {
  7587. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  7588. int rc = IPR_RC_JOB_RETURN;
  7589. if (!ipr_reset_allowed(ioa_cfg) && ipr_cmd->u.time_left) {
  7590. ipr_cmd->u.time_left -= IPR_CHECK_FOR_RESET_TIMEOUT;
  7591. ipr_reset_start_timer(ipr_cmd, IPR_CHECK_FOR_RESET_TIMEOUT);
  7592. } else {
  7593. ipr_cmd->job_step = ipr_reset_block_config_access;
  7594. rc = IPR_RC_JOB_CONTINUE;
  7595. }
  7596. return rc;
  7597. }
  7598. /**
  7599. * ipr_reset_alert - Alert the adapter of a pending reset
  7600. * @ipr_cmd: ipr command struct
  7601. *
  7602. * Description: This function alerts the adapter that it will be reset.
  7603. * If memory space is not currently enabled, proceed directly
  7604. * to running BIST on the adapter. The timer must always be started
  7605. * so we guarantee we do not run BIST from ipr_isr.
  7606. *
  7607. * Return value:
  7608. * IPR_RC_JOB_RETURN
  7609. **/
  7610. static int ipr_reset_alert(struct ipr_cmnd *ipr_cmd)
  7611. {
  7612. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  7613. u16 cmd_reg;
  7614. int rc;
  7615. ENTER;
  7616. rc = pci_read_config_word(ioa_cfg->pdev, PCI_COMMAND, &cmd_reg);
  7617. if ((rc == PCIBIOS_SUCCESSFUL) && (cmd_reg & PCI_COMMAND_MEMORY)) {
  7618. ipr_mask_and_clear_interrupts(ioa_cfg, ~0);
  7619. writel(IPR_UPROCI_RESET_ALERT, ioa_cfg->regs.set_uproc_interrupt_reg32);
  7620. ipr_cmd->job_step = ipr_reset_wait_to_start_bist;
  7621. } else {
  7622. ipr_cmd->job_step = ipr_reset_block_config_access;
  7623. }
  7624. ipr_cmd->u.time_left = IPR_WAIT_FOR_RESET_TIMEOUT;
  7625. ipr_reset_start_timer(ipr_cmd, IPR_CHECK_FOR_RESET_TIMEOUT);
  7626. LEAVE;
  7627. return IPR_RC_JOB_RETURN;
  7628. }
  7629. /**
  7630. * ipr_reset_quiesce_done - Complete IOA disconnect
  7631. * @ipr_cmd: ipr command struct
  7632. *
  7633. * Description: Freeze the adapter to complete quiesce processing
  7634. *
  7635. * Return value:
  7636. * IPR_RC_JOB_CONTINUE
  7637. **/
  7638. static int ipr_reset_quiesce_done(struct ipr_cmnd *ipr_cmd)
  7639. {
  7640. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  7641. ENTER;
  7642. ipr_cmd->job_step = ipr_ioa_bringdown_done;
  7643. ipr_mask_and_clear_interrupts(ioa_cfg, ~IPR_PCII_IOA_TRANS_TO_OPER);
  7644. LEAVE;
  7645. return IPR_RC_JOB_CONTINUE;
  7646. }
  7647. /**
  7648. * ipr_reset_cancel_hcam_done - Check for outstanding commands
  7649. * @ipr_cmd: ipr command struct
  7650. *
  7651. * Description: Ensure nothing is outstanding to the IOA and
  7652. * proceed with IOA disconnect. Otherwise reset the IOA.
  7653. *
  7654. * Return value:
  7655. * IPR_RC_JOB_RETURN / IPR_RC_JOB_CONTINUE
  7656. **/
  7657. static int ipr_reset_cancel_hcam_done(struct ipr_cmnd *ipr_cmd)
  7658. {
  7659. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  7660. struct ipr_cmnd *loop_cmd;
  7661. struct ipr_hrr_queue *hrrq;
  7662. int rc = IPR_RC_JOB_CONTINUE;
  7663. int count = 0;
  7664. ENTER;
  7665. ipr_cmd->job_step = ipr_reset_quiesce_done;
  7666. for_each_hrrq(hrrq, ioa_cfg) {
  7667. spin_lock(&hrrq->_lock);
  7668. list_for_each_entry(loop_cmd, &hrrq->hrrq_pending_q, queue) {
  7669. count++;
  7670. ipr_initiate_ioa_reset(ioa_cfg, IPR_SHUTDOWN_NONE);
  7671. list_add_tail(&ipr_cmd->queue, &ipr_cmd->hrrq->hrrq_free_q);
  7672. rc = IPR_RC_JOB_RETURN;
  7673. break;
  7674. }
  7675. spin_unlock(&hrrq->_lock);
  7676. if (count)
  7677. break;
  7678. }
  7679. LEAVE;
  7680. return rc;
  7681. }
  7682. /**
  7683. * ipr_reset_cancel_hcam - Cancel outstanding HCAMs
  7684. * @ipr_cmd: ipr command struct
  7685. *
  7686. * Description: Cancel any oustanding HCAMs to the IOA.
  7687. *
  7688. * Return value:
  7689. * IPR_RC_JOB_CONTINUE / IPR_RC_JOB_RETURN
  7690. **/
  7691. static int ipr_reset_cancel_hcam(struct ipr_cmnd *ipr_cmd)
  7692. {
  7693. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  7694. int rc = IPR_RC_JOB_CONTINUE;
  7695. struct ipr_cmd_pkt *cmd_pkt;
  7696. struct ipr_cmnd *hcam_cmd;
  7697. struct ipr_hrr_queue *hrrq = &ioa_cfg->hrrq[IPR_INIT_HRRQ];
  7698. ENTER;
  7699. ipr_cmd->job_step = ipr_reset_cancel_hcam_done;
  7700. if (!hrrq->ioa_is_dead) {
  7701. if (!list_empty(&ioa_cfg->hostrcb_pending_q)) {
  7702. list_for_each_entry(hcam_cmd, &hrrq->hrrq_pending_q, queue) {
  7703. if (hcam_cmd->ioarcb.cmd_pkt.cdb[0] != IPR_HOST_CONTROLLED_ASYNC)
  7704. continue;
  7705. ipr_cmd->ioarcb.res_handle = cpu_to_be32(IPR_IOA_RES_HANDLE);
  7706. ipr_cmd->ioarcb.cmd_pkt.request_type = IPR_RQTYPE_IOACMD;
  7707. cmd_pkt = &ipr_cmd->ioarcb.cmd_pkt;
  7708. cmd_pkt->request_type = IPR_RQTYPE_IOACMD;
  7709. cmd_pkt->cdb[0] = IPR_CANCEL_REQUEST;
  7710. cmd_pkt->cdb[1] = IPR_CANCEL_64BIT_IOARCB;
  7711. cmd_pkt->cdb[10] = ((u64) hcam_cmd->dma_addr >> 56) & 0xff;
  7712. cmd_pkt->cdb[11] = ((u64) hcam_cmd->dma_addr >> 48) & 0xff;
  7713. cmd_pkt->cdb[12] = ((u64) hcam_cmd->dma_addr >> 40) & 0xff;
  7714. cmd_pkt->cdb[13] = ((u64) hcam_cmd->dma_addr >> 32) & 0xff;
  7715. cmd_pkt->cdb[2] = ((u64) hcam_cmd->dma_addr >> 24) & 0xff;
  7716. cmd_pkt->cdb[3] = ((u64) hcam_cmd->dma_addr >> 16) & 0xff;
  7717. cmd_pkt->cdb[4] = ((u64) hcam_cmd->dma_addr >> 8) & 0xff;
  7718. cmd_pkt->cdb[5] = ((u64) hcam_cmd->dma_addr) & 0xff;
  7719. ipr_do_req(ipr_cmd, ipr_reset_ioa_job, ipr_timeout,
  7720. IPR_CANCEL_TIMEOUT);
  7721. rc = IPR_RC_JOB_RETURN;
  7722. ipr_cmd->job_step = ipr_reset_cancel_hcam;
  7723. break;
  7724. }
  7725. }
  7726. } else
  7727. ipr_cmd->job_step = ipr_reset_alert;
  7728. LEAVE;
  7729. return rc;
  7730. }
  7731. /**
  7732. * ipr_reset_ucode_download_done - Microcode download completion
  7733. * @ipr_cmd: ipr command struct
  7734. *
  7735. * Description: This function unmaps the microcode download buffer.
  7736. *
  7737. * Return value:
  7738. * IPR_RC_JOB_CONTINUE
  7739. **/
  7740. static int ipr_reset_ucode_download_done(struct ipr_cmnd *ipr_cmd)
  7741. {
  7742. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  7743. struct ipr_sglist *sglist = ioa_cfg->ucode_sglist;
  7744. dma_unmap_sg(&ioa_cfg->pdev->dev, sglist->scatterlist,
  7745. sglist->num_sg, DMA_TO_DEVICE);
  7746. ipr_cmd->job_step = ipr_reset_alert;
  7747. return IPR_RC_JOB_CONTINUE;
  7748. }
  7749. /**
  7750. * ipr_reset_ucode_download - Download microcode to the adapter
  7751. * @ipr_cmd: ipr command struct
  7752. *
  7753. * Description: This function checks to see if it there is microcode
  7754. * to download to the adapter. If there is, a download is performed.
  7755. *
  7756. * Return value:
  7757. * IPR_RC_JOB_CONTINUE / IPR_RC_JOB_RETURN
  7758. **/
  7759. static int ipr_reset_ucode_download(struct ipr_cmnd *ipr_cmd)
  7760. {
  7761. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  7762. struct ipr_sglist *sglist = ioa_cfg->ucode_sglist;
  7763. ENTER;
  7764. ipr_cmd->job_step = ipr_reset_alert;
  7765. if (!sglist)
  7766. return IPR_RC_JOB_CONTINUE;
  7767. ipr_cmd->ioarcb.res_handle = cpu_to_be32(IPR_IOA_RES_HANDLE);
  7768. ipr_cmd->ioarcb.cmd_pkt.request_type = IPR_RQTYPE_SCSICDB;
  7769. ipr_cmd->ioarcb.cmd_pkt.cdb[0] = WRITE_BUFFER;
  7770. ipr_cmd->ioarcb.cmd_pkt.cdb[1] = IPR_WR_BUF_DOWNLOAD_AND_SAVE;
  7771. ipr_cmd->ioarcb.cmd_pkt.cdb[6] = (sglist->buffer_len & 0xff0000) >> 16;
  7772. ipr_cmd->ioarcb.cmd_pkt.cdb[7] = (sglist->buffer_len & 0x00ff00) >> 8;
  7773. ipr_cmd->ioarcb.cmd_pkt.cdb[8] = sglist->buffer_len & 0x0000ff;
  7774. if (ioa_cfg->sis64)
  7775. ipr_build_ucode_ioadl64(ipr_cmd, sglist);
  7776. else
  7777. ipr_build_ucode_ioadl(ipr_cmd, sglist);
  7778. ipr_cmd->job_step = ipr_reset_ucode_download_done;
  7779. ipr_do_req(ipr_cmd, ipr_reset_ioa_job, ipr_timeout,
  7780. IPR_WRITE_BUFFER_TIMEOUT);
  7781. LEAVE;
  7782. return IPR_RC_JOB_RETURN;
  7783. }
  7784. /**
  7785. * ipr_reset_shutdown_ioa - Shutdown the adapter
  7786. * @ipr_cmd: ipr command struct
  7787. *
  7788. * Description: This function issues an adapter shutdown of the
  7789. * specified type to the specified adapter as part of the
  7790. * adapter reset job.
  7791. *
  7792. * Return value:
  7793. * IPR_RC_JOB_CONTINUE / IPR_RC_JOB_RETURN
  7794. **/
  7795. static int ipr_reset_shutdown_ioa(struct ipr_cmnd *ipr_cmd)
  7796. {
  7797. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  7798. enum ipr_shutdown_type shutdown_type = ipr_cmd->u.shutdown_type;
  7799. unsigned long timeout;
  7800. int rc = IPR_RC_JOB_CONTINUE;
  7801. ENTER;
  7802. if (shutdown_type == IPR_SHUTDOWN_QUIESCE)
  7803. ipr_cmd->job_step = ipr_reset_cancel_hcam;
  7804. else if (shutdown_type != IPR_SHUTDOWN_NONE &&
  7805. !ioa_cfg->hrrq[IPR_INIT_HRRQ].ioa_is_dead) {
  7806. ipr_cmd->ioarcb.res_handle = cpu_to_be32(IPR_IOA_RES_HANDLE);
  7807. ipr_cmd->ioarcb.cmd_pkt.request_type = IPR_RQTYPE_IOACMD;
  7808. ipr_cmd->ioarcb.cmd_pkt.cdb[0] = IPR_IOA_SHUTDOWN;
  7809. ipr_cmd->ioarcb.cmd_pkt.cdb[1] = shutdown_type;
  7810. if (shutdown_type == IPR_SHUTDOWN_NORMAL)
  7811. timeout = IPR_SHUTDOWN_TIMEOUT;
  7812. else if (shutdown_type == IPR_SHUTDOWN_PREPARE_FOR_NORMAL)
  7813. timeout = IPR_INTERNAL_TIMEOUT;
  7814. else if (ioa_cfg->dual_raid && ipr_dual_ioa_raid)
  7815. timeout = IPR_DUAL_IOA_ABBR_SHUTDOWN_TO;
  7816. else
  7817. timeout = IPR_ABBREV_SHUTDOWN_TIMEOUT;
  7818. ipr_do_req(ipr_cmd, ipr_reset_ioa_job, ipr_timeout, timeout);
  7819. rc = IPR_RC_JOB_RETURN;
  7820. ipr_cmd->job_step = ipr_reset_ucode_download;
  7821. } else
  7822. ipr_cmd->job_step = ipr_reset_alert;
  7823. LEAVE;
  7824. return rc;
  7825. }
  7826. /**
  7827. * ipr_reset_ioa_job - Adapter reset job
  7828. * @ipr_cmd: ipr command struct
  7829. *
  7830. * Description: This function is the job router for the adapter reset job.
  7831. *
  7832. * Return value:
  7833. * none
  7834. **/
  7835. static void ipr_reset_ioa_job(struct ipr_cmnd *ipr_cmd)
  7836. {
  7837. u32 rc, ioasc;
  7838. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  7839. do {
  7840. ioasc = be32_to_cpu(ipr_cmd->s.ioasa.hdr.ioasc);
  7841. if (ioa_cfg->reset_cmd != ipr_cmd) {
  7842. /*
  7843. * We are doing nested adapter resets and this is
  7844. * not the current reset job.
  7845. */
  7846. list_add_tail(&ipr_cmd->queue,
  7847. &ipr_cmd->hrrq->hrrq_free_q);
  7848. return;
  7849. }
  7850. if (IPR_IOASC_SENSE_KEY(ioasc)) {
  7851. rc = ipr_cmd->job_step_failed(ipr_cmd);
  7852. if (rc == IPR_RC_JOB_RETURN)
  7853. return;
  7854. }
  7855. ipr_reinit_ipr_cmnd(ipr_cmd);
  7856. ipr_cmd->job_step_failed = ipr_reset_cmd_failed;
  7857. rc = ipr_cmd->job_step(ipr_cmd);
  7858. } while (rc == IPR_RC_JOB_CONTINUE);
  7859. }
  7860. /**
  7861. * _ipr_initiate_ioa_reset - Initiate an adapter reset
  7862. * @ioa_cfg: ioa config struct
  7863. * @job_step: first job step of reset job
  7864. * @shutdown_type: shutdown type
  7865. *
  7866. * Description: This function will initiate the reset of the given adapter
  7867. * starting at the selected job step.
  7868. * If the caller needs to wait on the completion of the reset,
  7869. * the caller must sleep on the reset_wait_q.
  7870. *
  7871. * Return value:
  7872. * none
  7873. **/
  7874. static void _ipr_initiate_ioa_reset(struct ipr_ioa_cfg *ioa_cfg,
  7875. int (*job_step) (struct ipr_cmnd *),
  7876. enum ipr_shutdown_type shutdown_type)
  7877. {
  7878. struct ipr_cmnd *ipr_cmd;
  7879. int i;
  7880. ioa_cfg->in_reset_reload = 1;
  7881. for (i = 0; i < ioa_cfg->hrrq_num; i++) {
  7882. spin_lock(&ioa_cfg->hrrq[i]._lock);
  7883. ioa_cfg->hrrq[i].allow_cmds = 0;
  7884. spin_unlock(&ioa_cfg->hrrq[i]._lock);
  7885. }
  7886. wmb();
  7887. if (!ioa_cfg->hrrq[IPR_INIT_HRRQ].removing_ioa)
  7888. scsi_block_requests(ioa_cfg->host);
  7889. ipr_cmd = ipr_get_free_ipr_cmnd(ioa_cfg);
  7890. ioa_cfg->reset_cmd = ipr_cmd;
  7891. ipr_cmd->job_step = job_step;
  7892. ipr_cmd->u.shutdown_type = shutdown_type;
  7893. ipr_reset_ioa_job(ipr_cmd);
  7894. }
  7895. /**
  7896. * ipr_initiate_ioa_reset - Initiate an adapter reset
  7897. * @ioa_cfg: ioa config struct
  7898. * @shutdown_type: shutdown type
  7899. *
  7900. * Description: This function will initiate the reset of the given adapter.
  7901. * If the caller needs to wait on the completion of the reset,
  7902. * the caller must sleep on the reset_wait_q.
  7903. *
  7904. * Return value:
  7905. * none
  7906. **/
  7907. static void ipr_initiate_ioa_reset(struct ipr_ioa_cfg *ioa_cfg,
  7908. enum ipr_shutdown_type shutdown_type)
  7909. {
  7910. int i;
  7911. if (ioa_cfg->hrrq[IPR_INIT_HRRQ].ioa_is_dead)
  7912. return;
  7913. if (ioa_cfg->in_reset_reload) {
  7914. if (ioa_cfg->sdt_state == GET_DUMP)
  7915. ioa_cfg->sdt_state = WAIT_FOR_DUMP;
  7916. else if (ioa_cfg->sdt_state == READ_DUMP)
  7917. ioa_cfg->sdt_state = ABORT_DUMP;
  7918. }
  7919. if (ioa_cfg->reset_retries++ >= IPR_NUM_RESET_RELOAD_RETRIES) {
  7920. dev_err(&ioa_cfg->pdev->dev,
  7921. "IOA taken offline - error recovery failed\n");
  7922. ioa_cfg->reset_retries = 0;
  7923. for (i = 0; i < ioa_cfg->hrrq_num; i++) {
  7924. spin_lock(&ioa_cfg->hrrq[i]._lock);
  7925. ioa_cfg->hrrq[i].ioa_is_dead = 1;
  7926. spin_unlock(&ioa_cfg->hrrq[i]._lock);
  7927. }
  7928. wmb();
  7929. if (ioa_cfg->in_ioa_bringdown) {
  7930. ioa_cfg->reset_cmd = NULL;
  7931. ioa_cfg->in_reset_reload = 0;
  7932. ipr_fail_all_ops(ioa_cfg);
  7933. wake_up_all(&ioa_cfg->reset_wait_q);
  7934. if (!ioa_cfg->hrrq[IPR_INIT_HRRQ].removing_ioa) {
  7935. spin_unlock_irq(ioa_cfg->host->host_lock);
  7936. scsi_unblock_requests(ioa_cfg->host);
  7937. spin_lock_irq(ioa_cfg->host->host_lock);
  7938. }
  7939. return;
  7940. } else {
  7941. ioa_cfg->in_ioa_bringdown = 1;
  7942. shutdown_type = IPR_SHUTDOWN_NONE;
  7943. }
  7944. }
  7945. _ipr_initiate_ioa_reset(ioa_cfg, ipr_reset_shutdown_ioa,
  7946. shutdown_type);
  7947. }
  7948. /**
  7949. * ipr_reset_freeze - Hold off all I/O activity
  7950. * @ipr_cmd: ipr command struct
  7951. *
  7952. * Description: If the PCI slot is frozen, hold off all I/O
  7953. * activity; then, as soon as the slot is available again,
  7954. * initiate an adapter reset.
  7955. */
  7956. static int ipr_reset_freeze(struct ipr_cmnd *ipr_cmd)
  7957. {
  7958. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  7959. int i;
  7960. /* Disallow new interrupts, avoid loop */
  7961. for (i = 0; i < ioa_cfg->hrrq_num; i++) {
  7962. spin_lock(&ioa_cfg->hrrq[i]._lock);
  7963. ioa_cfg->hrrq[i].allow_interrupts = 0;
  7964. spin_unlock(&ioa_cfg->hrrq[i]._lock);
  7965. }
  7966. wmb();
  7967. list_add_tail(&ipr_cmd->queue, &ipr_cmd->hrrq->hrrq_pending_q);
  7968. ipr_cmd->done = ipr_reset_ioa_job;
  7969. return IPR_RC_JOB_RETURN;
  7970. }
  7971. /**
  7972. * ipr_pci_mmio_enabled - Called when MMIO has been re-enabled
  7973. * @pdev: PCI device struct
  7974. *
  7975. * Description: This routine is called to tell us that the MMIO
  7976. * access to the IOA has been restored
  7977. */
  7978. static pci_ers_result_t ipr_pci_mmio_enabled(struct pci_dev *pdev)
  7979. {
  7980. unsigned long flags = 0;
  7981. struct ipr_ioa_cfg *ioa_cfg = pci_get_drvdata(pdev);
  7982. spin_lock_irqsave(ioa_cfg->host->host_lock, flags);
  7983. if (!ioa_cfg->probe_done)
  7984. pci_save_state(pdev);
  7985. spin_unlock_irqrestore(ioa_cfg->host->host_lock, flags);
  7986. return PCI_ERS_RESULT_NEED_RESET;
  7987. }
  7988. /**
  7989. * ipr_pci_frozen - Called when slot has experienced a PCI bus error.
  7990. * @pdev: PCI device struct
  7991. *
  7992. * Description: This routine is called to tell us that the PCI bus
  7993. * is down. Can't do anything here, except put the device driver
  7994. * into a holding pattern, waiting for the PCI bus to come back.
  7995. */
  7996. static void ipr_pci_frozen(struct pci_dev *pdev)
  7997. {
  7998. unsigned long flags = 0;
  7999. struct ipr_ioa_cfg *ioa_cfg = pci_get_drvdata(pdev);
  8000. spin_lock_irqsave(ioa_cfg->host->host_lock, flags);
  8001. if (ioa_cfg->probe_done)
  8002. _ipr_initiate_ioa_reset(ioa_cfg, ipr_reset_freeze, IPR_SHUTDOWN_NONE);
  8003. spin_unlock_irqrestore(ioa_cfg->host->host_lock, flags);
  8004. }
  8005. /**
  8006. * ipr_pci_slot_reset - Called when PCI slot has been reset.
  8007. * @pdev: PCI device struct
  8008. *
  8009. * Description: This routine is called by the pci error recovery
  8010. * code after the PCI slot has been reset, just before we
  8011. * should resume normal operations.
  8012. */
  8013. static pci_ers_result_t ipr_pci_slot_reset(struct pci_dev *pdev)
  8014. {
  8015. unsigned long flags = 0;
  8016. struct ipr_ioa_cfg *ioa_cfg = pci_get_drvdata(pdev);
  8017. spin_lock_irqsave(ioa_cfg->host->host_lock, flags);
  8018. if (ioa_cfg->probe_done) {
  8019. if (ioa_cfg->needs_warm_reset)
  8020. ipr_initiate_ioa_reset(ioa_cfg, IPR_SHUTDOWN_NONE);
  8021. else
  8022. _ipr_initiate_ioa_reset(ioa_cfg, ipr_reset_restore_cfg_space,
  8023. IPR_SHUTDOWN_NONE);
  8024. } else
  8025. wake_up_all(&ioa_cfg->eeh_wait_q);
  8026. spin_unlock_irqrestore(ioa_cfg->host->host_lock, flags);
  8027. return PCI_ERS_RESULT_RECOVERED;
  8028. }
  8029. /**
  8030. * ipr_pci_perm_failure - Called when PCI slot is dead for good.
  8031. * @pdev: PCI device struct
  8032. *
  8033. * Description: This routine is called when the PCI bus has
  8034. * permanently failed.
  8035. */
  8036. static void ipr_pci_perm_failure(struct pci_dev *pdev)
  8037. {
  8038. unsigned long flags = 0;
  8039. struct ipr_ioa_cfg *ioa_cfg = pci_get_drvdata(pdev);
  8040. int i;
  8041. spin_lock_irqsave(ioa_cfg->host->host_lock, flags);
  8042. if (ioa_cfg->probe_done) {
  8043. if (ioa_cfg->sdt_state == WAIT_FOR_DUMP)
  8044. ioa_cfg->sdt_state = ABORT_DUMP;
  8045. ioa_cfg->reset_retries = IPR_NUM_RESET_RELOAD_RETRIES - 1;
  8046. ioa_cfg->in_ioa_bringdown = 1;
  8047. for (i = 0; i < ioa_cfg->hrrq_num; i++) {
  8048. spin_lock(&ioa_cfg->hrrq[i]._lock);
  8049. ioa_cfg->hrrq[i].allow_cmds = 0;
  8050. spin_unlock(&ioa_cfg->hrrq[i]._lock);
  8051. }
  8052. wmb();
  8053. ipr_initiate_ioa_reset(ioa_cfg, IPR_SHUTDOWN_NONE);
  8054. } else
  8055. wake_up_all(&ioa_cfg->eeh_wait_q);
  8056. spin_unlock_irqrestore(ioa_cfg->host->host_lock, flags);
  8057. }
  8058. /**
  8059. * ipr_pci_error_detected - Called when a PCI error is detected.
  8060. * @pdev: PCI device struct
  8061. * @state: PCI channel state
  8062. *
  8063. * Description: Called when a PCI error is detected.
  8064. *
  8065. * Return value:
  8066. * PCI_ERS_RESULT_NEED_RESET or PCI_ERS_RESULT_DISCONNECT
  8067. */
  8068. static pci_ers_result_t ipr_pci_error_detected(struct pci_dev *pdev,
  8069. pci_channel_state_t state)
  8070. {
  8071. switch (state) {
  8072. case pci_channel_io_frozen:
  8073. ipr_pci_frozen(pdev);
  8074. return PCI_ERS_RESULT_CAN_RECOVER;
  8075. case pci_channel_io_perm_failure:
  8076. ipr_pci_perm_failure(pdev);
  8077. return PCI_ERS_RESULT_DISCONNECT;
  8078. break;
  8079. default:
  8080. break;
  8081. }
  8082. return PCI_ERS_RESULT_NEED_RESET;
  8083. }
  8084. /**
  8085. * ipr_probe_ioa_part2 - Initializes IOAs found in ipr_probe_ioa(..)
  8086. * @ioa_cfg: ioa cfg struct
  8087. *
  8088. * Description: This is the second phase of adapter intialization
  8089. * This function takes care of initilizing the adapter to the point
  8090. * where it can accept new commands.
  8091. * Return value:
  8092. * 0 on success / -EIO on failure
  8093. **/
  8094. static int ipr_probe_ioa_part2(struct ipr_ioa_cfg *ioa_cfg)
  8095. {
  8096. int rc = 0;
  8097. unsigned long host_lock_flags = 0;
  8098. ENTER;
  8099. spin_lock_irqsave(ioa_cfg->host->host_lock, host_lock_flags);
  8100. dev_dbg(&ioa_cfg->pdev->dev, "ioa_cfg adx: 0x%p\n", ioa_cfg);
  8101. ioa_cfg->probe_done = 1;
  8102. if (ioa_cfg->needs_hard_reset) {
  8103. ioa_cfg->needs_hard_reset = 0;
  8104. ipr_initiate_ioa_reset(ioa_cfg, IPR_SHUTDOWN_NONE);
  8105. } else
  8106. _ipr_initiate_ioa_reset(ioa_cfg, ipr_reset_enable_ioa,
  8107. IPR_SHUTDOWN_NONE);
  8108. spin_unlock_irqrestore(ioa_cfg->host->host_lock, host_lock_flags);
  8109. LEAVE;
  8110. return rc;
  8111. }
  8112. /**
  8113. * ipr_free_cmd_blks - Frees command blocks allocated for an adapter
  8114. * @ioa_cfg: ioa config struct
  8115. *
  8116. * Return value:
  8117. * none
  8118. **/
  8119. static void ipr_free_cmd_blks(struct ipr_ioa_cfg *ioa_cfg)
  8120. {
  8121. int i;
  8122. if (ioa_cfg->ipr_cmnd_list) {
  8123. for (i = 0; i < IPR_NUM_CMD_BLKS; i++) {
  8124. if (ioa_cfg->ipr_cmnd_list[i])
  8125. dma_pool_free(ioa_cfg->ipr_cmd_pool,
  8126. ioa_cfg->ipr_cmnd_list[i],
  8127. ioa_cfg->ipr_cmnd_list_dma[i]);
  8128. ioa_cfg->ipr_cmnd_list[i] = NULL;
  8129. }
  8130. }
  8131. if (ioa_cfg->ipr_cmd_pool)
  8132. dma_pool_destroy(ioa_cfg->ipr_cmd_pool);
  8133. kfree(ioa_cfg->ipr_cmnd_list);
  8134. kfree(ioa_cfg->ipr_cmnd_list_dma);
  8135. ioa_cfg->ipr_cmnd_list = NULL;
  8136. ioa_cfg->ipr_cmnd_list_dma = NULL;
  8137. ioa_cfg->ipr_cmd_pool = NULL;
  8138. }
  8139. /**
  8140. * ipr_free_mem - Frees memory allocated for an adapter
  8141. * @ioa_cfg: ioa cfg struct
  8142. *
  8143. * Return value:
  8144. * nothing
  8145. **/
  8146. static void ipr_free_mem(struct ipr_ioa_cfg *ioa_cfg)
  8147. {
  8148. int i;
  8149. kfree(ioa_cfg->res_entries);
  8150. dma_free_coherent(&ioa_cfg->pdev->dev, sizeof(struct ipr_misc_cbs),
  8151. ioa_cfg->vpd_cbs, ioa_cfg->vpd_cbs_dma);
  8152. ipr_free_cmd_blks(ioa_cfg);
  8153. for (i = 0; i < ioa_cfg->hrrq_num; i++)
  8154. dma_free_coherent(&ioa_cfg->pdev->dev,
  8155. sizeof(u32) * ioa_cfg->hrrq[i].size,
  8156. ioa_cfg->hrrq[i].host_rrq,
  8157. ioa_cfg->hrrq[i].host_rrq_dma);
  8158. dma_free_coherent(&ioa_cfg->pdev->dev, ioa_cfg->cfg_table_size,
  8159. ioa_cfg->u.cfg_table, ioa_cfg->cfg_table_dma);
  8160. for (i = 0; i < IPR_NUM_HCAMS; i++) {
  8161. dma_free_coherent(&ioa_cfg->pdev->dev,
  8162. sizeof(struct ipr_hostrcb),
  8163. ioa_cfg->hostrcb[i],
  8164. ioa_cfg->hostrcb_dma[i]);
  8165. }
  8166. ipr_free_dump(ioa_cfg);
  8167. kfree(ioa_cfg->trace);
  8168. }
  8169. /**
  8170. * ipr_free_irqs - Free all allocated IRQs for the adapter.
  8171. * @ioa_cfg: ipr cfg struct
  8172. *
  8173. * This function frees all allocated IRQs for the
  8174. * specified adapter.
  8175. *
  8176. * Return value:
  8177. * none
  8178. **/
  8179. static void ipr_free_irqs(struct ipr_ioa_cfg *ioa_cfg)
  8180. {
  8181. struct pci_dev *pdev = ioa_cfg->pdev;
  8182. if (ioa_cfg->intr_flag == IPR_USE_MSI ||
  8183. ioa_cfg->intr_flag == IPR_USE_MSIX) {
  8184. int i;
  8185. for (i = 0; i < ioa_cfg->nvectors; i++)
  8186. free_irq(ioa_cfg->vectors_info[i].vec,
  8187. &ioa_cfg->hrrq[i]);
  8188. } else
  8189. free_irq(pdev->irq, &ioa_cfg->hrrq[0]);
  8190. if (ioa_cfg->intr_flag == IPR_USE_MSI) {
  8191. pci_disable_msi(pdev);
  8192. ioa_cfg->intr_flag &= ~IPR_USE_MSI;
  8193. } else if (ioa_cfg->intr_flag == IPR_USE_MSIX) {
  8194. pci_disable_msix(pdev);
  8195. ioa_cfg->intr_flag &= ~IPR_USE_MSIX;
  8196. }
  8197. }
  8198. /**
  8199. * ipr_free_all_resources - Free all allocated resources for an adapter.
  8200. * @ipr_cmd: ipr command struct
  8201. *
  8202. * This function frees all allocated resources for the
  8203. * specified adapter.
  8204. *
  8205. * Return value:
  8206. * none
  8207. **/
  8208. static void ipr_free_all_resources(struct ipr_ioa_cfg *ioa_cfg)
  8209. {
  8210. struct pci_dev *pdev = ioa_cfg->pdev;
  8211. ENTER;
  8212. ipr_free_irqs(ioa_cfg);
  8213. if (ioa_cfg->reset_work_q)
  8214. destroy_workqueue(ioa_cfg->reset_work_q);
  8215. iounmap(ioa_cfg->hdw_dma_regs);
  8216. pci_release_regions(pdev);
  8217. ipr_free_mem(ioa_cfg);
  8218. scsi_host_put(ioa_cfg->host);
  8219. pci_disable_device(pdev);
  8220. LEAVE;
  8221. }
  8222. /**
  8223. * ipr_alloc_cmd_blks - Allocate command blocks for an adapter
  8224. * @ioa_cfg: ioa config struct
  8225. *
  8226. * Return value:
  8227. * 0 on success / -ENOMEM on allocation failure
  8228. **/
  8229. static int ipr_alloc_cmd_blks(struct ipr_ioa_cfg *ioa_cfg)
  8230. {
  8231. struct ipr_cmnd *ipr_cmd;
  8232. struct ipr_ioarcb *ioarcb;
  8233. dma_addr_t dma_addr;
  8234. int i, entries_each_hrrq, hrrq_id = 0;
  8235. ioa_cfg->ipr_cmd_pool = dma_pool_create(IPR_NAME, &ioa_cfg->pdev->dev,
  8236. sizeof(struct ipr_cmnd), 512, 0);
  8237. if (!ioa_cfg->ipr_cmd_pool)
  8238. return -ENOMEM;
  8239. ioa_cfg->ipr_cmnd_list = kcalloc(IPR_NUM_CMD_BLKS, sizeof(struct ipr_cmnd *), GFP_KERNEL);
  8240. ioa_cfg->ipr_cmnd_list_dma = kcalloc(IPR_NUM_CMD_BLKS, sizeof(dma_addr_t), GFP_KERNEL);
  8241. if (!ioa_cfg->ipr_cmnd_list || !ioa_cfg->ipr_cmnd_list_dma) {
  8242. ipr_free_cmd_blks(ioa_cfg);
  8243. return -ENOMEM;
  8244. }
  8245. for (i = 0; i < ioa_cfg->hrrq_num; i++) {
  8246. if (ioa_cfg->hrrq_num > 1) {
  8247. if (i == 0) {
  8248. entries_each_hrrq = IPR_NUM_INTERNAL_CMD_BLKS;
  8249. ioa_cfg->hrrq[i].min_cmd_id = 0;
  8250. ioa_cfg->hrrq[i].max_cmd_id =
  8251. (entries_each_hrrq - 1);
  8252. } else {
  8253. entries_each_hrrq =
  8254. IPR_NUM_BASE_CMD_BLKS/
  8255. (ioa_cfg->hrrq_num - 1);
  8256. ioa_cfg->hrrq[i].min_cmd_id =
  8257. IPR_NUM_INTERNAL_CMD_BLKS +
  8258. (i - 1) * entries_each_hrrq;
  8259. ioa_cfg->hrrq[i].max_cmd_id =
  8260. (IPR_NUM_INTERNAL_CMD_BLKS +
  8261. i * entries_each_hrrq - 1);
  8262. }
  8263. } else {
  8264. entries_each_hrrq = IPR_NUM_CMD_BLKS;
  8265. ioa_cfg->hrrq[i].min_cmd_id = 0;
  8266. ioa_cfg->hrrq[i].max_cmd_id = (entries_each_hrrq - 1);
  8267. }
  8268. ioa_cfg->hrrq[i].size = entries_each_hrrq;
  8269. }
  8270. BUG_ON(ioa_cfg->hrrq_num == 0);
  8271. i = IPR_NUM_CMD_BLKS -
  8272. ioa_cfg->hrrq[ioa_cfg->hrrq_num - 1].max_cmd_id - 1;
  8273. if (i > 0) {
  8274. ioa_cfg->hrrq[ioa_cfg->hrrq_num - 1].size += i;
  8275. ioa_cfg->hrrq[ioa_cfg->hrrq_num - 1].max_cmd_id += i;
  8276. }
  8277. for (i = 0; i < IPR_NUM_CMD_BLKS; i++) {
  8278. ipr_cmd = dma_pool_alloc(ioa_cfg->ipr_cmd_pool, GFP_KERNEL, &dma_addr);
  8279. if (!ipr_cmd) {
  8280. ipr_free_cmd_blks(ioa_cfg);
  8281. return -ENOMEM;
  8282. }
  8283. memset(ipr_cmd, 0, sizeof(*ipr_cmd));
  8284. ioa_cfg->ipr_cmnd_list[i] = ipr_cmd;
  8285. ioa_cfg->ipr_cmnd_list_dma[i] = dma_addr;
  8286. ioarcb = &ipr_cmd->ioarcb;
  8287. ipr_cmd->dma_addr = dma_addr;
  8288. if (ioa_cfg->sis64)
  8289. ioarcb->a.ioarcb_host_pci_addr64 = cpu_to_be64(dma_addr);
  8290. else
  8291. ioarcb->a.ioarcb_host_pci_addr = cpu_to_be32(dma_addr);
  8292. ioarcb->host_response_handle = cpu_to_be32(i << 2);
  8293. if (ioa_cfg->sis64) {
  8294. ioarcb->u.sis64_addr_data.data_ioadl_addr =
  8295. cpu_to_be64(dma_addr + offsetof(struct ipr_cmnd, i.ioadl64));
  8296. ioarcb->u.sis64_addr_data.ioasa_host_pci_addr =
  8297. cpu_to_be64(dma_addr + offsetof(struct ipr_cmnd, s.ioasa64));
  8298. } else {
  8299. ioarcb->write_ioadl_addr =
  8300. cpu_to_be32(dma_addr + offsetof(struct ipr_cmnd, i.ioadl));
  8301. ioarcb->read_ioadl_addr = ioarcb->write_ioadl_addr;
  8302. ioarcb->ioasa_host_pci_addr =
  8303. cpu_to_be32(dma_addr + offsetof(struct ipr_cmnd, s.ioasa));
  8304. }
  8305. ioarcb->ioasa_len = cpu_to_be16(sizeof(struct ipr_ioasa));
  8306. ipr_cmd->cmd_index = i;
  8307. ipr_cmd->ioa_cfg = ioa_cfg;
  8308. ipr_cmd->sense_buffer_dma = dma_addr +
  8309. offsetof(struct ipr_cmnd, sense_buffer);
  8310. ipr_cmd->ioarcb.cmd_pkt.hrrq_id = hrrq_id;
  8311. ipr_cmd->hrrq = &ioa_cfg->hrrq[hrrq_id];
  8312. list_add_tail(&ipr_cmd->queue, &ipr_cmd->hrrq->hrrq_free_q);
  8313. if (i >= ioa_cfg->hrrq[hrrq_id].max_cmd_id)
  8314. hrrq_id++;
  8315. }
  8316. return 0;
  8317. }
  8318. /**
  8319. * ipr_alloc_mem - Allocate memory for an adapter
  8320. * @ioa_cfg: ioa config struct
  8321. *
  8322. * Return value:
  8323. * 0 on success / non-zero for error
  8324. **/
  8325. static int ipr_alloc_mem(struct ipr_ioa_cfg *ioa_cfg)
  8326. {
  8327. struct pci_dev *pdev = ioa_cfg->pdev;
  8328. int i, rc = -ENOMEM;
  8329. ENTER;
  8330. ioa_cfg->res_entries = kzalloc(sizeof(struct ipr_resource_entry) *
  8331. ioa_cfg->max_devs_supported, GFP_KERNEL);
  8332. if (!ioa_cfg->res_entries)
  8333. goto out;
  8334. for (i = 0; i < ioa_cfg->max_devs_supported; i++) {
  8335. list_add_tail(&ioa_cfg->res_entries[i].queue, &ioa_cfg->free_res_q);
  8336. ioa_cfg->res_entries[i].ioa_cfg = ioa_cfg;
  8337. }
  8338. ioa_cfg->vpd_cbs = dma_alloc_coherent(&pdev->dev,
  8339. sizeof(struct ipr_misc_cbs),
  8340. &ioa_cfg->vpd_cbs_dma,
  8341. GFP_KERNEL);
  8342. if (!ioa_cfg->vpd_cbs)
  8343. goto out_free_res_entries;
  8344. if (ipr_alloc_cmd_blks(ioa_cfg))
  8345. goto out_free_vpd_cbs;
  8346. for (i = 0; i < ioa_cfg->hrrq_num; i++) {
  8347. ioa_cfg->hrrq[i].host_rrq = dma_alloc_coherent(&pdev->dev,
  8348. sizeof(u32) * ioa_cfg->hrrq[i].size,
  8349. &ioa_cfg->hrrq[i].host_rrq_dma,
  8350. GFP_KERNEL);
  8351. if (!ioa_cfg->hrrq[i].host_rrq) {
  8352. while (--i > 0)
  8353. dma_free_coherent(&pdev->dev,
  8354. sizeof(u32) * ioa_cfg->hrrq[i].size,
  8355. ioa_cfg->hrrq[i].host_rrq,
  8356. ioa_cfg->hrrq[i].host_rrq_dma);
  8357. goto out_ipr_free_cmd_blocks;
  8358. }
  8359. ioa_cfg->hrrq[i].ioa_cfg = ioa_cfg;
  8360. }
  8361. ioa_cfg->u.cfg_table = dma_alloc_coherent(&pdev->dev,
  8362. ioa_cfg->cfg_table_size,
  8363. &ioa_cfg->cfg_table_dma,
  8364. GFP_KERNEL);
  8365. if (!ioa_cfg->u.cfg_table)
  8366. goto out_free_host_rrq;
  8367. for (i = 0; i < IPR_NUM_HCAMS; i++) {
  8368. ioa_cfg->hostrcb[i] = dma_alloc_coherent(&pdev->dev,
  8369. sizeof(struct ipr_hostrcb),
  8370. &ioa_cfg->hostrcb_dma[i],
  8371. GFP_KERNEL);
  8372. if (!ioa_cfg->hostrcb[i])
  8373. goto out_free_hostrcb_dma;
  8374. ioa_cfg->hostrcb[i]->hostrcb_dma =
  8375. ioa_cfg->hostrcb_dma[i] + offsetof(struct ipr_hostrcb, hcam);
  8376. ioa_cfg->hostrcb[i]->ioa_cfg = ioa_cfg;
  8377. list_add_tail(&ioa_cfg->hostrcb[i]->queue, &ioa_cfg->hostrcb_free_q);
  8378. }
  8379. ioa_cfg->trace = kzalloc(sizeof(struct ipr_trace_entry) *
  8380. IPR_NUM_TRACE_ENTRIES, GFP_KERNEL);
  8381. if (!ioa_cfg->trace)
  8382. goto out_free_hostrcb_dma;
  8383. rc = 0;
  8384. out:
  8385. LEAVE;
  8386. return rc;
  8387. out_free_hostrcb_dma:
  8388. while (i-- > 0) {
  8389. dma_free_coherent(&pdev->dev, sizeof(struct ipr_hostrcb),
  8390. ioa_cfg->hostrcb[i],
  8391. ioa_cfg->hostrcb_dma[i]);
  8392. }
  8393. dma_free_coherent(&pdev->dev, ioa_cfg->cfg_table_size,
  8394. ioa_cfg->u.cfg_table, ioa_cfg->cfg_table_dma);
  8395. out_free_host_rrq:
  8396. for (i = 0; i < ioa_cfg->hrrq_num; i++) {
  8397. dma_free_coherent(&pdev->dev,
  8398. sizeof(u32) * ioa_cfg->hrrq[i].size,
  8399. ioa_cfg->hrrq[i].host_rrq,
  8400. ioa_cfg->hrrq[i].host_rrq_dma);
  8401. }
  8402. out_ipr_free_cmd_blocks:
  8403. ipr_free_cmd_blks(ioa_cfg);
  8404. out_free_vpd_cbs:
  8405. dma_free_coherent(&pdev->dev, sizeof(struct ipr_misc_cbs),
  8406. ioa_cfg->vpd_cbs, ioa_cfg->vpd_cbs_dma);
  8407. out_free_res_entries:
  8408. kfree(ioa_cfg->res_entries);
  8409. goto out;
  8410. }
  8411. /**
  8412. * ipr_initialize_bus_attr - Initialize SCSI bus attributes to default values
  8413. * @ioa_cfg: ioa config struct
  8414. *
  8415. * Return value:
  8416. * none
  8417. **/
  8418. static void ipr_initialize_bus_attr(struct ipr_ioa_cfg *ioa_cfg)
  8419. {
  8420. int i;
  8421. for (i = 0; i < IPR_MAX_NUM_BUSES; i++) {
  8422. ioa_cfg->bus_attr[i].bus = i;
  8423. ioa_cfg->bus_attr[i].qas_enabled = 0;
  8424. ioa_cfg->bus_attr[i].bus_width = IPR_DEFAULT_BUS_WIDTH;
  8425. if (ipr_max_speed < ARRAY_SIZE(ipr_max_bus_speeds))
  8426. ioa_cfg->bus_attr[i].max_xfer_rate = ipr_max_bus_speeds[ipr_max_speed];
  8427. else
  8428. ioa_cfg->bus_attr[i].max_xfer_rate = IPR_U160_SCSI_RATE;
  8429. }
  8430. }
  8431. /**
  8432. * ipr_init_regs - Initialize IOA registers
  8433. * @ioa_cfg: ioa config struct
  8434. *
  8435. * Return value:
  8436. * none
  8437. **/
  8438. static void ipr_init_regs(struct ipr_ioa_cfg *ioa_cfg)
  8439. {
  8440. const struct ipr_interrupt_offsets *p;
  8441. struct ipr_interrupts *t;
  8442. void __iomem *base;
  8443. p = &ioa_cfg->chip_cfg->regs;
  8444. t = &ioa_cfg->regs;
  8445. base = ioa_cfg->hdw_dma_regs;
  8446. t->set_interrupt_mask_reg = base + p->set_interrupt_mask_reg;
  8447. t->clr_interrupt_mask_reg = base + p->clr_interrupt_mask_reg;
  8448. t->clr_interrupt_mask_reg32 = base + p->clr_interrupt_mask_reg32;
  8449. t->sense_interrupt_mask_reg = base + p->sense_interrupt_mask_reg;
  8450. t->sense_interrupt_mask_reg32 = base + p->sense_interrupt_mask_reg32;
  8451. t->clr_interrupt_reg = base + p->clr_interrupt_reg;
  8452. t->clr_interrupt_reg32 = base + p->clr_interrupt_reg32;
  8453. t->sense_interrupt_reg = base + p->sense_interrupt_reg;
  8454. t->sense_interrupt_reg32 = base + p->sense_interrupt_reg32;
  8455. t->ioarrin_reg = base + p->ioarrin_reg;
  8456. t->sense_uproc_interrupt_reg = base + p->sense_uproc_interrupt_reg;
  8457. t->sense_uproc_interrupt_reg32 = base + p->sense_uproc_interrupt_reg32;
  8458. t->set_uproc_interrupt_reg = base + p->set_uproc_interrupt_reg;
  8459. t->set_uproc_interrupt_reg32 = base + p->set_uproc_interrupt_reg32;
  8460. t->clr_uproc_interrupt_reg = base + p->clr_uproc_interrupt_reg;
  8461. t->clr_uproc_interrupt_reg32 = base + p->clr_uproc_interrupt_reg32;
  8462. if (ioa_cfg->sis64) {
  8463. t->init_feedback_reg = base + p->init_feedback_reg;
  8464. t->dump_addr_reg = base + p->dump_addr_reg;
  8465. t->dump_data_reg = base + p->dump_data_reg;
  8466. t->endian_swap_reg = base + p->endian_swap_reg;
  8467. }
  8468. }
  8469. /**
  8470. * ipr_init_ioa_cfg - Initialize IOA config struct
  8471. * @ioa_cfg: ioa config struct
  8472. * @host: scsi host struct
  8473. * @pdev: PCI dev struct
  8474. *
  8475. * Return value:
  8476. * none
  8477. **/
  8478. static void ipr_init_ioa_cfg(struct ipr_ioa_cfg *ioa_cfg,
  8479. struct Scsi_Host *host, struct pci_dev *pdev)
  8480. {
  8481. int i;
  8482. ioa_cfg->host = host;
  8483. ioa_cfg->pdev = pdev;
  8484. ioa_cfg->log_level = ipr_log_level;
  8485. ioa_cfg->doorbell = IPR_DOORBELL;
  8486. sprintf(ioa_cfg->eye_catcher, IPR_EYECATCHER);
  8487. sprintf(ioa_cfg->trace_start, IPR_TRACE_START_LABEL);
  8488. sprintf(ioa_cfg->cfg_table_start, IPR_CFG_TBL_START);
  8489. sprintf(ioa_cfg->resource_table_label, IPR_RES_TABLE_LABEL);
  8490. sprintf(ioa_cfg->ipr_hcam_label, IPR_HCAM_LABEL);
  8491. sprintf(ioa_cfg->ipr_cmd_label, IPR_CMD_LABEL);
  8492. INIT_LIST_HEAD(&ioa_cfg->hostrcb_free_q);
  8493. INIT_LIST_HEAD(&ioa_cfg->hostrcb_pending_q);
  8494. INIT_LIST_HEAD(&ioa_cfg->free_res_q);
  8495. INIT_LIST_HEAD(&ioa_cfg->used_res_q);
  8496. INIT_WORK(&ioa_cfg->work_q, ipr_worker_thread);
  8497. init_waitqueue_head(&ioa_cfg->reset_wait_q);
  8498. init_waitqueue_head(&ioa_cfg->msi_wait_q);
  8499. init_waitqueue_head(&ioa_cfg->eeh_wait_q);
  8500. ioa_cfg->sdt_state = INACTIVE;
  8501. ipr_initialize_bus_attr(ioa_cfg);
  8502. ioa_cfg->max_devs_supported = ipr_max_devs;
  8503. if (ioa_cfg->sis64) {
  8504. host->max_id = IPR_MAX_SIS64_TARGETS_PER_BUS;
  8505. host->max_lun = IPR_MAX_SIS64_LUNS_PER_TARGET;
  8506. if (ipr_max_devs > IPR_MAX_SIS64_DEVS)
  8507. ioa_cfg->max_devs_supported = IPR_MAX_SIS64_DEVS;
  8508. ioa_cfg->cfg_table_size = (sizeof(struct ipr_config_table_hdr64)
  8509. + ((sizeof(struct ipr_config_table_entry64)
  8510. * ioa_cfg->max_devs_supported)));
  8511. } else {
  8512. host->max_id = IPR_MAX_NUM_TARGETS_PER_BUS;
  8513. host->max_lun = IPR_MAX_NUM_LUNS_PER_TARGET;
  8514. if (ipr_max_devs > IPR_MAX_PHYSICAL_DEVS)
  8515. ioa_cfg->max_devs_supported = IPR_MAX_PHYSICAL_DEVS;
  8516. ioa_cfg->cfg_table_size = (sizeof(struct ipr_config_table_hdr)
  8517. + ((sizeof(struct ipr_config_table_entry)
  8518. * ioa_cfg->max_devs_supported)));
  8519. }
  8520. host->max_channel = IPR_VSET_BUS;
  8521. host->unique_id = host->host_no;
  8522. host->max_cmd_len = IPR_MAX_CDB_LEN;
  8523. host->can_queue = ioa_cfg->max_cmds;
  8524. pci_set_drvdata(pdev, ioa_cfg);
  8525. for (i = 0; i < ARRAY_SIZE(ioa_cfg->hrrq); i++) {
  8526. INIT_LIST_HEAD(&ioa_cfg->hrrq[i].hrrq_free_q);
  8527. INIT_LIST_HEAD(&ioa_cfg->hrrq[i].hrrq_pending_q);
  8528. spin_lock_init(&ioa_cfg->hrrq[i]._lock);
  8529. if (i == 0)
  8530. ioa_cfg->hrrq[i].lock = ioa_cfg->host->host_lock;
  8531. else
  8532. ioa_cfg->hrrq[i].lock = &ioa_cfg->hrrq[i]._lock;
  8533. }
  8534. }
  8535. /**
  8536. * ipr_get_chip_info - Find adapter chip information
  8537. * @dev_id: PCI device id struct
  8538. *
  8539. * Return value:
  8540. * ptr to chip information on success / NULL on failure
  8541. **/
  8542. static const struct ipr_chip_t *
  8543. ipr_get_chip_info(const struct pci_device_id *dev_id)
  8544. {
  8545. int i;
  8546. for (i = 0; i < ARRAY_SIZE(ipr_chip); i++)
  8547. if (ipr_chip[i].vendor == dev_id->vendor &&
  8548. ipr_chip[i].device == dev_id->device)
  8549. return &ipr_chip[i];
  8550. return NULL;
  8551. }
  8552. /**
  8553. * ipr_wait_for_pci_err_recovery - Wait for any PCI error recovery to complete
  8554. * during probe time
  8555. * @ioa_cfg: ioa config struct
  8556. *
  8557. * Return value:
  8558. * None
  8559. **/
  8560. static void ipr_wait_for_pci_err_recovery(struct ipr_ioa_cfg *ioa_cfg)
  8561. {
  8562. struct pci_dev *pdev = ioa_cfg->pdev;
  8563. if (pci_channel_offline(pdev)) {
  8564. wait_event_timeout(ioa_cfg->eeh_wait_q,
  8565. !pci_channel_offline(pdev),
  8566. IPR_PCI_ERROR_RECOVERY_TIMEOUT);
  8567. pci_restore_state(pdev);
  8568. }
  8569. }
  8570. static int ipr_enable_msix(struct ipr_ioa_cfg *ioa_cfg)
  8571. {
  8572. struct msix_entry entries[IPR_MAX_MSIX_VECTORS];
  8573. int i, vectors;
  8574. for (i = 0; i < ARRAY_SIZE(entries); ++i)
  8575. entries[i].entry = i;
  8576. vectors = pci_enable_msix_range(ioa_cfg->pdev,
  8577. entries, 1, ipr_number_of_msix);
  8578. if (vectors < 0) {
  8579. ipr_wait_for_pci_err_recovery(ioa_cfg);
  8580. return vectors;
  8581. }
  8582. for (i = 0; i < vectors; i++)
  8583. ioa_cfg->vectors_info[i].vec = entries[i].vector;
  8584. ioa_cfg->nvectors = vectors;
  8585. return 0;
  8586. }
  8587. static int ipr_enable_msi(struct ipr_ioa_cfg *ioa_cfg)
  8588. {
  8589. int i, vectors;
  8590. vectors = pci_enable_msi_range(ioa_cfg->pdev, 1, ipr_number_of_msix);
  8591. if (vectors < 0) {
  8592. ipr_wait_for_pci_err_recovery(ioa_cfg);
  8593. return vectors;
  8594. }
  8595. for (i = 0; i < vectors; i++)
  8596. ioa_cfg->vectors_info[i].vec = ioa_cfg->pdev->irq + i;
  8597. ioa_cfg->nvectors = vectors;
  8598. return 0;
  8599. }
  8600. static void name_msi_vectors(struct ipr_ioa_cfg *ioa_cfg)
  8601. {
  8602. int vec_idx, n = sizeof(ioa_cfg->vectors_info[0].desc) - 1;
  8603. for (vec_idx = 0; vec_idx < ioa_cfg->nvectors; vec_idx++) {
  8604. snprintf(ioa_cfg->vectors_info[vec_idx].desc, n,
  8605. "host%d-%d", ioa_cfg->host->host_no, vec_idx);
  8606. ioa_cfg->vectors_info[vec_idx].
  8607. desc[strlen(ioa_cfg->vectors_info[vec_idx].desc)] = 0;
  8608. }
  8609. }
  8610. static int ipr_request_other_msi_irqs(struct ipr_ioa_cfg *ioa_cfg)
  8611. {
  8612. int i, rc;
  8613. for (i = 1; i < ioa_cfg->nvectors; i++) {
  8614. rc = request_irq(ioa_cfg->vectors_info[i].vec,
  8615. ipr_isr_mhrrq,
  8616. 0,
  8617. ioa_cfg->vectors_info[i].desc,
  8618. &ioa_cfg->hrrq[i]);
  8619. if (rc) {
  8620. while (--i >= 0)
  8621. free_irq(ioa_cfg->vectors_info[i].vec,
  8622. &ioa_cfg->hrrq[i]);
  8623. return rc;
  8624. }
  8625. }
  8626. return 0;
  8627. }
  8628. /**
  8629. * ipr_test_intr - Handle the interrupt generated in ipr_test_msi().
  8630. * @pdev: PCI device struct
  8631. *
  8632. * Description: Simply set the msi_received flag to 1 indicating that
  8633. * Message Signaled Interrupts are supported.
  8634. *
  8635. * Return value:
  8636. * 0 on success / non-zero on failure
  8637. **/
  8638. static irqreturn_t ipr_test_intr(int irq, void *devp)
  8639. {
  8640. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *)devp;
  8641. unsigned long lock_flags = 0;
  8642. irqreturn_t rc = IRQ_HANDLED;
  8643. dev_info(&ioa_cfg->pdev->dev, "Received IRQ : %d\n", irq);
  8644. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  8645. ioa_cfg->msi_received = 1;
  8646. wake_up(&ioa_cfg->msi_wait_q);
  8647. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  8648. return rc;
  8649. }
  8650. /**
  8651. * ipr_test_msi - Test for Message Signaled Interrupt (MSI) support.
  8652. * @pdev: PCI device struct
  8653. *
  8654. * Description: The return value from pci_enable_msi_range() can not always be
  8655. * trusted. This routine sets up and initiates a test interrupt to determine
  8656. * if the interrupt is received via the ipr_test_intr() service routine.
  8657. * If the tests fails, the driver will fall back to LSI.
  8658. *
  8659. * Return value:
  8660. * 0 on success / non-zero on failure
  8661. **/
  8662. static int ipr_test_msi(struct ipr_ioa_cfg *ioa_cfg, struct pci_dev *pdev)
  8663. {
  8664. int rc;
  8665. volatile u32 int_reg;
  8666. unsigned long lock_flags = 0;
  8667. ENTER;
  8668. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  8669. init_waitqueue_head(&ioa_cfg->msi_wait_q);
  8670. ioa_cfg->msi_received = 0;
  8671. ipr_mask_and_clear_interrupts(ioa_cfg, ~IPR_PCII_IOA_TRANS_TO_OPER);
  8672. writel(IPR_PCII_IO_DEBUG_ACKNOWLEDGE, ioa_cfg->regs.clr_interrupt_mask_reg32);
  8673. int_reg = readl(ioa_cfg->regs.sense_interrupt_mask_reg);
  8674. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  8675. if (ioa_cfg->intr_flag == IPR_USE_MSIX)
  8676. rc = request_irq(ioa_cfg->vectors_info[0].vec, ipr_test_intr, 0, IPR_NAME, ioa_cfg);
  8677. else
  8678. rc = request_irq(pdev->irq, ipr_test_intr, 0, IPR_NAME, ioa_cfg);
  8679. if (rc) {
  8680. dev_err(&pdev->dev, "Can not assign irq %d\n", pdev->irq);
  8681. return rc;
  8682. } else if (ipr_debug)
  8683. dev_info(&pdev->dev, "IRQ assigned: %d\n", pdev->irq);
  8684. writel(IPR_PCII_IO_DEBUG_ACKNOWLEDGE, ioa_cfg->regs.sense_interrupt_reg32);
  8685. int_reg = readl(ioa_cfg->regs.sense_interrupt_reg);
  8686. wait_event_timeout(ioa_cfg->msi_wait_q, ioa_cfg->msi_received, HZ);
  8687. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  8688. ipr_mask_and_clear_interrupts(ioa_cfg, ~IPR_PCII_IOA_TRANS_TO_OPER);
  8689. if (!ioa_cfg->msi_received) {
  8690. /* MSI test failed */
  8691. dev_info(&pdev->dev, "MSI test failed. Falling back to LSI.\n");
  8692. rc = -EOPNOTSUPP;
  8693. } else if (ipr_debug)
  8694. dev_info(&pdev->dev, "MSI test succeeded.\n");
  8695. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  8696. if (ioa_cfg->intr_flag == IPR_USE_MSIX)
  8697. free_irq(ioa_cfg->vectors_info[0].vec, ioa_cfg);
  8698. else
  8699. free_irq(pdev->irq, ioa_cfg);
  8700. LEAVE;
  8701. return rc;
  8702. }
  8703. /* ipr_probe_ioa - Allocates memory and does first stage of initialization
  8704. * @pdev: PCI device struct
  8705. * @dev_id: PCI device id struct
  8706. *
  8707. * Return value:
  8708. * 0 on success / non-zero on failure
  8709. **/
  8710. static int ipr_probe_ioa(struct pci_dev *pdev,
  8711. const struct pci_device_id *dev_id)
  8712. {
  8713. struct ipr_ioa_cfg *ioa_cfg;
  8714. struct Scsi_Host *host;
  8715. unsigned long ipr_regs_pci;
  8716. void __iomem *ipr_regs;
  8717. int rc = PCIBIOS_SUCCESSFUL;
  8718. volatile u32 mask, uproc, interrupts;
  8719. unsigned long lock_flags, driver_lock_flags;
  8720. ENTER;
  8721. dev_info(&pdev->dev, "Found IOA with IRQ: %d\n", pdev->irq);
  8722. host = scsi_host_alloc(&driver_template, sizeof(*ioa_cfg));
  8723. if (!host) {
  8724. dev_err(&pdev->dev, "call to scsi_host_alloc failed!\n");
  8725. rc = -ENOMEM;
  8726. goto out;
  8727. }
  8728. ioa_cfg = (struct ipr_ioa_cfg *)host->hostdata;
  8729. memset(ioa_cfg, 0, sizeof(struct ipr_ioa_cfg));
  8730. ata_host_init(&ioa_cfg->ata_host, &pdev->dev, &ipr_sata_ops);
  8731. ioa_cfg->ipr_chip = ipr_get_chip_info(dev_id);
  8732. if (!ioa_cfg->ipr_chip) {
  8733. dev_err(&pdev->dev, "Unknown adapter chipset 0x%04X 0x%04X\n",
  8734. dev_id->vendor, dev_id->device);
  8735. goto out_scsi_host_put;
  8736. }
  8737. /* set SIS 32 or SIS 64 */
  8738. ioa_cfg->sis64 = ioa_cfg->ipr_chip->sis_type == IPR_SIS64 ? 1 : 0;
  8739. ioa_cfg->chip_cfg = ioa_cfg->ipr_chip->cfg;
  8740. ioa_cfg->clear_isr = ioa_cfg->chip_cfg->clear_isr;
  8741. ioa_cfg->max_cmds = ioa_cfg->chip_cfg->max_cmds;
  8742. if (ipr_transop_timeout)
  8743. ioa_cfg->transop_timeout = ipr_transop_timeout;
  8744. else if (dev_id->driver_data & IPR_USE_LONG_TRANSOP_TIMEOUT)
  8745. ioa_cfg->transop_timeout = IPR_LONG_OPERATIONAL_TIMEOUT;
  8746. else
  8747. ioa_cfg->transop_timeout = IPR_OPERATIONAL_TIMEOUT;
  8748. ioa_cfg->revid = pdev->revision;
  8749. ipr_init_ioa_cfg(ioa_cfg, host, pdev);
  8750. ipr_regs_pci = pci_resource_start(pdev, 0);
  8751. rc = pci_request_regions(pdev, IPR_NAME);
  8752. if (rc < 0) {
  8753. dev_err(&pdev->dev,
  8754. "Couldn't register memory range of registers\n");
  8755. goto out_scsi_host_put;
  8756. }
  8757. rc = pci_enable_device(pdev);
  8758. if (rc || pci_channel_offline(pdev)) {
  8759. if (pci_channel_offline(pdev)) {
  8760. ipr_wait_for_pci_err_recovery(ioa_cfg);
  8761. rc = pci_enable_device(pdev);
  8762. }
  8763. if (rc) {
  8764. dev_err(&pdev->dev, "Cannot enable adapter\n");
  8765. ipr_wait_for_pci_err_recovery(ioa_cfg);
  8766. goto out_release_regions;
  8767. }
  8768. }
  8769. ipr_regs = pci_ioremap_bar(pdev, 0);
  8770. if (!ipr_regs) {
  8771. dev_err(&pdev->dev,
  8772. "Couldn't map memory range of registers\n");
  8773. rc = -ENOMEM;
  8774. goto out_disable;
  8775. }
  8776. ioa_cfg->hdw_dma_regs = ipr_regs;
  8777. ioa_cfg->hdw_dma_regs_pci = ipr_regs_pci;
  8778. ioa_cfg->ioa_mailbox = ioa_cfg->chip_cfg->mailbox + ipr_regs;
  8779. ipr_init_regs(ioa_cfg);
  8780. if (ioa_cfg->sis64) {
  8781. rc = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
  8782. if (rc < 0) {
  8783. dev_dbg(&pdev->dev, "Failed to set 64 bit DMA mask\n");
  8784. rc = dma_set_mask_and_coherent(&pdev->dev,
  8785. DMA_BIT_MASK(32));
  8786. }
  8787. } else
  8788. rc = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
  8789. if (rc < 0) {
  8790. dev_err(&pdev->dev, "Failed to set DMA mask\n");
  8791. goto cleanup_nomem;
  8792. }
  8793. rc = pci_write_config_byte(pdev, PCI_CACHE_LINE_SIZE,
  8794. ioa_cfg->chip_cfg->cache_line_size);
  8795. if (rc != PCIBIOS_SUCCESSFUL) {
  8796. dev_err(&pdev->dev, "Write of cache line size failed\n");
  8797. ipr_wait_for_pci_err_recovery(ioa_cfg);
  8798. rc = -EIO;
  8799. goto cleanup_nomem;
  8800. }
  8801. /* Issue MMIO read to ensure card is not in EEH */
  8802. interrupts = readl(ioa_cfg->regs.sense_interrupt_reg);
  8803. ipr_wait_for_pci_err_recovery(ioa_cfg);
  8804. if (ipr_number_of_msix > IPR_MAX_MSIX_VECTORS) {
  8805. dev_err(&pdev->dev, "The max number of MSIX is %d\n",
  8806. IPR_MAX_MSIX_VECTORS);
  8807. ipr_number_of_msix = IPR_MAX_MSIX_VECTORS;
  8808. }
  8809. if (ioa_cfg->ipr_chip->intr_type == IPR_USE_MSI &&
  8810. ipr_enable_msix(ioa_cfg) == 0)
  8811. ioa_cfg->intr_flag = IPR_USE_MSIX;
  8812. else if (ioa_cfg->ipr_chip->intr_type == IPR_USE_MSI &&
  8813. ipr_enable_msi(ioa_cfg) == 0)
  8814. ioa_cfg->intr_flag = IPR_USE_MSI;
  8815. else {
  8816. ioa_cfg->intr_flag = IPR_USE_LSI;
  8817. ioa_cfg->clear_isr = 1;
  8818. ioa_cfg->nvectors = 1;
  8819. dev_info(&pdev->dev, "Cannot enable MSI.\n");
  8820. }
  8821. pci_set_master(pdev);
  8822. if (pci_channel_offline(pdev)) {
  8823. ipr_wait_for_pci_err_recovery(ioa_cfg);
  8824. pci_set_master(pdev);
  8825. if (pci_channel_offline(pdev)) {
  8826. rc = -EIO;
  8827. goto out_msi_disable;
  8828. }
  8829. }
  8830. if (ioa_cfg->intr_flag == IPR_USE_MSI ||
  8831. ioa_cfg->intr_flag == IPR_USE_MSIX) {
  8832. rc = ipr_test_msi(ioa_cfg, pdev);
  8833. if (rc == -EOPNOTSUPP) {
  8834. ipr_wait_for_pci_err_recovery(ioa_cfg);
  8835. if (ioa_cfg->intr_flag == IPR_USE_MSI) {
  8836. ioa_cfg->intr_flag &= ~IPR_USE_MSI;
  8837. pci_disable_msi(pdev);
  8838. } else if (ioa_cfg->intr_flag == IPR_USE_MSIX) {
  8839. ioa_cfg->intr_flag &= ~IPR_USE_MSIX;
  8840. pci_disable_msix(pdev);
  8841. }
  8842. ioa_cfg->intr_flag = IPR_USE_LSI;
  8843. ioa_cfg->nvectors = 1;
  8844. }
  8845. else if (rc)
  8846. goto out_msi_disable;
  8847. else {
  8848. if (ioa_cfg->intr_flag == IPR_USE_MSI)
  8849. dev_info(&pdev->dev,
  8850. "Request for %d MSIs succeeded with starting IRQ: %d\n",
  8851. ioa_cfg->nvectors, pdev->irq);
  8852. else if (ioa_cfg->intr_flag == IPR_USE_MSIX)
  8853. dev_info(&pdev->dev,
  8854. "Request for %d MSIXs succeeded.",
  8855. ioa_cfg->nvectors);
  8856. }
  8857. }
  8858. ioa_cfg->hrrq_num = min3(ioa_cfg->nvectors,
  8859. (unsigned int)num_online_cpus(),
  8860. (unsigned int)IPR_MAX_HRRQ_NUM);
  8861. if ((rc = ipr_save_pcix_cmd_reg(ioa_cfg)))
  8862. goto out_msi_disable;
  8863. if ((rc = ipr_set_pcix_cmd_reg(ioa_cfg)))
  8864. goto out_msi_disable;
  8865. rc = ipr_alloc_mem(ioa_cfg);
  8866. if (rc < 0) {
  8867. dev_err(&pdev->dev,
  8868. "Couldn't allocate enough memory for device driver!\n");
  8869. goto out_msi_disable;
  8870. }
  8871. /* Save away PCI config space for use following IOA reset */
  8872. rc = pci_save_state(pdev);
  8873. if (rc != PCIBIOS_SUCCESSFUL) {
  8874. dev_err(&pdev->dev, "Failed to save PCI config space\n");
  8875. rc = -EIO;
  8876. goto cleanup_nolog;
  8877. }
  8878. /*
  8879. * If HRRQ updated interrupt is not masked, or reset alert is set,
  8880. * the card is in an unknown state and needs a hard reset
  8881. */
  8882. mask = readl(ioa_cfg->regs.sense_interrupt_mask_reg32);
  8883. interrupts = readl(ioa_cfg->regs.sense_interrupt_reg32);
  8884. uproc = readl(ioa_cfg->regs.sense_uproc_interrupt_reg32);
  8885. if ((mask & IPR_PCII_HRRQ_UPDATED) == 0 || (uproc & IPR_UPROCI_RESET_ALERT))
  8886. ioa_cfg->needs_hard_reset = 1;
  8887. if ((interrupts & IPR_PCII_ERROR_INTERRUPTS) || reset_devices)
  8888. ioa_cfg->needs_hard_reset = 1;
  8889. if (interrupts & IPR_PCII_IOA_UNIT_CHECKED)
  8890. ioa_cfg->ioa_unit_checked = 1;
  8891. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  8892. ipr_mask_and_clear_interrupts(ioa_cfg, ~IPR_PCII_IOA_TRANS_TO_OPER);
  8893. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  8894. if (ioa_cfg->intr_flag == IPR_USE_MSI
  8895. || ioa_cfg->intr_flag == IPR_USE_MSIX) {
  8896. name_msi_vectors(ioa_cfg);
  8897. rc = request_irq(ioa_cfg->vectors_info[0].vec, ipr_isr,
  8898. 0,
  8899. ioa_cfg->vectors_info[0].desc,
  8900. &ioa_cfg->hrrq[0]);
  8901. if (!rc)
  8902. rc = ipr_request_other_msi_irqs(ioa_cfg);
  8903. } else {
  8904. rc = request_irq(pdev->irq, ipr_isr,
  8905. IRQF_SHARED,
  8906. IPR_NAME, &ioa_cfg->hrrq[0]);
  8907. }
  8908. if (rc) {
  8909. dev_err(&pdev->dev, "Couldn't register IRQ %d! rc=%d\n",
  8910. pdev->irq, rc);
  8911. goto cleanup_nolog;
  8912. }
  8913. if ((dev_id->driver_data & IPR_USE_PCI_WARM_RESET) ||
  8914. (dev_id->device == PCI_DEVICE_ID_IBM_OBSIDIAN_E && !ioa_cfg->revid)) {
  8915. ioa_cfg->needs_warm_reset = 1;
  8916. ioa_cfg->reset = ipr_reset_slot_reset;
  8917. ioa_cfg->reset_work_q = alloc_ordered_workqueue("ipr_reset_%d",
  8918. WQ_MEM_RECLAIM, host->host_no);
  8919. if (!ioa_cfg->reset_work_q) {
  8920. dev_err(&pdev->dev, "Couldn't register reset workqueue\n");
  8921. goto out_free_irq;
  8922. }
  8923. } else
  8924. ioa_cfg->reset = ipr_reset_start_bist;
  8925. spin_lock_irqsave(&ipr_driver_lock, driver_lock_flags);
  8926. list_add_tail(&ioa_cfg->queue, &ipr_ioa_head);
  8927. spin_unlock_irqrestore(&ipr_driver_lock, driver_lock_flags);
  8928. LEAVE;
  8929. out:
  8930. return rc;
  8931. out_free_irq:
  8932. ipr_free_irqs(ioa_cfg);
  8933. cleanup_nolog:
  8934. ipr_free_mem(ioa_cfg);
  8935. out_msi_disable:
  8936. ipr_wait_for_pci_err_recovery(ioa_cfg);
  8937. if (ioa_cfg->intr_flag == IPR_USE_MSI)
  8938. pci_disable_msi(pdev);
  8939. else if (ioa_cfg->intr_flag == IPR_USE_MSIX)
  8940. pci_disable_msix(pdev);
  8941. cleanup_nomem:
  8942. iounmap(ipr_regs);
  8943. out_disable:
  8944. pci_disable_device(pdev);
  8945. out_release_regions:
  8946. pci_release_regions(pdev);
  8947. out_scsi_host_put:
  8948. scsi_host_put(host);
  8949. goto out;
  8950. }
  8951. /**
  8952. * ipr_initiate_ioa_bringdown - Bring down an adapter
  8953. * @ioa_cfg: ioa config struct
  8954. * @shutdown_type: shutdown type
  8955. *
  8956. * Description: This function will initiate bringing down the adapter.
  8957. * This consists of issuing an IOA shutdown to the adapter
  8958. * to flush the cache, and running BIST.
  8959. * If the caller needs to wait on the completion of the reset,
  8960. * the caller must sleep on the reset_wait_q.
  8961. *
  8962. * Return value:
  8963. * none
  8964. **/
  8965. static void ipr_initiate_ioa_bringdown(struct ipr_ioa_cfg *ioa_cfg,
  8966. enum ipr_shutdown_type shutdown_type)
  8967. {
  8968. ENTER;
  8969. if (ioa_cfg->sdt_state == WAIT_FOR_DUMP)
  8970. ioa_cfg->sdt_state = ABORT_DUMP;
  8971. ioa_cfg->reset_retries = 0;
  8972. ioa_cfg->in_ioa_bringdown = 1;
  8973. ipr_initiate_ioa_reset(ioa_cfg, shutdown_type);
  8974. LEAVE;
  8975. }
  8976. /**
  8977. * __ipr_remove - Remove a single adapter
  8978. * @pdev: pci device struct
  8979. *
  8980. * Adapter hot plug remove entry point.
  8981. *
  8982. * Return value:
  8983. * none
  8984. **/
  8985. static void __ipr_remove(struct pci_dev *pdev)
  8986. {
  8987. unsigned long host_lock_flags = 0;
  8988. struct ipr_ioa_cfg *ioa_cfg = pci_get_drvdata(pdev);
  8989. int i;
  8990. unsigned long driver_lock_flags;
  8991. ENTER;
  8992. spin_lock_irqsave(ioa_cfg->host->host_lock, host_lock_flags);
  8993. while (ioa_cfg->in_reset_reload) {
  8994. spin_unlock_irqrestore(ioa_cfg->host->host_lock, host_lock_flags);
  8995. wait_event(ioa_cfg->reset_wait_q, !ioa_cfg->in_reset_reload);
  8996. spin_lock_irqsave(ioa_cfg->host->host_lock, host_lock_flags);
  8997. }
  8998. for (i = 0; i < ioa_cfg->hrrq_num; i++) {
  8999. spin_lock(&ioa_cfg->hrrq[i]._lock);
  9000. ioa_cfg->hrrq[i].removing_ioa = 1;
  9001. spin_unlock(&ioa_cfg->hrrq[i]._lock);
  9002. }
  9003. wmb();
  9004. ipr_initiate_ioa_bringdown(ioa_cfg, IPR_SHUTDOWN_NORMAL);
  9005. spin_unlock_irqrestore(ioa_cfg->host->host_lock, host_lock_flags);
  9006. wait_event(ioa_cfg->reset_wait_q, !ioa_cfg->in_reset_reload);
  9007. flush_work(&ioa_cfg->work_q);
  9008. if (ioa_cfg->reset_work_q)
  9009. flush_workqueue(ioa_cfg->reset_work_q);
  9010. INIT_LIST_HEAD(&ioa_cfg->used_res_q);
  9011. spin_lock_irqsave(ioa_cfg->host->host_lock, host_lock_flags);
  9012. spin_lock_irqsave(&ipr_driver_lock, driver_lock_flags);
  9013. list_del(&ioa_cfg->queue);
  9014. spin_unlock_irqrestore(&ipr_driver_lock, driver_lock_flags);
  9015. if (ioa_cfg->sdt_state == ABORT_DUMP)
  9016. ioa_cfg->sdt_state = WAIT_FOR_DUMP;
  9017. spin_unlock_irqrestore(ioa_cfg->host->host_lock, host_lock_flags);
  9018. ipr_free_all_resources(ioa_cfg);
  9019. LEAVE;
  9020. }
  9021. /**
  9022. * ipr_remove - IOA hot plug remove entry point
  9023. * @pdev: pci device struct
  9024. *
  9025. * Adapter hot plug remove entry point.
  9026. *
  9027. * Return value:
  9028. * none
  9029. **/
  9030. static void ipr_remove(struct pci_dev *pdev)
  9031. {
  9032. struct ipr_ioa_cfg *ioa_cfg = pci_get_drvdata(pdev);
  9033. ENTER;
  9034. ipr_remove_trace_file(&ioa_cfg->host->shost_dev.kobj,
  9035. &ipr_trace_attr);
  9036. ipr_remove_dump_file(&ioa_cfg->host->shost_dev.kobj,
  9037. &ipr_dump_attr);
  9038. scsi_remove_host(ioa_cfg->host);
  9039. __ipr_remove(pdev);
  9040. LEAVE;
  9041. }
  9042. /**
  9043. * ipr_probe - Adapter hot plug add entry point
  9044. *
  9045. * Return value:
  9046. * 0 on success / non-zero on failure
  9047. **/
  9048. static int ipr_probe(struct pci_dev *pdev, const struct pci_device_id *dev_id)
  9049. {
  9050. struct ipr_ioa_cfg *ioa_cfg;
  9051. int rc, i;
  9052. rc = ipr_probe_ioa(pdev, dev_id);
  9053. if (rc)
  9054. return rc;
  9055. ioa_cfg = pci_get_drvdata(pdev);
  9056. rc = ipr_probe_ioa_part2(ioa_cfg);
  9057. if (rc) {
  9058. __ipr_remove(pdev);
  9059. return rc;
  9060. }
  9061. rc = scsi_add_host(ioa_cfg->host, &pdev->dev);
  9062. if (rc) {
  9063. __ipr_remove(pdev);
  9064. return rc;
  9065. }
  9066. rc = ipr_create_trace_file(&ioa_cfg->host->shost_dev.kobj,
  9067. &ipr_trace_attr);
  9068. if (rc) {
  9069. scsi_remove_host(ioa_cfg->host);
  9070. __ipr_remove(pdev);
  9071. return rc;
  9072. }
  9073. rc = ipr_create_dump_file(&ioa_cfg->host->shost_dev.kobj,
  9074. &ipr_dump_attr);
  9075. if (rc) {
  9076. ipr_remove_trace_file(&ioa_cfg->host->shost_dev.kobj,
  9077. &ipr_trace_attr);
  9078. scsi_remove_host(ioa_cfg->host);
  9079. __ipr_remove(pdev);
  9080. return rc;
  9081. }
  9082. scsi_scan_host(ioa_cfg->host);
  9083. ioa_cfg->iopoll_weight = ioa_cfg->chip_cfg->iopoll_weight;
  9084. if (ioa_cfg->iopoll_weight && ioa_cfg->sis64 && ioa_cfg->nvectors > 1) {
  9085. for (i = 1; i < ioa_cfg->hrrq_num; i++) {
  9086. blk_iopoll_init(&ioa_cfg->hrrq[i].iopoll,
  9087. ioa_cfg->iopoll_weight, ipr_iopoll);
  9088. blk_iopoll_enable(&ioa_cfg->hrrq[i].iopoll);
  9089. }
  9090. }
  9091. schedule_work(&ioa_cfg->work_q);
  9092. return 0;
  9093. }
  9094. /**
  9095. * ipr_shutdown - Shutdown handler.
  9096. * @pdev: pci device struct
  9097. *
  9098. * This function is invoked upon system shutdown/reboot. It will issue
  9099. * an adapter shutdown to the adapter to flush the write cache.
  9100. *
  9101. * Return value:
  9102. * none
  9103. **/
  9104. static void ipr_shutdown(struct pci_dev *pdev)
  9105. {
  9106. struct ipr_ioa_cfg *ioa_cfg = pci_get_drvdata(pdev);
  9107. unsigned long lock_flags = 0;
  9108. enum ipr_shutdown_type shutdown_type = IPR_SHUTDOWN_NORMAL;
  9109. int i;
  9110. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  9111. if (ioa_cfg->iopoll_weight && ioa_cfg->sis64 && ioa_cfg->nvectors > 1) {
  9112. ioa_cfg->iopoll_weight = 0;
  9113. for (i = 1; i < ioa_cfg->hrrq_num; i++)
  9114. blk_iopoll_disable(&ioa_cfg->hrrq[i].iopoll);
  9115. }
  9116. while (ioa_cfg->in_reset_reload) {
  9117. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  9118. wait_event(ioa_cfg->reset_wait_q, !ioa_cfg->in_reset_reload);
  9119. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  9120. }
  9121. if (ipr_fast_reboot && system_state == SYSTEM_RESTART && ioa_cfg->sis64)
  9122. shutdown_type = IPR_SHUTDOWN_QUIESCE;
  9123. ipr_initiate_ioa_bringdown(ioa_cfg, shutdown_type);
  9124. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  9125. wait_event(ioa_cfg->reset_wait_q, !ioa_cfg->in_reset_reload);
  9126. if (ipr_fast_reboot && system_state == SYSTEM_RESTART && ioa_cfg->sis64) {
  9127. ipr_free_irqs(ioa_cfg);
  9128. pci_disable_device(ioa_cfg->pdev);
  9129. }
  9130. }
  9131. static struct pci_device_id ipr_pci_table[] = {
  9132. { PCI_VENDOR_ID_MYLEX, PCI_DEVICE_ID_IBM_GEMSTONE,
  9133. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_5702, 0, 0, 0 },
  9134. { PCI_VENDOR_ID_MYLEX, PCI_DEVICE_ID_IBM_GEMSTONE,
  9135. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_5703, 0, 0, 0 },
  9136. { PCI_VENDOR_ID_MYLEX, PCI_DEVICE_ID_IBM_GEMSTONE,
  9137. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_573D, 0, 0, 0 },
  9138. { PCI_VENDOR_ID_MYLEX, PCI_DEVICE_ID_IBM_GEMSTONE,
  9139. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_573E, 0, 0, 0 },
  9140. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CITRINE,
  9141. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_571B, 0, 0, 0 },
  9142. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CITRINE,
  9143. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_572E, 0, 0, 0 },
  9144. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CITRINE,
  9145. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_571A, 0, 0, 0 },
  9146. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CITRINE,
  9147. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_575B, 0, 0,
  9148. IPR_USE_LONG_TRANSOP_TIMEOUT },
  9149. { PCI_VENDOR_ID_ADAPTEC2, PCI_DEVICE_ID_ADAPTEC2_OBSIDIAN,
  9150. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_572A, 0, 0, 0 },
  9151. { PCI_VENDOR_ID_ADAPTEC2, PCI_DEVICE_ID_ADAPTEC2_OBSIDIAN,
  9152. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_572B, 0, 0,
  9153. IPR_USE_LONG_TRANSOP_TIMEOUT },
  9154. { PCI_VENDOR_ID_ADAPTEC2, PCI_DEVICE_ID_ADAPTEC2_OBSIDIAN,
  9155. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_575C, 0, 0,
  9156. IPR_USE_LONG_TRANSOP_TIMEOUT },
  9157. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_OBSIDIAN,
  9158. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_572A, 0, 0, 0 },
  9159. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_OBSIDIAN,
  9160. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_572B, 0, 0,
  9161. IPR_USE_LONG_TRANSOP_TIMEOUT},
  9162. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_OBSIDIAN,
  9163. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_575C, 0, 0,
  9164. IPR_USE_LONG_TRANSOP_TIMEOUT },
  9165. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_OBSIDIAN_E,
  9166. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_574E, 0, 0,
  9167. IPR_USE_LONG_TRANSOP_TIMEOUT },
  9168. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_OBSIDIAN_E,
  9169. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_57B3, 0, 0, 0 },
  9170. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_OBSIDIAN_E,
  9171. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_57CC, 0, 0, 0 },
  9172. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_OBSIDIAN_E,
  9173. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_57B7, 0, 0,
  9174. IPR_USE_LONG_TRANSOP_TIMEOUT | IPR_USE_PCI_WARM_RESET },
  9175. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_SNIPE,
  9176. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_2780, 0, 0, 0 },
  9177. { PCI_VENDOR_ID_ADAPTEC2, PCI_DEVICE_ID_ADAPTEC2_SCAMP,
  9178. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_571E, 0, 0, 0 },
  9179. { PCI_VENDOR_ID_ADAPTEC2, PCI_DEVICE_ID_ADAPTEC2_SCAMP,
  9180. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_571F, 0, 0,
  9181. IPR_USE_LONG_TRANSOP_TIMEOUT },
  9182. { PCI_VENDOR_ID_ADAPTEC2, PCI_DEVICE_ID_ADAPTEC2_SCAMP,
  9183. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_572F, 0, 0,
  9184. IPR_USE_LONG_TRANSOP_TIMEOUT },
  9185. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CROC_FPGA_E2,
  9186. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_57B5, 0, 0, 0 },
  9187. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CROC_FPGA_E2,
  9188. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_574D, 0, 0, 0 },
  9189. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CROC_FPGA_E2,
  9190. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_57B2, 0, 0, 0 },
  9191. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CROC_FPGA_E2,
  9192. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_57C0, 0, 0, 0 },
  9193. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CROC_FPGA_E2,
  9194. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_57C3, 0, 0, 0 },
  9195. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CROC_FPGA_E2,
  9196. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_57C4, 0, 0, 0 },
  9197. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CROCODILE,
  9198. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_57B4, 0, 0, 0 },
  9199. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CROCODILE,
  9200. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_57B1, 0, 0, 0 },
  9201. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CROCODILE,
  9202. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_57C6, 0, 0, 0 },
  9203. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CROCODILE,
  9204. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_57C8, 0, 0, 0 },
  9205. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CROCODILE,
  9206. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_57CE, 0, 0, 0 },
  9207. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CROCODILE,
  9208. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_57D5, 0, 0, 0 },
  9209. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CROCODILE,
  9210. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_57D6, 0, 0, 0 },
  9211. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CROCODILE,
  9212. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_57D7, 0, 0, 0 },
  9213. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CROCODILE,
  9214. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_57D8, 0, 0, 0 },
  9215. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CROCODILE,
  9216. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_57D9, 0, 0, 0 },
  9217. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CROCODILE,
  9218. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_57DA, 0, 0, 0 },
  9219. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CROCODILE,
  9220. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_57EB, 0, 0, 0 },
  9221. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CROCODILE,
  9222. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_57EC, 0, 0, 0 },
  9223. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CROCODILE,
  9224. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_57ED, 0, 0, 0 },
  9225. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CROCODILE,
  9226. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_57EE, 0, 0, 0 },
  9227. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CROCODILE,
  9228. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_57EF, 0, 0, 0 },
  9229. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CROCODILE,
  9230. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_57F0, 0, 0, 0 },
  9231. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CROCODILE,
  9232. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_2CCA, 0, 0, 0 },
  9233. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CROCODILE,
  9234. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_2CD2, 0, 0, 0 },
  9235. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CROCODILE,
  9236. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_2CCD, 0, 0, 0 },
  9237. { }
  9238. };
  9239. MODULE_DEVICE_TABLE(pci, ipr_pci_table);
  9240. static const struct pci_error_handlers ipr_err_handler = {
  9241. .error_detected = ipr_pci_error_detected,
  9242. .mmio_enabled = ipr_pci_mmio_enabled,
  9243. .slot_reset = ipr_pci_slot_reset,
  9244. };
  9245. static struct pci_driver ipr_driver = {
  9246. .name = IPR_NAME,
  9247. .id_table = ipr_pci_table,
  9248. .probe = ipr_probe,
  9249. .remove = ipr_remove,
  9250. .shutdown = ipr_shutdown,
  9251. .err_handler = &ipr_err_handler,
  9252. };
  9253. /**
  9254. * ipr_halt_done - Shutdown prepare completion
  9255. *
  9256. * Return value:
  9257. * none
  9258. **/
  9259. static void ipr_halt_done(struct ipr_cmnd *ipr_cmd)
  9260. {
  9261. list_add_tail(&ipr_cmd->queue, &ipr_cmd->hrrq->hrrq_free_q);
  9262. }
  9263. /**
  9264. * ipr_halt - Issue shutdown prepare to all adapters
  9265. *
  9266. * Return value:
  9267. * NOTIFY_OK on success / NOTIFY_DONE on failure
  9268. **/
  9269. static int ipr_halt(struct notifier_block *nb, ulong event, void *buf)
  9270. {
  9271. struct ipr_cmnd *ipr_cmd;
  9272. struct ipr_ioa_cfg *ioa_cfg;
  9273. unsigned long flags = 0, driver_lock_flags;
  9274. if (event != SYS_RESTART && event != SYS_HALT && event != SYS_POWER_OFF)
  9275. return NOTIFY_DONE;
  9276. spin_lock_irqsave(&ipr_driver_lock, driver_lock_flags);
  9277. list_for_each_entry(ioa_cfg, &ipr_ioa_head, queue) {
  9278. spin_lock_irqsave(ioa_cfg->host->host_lock, flags);
  9279. if (!ioa_cfg->hrrq[IPR_INIT_HRRQ].allow_cmds ||
  9280. (ipr_fast_reboot && event == SYS_RESTART && ioa_cfg->sis64)) {
  9281. spin_unlock_irqrestore(ioa_cfg->host->host_lock, flags);
  9282. continue;
  9283. }
  9284. ipr_cmd = ipr_get_free_ipr_cmnd(ioa_cfg);
  9285. ipr_cmd->ioarcb.res_handle = cpu_to_be32(IPR_IOA_RES_HANDLE);
  9286. ipr_cmd->ioarcb.cmd_pkt.request_type = IPR_RQTYPE_IOACMD;
  9287. ipr_cmd->ioarcb.cmd_pkt.cdb[0] = IPR_IOA_SHUTDOWN;
  9288. ipr_cmd->ioarcb.cmd_pkt.cdb[1] = IPR_SHUTDOWN_PREPARE_FOR_NORMAL;
  9289. ipr_do_req(ipr_cmd, ipr_halt_done, ipr_timeout, IPR_DEVICE_RESET_TIMEOUT);
  9290. spin_unlock_irqrestore(ioa_cfg->host->host_lock, flags);
  9291. }
  9292. spin_unlock_irqrestore(&ipr_driver_lock, driver_lock_flags);
  9293. return NOTIFY_OK;
  9294. }
  9295. static struct notifier_block ipr_notifier = {
  9296. ipr_halt, NULL, 0
  9297. };
  9298. /**
  9299. * ipr_init - Module entry point
  9300. *
  9301. * Return value:
  9302. * 0 on success / negative value on failure
  9303. **/
  9304. static int __init ipr_init(void)
  9305. {
  9306. ipr_info("IBM Power RAID SCSI Device Driver version: %s %s\n",
  9307. IPR_DRIVER_VERSION, IPR_DRIVER_DATE);
  9308. register_reboot_notifier(&ipr_notifier);
  9309. return pci_register_driver(&ipr_driver);
  9310. }
  9311. /**
  9312. * ipr_exit - Module unload
  9313. *
  9314. * Module unload entry point.
  9315. *
  9316. * Return value:
  9317. * none
  9318. **/
  9319. static void __exit ipr_exit(void)
  9320. {
  9321. unregister_reboot_notifier(&ipr_notifier);
  9322. pci_unregister_driver(&ipr_driver);
  9323. }
  9324. module_init(ipr_init);
  9325. module_exit(ipr_exit);