pas16.h 4.1 KB

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  1. /*
  2. * This driver adapted from Drew Eckhardt's Trantor T128 driver
  3. *
  4. * Copyright 1993, Drew Eckhardt
  5. * Visionary Computing
  6. * (Unix and Linux consulting and custom programming)
  7. * drew@colorado.edu
  8. * +1 (303) 666-5836
  9. *
  10. * ( Based on T128 - DISTRIBUTION RELEASE 3. )
  11. *
  12. * Modified to work with the Pro Audio Spectrum/Studio 16
  13. * by John Weidman.
  14. *
  15. *
  16. * For more information, please consult
  17. *
  18. * Media Vision
  19. * (510) 770-8600
  20. * (800) 348-7116
  21. */
  22. #ifndef PAS16_H
  23. #define PAS16_H
  24. #define PDEBUG_INIT 0x1
  25. #define PDEBUG_TRANSFER 0x2
  26. #define PAS16_DEFAULT_BASE_1 0x388
  27. #define PAS16_DEFAULT_BASE_2 0x384
  28. #define PAS16_DEFAULT_BASE_3 0x38c
  29. #define PAS16_DEFAULT_BASE_4 0x288
  30. #define PAS16_DEFAULT_BOARD_1_IRQ 10
  31. #define PAS16_DEFAULT_BOARD_2_IRQ 12
  32. #define PAS16_DEFAULT_BOARD_3_IRQ 14
  33. #define PAS16_DEFAULT_BOARD_4_IRQ 15
  34. /*
  35. * The Pro Audio Spectrum boards are I/O mapped. They use a Zilog 5380
  36. * SCSI controller, which is the equivalent of NCR's 5380. "Pseudo-DMA"
  37. * architecture is used, where a PAL drives the DMA signals on the 5380
  38. * allowing fast, blind transfers with proper handshaking.
  39. */
  40. /* The Time-out Counter register is used to safe-guard against a stuck
  41. * bus (in the case of RDY driven handshake) or a stuck byte (if 16-Bit
  42. * DMA conversion is used). The counter uses a 28.224MHz clock
  43. * divided by 14 as its clock source. In the case of a stuck byte in
  44. * the holding register, an interrupt is generated (and mixed with the
  45. * one with the drive) using the CD-ROM interrupt pointer.
  46. */
  47. #define P_TIMEOUT_COUNTER_REG 0x4000
  48. #define P_TC_DISABLE 0x80 /* Set to 0 to enable timeout int. */
  49. /* Bits D6-D0 contain timeout count */
  50. #define P_TIMEOUT_STATUS_REG_OFFSET 0x4001
  51. #define P_TS_TIM 0x80 /* check timeout status */
  52. /* Bits D6-D4 N/U */
  53. #define P_TS_ARM_DRQ_INT 0x08 /* Arm DRQ Int. When set high,
  54. * the next rising edge will
  55. * cause a CD-ROM interrupt.
  56. * When set low, the interrupt
  57. * will be cleared. There is
  58. * no status available for
  59. * this interrupt.
  60. */
  61. #define P_TS_ENABLE_TO_ERR_INTERRUPT /* Enable timeout error int. */
  62. #define P_TS_ENABLE_WAIT /* Enable Wait */
  63. #define P_TS_CT 0x01 /* clear timeout. Note: writing
  64. * to this register clears the
  65. * timeout error int. or status
  66. */
  67. /*
  68. * The data register reads/writes to/from the 5380 in pseudo-DMA mode
  69. */
  70. #define P_DATA_REG_OFFSET 0x5c00 /* rw */
  71. #define P_STATUS_REG_OFFSET 0x5c01 /* ro */
  72. #define P_ST_RDY 0x80 /* 5380 DDRQ Status */
  73. #define P_IRQ_STATUS 0x5c03
  74. #define P_IS_IRQ 0x80 /* DIRQ status */
  75. #define PCB_CONFIG 0x803
  76. #define MASTER_ADDRESS_PTR 0x9a01 /* Fixed position - no relo */
  77. #define SYS_CONFIG_4 0x8003
  78. #define WAIT_STATE 0xbc00
  79. #define OPERATION_MODE_1 0xec03
  80. #define IO_CONFIG_3 0xf002
  81. #ifndef ASM
  82. #ifndef CMD_PER_LUN
  83. #define CMD_PER_LUN 2
  84. #endif
  85. #ifndef CAN_QUEUE
  86. #define CAN_QUEUE 32
  87. #endif
  88. #define NCR5380_implementation_fields \
  89. volatile unsigned short io_port
  90. #define NCR5380_local_declare() \
  91. volatile unsigned short io_port
  92. #define NCR5380_setup(instance) \
  93. io_port = (instance)->io_port
  94. #define PAS16_io_port(reg) ( io_port + pas16_offset[(reg)] )
  95. #if !(PDEBUG & PDEBUG_TRANSFER)
  96. #define NCR5380_read(reg) ( inb(PAS16_io_port(reg)) )
  97. #define NCR5380_write(reg, value) ( outb((value),PAS16_io_port(reg)) )
  98. #else
  99. #define NCR5380_read(reg) \
  100. (((unsigned char) printk("scsi%d : read register %d at io_port %04x\n"\
  101. , instance->hostno, (reg), PAS16_io_port(reg))), inb( PAS16_io_port(reg)) )
  102. #define NCR5380_write(reg, value) \
  103. (printk("scsi%d : write %02x to register %d at io_port %04x\n", \
  104. instance->hostno, (value), (reg), PAS16_io_port(reg)), \
  105. outb( (value),PAS16_io_port(reg) ) )
  106. #endif
  107. #define NCR5380_intr pas16_intr
  108. #define do_NCR5380_intr do_pas16_intr
  109. #define NCR5380_queue_command pas16_queue_command
  110. #define NCR5380_abort pas16_abort
  111. #define NCR5380_bus_reset pas16_bus_reset
  112. #define NCR5380_info pas16_info
  113. #define NCR5380_show_info pas16_show_info
  114. #define NCR5380_write_info pas16_write_info
  115. /* 15 14 12 10 7 5 3
  116. 1101 0100 1010 1000 */
  117. #define PAS16_IRQS 0xd4a8
  118. #endif /* ndef ASM */
  119. #endif /* PAS16_H */