ql4_nvram.c 6.1 KB

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  1. /*
  2. * QLogic iSCSI HBA Driver
  3. * Copyright (c) 2003-2013 QLogic Corporation
  4. *
  5. * See LICENSE.qla4xxx for copyright and licensing details.
  6. */
  7. #include "ql4_def.h"
  8. #include "ql4_glbl.h"
  9. #include "ql4_dbg.h"
  10. #include "ql4_inline.h"
  11. static inline void eeprom_cmd(uint32_t cmd, struct scsi_qla_host *ha)
  12. {
  13. writel(cmd, isp_nvram(ha));
  14. readl(isp_nvram(ha));
  15. udelay(1);
  16. }
  17. static inline int eeprom_size(struct scsi_qla_host *ha)
  18. {
  19. return is_qla4010(ha) ? FM93C66A_SIZE_16 : FM93C86A_SIZE_16;
  20. }
  21. static inline int eeprom_no_addr_bits(struct scsi_qla_host *ha)
  22. {
  23. return is_qla4010(ha) ? FM93C56A_NO_ADDR_BITS_16 :
  24. FM93C86A_NO_ADDR_BITS_16 ;
  25. }
  26. static inline int eeprom_no_data_bits(struct scsi_qla_host *ha)
  27. {
  28. return FM93C56A_DATA_BITS_16;
  29. }
  30. static int fm93c56a_select(struct scsi_qla_host * ha)
  31. {
  32. DEBUG5(printk(KERN_ERR "fm93c56a_select:\n"));
  33. ha->eeprom_cmd_data = AUBURN_EEPROM_CS_1 | 0x000f0000;
  34. eeprom_cmd(ha->eeprom_cmd_data, ha);
  35. return 1;
  36. }
  37. static int fm93c56a_cmd(struct scsi_qla_host * ha, int cmd, int addr)
  38. {
  39. int i;
  40. int mask;
  41. int dataBit;
  42. int previousBit;
  43. /* Clock in a zero, then do the start bit. */
  44. eeprom_cmd(ha->eeprom_cmd_data | AUBURN_EEPROM_DO_1, ha);
  45. eeprom_cmd(ha->eeprom_cmd_data | AUBURN_EEPROM_DO_1 |
  46. AUBURN_EEPROM_CLK_RISE, ha);
  47. eeprom_cmd(ha->eeprom_cmd_data | AUBURN_EEPROM_DO_1 |
  48. AUBURN_EEPROM_CLK_FALL, ha);
  49. mask = 1 << (FM93C56A_CMD_BITS - 1);
  50. /* Force the previous data bit to be different. */
  51. previousBit = 0xffff;
  52. for (i = 0; i < FM93C56A_CMD_BITS; i++) {
  53. dataBit =
  54. (cmd & mask) ? AUBURN_EEPROM_DO_1 : AUBURN_EEPROM_DO_0;
  55. if (previousBit != dataBit) {
  56. /*
  57. * If the bit changed, then change the DO state to
  58. * match.
  59. */
  60. eeprom_cmd(ha->eeprom_cmd_data | dataBit, ha);
  61. previousBit = dataBit;
  62. }
  63. eeprom_cmd(ha->eeprom_cmd_data | dataBit |
  64. AUBURN_EEPROM_CLK_RISE, ha);
  65. eeprom_cmd(ha->eeprom_cmd_data | dataBit |
  66. AUBURN_EEPROM_CLK_FALL, ha);
  67. cmd = cmd << 1;
  68. }
  69. mask = 1 << (eeprom_no_addr_bits(ha) - 1);
  70. /* Force the previous data bit to be different. */
  71. previousBit = 0xffff;
  72. for (i = 0; i < eeprom_no_addr_bits(ha); i++) {
  73. dataBit = addr & mask ? AUBURN_EEPROM_DO_1 :
  74. AUBURN_EEPROM_DO_0;
  75. if (previousBit != dataBit) {
  76. /*
  77. * If the bit changed, then change the DO state to
  78. * match.
  79. */
  80. eeprom_cmd(ha->eeprom_cmd_data | dataBit, ha);
  81. previousBit = dataBit;
  82. }
  83. eeprom_cmd(ha->eeprom_cmd_data | dataBit |
  84. AUBURN_EEPROM_CLK_RISE, ha);
  85. eeprom_cmd(ha->eeprom_cmd_data | dataBit |
  86. AUBURN_EEPROM_CLK_FALL, ha);
  87. addr = addr << 1;
  88. }
  89. return 1;
  90. }
  91. static int fm93c56a_deselect(struct scsi_qla_host * ha)
  92. {
  93. ha->eeprom_cmd_data = AUBURN_EEPROM_CS_0 | 0x000f0000;
  94. eeprom_cmd(ha->eeprom_cmd_data, ha);
  95. return 1;
  96. }
  97. static int fm93c56a_datain(struct scsi_qla_host * ha, unsigned short *value)
  98. {
  99. int i;
  100. int data = 0;
  101. int dataBit;
  102. /* Read the data bits
  103. * The first bit is a dummy. Clock right over it. */
  104. for (i = 0; i < eeprom_no_data_bits(ha); i++) {
  105. eeprom_cmd(ha->eeprom_cmd_data |
  106. AUBURN_EEPROM_CLK_RISE, ha);
  107. eeprom_cmd(ha->eeprom_cmd_data |
  108. AUBURN_EEPROM_CLK_FALL, ha);
  109. dataBit = (readw(isp_nvram(ha)) & AUBURN_EEPROM_DI_1) ? 1 : 0;
  110. data = (data << 1) | dataBit;
  111. }
  112. *value = data;
  113. return 1;
  114. }
  115. static int eeprom_readword(int eepromAddr, u16 * value,
  116. struct scsi_qla_host * ha)
  117. {
  118. fm93c56a_select(ha);
  119. fm93c56a_cmd(ha, FM93C56A_READ, eepromAddr);
  120. fm93c56a_datain(ha, value);
  121. fm93c56a_deselect(ha);
  122. return 1;
  123. }
  124. /* Hardware_lock must be set before calling */
  125. u16 rd_nvram_word(struct scsi_qla_host * ha, int offset)
  126. {
  127. u16 val = 0;
  128. /* NOTE: NVRAM uses half-word addresses */
  129. eeprom_readword(offset, &val, ha);
  130. return val;
  131. }
  132. u8 rd_nvram_byte(struct scsi_qla_host *ha, int offset)
  133. {
  134. u16 val = 0;
  135. u8 rval = 0;
  136. int index = 0;
  137. if (offset & 0x1)
  138. index = (offset - 1) / 2;
  139. else
  140. index = offset / 2;
  141. val = le16_to_cpu(rd_nvram_word(ha, index));
  142. if (offset & 0x1)
  143. rval = (u8)((val & 0xff00) >> 8);
  144. else
  145. rval = (u8)((val & 0x00ff));
  146. return rval;
  147. }
  148. int qla4xxx_is_nvram_configuration_valid(struct scsi_qla_host * ha)
  149. {
  150. int status = QLA_ERROR;
  151. uint16_t checksum = 0;
  152. uint32_t index;
  153. unsigned long flags;
  154. spin_lock_irqsave(&ha->hardware_lock, flags);
  155. for (index = 0; index < eeprom_size(ha); index++)
  156. checksum += rd_nvram_word(ha, index);
  157. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  158. if (checksum == 0)
  159. status = QLA_SUCCESS;
  160. return status;
  161. }
  162. /*************************************************************************
  163. *
  164. * Hardware Semaphore routines
  165. *
  166. *************************************************************************/
  167. int ql4xxx_sem_spinlock(struct scsi_qla_host * ha, u32 sem_mask, u32 sem_bits)
  168. {
  169. uint32_t value;
  170. unsigned long flags;
  171. unsigned int seconds = 30;
  172. DEBUG2(printk("scsi%ld : Trying to get SEM lock - mask= 0x%x, code = "
  173. "0x%x\n", ha->host_no, sem_mask, sem_bits));
  174. do {
  175. spin_lock_irqsave(&ha->hardware_lock, flags);
  176. writel((sem_mask | sem_bits), isp_semaphore(ha));
  177. value = readw(isp_semaphore(ha));
  178. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  179. if ((value & (sem_mask >> 16)) == sem_bits) {
  180. DEBUG2(printk("scsi%ld : Got SEM LOCK - mask= 0x%x, "
  181. "code = 0x%x\n", ha->host_no,
  182. sem_mask, sem_bits));
  183. return QLA_SUCCESS;
  184. }
  185. ssleep(1);
  186. } while (--seconds);
  187. return QLA_ERROR;
  188. }
  189. void ql4xxx_sem_unlock(struct scsi_qla_host * ha, u32 sem_mask)
  190. {
  191. unsigned long flags;
  192. spin_lock_irqsave(&ha->hardware_lock, flags);
  193. writel(sem_mask, isp_semaphore(ha));
  194. readl(isp_semaphore(ha));
  195. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  196. DEBUG2(printk("scsi%ld : UNLOCK SEM - mask= 0x%x\n", ha->host_no,
  197. sem_mask));
  198. }
  199. int ql4xxx_sem_lock(struct scsi_qla_host * ha, u32 sem_mask, u32 sem_bits)
  200. {
  201. uint32_t value;
  202. unsigned long flags;
  203. spin_lock_irqsave(&ha->hardware_lock, flags);
  204. writel((sem_mask | sem_bits), isp_semaphore(ha));
  205. value = readw(isp_semaphore(ha));
  206. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  207. if ((value & (sem_mask >> 16)) == sem_bits) {
  208. DEBUG2(printk("scsi%ld : Got SEM LOCK - mask= 0x%x, code = "
  209. "0x%x, sema code=0x%x\n", ha->host_no,
  210. sem_mask, sem_bits, value));
  211. return 1;
  212. }
  213. return 0;
  214. }