odm.c 49 KB

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  1. /******************************************************************************
  2. *
  3. * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
  4. *
  5. * This program is free software; you can redistribute it and/or modify it
  6. * under the terms of version 2 of the GNU General Public License as
  7. * published by the Free Software Foundation.
  8. *
  9. * This program is distributed in the hope that it will be useful, but WITHOUT
  10. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  12. * more details.
  13. *
  14. * You should have received a copy of the GNU General Public License along with
  15. * this program; if not, write to the Free Software Foundation, Inc.,
  16. * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  17. *
  18. *
  19. ******************************************************************************/
  20. /* include files */
  21. #include "odm_precomp.h"
  22. #include "phy.h"
  23. u32 GlobalDebugLevel;
  24. static const u16 dB_Invert_Table[8][12] = {
  25. {1, 1, 1, 2, 2, 2, 2, 3, 3, 3, 4, 4},
  26. {4, 5, 6, 6, 7, 8, 9, 10, 11, 13, 14, 16},
  27. {18, 20, 22, 25, 28, 32, 35, 40, 45, 50, 56, 63},
  28. {71, 79, 89, 100, 112, 126, 141, 158, 178, 200, 224, 251},
  29. {282, 316, 355, 398, 447, 501, 562, 631, 708, 794, 891, 1000},
  30. {1122, 1259, 1413, 1585, 1778, 1995, 2239, 2512, 2818, 3162, 3548, 3981},
  31. {4467, 5012, 5623, 6310, 7079, 7943, 8913, 10000, 11220, 12589, 14125, 15849},
  32. {17783, 19953, 22387, 25119, 28184, 31623, 35481, 39811, 44668, 50119, 56234, 65535}
  33. };
  34. /* avoid to warn in FreeBSD ==> To DO modify */
  35. static u32 EDCAParam[HT_IOT_PEER_MAX][3] = {
  36. /* UL DL */
  37. {0x5ea42b, 0x5ea42b, 0x5ea42b}, /* 0:unknown AP */
  38. {0xa44f, 0x5ea44f, 0x5e431c}, /* 1:realtek AP */
  39. {0x5ea42b, 0x5ea42b, 0x5ea42b}, /* 2:unknown AP => realtek_92SE */
  40. {0x5ea32b, 0x5ea42b, 0x5e4322}, /* 3:broadcom AP */
  41. {0x5ea422, 0x00a44f, 0x00a44f}, /* 4:ralink AP */
  42. {0x5ea322, 0x00a630, 0x00a44f}, /* 5:atheros AP */
  43. {0x5e4322, 0x5e4322, 0x5e4322},/* 6:cisco AP */
  44. {0x5ea44f, 0x00a44f, 0x5ea42b}, /* 8:marvell AP */
  45. {0x5ea42b, 0x5ea42b, 0x5ea42b}, /* 10:unknown AP=> 92U AP */
  46. {0x5ea42b, 0xa630, 0x5e431c}, /* 11:airgocap AP */
  47. };
  48. /* Global var */
  49. u32 OFDMSwingTable[OFDM_TABLE_SIZE_92D] = {
  50. 0x7f8001fe, /* 0, +6.0dB */
  51. 0x788001e2, /* 1, +5.5dB */
  52. 0x71c001c7, /* 2, +5.0dB */
  53. 0x6b8001ae, /* 3, +4.5dB */
  54. 0x65400195, /* 4, +4.0dB */
  55. 0x5fc0017f, /* 5, +3.5dB */
  56. 0x5a400169, /* 6, +3.0dB */
  57. 0x55400155, /* 7, +2.5dB */
  58. 0x50800142, /* 8, +2.0dB */
  59. 0x4c000130, /* 9, +1.5dB */
  60. 0x47c0011f, /* 10, +1.0dB */
  61. 0x43c0010f, /* 11, +0.5dB */
  62. 0x40000100, /* 12, +0dB */
  63. 0x3c8000f2, /* 13, -0.5dB */
  64. 0x390000e4, /* 14, -1.0dB */
  65. 0x35c000d7, /* 15, -1.5dB */
  66. 0x32c000cb, /* 16, -2.0dB */
  67. 0x300000c0, /* 17, -2.5dB */
  68. 0x2d4000b5, /* 18, -3.0dB */
  69. 0x2ac000ab, /* 19, -3.5dB */
  70. 0x288000a2, /* 20, -4.0dB */
  71. 0x26000098, /* 21, -4.5dB */
  72. 0x24000090, /* 22, -5.0dB */
  73. 0x22000088, /* 23, -5.5dB */
  74. 0x20000080, /* 24, -6.0dB */
  75. 0x1e400079, /* 25, -6.5dB */
  76. 0x1c800072, /* 26, -7.0dB */
  77. 0x1b00006c, /* 27. -7.5dB */
  78. 0x19800066, /* 28, -8.0dB */
  79. 0x18000060, /* 29, -8.5dB */
  80. 0x16c0005b, /* 30, -9.0dB */
  81. 0x15800056, /* 31, -9.5dB */
  82. 0x14400051, /* 32, -10.0dB */
  83. 0x1300004c, /* 33, -10.5dB */
  84. 0x12000048, /* 34, -11.0dB */
  85. 0x11000044, /* 35, -11.5dB */
  86. 0x10000040, /* 36, -12.0dB */
  87. 0x0f00003c,/* 37, -12.5dB */
  88. 0x0e400039,/* 38, -13.0dB */
  89. 0x0d800036,/* 39, -13.5dB */
  90. 0x0cc00033,/* 40, -14.0dB */
  91. 0x0c000030,/* 41, -14.5dB */
  92. 0x0b40002d,/* 42, -15.0dB */
  93. };
  94. u8 CCKSwingTable_Ch1_Ch13[CCK_TABLE_SIZE][8] = {
  95. {0x36, 0x35, 0x2e, 0x25, 0x1c, 0x12, 0x09, 0x04}, /* 0, +0dB */
  96. {0x33, 0x32, 0x2b, 0x23, 0x1a, 0x11, 0x08, 0x04}, /* 1, -0.5dB */
  97. {0x30, 0x2f, 0x29, 0x21, 0x19, 0x10, 0x08, 0x03}, /* 2, -1.0dB */
  98. {0x2d, 0x2d, 0x27, 0x1f, 0x18, 0x0f, 0x08, 0x03}, /* 3, -1.5dB */
  99. {0x2b, 0x2a, 0x25, 0x1e, 0x16, 0x0e, 0x07, 0x03}, /* 4, -2.0dB */
  100. {0x28, 0x28, 0x22, 0x1c, 0x15, 0x0d, 0x07, 0x03}, /* 5, -2.5dB */
  101. {0x26, 0x25, 0x21, 0x1b, 0x14, 0x0d, 0x06, 0x03}, /* 6, -3.0dB */
  102. {0x24, 0x23, 0x1f, 0x19, 0x13, 0x0c, 0x06, 0x03}, /* 7, -3.5dB */
  103. {0x22, 0x21, 0x1d, 0x18, 0x11, 0x0b, 0x06, 0x02}, /* 8, -4.0dB */
  104. {0x20, 0x20, 0x1b, 0x16, 0x11, 0x08, 0x05, 0x02}, /* 9, -4.5dB */
  105. {0x1f, 0x1e, 0x1a, 0x15, 0x10, 0x0a, 0x05, 0x02}, /* 10, -5.0dB */
  106. {0x1d, 0x1c, 0x18, 0x14, 0x0f, 0x0a, 0x05, 0x02}, /* 11, -5.5dB */
  107. {0x1b, 0x1a, 0x17, 0x13, 0x0e, 0x09, 0x04, 0x02}, /* 12, -6.0dB */
  108. {0x1a, 0x19, 0x16, 0x12, 0x0d, 0x09, 0x04, 0x02}, /* 13, -6.5dB */
  109. {0x18, 0x17, 0x15, 0x11, 0x0c, 0x08, 0x04, 0x02}, /* 14, -7.0dB */
  110. {0x17, 0x16, 0x13, 0x10, 0x0c, 0x08, 0x04, 0x02}, /* 15, -7.5dB */
  111. {0x16, 0x15, 0x12, 0x0f, 0x0b, 0x07, 0x04, 0x01}, /* 16, -8.0dB */
  112. {0x14, 0x14, 0x11, 0x0e, 0x0b, 0x07, 0x03, 0x02}, /* 17, -8.5dB */
  113. {0x13, 0x13, 0x10, 0x0d, 0x0a, 0x06, 0x03, 0x01}, /* 18, -9.0dB */
  114. {0x12, 0x12, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01}, /* 19, -9.5dB */
  115. {0x11, 0x11, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01}, /* 20, -10.0dB */
  116. {0x10, 0x10, 0x0e, 0x0b, 0x08, 0x05, 0x03, 0x01}, /* 21, -10.5dB */
  117. {0x0f, 0x0f, 0x0d, 0x0b, 0x08, 0x05, 0x03, 0x01}, /* 22, -11.0dB */
  118. {0x0e, 0x0e, 0x0c, 0x0a, 0x08, 0x05, 0x02, 0x01}, /* 23, -11.5dB */
  119. {0x0d, 0x0d, 0x0c, 0x0a, 0x07, 0x05, 0x02, 0x01}, /* 24, -12.0dB */
  120. {0x0d, 0x0c, 0x0b, 0x09, 0x07, 0x04, 0x02, 0x01}, /* 25, -12.5dB */
  121. {0x0c, 0x0c, 0x0a, 0x09, 0x06, 0x04, 0x02, 0x01}, /* 26, -13.0dB */
  122. {0x0b, 0x0b, 0x0a, 0x08, 0x06, 0x04, 0x02, 0x01}, /* 27, -13.5dB */
  123. {0x0b, 0x0a, 0x09, 0x08, 0x06, 0x04, 0x02, 0x01}, /* 28, -14.0dB */
  124. {0x0a, 0x0a, 0x09, 0x07, 0x05, 0x03, 0x02, 0x01}, /* 29, -14.5dB */
  125. {0x0a, 0x09, 0x08, 0x07, 0x05, 0x03, 0x02, 0x01}, /* 30, -15.0dB */
  126. {0x09, 0x09, 0x08, 0x06, 0x05, 0x03, 0x01, 0x01}, /* 31, -15.5dB */
  127. {0x09, 0x08, 0x07, 0x06, 0x04, 0x03, 0x01, 0x01} /* 32, -16.0dB */
  128. };
  129. u8 CCKSwingTable_Ch14[CCK_TABLE_SIZE][8] = {
  130. {0x36, 0x35, 0x2e, 0x1b, 0x00, 0x00, 0x00, 0x00}, /* 0, +0dB */
  131. {0x33, 0x32, 0x2b, 0x19, 0x00, 0x00, 0x00, 0x00}, /* 1, -0.5dB */
  132. {0x30, 0x2f, 0x29, 0x18, 0x00, 0x00, 0x00, 0x00}, /* 2, -1.0dB */
  133. {0x2d, 0x2d, 0x17, 0x17, 0x00, 0x00, 0x00, 0x00}, /* 3, -1.5dB */
  134. {0x2b, 0x2a, 0x25, 0x15, 0x00, 0x00, 0x00, 0x00}, /* 4, -2.0dB */
  135. {0x28, 0x28, 0x24, 0x14, 0x00, 0x00, 0x00, 0x00}, /* 5, -2.5dB */
  136. {0x26, 0x25, 0x21, 0x13, 0x00, 0x00, 0x00, 0x00}, /* 6, -3.0dB */
  137. {0x24, 0x23, 0x1f, 0x12, 0x00, 0x00, 0x00, 0x00}, /* 7, -3.5dB */
  138. {0x22, 0x21, 0x1d, 0x11, 0x00, 0x00, 0x00, 0x00}, /* 8, -4.0dB */
  139. {0x20, 0x20, 0x1b, 0x10, 0x00, 0x00, 0x00, 0x00}, /* 9, -4.5dB */
  140. {0x1f, 0x1e, 0x1a, 0x0f, 0x00, 0x00, 0x00, 0x00}, /* 10, -5.0dB */
  141. {0x1d, 0x1c, 0x18, 0x0e, 0x00, 0x00, 0x00, 0x00}, /* 11, -5.5dB */
  142. {0x1b, 0x1a, 0x17, 0x0e, 0x00, 0x00, 0x00, 0x00}, /* 12, -6.0dB */
  143. {0x1a, 0x19, 0x16, 0x0d, 0x00, 0x00, 0x00, 0x00}, /* 13, -6.5dB */
  144. {0x18, 0x17, 0x15, 0x0c, 0x00, 0x00, 0x00, 0x00}, /* 14, -7.0dB */
  145. {0x17, 0x16, 0x13, 0x0b, 0x00, 0x00, 0x00, 0x00}, /* 15, -7.5dB */
  146. {0x16, 0x15, 0x12, 0x0b, 0x00, 0x00, 0x00, 0x00}, /* 16, -8.0dB */
  147. {0x14, 0x14, 0x11, 0x0a, 0x00, 0x00, 0x00, 0x00}, /* 17, -8.5dB */
  148. {0x13, 0x13, 0x10, 0x0a, 0x00, 0x00, 0x00, 0x00}, /* 18, -9.0dB */
  149. {0x12, 0x12, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00}, /* 19, -9.5dB */
  150. {0x11, 0x11, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00}, /* 20, -10.0dB */
  151. {0x10, 0x10, 0x0e, 0x08, 0x00, 0x00, 0x00, 0x00}, /* 21, -10.5dB */
  152. {0x0f, 0x0f, 0x0d, 0x08, 0x00, 0x00, 0x00, 0x00}, /* 22, -11.0dB */
  153. {0x0e, 0x0e, 0x0c, 0x07, 0x00, 0x00, 0x00, 0x00}, /* 23, -11.5dB */
  154. {0x0d, 0x0d, 0x0c, 0x07, 0x00, 0x00, 0x00, 0x00}, /* 24, -12.0dB */
  155. {0x0d, 0x0c, 0x0b, 0x06, 0x00, 0x00, 0x00, 0x00}, /* 25, -12.5dB */
  156. {0x0c, 0x0c, 0x0a, 0x06, 0x00, 0x00, 0x00, 0x00}, /* 26, -13.0dB */
  157. {0x0b, 0x0b, 0x0a, 0x06, 0x00, 0x00, 0x00, 0x00}, /* 27, -13.5dB */
  158. {0x0b, 0x0a, 0x09, 0x05, 0x00, 0x00, 0x00, 0x00}, /* 28, -14.0dB */
  159. {0x0a, 0x0a, 0x09, 0x05, 0x00, 0x00, 0x00, 0x00}, /* 29, -14.5dB */
  160. {0x0a, 0x09, 0x08, 0x05, 0x00, 0x00, 0x00, 0x00}, /* 30, -15.0dB */
  161. {0x09, 0x09, 0x08, 0x05, 0x00, 0x00, 0x00, 0x00}, /* 31, -15.5dB */
  162. {0x09, 0x08, 0x07, 0x04, 0x00, 0x00, 0x00, 0x00} /* 32, -16.0dB */
  163. };
  164. #define RxDefaultAnt1 0x65a9
  165. #define RxDefaultAnt2 0x569a
  166. void ODM_InitDebugSetting(struct odm_dm_struct *pDM_Odm)
  167. {
  168. pDM_Odm->DebugLevel = ODM_DBG_TRACE;
  169. pDM_Odm->DebugComponents = 0;
  170. }
  171. /* 3 Export Interface */
  172. /* 2011/09/21 MH Add to describe different team necessary resource allocate?? */
  173. void ODM_DMInit(struct odm_dm_struct *pDM_Odm)
  174. {
  175. /* 2012.05.03 Luke: For all IC series */
  176. odm_CommonInfoSelfInit(pDM_Odm);
  177. odm_CmnInfoInit_Debug(pDM_Odm);
  178. odm_DIGInit(pDM_Odm);
  179. odm_RateAdaptiveMaskInit(pDM_Odm);
  180. odm_DynamicTxPowerInit(pDM_Odm);
  181. odm_TXPowerTrackingInit(pDM_Odm);
  182. ODM_EdcaTurboInit(pDM_Odm);
  183. ODM_RAInfo_Init_all(pDM_Odm);
  184. if ((pDM_Odm->AntDivType == CG_TRX_HW_ANTDIV) ||
  185. (pDM_Odm->AntDivType == CGCS_RX_HW_ANTDIV) ||
  186. (pDM_Odm->AntDivType == CG_TRX_SMART_ANTDIV))
  187. odm_InitHybridAntDiv(pDM_Odm);
  188. }
  189. /* 2011/09/20 MH This is the entry pointer for all team to execute HW out source DM. */
  190. /* You can not add any dummy function here, be care, you can only use DM structure */
  191. /* to perform any new ODM_DM. */
  192. void ODM_DMWatchdog(struct odm_dm_struct *pDM_Odm)
  193. {
  194. /* 2012.05.03 Luke: For all IC series */
  195. odm_CmnInfoHook_Debug(pDM_Odm);
  196. odm_CmnInfoUpdate_Debug(pDM_Odm);
  197. odm_CommonInfoSelfUpdate(pDM_Odm);
  198. odm_FalseAlarmCounterStatistics(pDM_Odm);
  199. odm_RSSIMonitorCheck(pDM_Odm);
  200. /* Fix Leave LPS issue */
  201. odm_DIG(pDM_Odm);
  202. odm_CCKPacketDetectionThresh(pDM_Odm);
  203. if (*(pDM_Odm->pbPowerSaving))
  204. return;
  205. odm_RefreshRateAdaptiveMask(pDM_Odm);
  206. if ((pDM_Odm->AntDivType == CG_TRX_HW_ANTDIV) ||
  207. (pDM_Odm->AntDivType == CGCS_RX_HW_ANTDIV) ||
  208. (pDM_Odm->AntDivType == CG_TRX_SMART_ANTDIV))
  209. odm_HwAntDiv(pDM_Odm);
  210. ODM_TXPowerTrackingCheck(pDM_Odm);
  211. odm_EdcaTurboCheck(pDM_Odm);
  212. }
  213. /* Init /.. Fixed HW value. Only init time. */
  214. void ODM_CmnInfoInit(struct odm_dm_struct *pDM_Odm, enum odm_common_info_def CmnInfo, u32 Value)
  215. {
  216. /* This section is used for init value */
  217. switch (CmnInfo) {
  218. /* Fixed ODM value. */
  219. case ODM_CMNINFO_ABILITY:
  220. pDM_Odm->SupportAbility = (u32)Value;
  221. break;
  222. case ODM_CMNINFO_PLATFORM:
  223. pDM_Odm->SupportPlatform = (u8)Value;
  224. break;
  225. case ODM_CMNINFO_INTERFACE:
  226. pDM_Odm->SupportInterface = (u8)Value;
  227. break;
  228. case ODM_CMNINFO_MP_TEST_CHIP:
  229. pDM_Odm->bIsMPChip = (u8)Value;
  230. break;
  231. case ODM_CMNINFO_IC_TYPE:
  232. pDM_Odm->SupportICType = Value;
  233. break;
  234. case ODM_CMNINFO_CUT_VER:
  235. pDM_Odm->CutVersion = (u8)Value;
  236. break;
  237. case ODM_CMNINFO_FAB_VER:
  238. pDM_Odm->FabVersion = (u8)Value;
  239. break;
  240. case ODM_CMNINFO_RF_TYPE:
  241. pDM_Odm->RFType = (u8)Value;
  242. break;
  243. case ODM_CMNINFO_RF_ANTENNA_TYPE:
  244. pDM_Odm->AntDivType = (u8)Value;
  245. break;
  246. case ODM_CMNINFO_BOARD_TYPE:
  247. pDM_Odm->BoardType = (u8)Value;
  248. break;
  249. case ODM_CMNINFO_EXT_LNA:
  250. pDM_Odm->ExtLNA = (u8)Value;
  251. break;
  252. case ODM_CMNINFO_EXT_PA:
  253. pDM_Odm->ExtPA = (u8)Value;
  254. break;
  255. case ODM_CMNINFO_EXT_TRSW:
  256. pDM_Odm->ExtTRSW = (u8)Value;
  257. break;
  258. case ODM_CMNINFO_PATCH_ID:
  259. pDM_Odm->PatchID = (u8)Value;
  260. break;
  261. case ODM_CMNINFO_BINHCT_TEST:
  262. pDM_Odm->bInHctTest = (bool)Value;
  263. break;
  264. case ODM_CMNINFO_BWIFI_TEST:
  265. pDM_Odm->bWIFITest = (bool)Value;
  266. break;
  267. case ODM_CMNINFO_SMART_CONCURRENT:
  268. pDM_Odm->bDualMacSmartConcurrent = (bool)Value;
  269. break;
  270. /* To remove the compiler warning, must add an empty default statement to handle the other values. */
  271. default:
  272. /* do nothing */
  273. break;
  274. }
  275. /* Tx power tracking BB swing table. */
  276. /* The base index = 12. +((12-n)/2)dB 13~?? = decrease tx pwr by -((n-12)/2)dB */
  277. pDM_Odm->BbSwingIdxOfdm = 12; /* Set defalut value as index 12. */
  278. pDM_Odm->BbSwingIdxOfdmCurrent = 12;
  279. pDM_Odm->BbSwingFlagOfdm = false;
  280. }
  281. void ODM_CmnInfoHook(struct odm_dm_struct *pDM_Odm, enum odm_common_info_def CmnInfo, void *pValue)
  282. {
  283. /* */
  284. /* Hook call by reference pointer. */
  285. /* */
  286. switch (CmnInfo) {
  287. /* Dynamic call by reference pointer. */
  288. case ODM_CMNINFO_MAC_PHY_MODE:
  289. pDM_Odm->pMacPhyMode = (u8 *)pValue;
  290. break;
  291. case ODM_CMNINFO_TX_UNI:
  292. pDM_Odm->pNumTxBytesUnicast = (u64 *)pValue;
  293. break;
  294. case ODM_CMNINFO_RX_UNI:
  295. pDM_Odm->pNumRxBytesUnicast = (u64 *)pValue;
  296. break;
  297. case ODM_CMNINFO_WM_MODE:
  298. pDM_Odm->pWirelessMode = (u8 *)pValue;
  299. break;
  300. case ODM_CMNINFO_BAND:
  301. pDM_Odm->pBandType = (u8 *)pValue;
  302. break;
  303. case ODM_CMNINFO_SEC_CHNL_OFFSET:
  304. pDM_Odm->pSecChOffset = (u8 *)pValue;
  305. break;
  306. case ODM_CMNINFO_SEC_MODE:
  307. pDM_Odm->pSecurity = (u8 *)pValue;
  308. break;
  309. case ODM_CMNINFO_BW:
  310. pDM_Odm->pBandWidth = (u8 *)pValue;
  311. break;
  312. case ODM_CMNINFO_CHNL:
  313. pDM_Odm->pChannel = (u8 *)pValue;
  314. break;
  315. case ODM_CMNINFO_DMSP_GET_VALUE:
  316. pDM_Odm->pbGetValueFromOtherMac = (bool *)pValue;
  317. break;
  318. case ODM_CMNINFO_BUDDY_ADAPTOR:
  319. pDM_Odm->pBuddyAdapter = (struct adapter **)pValue;
  320. break;
  321. case ODM_CMNINFO_DMSP_IS_MASTER:
  322. pDM_Odm->pbMasterOfDMSP = (bool *)pValue;
  323. break;
  324. case ODM_CMNINFO_SCAN:
  325. pDM_Odm->pbScanInProcess = (bool *)pValue;
  326. break;
  327. case ODM_CMNINFO_POWER_SAVING:
  328. pDM_Odm->pbPowerSaving = (bool *)pValue;
  329. break;
  330. case ODM_CMNINFO_ONE_PATH_CCA:
  331. pDM_Odm->pOnePathCCA = (u8 *)pValue;
  332. break;
  333. case ODM_CMNINFO_DRV_STOP:
  334. pDM_Odm->pbDriverStopped = (bool *)pValue;
  335. break;
  336. case ODM_CMNINFO_PNP_IN:
  337. pDM_Odm->pbDriverIsGoingToPnpSetPowerSleep = (bool *)pValue;
  338. break;
  339. case ODM_CMNINFO_INIT_ON:
  340. pDM_Odm->pinit_adpt_in_progress = (bool *)pValue;
  341. break;
  342. case ODM_CMNINFO_ANT_TEST:
  343. pDM_Odm->pAntennaTest = (u8 *)pValue;
  344. break;
  345. case ODM_CMNINFO_NET_CLOSED:
  346. pDM_Odm->pbNet_closed = (bool *)pValue;
  347. break;
  348. case ODM_CMNINFO_MP_MODE:
  349. pDM_Odm->mp_mode = (u8 *)pValue;
  350. break;
  351. /* To remove the compiler warning, must add an empty default statement to handle the other values. */
  352. default:
  353. /* do nothing */
  354. break;
  355. }
  356. }
  357. void ODM_CmnInfoPtrArrayHook(struct odm_dm_struct *pDM_Odm, enum odm_common_info_def CmnInfo, u16 Index, void *pValue)
  358. {
  359. /* Hook call by reference pointer. */
  360. switch (CmnInfo) {
  361. /* Dynamic call by reference pointer. */
  362. case ODM_CMNINFO_STA_STATUS:
  363. pDM_Odm->pODM_StaInfo[Index] = (struct sta_info *)pValue;
  364. break;
  365. /* To remove the compiler warning, must add an empty default statement to handle the other values. */
  366. default:
  367. /* do nothing */
  368. break;
  369. }
  370. }
  371. /* Update Band/CHannel/.. The values are dynamic but non-per-packet. */
  372. void ODM_CmnInfoUpdate(struct odm_dm_struct *pDM_Odm, u32 CmnInfo, u64 Value)
  373. {
  374. /* */
  375. /* This init variable may be changed in run time. */
  376. /* */
  377. switch (CmnInfo) {
  378. case ODM_CMNINFO_ABILITY:
  379. pDM_Odm->SupportAbility = (u32)Value;
  380. break;
  381. case ODM_CMNINFO_RF_TYPE:
  382. pDM_Odm->RFType = (u8)Value;
  383. break;
  384. case ODM_CMNINFO_WIFI_DIRECT:
  385. pDM_Odm->bWIFI_Direct = (bool)Value;
  386. break;
  387. case ODM_CMNINFO_WIFI_DISPLAY:
  388. pDM_Odm->bWIFI_Display = (bool)Value;
  389. break;
  390. case ODM_CMNINFO_LINK:
  391. pDM_Odm->bLinked = (bool)Value;
  392. break;
  393. case ODM_CMNINFO_RSSI_MIN:
  394. pDM_Odm->RSSI_Min = (u8)Value;
  395. break;
  396. case ODM_CMNINFO_DBG_COMP:
  397. pDM_Odm->DebugComponents = Value;
  398. break;
  399. case ODM_CMNINFO_DBG_LEVEL:
  400. pDM_Odm->DebugLevel = (u32)Value;
  401. break;
  402. case ODM_CMNINFO_RA_THRESHOLD_HIGH:
  403. pDM_Odm->RateAdaptive.HighRSSIThresh = (u8)Value;
  404. break;
  405. case ODM_CMNINFO_RA_THRESHOLD_LOW:
  406. pDM_Odm->RateAdaptive.LowRSSIThresh = (u8)Value;
  407. break;
  408. }
  409. }
  410. void odm_CommonInfoSelfInit(struct odm_dm_struct *pDM_Odm)
  411. {
  412. struct adapter *adapter = pDM_Odm->Adapter;
  413. pDM_Odm->bCckHighPower = (bool)phy_query_bb_reg(adapter, 0x824, BIT(9));
  414. pDM_Odm->RFPathRxEnable = (u8)phy_query_bb_reg(adapter, 0xc04, 0x0F);
  415. ODM_InitDebugSetting(pDM_Odm);
  416. }
  417. void odm_CommonInfoSelfUpdate(struct odm_dm_struct *pDM_Odm)
  418. {
  419. u8 EntryCnt = 0;
  420. u8 i;
  421. struct sta_info *pEntry;
  422. if (*(pDM_Odm->pBandWidth) == ODM_BW40M) {
  423. if (*(pDM_Odm->pSecChOffset) == 1)
  424. pDM_Odm->ControlChannel = *(pDM_Odm->pChannel) - 2;
  425. else if (*(pDM_Odm->pSecChOffset) == 2)
  426. pDM_Odm->ControlChannel = *(pDM_Odm->pChannel) + 2;
  427. } else {
  428. pDM_Odm->ControlChannel = *(pDM_Odm->pChannel);
  429. }
  430. for (i = 0; i < ODM_ASSOCIATE_ENTRY_NUM; i++) {
  431. pEntry = pDM_Odm->pODM_StaInfo[i];
  432. if (IS_STA_VALID(pEntry))
  433. EntryCnt++;
  434. }
  435. if (EntryCnt == 1)
  436. pDM_Odm->bOneEntryOnly = true;
  437. else
  438. pDM_Odm->bOneEntryOnly = false;
  439. }
  440. void odm_CmnInfoInit_Debug(struct odm_dm_struct *pDM_Odm)
  441. {
  442. ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("odm_CmnInfoInit_Debug==>\n"));
  443. ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("SupportPlatform=%d\n", pDM_Odm->SupportPlatform));
  444. ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("SupportAbility=0x%x\n", pDM_Odm->SupportAbility));
  445. ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("SupportInterface=%d\n", pDM_Odm->SupportInterface));
  446. ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("SupportICType=0x%x\n", pDM_Odm->SupportICType));
  447. ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("CutVersion=%d\n", pDM_Odm->CutVersion));
  448. ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("FabVersion=%d\n", pDM_Odm->FabVersion));
  449. ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("RFType=%d\n", pDM_Odm->RFType));
  450. ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("BoardType=%d\n", pDM_Odm->BoardType));
  451. ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("ExtLNA=%d\n", pDM_Odm->ExtLNA));
  452. ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("ExtPA=%d\n", pDM_Odm->ExtPA));
  453. ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("ExtTRSW=%d\n", pDM_Odm->ExtTRSW));
  454. ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("PatchID=%d\n", pDM_Odm->PatchID));
  455. ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("bInHctTest=%d\n", pDM_Odm->bInHctTest));
  456. ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("bWIFITest=%d\n", pDM_Odm->bWIFITest));
  457. ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("bDualMacSmartConcurrent=%d\n", pDM_Odm->bDualMacSmartConcurrent));
  458. }
  459. void odm_CmnInfoHook_Debug(struct odm_dm_struct *pDM_Odm)
  460. {
  461. ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("odm_CmnInfoHook_Debug==>\n"));
  462. ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("pNumTxBytesUnicast=%llu\n", *(pDM_Odm->pNumTxBytesUnicast)));
  463. ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("pNumRxBytesUnicast=%llu\n", *(pDM_Odm->pNumRxBytesUnicast)));
  464. ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("pWirelessMode=0x%x\n", *(pDM_Odm->pWirelessMode)));
  465. ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("pSecChOffset=%d\n", *(pDM_Odm->pSecChOffset)));
  466. ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("pSecurity=%d\n", *(pDM_Odm->pSecurity)));
  467. ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("pBandWidth=%d\n", *(pDM_Odm->pBandWidth)));
  468. ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("pChannel=%d\n", *(pDM_Odm->pChannel)));
  469. ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("pbScanInProcess=%d\n", *(pDM_Odm->pbScanInProcess)));
  470. ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("pbPowerSaving=%d\n", *(pDM_Odm->pbPowerSaving)));
  471. }
  472. void odm_CmnInfoUpdate_Debug(struct odm_dm_struct *pDM_Odm)
  473. {
  474. ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("odm_CmnInfoUpdate_Debug==>\n"));
  475. ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("bWIFI_Direct=%d\n", pDM_Odm->bWIFI_Direct));
  476. ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("bWIFI_Display=%d\n", pDM_Odm->bWIFI_Display));
  477. ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("bLinked=%d\n", pDM_Odm->bLinked));
  478. ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("RSSI_Min=%d\n", pDM_Odm->RSSI_Min));
  479. }
  480. void ODM_Write_DIG(struct odm_dm_struct *pDM_Odm, u8 CurrentIGI)
  481. {
  482. struct rtw_dig *pDM_DigTable = &pDM_Odm->DM_DigTable;
  483. struct adapter *adapter = pDM_Odm->Adapter;
  484. if (pDM_DigTable->CurIGValue != CurrentIGI) {
  485. phy_set_bb_reg(adapter, ODM_REG_IGI_A_11N, ODM_BIT_IGI_11N, CurrentIGI);
  486. pDM_DigTable->CurIGValue = CurrentIGI;
  487. }
  488. }
  489. void odm_DIGInit(struct odm_dm_struct *pDM_Odm)
  490. {
  491. struct adapter *adapter = pDM_Odm->Adapter;
  492. struct rtw_dig *pDM_DigTable = &pDM_Odm->DM_DigTable;
  493. pDM_DigTable->CurIGValue = (u8)phy_query_bb_reg(adapter, ODM_REG_IGI_A_11N, ODM_BIT_IGI_11N);
  494. pDM_DigTable->RssiLowThresh = DM_DIG_THRESH_LOW;
  495. pDM_DigTable->RssiHighThresh = DM_DIG_THRESH_HIGH;
  496. pDM_DigTable->FALowThresh = DM_false_ALARM_THRESH_LOW;
  497. pDM_DigTable->FAHighThresh = DM_false_ALARM_THRESH_HIGH;
  498. pDM_DigTable->rx_gain_range_max = DM_DIG_MAX_NIC;
  499. pDM_DigTable->rx_gain_range_min = DM_DIG_MIN_NIC;
  500. pDM_DigTable->BackoffVal = DM_DIG_BACKOFF_DEFAULT;
  501. pDM_DigTable->BackoffVal_range_max = DM_DIG_BACKOFF_MAX;
  502. pDM_DigTable->BackoffVal_range_min = DM_DIG_BACKOFF_MIN;
  503. pDM_DigTable->PreCCK_CCAThres = 0xFF;
  504. pDM_DigTable->CurCCK_CCAThres = 0x83;
  505. pDM_DigTable->ForbiddenIGI = DM_DIG_MIN_NIC;
  506. pDM_DigTable->LargeFAHit = 0;
  507. pDM_DigTable->Recover_cnt = 0;
  508. pDM_DigTable->DIG_Dynamic_MIN_0 = DM_DIG_MIN_NIC;
  509. pDM_DigTable->DIG_Dynamic_MIN_1 = DM_DIG_MIN_NIC;
  510. pDM_DigTable->bMediaConnect_0 = false;
  511. pDM_DigTable->bMediaConnect_1 = false;
  512. /* To Initialize pDM_Odm->bDMInitialGainEnable == false to avoid DIG error */
  513. pDM_Odm->bDMInitialGainEnable = true;
  514. }
  515. void odm_DIG(struct odm_dm_struct *pDM_Odm)
  516. {
  517. struct rtw_dig *pDM_DigTable = &pDM_Odm->DM_DigTable;
  518. struct false_alarm_stats *pFalseAlmCnt = &pDM_Odm->FalseAlmCnt;
  519. u8 DIG_Dynamic_MIN;
  520. u8 DIG_MaxOfMin;
  521. bool FirstConnect, FirstDisConnect;
  522. u8 dm_dig_max, dm_dig_min;
  523. u8 CurrentIGI = pDM_DigTable->CurIGValue;
  524. ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG()==>\n"));
  525. if ((!(pDM_Odm->SupportAbility&ODM_BB_DIG)) || (!(pDM_Odm->SupportAbility&ODM_BB_FA_CNT))) {
  526. ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD,
  527. ("odm_DIG() Return: SupportAbility ODM_BB_DIG or ODM_BB_FA_CNT is disabled\n"));
  528. return;
  529. }
  530. if (*(pDM_Odm->pbScanInProcess)) {
  531. ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG() Return: In Scan Progress\n"));
  532. return;
  533. }
  534. /* add by Neil Chen to avoid PSD is processing */
  535. if (pDM_Odm->bDMInitialGainEnable == false) {
  536. ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG() Return: PSD is Processing\n"));
  537. return;
  538. }
  539. DIG_Dynamic_MIN = pDM_DigTable->DIG_Dynamic_MIN_0;
  540. FirstConnect = (pDM_Odm->bLinked) && (!pDM_DigTable->bMediaConnect_0);
  541. FirstDisConnect = (!pDM_Odm->bLinked) && (pDM_DigTable->bMediaConnect_0);
  542. /* 1 Boundary Decision */
  543. dm_dig_max = DM_DIG_MAX_NIC;
  544. dm_dig_min = DM_DIG_MIN_NIC;
  545. DIG_MaxOfMin = DM_DIG_MAX_AP;
  546. if (pDM_Odm->bLinked) {
  547. /* 2 Modify DIG upper bound */
  548. if ((pDM_Odm->RSSI_Min + 20) > dm_dig_max)
  549. pDM_DigTable->rx_gain_range_max = dm_dig_max;
  550. else if ((pDM_Odm->RSSI_Min + 20) < dm_dig_min)
  551. pDM_DigTable->rx_gain_range_max = dm_dig_min;
  552. else
  553. pDM_DigTable->rx_gain_range_max = pDM_Odm->RSSI_Min + 20;
  554. /* 2 Modify DIG lower bound */
  555. if (pDM_Odm->bOneEntryOnly) {
  556. if (pDM_Odm->RSSI_Min < dm_dig_min)
  557. DIG_Dynamic_MIN = dm_dig_min;
  558. else if (pDM_Odm->RSSI_Min > DIG_MaxOfMin)
  559. DIG_Dynamic_MIN = DIG_MaxOfMin;
  560. else
  561. DIG_Dynamic_MIN = pDM_Odm->RSSI_Min;
  562. ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD,
  563. ("odm_DIG() : bOneEntryOnly=true, DIG_Dynamic_MIN=0x%x\n",
  564. DIG_Dynamic_MIN));
  565. ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD,
  566. ("odm_DIG() : pDM_Odm->RSSI_Min=%d\n",
  567. pDM_Odm->RSSI_Min));
  568. } else if (pDM_Odm->SupportAbility & ODM_BB_ANT_DIV) {
  569. /* 1 Lower Bound for 88E AntDiv */
  570. if (pDM_Odm->AntDivType == CG_TRX_HW_ANTDIV) {
  571. DIG_Dynamic_MIN = (u8)pDM_DigTable->AntDiv_RSSI_max;
  572. ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD,
  573. ("odm_DIG(): pDM_DigTable->AntDiv_RSSI_max=%d\n",
  574. pDM_DigTable->AntDiv_RSSI_max));
  575. }
  576. } else {
  577. DIG_Dynamic_MIN = dm_dig_min;
  578. }
  579. } else {
  580. pDM_DigTable->rx_gain_range_max = dm_dig_max;
  581. DIG_Dynamic_MIN = dm_dig_min;
  582. ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG() : No Link\n"));
  583. }
  584. /* 1 Modify DIG lower bound, deal with abnormally large false alarm */
  585. if (pFalseAlmCnt->Cnt_all > 10000) {
  586. ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("dm_DIG(): Abnornally false alarm case.\n"));
  587. if (pDM_DigTable->LargeFAHit != 3)
  588. pDM_DigTable->LargeFAHit++;
  589. if (pDM_DigTable->ForbiddenIGI < CurrentIGI) {
  590. pDM_DigTable->ForbiddenIGI = CurrentIGI;
  591. pDM_DigTable->LargeFAHit = 1;
  592. }
  593. if (pDM_DigTable->LargeFAHit >= 3) {
  594. if ((pDM_DigTable->ForbiddenIGI+1) > pDM_DigTable->rx_gain_range_max)
  595. pDM_DigTable->rx_gain_range_min = pDM_DigTable->rx_gain_range_max;
  596. else
  597. pDM_DigTable->rx_gain_range_min = (pDM_DigTable->ForbiddenIGI + 1);
  598. pDM_DigTable->Recover_cnt = 3600; /* 3600=2hr */
  599. }
  600. } else {
  601. /* Recovery mechanism for IGI lower bound */
  602. if (pDM_DigTable->Recover_cnt != 0) {
  603. pDM_DigTable->Recover_cnt--;
  604. } else {
  605. if (pDM_DigTable->LargeFAHit < 3) {
  606. if ((pDM_DigTable->ForbiddenIGI-1) < DIG_Dynamic_MIN) { /* DM_DIG_MIN) */
  607. pDM_DigTable->ForbiddenIGI = DIG_Dynamic_MIN; /* DM_DIG_MIN; */
  608. pDM_DigTable->rx_gain_range_min = DIG_Dynamic_MIN; /* DM_DIG_MIN; */
  609. ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): Normal Case: At Lower Bound\n"));
  610. } else {
  611. pDM_DigTable->ForbiddenIGI--;
  612. pDM_DigTable->rx_gain_range_min = (pDM_DigTable->ForbiddenIGI + 1);
  613. ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): Normal Case: Approach Lower Bound\n"));
  614. }
  615. } else {
  616. pDM_DigTable->LargeFAHit = 0;
  617. }
  618. }
  619. }
  620. ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD,
  621. ("odm_DIG(): pDM_DigTable->LargeFAHit=%d\n",
  622. pDM_DigTable->LargeFAHit));
  623. /* 1 Adjust initial gain by false alarm */
  624. if (pDM_Odm->bLinked) {
  625. ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): DIG AfterLink\n"));
  626. if (FirstConnect) {
  627. CurrentIGI = pDM_Odm->RSSI_Min;
  628. ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("DIG: First Connect\n"));
  629. } else {
  630. if (pFalseAlmCnt->Cnt_all > DM_DIG_FA_TH2)
  631. CurrentIGI = CurrentIGI + 4;/* pDM_DigTable->CurIGValue = pDM_DigTable->PreIGValue+2; */
  632. else if (pFalseAlmCnt->Cnt_all > DM_DIG_FA_TH1)
  633. CurrentIGI = CurrentIGI + 2;/* pDM_DigTable->CurIGValue = pDM_DigTable->PreIGValue+1; */
  634. else if (pFalseAlmCnt->Cnt_all < DM_DIG_FA_TH0)
  635. CurrentIGI = CurrentIGI - 2;/* pDM_DigTable->CurIGValue =pDM_DigTable->PreIGValue-1; */
  636. }
  637. } else {
  638. ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): DIG BeforeLink\n"));
  639. if (FirstDisConnect) {
  640. CurrentIGI = pDM_DigTable->rx_gain_range_min;
  641. ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): First DisConnect\n"));
  642. } else {
  643. /* 2012.03.30 LukeLee: enable DIG before link but with very high thresholds */
  644. if (pFalseAlmCnt->Cnt_all > 10000)
  645. CurrentIGI = CurrentIGI + 2;/* pDM_DigTable->CurIGValue = pDM_DigTable->PreIGValue+2; */
  646. else if (pFalseAlmCnt->Cnt_all > 8000)
  647. CurrentIGI = CurrentIGI + 1;/* pDM_DigTable->CurIGValue = pDM_DigTable->PreIGValue+1; */
  648. else if (pFalseAlmCnt->Cnt_all < 500)
  649. CurrentIGI = CurrentIGI - 1;/* pDM_DigTable->CurIGValue =pDM_DigTable->PreIGValue-1; */
  650. ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): England DIG\n"));
  651. }
  652. }
  653. ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): DIG End Adjust IGI\n"));
  654. /* 1 Check initial gain by upper/lower bound */
  655. if (CurrentIGI > pDM_DigTable->rx_gain_range_max)
  656. CurrentIGI = pDM_DigTable->rx_gain_range_max;
  657. if (CurrentIGI < pDM_DigTable->rx_gain_range_min)
  658. CurrentIGI = pDM_DigTable->rx_gain_range_min;
  659. ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD,
  660. ("odm_DIG(): rx_gain_range_max=0x%x, rx_gain_range_min=0x%x\n",
  661. pDM_DigTable->rx_gain_range_max, pDM_DigTable->rx_gain_range_min));
  662. ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): TotalFA=%d\n", pFalseAlmCnt->Cnt_all));
  663. ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): CurIGValue=0x%x\n", CurrentIGI));
  664. /* 2 High power RSSI threshold */
  665. ODM_Write_DIG(pDM_Odm, CurrentIGI);/* ODM_Write_DIG(pDM_Odm, pDM_DigTable->CurIGValue); */
  666. pDM_DigTable->bMediaConnect_0 = pDM_Odm->bLinked;
  667. pDM_DigTable->DIG_Dynamic_MIN_0 = DIG_Dynamic_MIN;
  668. }
  669. /* 3============================================================ */
  670. /* 3 FASLE ALARM CHECK */
  671. /* 3============================================================ */
  672. void odm_FalseAlarmCounterStatistics(struct odm_dm_struct *pDM_Odm)
  673. {
  674. struct adapter *adapter = pDM_Odm->Adapter;
  675. u32 ret_value;
  676. struct false_alarm_stats *FalseAlmCnt = &(pDM_Odm->FalseAlmCnt);
  677. if (!(pDM_Odm->SupportAbility & ODM_BB_FA_CNT))
  678. return;
  679. /* hold ofdm counter */
  680. phy_set_bb_reg(adapter, ODM_REG_OFDM_FA_HOLDC_11N, BIT(31), 1); /* hold page C counter */
  681. phy_set_bb_reg(adapter, ODM_REG_OFDM_FA_RSTD_11N, BIT(31), 1); /* hold page D counter */
  682. ret_value = phy_query_bb_reg(adapter, ODM_REG_OFDM_FA_TYPE1_11N, bMaskDWord);
  683. FalseAlmCnt->Cnt_Fast_Fsync = (ret_value&0xffff);
  684. FalseAlmCnt->Cnt_SB_Search_fail = (ret_value & 0xffff0000)>>16;
  685. ret_value = phy_query_bb_reg(adapter, ODM_REG_OFDM_FA_TYPE2_11N, bMaskDWord);
  686. FalseAlmCnt->Cnt_OFDM_CCA = (ret_value&0xffff);
  687. FalseAlmCnt->Cnt_Parity_Fail = (ret_value & 0xffff0000)>>16;
  688. ret_value = phy_query_bb_reg(adapter, ODM_REG_OFDM_FA_TYPE3_11N, bMaskDWord);
  689. FalseAlmCnt->Cnt_Rate_Illegal = (ret_value&0xffff);
  690. FalseAlmCnt->Cnt_Crc8_fail = (ret_value & 0xffff0000)>>16;
  691. ret_value = phy_query_bb_reg(adapter, ODM_REG_OFDM_FA_TYPE4_11N, bMaskDWord);
  692. FalseAlmCnt->Cnt_Mcs_fail = (ret_value&0xffff);
  693. FalseAlmCnt->Cnt_Ofdm_fail = FalseAlmCnt->Cnt_Parity_Fail + FalseAlmCnt->Cnt_Rate_Illegal +
  694. FalseAlmCnt->Cnt_Crc8_fail + FalseAlmCnt->Cnt_Mcs_fail +
  695. FalseAlmCnt->Cnt_Fast_Fsync + FalseAlmCnt->Cnt_SB_Search_fail;
  696. ret_value = phy_query_bb_reg(adapter, ODM_REG_SC_CNT_11N, bMaskDWord);
  697. FalseAlmCnt->Cnt_BW_LSC = (ret_value&0xffff);
  698. FalseAlmCnt->Cnt_BW_USC = (ret_value & 0xffff0000)>>16;
  699. /* hold cck counter */
  700. phy_set_bb_reg(adapter, ODM_REG_CCK_FA_RST_11N, BIT(12), 1);
  701. phy_set_bb_reg(adapter, ODM_REG_CCK_FA_RST_11N, BIT(14), 1);
  702. ret_value = phy_query_bb_reg(adapter, ODM_REG_CCK_FA_LSB_11N, bMaskByte0);
  703. FalseAlmCnt->Cnt_Cck_fail = ret_value;
  704. ret_value = phy_query_bb_reg(adapter, ODM_REG_CCK_FA_MSB_11N, bMaskByte3);
  705. FalseAlmCnt->Cnt_Cck_fail += (ret_value & 0xff)<<8;
  706. ret_value = phy_query_bb_reg(adapter, ODM_REG_CCK_CCA_CNT_11N, bMaskDWord);
  707. FalseAlmCnt->Cnt_CCK_CCA = ((ret_value&0xFF)<<8) | ((ret_value&0xFF00)>>8);
  708. FalseAlmCnt->Cnt_all = (FalseAlmCnt->Cnt_Fast_Fsync +
  709. FalseAlmCnt->Cnt_SB_Search_fail +
  710. FalseAlmCnt->Cnt_Parity_Fail +
  711. FalseAlmCnt->Cnt_Rate_Illegal +
  712. FalseAlmCnt->Cnt_Crc8_fail +
  713. FalseAlmCnt->Cnt_Mcs_fail +
  714. FalseAlmCnt->Cnt_Cck_fail);
  715. FalseAlmCnt->Cnt_CCA_all = FalseAlmCnt->Cnt_OFDM_CCA + FalseAlmCnt->Cnt_CCK_CCA;
  716. ODM_RT_TRACE(pDM_Odm, ODM_COMP_FA_CNT, ODM_DBG_LOUD, ("Enter odm_FalseAlarmCounterStatistics\n"));
  717. ODM_RT_TRACE(pDM_Odm, ODM_COMP_FA_CNT, ODM_DBG_LOUD,
  718. ("Cnt_Fast_Fsync=%d, Cnt_SB_Search_fail=%d\n",
  719. FalseAlmCnt->Cnt_Fast_Fsync, FalseAlmCnt->Cnt_SB_Search_fail));
  720. ODM_RT_TRACE(pDM_Odm, ODM_COMP_FA_CNT, ODM_DBG_LOUD,
  721. ("Cnt_Parity_Fail=%d, Cnt_Rate_Illegal=%d\n",
  722. FalseAlmCnt->Cnt_Parity_Fail, FalseAlmCnt->Cnt_Rate_Illegal));
  723. ODM_RT_TRACE(pDM_Odm, ODM_COMP_FA_CNT, ODM_DBG_LOUD,
  724. ("Cnt_Crc8_fail=%d, Cnt_Mcs_fail=%d\n",
  725. FalseAlmCnt->Cnt_Crc8_fail, FalseAlmCnt->Cnt_Mcs_fail));
  726. ODM_RT_TRACE(pDM_Odm, ODM_COMP_FA_CNT, ODM_DBG_LOUD, ("Cnt_Cck_fail=%d\n", FalseAlmCnt->Cnt_Cck_fail));
  727. ODM_RT_TRACE(pDM_Odm, ODM_COMP_FA_CNT, ODM_DBG_LOUD, ("Cnt_Ofdm_fail=%d\n", FalseAlmCnt->Cnt_Ofdm_fail));
  728. ODM_RT_TRACE(pDM_Odm, ODM_COMP_FA_CNT, ODM_DBG_LOUD, ("Total False Alarm=%d\n", FalseAlmCnt->Cnt_all));
  729. }
  730. /* 3============================================================ */
  731. /* 3 CCK Packet Detect Threshold */
  732. /* 3============================================================ */
  733. void odm_CCKPacketDetectionThresh(struct odm_dm_struct *pDM_Odm)
  734. {
  735. u8 CurCCK_CCAThres;
  736. struct false_alarm_stats *FalseAlmCnt = &(pDM_Odm->FalseAlmCnt);
  737. if (!(pDM_Odm->SupportAbility & (ODM_BB_CCK_PD|ODM_BB_FA_CNT)))
  738. return;
  739. if (pDM_Odm->ExtLNA)
  740. return;
  741. if (pDM_Odm->bLinked) {
  742. if (pDM_Odm->RSSI_Min > 25) {
  743. CurCCK_CCAThres = 0xcd;
  744. } else if ((pDM_Odm->RSSI_Min <= 25) && (pDM_Odm->RSSI_Min > 10)) {
  745. CurCCK_CCAThres = 0x83;
  746. } else {
  747. if (FalseAlmCnt->Cnt_Cck_fail > 1000)
  748. CurCCK_CCAThres = 0x83;
  749. else
  750. CurCCK_CCAThres = 0x40;
  751. }
  752. } else {
  753. if (FalseAlmCnt->Cnt_Cck_fail > 1000)
  754. CurCCK_CCAThres = 0x83;
  755. else
  756. CurCCK_CCAThres = 0x40;
  757. }
  758. ODM_Write_CCK_CCA_Thres(pDM_Odm, CurCCK_CCAThres);
  759. }
  760. void ODM_Write_CCK_CCA_Thres(struct odm_dm_struct *pDM_Odm, u8 CurCCK_CCAThres)
  761. {
  762. struct rtw_dig *pDM_DigTable = &pDM_Odm->DM_DigTable;
  763. struct adapter *adapt = pDM_Odm->Adapter;
  764. if (pDM_DigTable->CurCCK_CCAThres != CurCCK_CCAThres) /* modify by Guo.Mingzhi 2012-01-03 */
  765. usb_write8(adapt, ODM_REG_CCK_CCA_11N, CurCCK_CCAThres);
  766. pDM_DigTable->PreCCK_CCAThres = pDM_DigTable->CurCCK_CCAThres;
  767. pDM_DigTable->CurCCK_CCAThres = CurCCK_CCAThres;
  768. }
  769. void ODM_RF_Saving(struct odm_dm_struct *pDM_Odm, u8 bForceInNormal)
  770. {
  771. struct adapter *adapter = pDM_Odm->Adapter;
  772. struct rtl_ps *pDM_PSTable = &pDM_Odm->DM_PSTable;
  773. u8 Rssi_Up_bound = 30;
  774. u8 Rssi_Low_bound = 25;
  775. if (pDM_Odm->PatchID == 40) { /* RT_CID_819x_FUNAI_TV */
  776. Rssi_Up_bound = 50;
  777. Rssi_Low_bound = 45;
  778. }
  779. if (pDM_PSTable->initialize == 0) {
  780. pDM_PSTable->Reg874 = (phy_query_bb_reg(adapter, 0x874, bMaskDWord)&0x1CC000)>>14;
  781. pDM_PSTable->RegC70 = (phy_query_bb_reg(adapter, 0xc70, bMaskDWord) & BIT(3))>>3;
  782. pDM_PSTable->Reg85C = (phy_query_bb_reg(adapter, 0x85c, bMaskDWord)&0xFF000000)>>24;
  783. pDM_PSTable->RegA74 = (phy_query_bb_reg(adapter, 0xa74, bMaskDWord)&0xF000)>>12;
  784. pDM_PSTable->initialize = 1;
  785. }
  786. if (!bForceInNormal) {
  787. if (pDM_Odm->RSSI_Min != 0xFF) {
  788. if (pDM_PSTable->PreRFState == RF_Normal) {
  789. if (pDM_Odm->RSSI_Min >= Rssi_Up_bound)
  790. pDM_PSTable->CurRFState = RF_Save;
  791. else
  792. pDM_PSTable->CurRFState = RF_Normal;
  793. } else {
  794. if (pDM_Odm->RSSI_Min <= Rssi_Low_bound)
  795. pDM_PSTable->CurRFState = RF_Normal;
  796. else
  797. pDM_PSTable->CurRFState = RF_Save;
  798. }
  799. } else {
  800. pDM_PSTable->CurRFState = RF_MAX;
  801. }
  802. } else {
  803. pDM_PSTable->CurRFState = RF_Normal;
  804. }
  805. if (pDM_PSTable->PreRFState != pDM_PSTable->CurRFState) {
  806. if (pDM_PSTable->CurRFState == RF_Save) {
  807. phy_set_bb_reg(adapter, 0x874, 0x1C0000, 0x2); /* Reg874[20:18]=3'b010 */
  808. phy_set_bb_reg(adapter, 0xc70, BIT(3), 0); /* RegC70[3]=1'b0 */
  809. phy_set_bb_reg(adapter, 0x85c, 0xFF000000, 0x63); /* Reg85C[31:24]=0x63 */
  810. phy_set_bb_reg(adapter, 0x874, 0xC000, 0x2); /* Reg874[15:14]=2'b10 */
  811. phy_set_bb_reg(adapter, 0xa74, 0xF000, 0x3); /* RegA75[7:4]=0x3 */
  812. phy_set_bb_reg(adapter, 0x818, BIT(28), 0x0); /* Reg818[28]=1'b0 */
  813. phy_set_bb_reg(adapter, 0x818, BIT(28), 0x1); /* Reg818[28]=1'b1 */
  814. } else {
  815. phy_set_bb_reg(adapter, 0x874, 0x1CC000, pDM_PSTable->Reg874);
  816. phy_set_bb_reg(adapter, 0xc70, BIT(3), pDM_PSTable->RegC70);
  817. phy_set_bb_reg(adapter, 0x85c, 0xFF000000, pDM_PSTable->Reg85C);
  818. phy_set_bb_reg(adapter, 0xa74, 0xF000, pDM_PSTable->RegA74);
  819. phy_set_bb_reg(adapter, 0x818, BIT(28), 0x0);
  820. }
  821. pDM_PSTable->PreRFState = pDM_PSTable->CurRFState;
  822. }
  823. }
  824. /* 3============================================================ */
  825. /* 3 RATR MASK */
  826. /* 3============================================================ */
  827. /* 3============================================================ */
  828. /* 3 Rate Adaptive */
  829. /* 3============================================================ */
  830. void odm_RateAdaptiveMaskInit(struct odm_dm_struct *pDM_Odm)
  831. {
  832. struct odm_rate_adapt *pOdmRA = &pDM_Odm->RateAdaptive;
  833. pOdmRA->Type = DM_Type_ByDriver;
  834. if (pOdmRA->Type == DM_Type_ByDriver)
  835. pDM_Odm->bUseRAMask = true;
  836. else
  837. pDM_Odm->bUseRAMask = false;
  838. pOdmRA->RATRState = DM_RATR_STA_INIT;
  839. pOdmRA->HighRSSIThresh = 50;
  840. pOdmRA->LowRSSIThresh = 20;
  841. }
  842. u32 ODM_Get_Rate_Bitmap(struct odm_dm_struct *pDM_Odm, u32 macid, u32 ra_mask, u8 rssi_level)
  843. {
  844. struct sta_info *pEntry;
  845. u32 rate_bitmap = 0x0fffffff;
  846. u8 WirelessMode;
  847. pEntry = pDM_Odm->pODM_StaInfo[macid];
  848. if (!IS_STA_VALID(pEntry))
  849. return ra_mask;
  850. WirelessMode = pEntry->wireless_mode;
  851. switch (WirelessMode) {
  852. case ODM_WM_B:
  853. if (ra_mask & 0x0000000c) /* 11M or 5.5M enable */
  854. rate_bitmap = 0x0000000d;
  855. else
  856. rate_bitmap = 0x0000000f;
  857. break;
  858. case (ODM_WM_A|ODM_WM_G):
  859. if (rssi_level == DM_RATR_STA_HIGH)
  860. rate_bitmap = 0x00000f00;
  861. else
  862. rate_bitmap = 0x00000ff0;
  863. break;
  864. case (ODM_WM_B|ODM_WM_G):
  865. if (rssi_level == DM_RATR_STA_HIGH)
  866. rate_bitmap = 0x00000f00;
  867. else if (rssi_level == DM_RATR_STA_MIDDLE)
  868. rate_bitmap = 0x00000ff0;
  869. else
  870. rate_bitmap = 0x00000ff5;
  871. break;
  872. case (ODM_WM_B|ODM_WM_G|ODM_WM_N24G):
  873. case (ODM_WM_A|ODM_WM_B|ODM_WM_G|ODM_WM_N24G):
  874. if (pDM_Odm->RFType == ODM_1T2R || pDM_Odm->RFType == ODM_1T1R) {
  875. if (rssi_level == DM_RATR_STA_HIGH) {
  876. rate_bitmap = 0x000f0000;
  877. } else if (rssi_level == DM_RATR_STA_MIDDLE) {
  878. rate_bitmap = 0x000ff000;
  879. } else {
  880. if (*(pDM_Odm->pBandWidth) == ODM_BW40M)
  881. rate_bitmap = 0x000ff015;
  882. else
  883. rate_bitmap = 0x000ff005;
  884. }
  885. } else {
  886. if (rssi_level == DM_RATR_STA_HIGH) {
  887. rate_bitmap = 0x0f8f0000;
  888. } else if (rssi_level == DM_RATR_STA_MIDDLE) {
  889. rate_bitmap = 0x0f8ff000;
  890. } else {
  891. if (*(pDM_Odm->pBandWidth) == ODM_BW40M)
  892. rate_bitmap = 0x0f8ff015;
  893. else
  894. rate_bitmap = 0x0f8ff005;
  895. }
  896. }
  897. break;
  898. default:
  899. /* case WIRELESS_11_24N: */
  900. /* case WIRELESS_11_5N: */
  901. if (pDM_Odm->RFType == RF_1T2R)
  902. rate_bitmap = 0x000fffff;
  903. else
  904. rate_bitmap = 0x0fffffff;
  905. break;
  906. }
  907. ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD,
  908. (" ==> rssi_level:0x%02x, WirelessMode:0x%02x, rate_bitmap:0x%08x\n",
  909. rssi_level, WirelessMode, rate_bitmap));
  910. return rate_bitmap;
  911. }
  912. /*-----------------------------------------------------------------------------
  913. * Function: odm_RefreshRateAdaptiveMask()
  914. *
  915. * Overview: Update rate table mask according to rssi
  916. *
  917. * Input: NONE
  918. *
  919. * Output: NONE
  920. *
  921. * Return: NONE
  922. *
  923. * Revised History:
  924. * When Who Remark
  925. * 05/27/2009 hpfan Create Version 0.
  926. *
  927. *---------------------------------------------------------------------------*/
  928. void odm_RefreshRateAdaptiveMask(struct odm_dm_struct *pDM_Odm)
  929. {
  930. if (!(pDM_Odm->SupportAbility & ODM_BB_RA_MASK))
  931. return;
  932. /* */
  933. /* 2011/09/29 MH In HW integration first stage, we provide 4 different handle to operate */
  934. /* at the same time. In the stage2/3, we need to prive universal interface and merge all */
  935. /* HW dynamic mechanism. */
  936. /* */
  937. odm_RefreshRateAdaptiveMaskCE(pDM_Odm);
  938. }
  939. void odm_RefreshRateAdaptiveMaskCE(struct odm_dm_struct *pDM_Odm)
  940. {
  941. u8 i;
  942. struct adapter *pAdapter = pDM_Odm->Adapter;
  943. if (pAdapter->bDriverStopped) {
  944. ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_TRACE, ("<---- odm_RefreshRateAdaptiveMask(): driver is going to unload\n"));
  945. return;
  946. }
  947. if (!pDM_Odm->bUseRAMask) {
  948. ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("<---- odm_RefreshRateAdaptiveMask(): driver does not control rate adaptive mask\n"));
  949. return;
  950. }
  951. for (i = 0; i < ODM_ASSOCIATE_ENTRY_NUM; i++) {
  952. struct sta_info *pstat = pDM_Odm->pODM_StaInfo[i];
  953. if (IS_STA_VALID(pstat)) {
  954. if (ODM_RAStateCheck(pDM_Odm, pstat->rssi_stat.UndecoratedSmoothedPWDB, false, &pstat->rssi_level)) {
  955. ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD,
  956. ("RSSI:%d, RSSI_LEVEL:%d\n",
  957. pstat->rssi_stat.UndecoratedSmoothedPWDB, pstat->rssi_level));
  958. rtw_hal_update_ra_mask(pAdapter, i, pstat->rssi_level);
  959. }
  960. }
  961. }
  962. }
  963. /* Return Value: bool */
  964. /* - true: RATRState is changed. */
  965. bool ODM_RAStateCheck(struct odm_dm_struct *pDM_Odm, s32 RSSI, bool bForceUpdate, u8 *pRATRState)
  966. {
  967. struct odm_rate_adapt *pRA = &pDM_Odm->RateAdaptive;
  968. const u8 GoUpGap = 5;
  969. u8 HighRSSIThreshForRA = pRA->HighRSSIThresh;
  970. u8 LowRSSIThreshForRA = pRA->LowRSSIThresh;
  971. u8 RATRState;
  972. /* Threshold Adjustment: */
  973. /* when RSSI state trends to go up one or two levels, make sure RSSI is high enough. */
  974. /* Here GoUpGap is added to solve the boundary's level alternation issue. */
  975. switch (*pRATRState) {
  976. case DM_RATR_STA_INIT:
  977. case DM_RATR_STA_HIGH:
  978. break;
  979. case DM_RATR_STA_MIDDLE:
  980. HighRSSIThreshForRA += GoUpGap;
  981. break;
  982. case DM_RATR_STA_LOW:
  983. HighRSSIThreshForRA += GoUpGap;
  984. LowRSSIThreshForRA += GoUpGap;
  985. break;
  986. default:
  987. ODM_RT_ASSERT(pDM_Odm, false, ("wrong rssi level setting %d !", *pRATRState));
  988. break;
  989. }
  990. /* Decide RATRState by RSSI. */
  991. if (RSSI > HighRSSIThreshForRA)
  992. RATRState = DM_RATR_STA_HIGH;
  993. else if (RSSI > LowRSSIThreshForRA)
  994. RATRState = DM_RATR_STA_MIDDLE;
  995. else
  996. RATRState = DM_RATR_STA_LOW;
  997. if (*pRATRState != RATRState || bForceUpdate) {
  998. ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("RSSI Level %d -> %d\n", *pRATRState, RATRState));
  999. *pRATRState = RATRState;
  1000. return true;
  1001. }
  1002. return false;
  1003. }
  1004. /* 3============================================================ */
  1005. /* 3 Dynamic Tx Power */
  1006. /* 3============================================================ */
  1007. void odm_DynamicTxPowerInit(struct odm_dm_struct *pDM_Odm)
  1008. {
  1009. struct adapter *Adapter = pDM_Odm->Adapter;
  1010. struct hal_data_8188e *pHalData = GET_HAL_DATA(Adapter);
  1011. struct dm_priv *pdmpriv = &pHalData->dmpriv;
  1012. pdmpriv->bDynamicTxPowerEnable = false;
  1013. pdmpriv->LastDTPLvl = TxHighPwrLevel_Normal;
  1014. pdmpriv->DynamicTxHighPowerLvl = TxHighPwrLevel_Normal;
  1015. }
  1016. /* 3============================================================ */
  1017. /* 3 RSSI Monitor */
  1018. /* 3============================================================ */
  1019. void odm_RSSIMonitorCheck(struct odm_dm_struct *pDM_Odm)
  1020. {
  1021. if (!(pDM_Odm->SupportAbility & ODM_BB_RSSI_MONITOR))
  1022. return;
  1023. /* */
  1024. /* 2011/09/29 MH In HW integration first stage, we provide 4 different handle to operate */
  1025. /* at the same time. In the stage2/3, we need to prive universal interface and merge all */
  1026. /* HW dynamic mechanism. */
  1027. /* */
  1028. odm_RSSIMonitorCheckCE(pDM_Odm);
  1029. } /* odm_RSSIMonitorCheck */
  1030. static void FindMinimumRSSI(struct adapter *pAdapter)
  1031. {
  1032. struct hal_data_8188e *pHalData = GET_HAL_DATA(pAdapter);
  1033. struct dm_priv *pdmpriv = &pHalData->dmpriv;
  1034. /* 1 1.Unconditionally set RSSI */
  1035. pdmpriv->MinUndecoratedPWDBForDM = pdmpriv->EntryMinUndecoratedSmoothedPWDB;
  1036. }
  1037. void odm_RSSIMonitorCheckCE(struct odm_dm_struct *pDM_Odm)
  1038. {
  1039. struct adapter *Adapter = pDM_Odm->Adapter;
  1040. struct hal_data_8188e *pHalData = GET_HAL_DATA(Adapter);
  1041. struct dm_priv *pdmpriv = &pHalData->dmpriv;
  1042. int i;
  1043. int tmpEntryMaxPWDB = 0, tmpEntryMinPWDB = 0xff;
  1044. u8 sta_cnt = 0;
  1045. u32 PWDB_rssi[NUM_STA] = {0};/* 0~15]:MACID, [16~31]:PWDB_rssi */
  1046. struct sta_info *psta;
  1047. u8 bcast_addr[ETH_ALEN] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
  1048. if (!check_fwstate(&Adapter->mlmepriv, _FW_LINKED))
  1049. return;
  1050. for (i = 0; i < ODM_ASSOCIATE_ENTRY_NUM; i++) {
  1051. psta = pDM_Odm->pODM_StaInfo[i];
  1052. if (IS_STA_VALID(psta) &&
  1053. (psta->state & WIFI_ASOC_STATE) &&
  1054. memcmp(psta->hwaddr, bcast_addr, ETH_ALEN) &&
  1055. memcmp(psta->hwaddr, myid(&Adapter->eeprompriv), ETH_ALEN)) {
  1056. if (psta->rssi_stat.UndecoratedSmoothedPWDB < tmpEntryMinPWDB)
  1057. tmpEntryMinPWDB = psta->rssi_stat.UndecoratedSmoothedPWDB;
  1058. if (psta->rssi_stat.UndecoratedSmoothedPWDB > tmpEntryMaxPWDB)
  1059. tmpEntryMaxPWDB = psta->rssi_stat.UndecoratedSmoothedPWDB;
  1060. if (psta->rssi_stat.UndecoratedSmoothedPWDB != (-1))
  1061. PWDB_rssi[sta_cnt++] = (psta->mac_id | (psta->rssi_stat.UndecoratedSmoothedPWDB<<16));
  1062. }
  1063. }
  1064. for (i = 0; i < sta_cnt; i++) {
  1065. if (PWDB_rssi[i] != 0) {
  1066. ODM_RA_SetRSSI_8188E(&pHalData->odmpriv,
  1067. PWDB_rssi[i] & 0xFF,
  1068. (PWDB_rssi[i] >> 16) & 0xFF);
  1069. }
  1070. }
  1071. if (tmpEntryMaxPWDB != 0) /* If associated entry is found */
  1072. pdmpriv->EntryMaxUndecoratedSmoothedPWDB = tmpEntryMaxPWDB;
  1073. else
  1074. pdmpriv->EntryMaxUndecoratedSmoothedPWDB = 0;
  1075. if (tmpEntryMinPWDB != 0xff) /* If associated entry is found */
  1076. pdmpriv->EntryMinUndecoratedSmoothedPWDB = tmpEntryMinPWDB;
  1077. else
  1078. pdmpriv->EntryMinUndecoratedSmoothedPWDB = 0;
  1079. FindMinimumRSSI(Adapter);
  1080. ODM_CmnInfoUpdate(&pHalData->odmpriv, ODM_CMNINFO_RSSI_MIN,
  1081. pdmpriv->MinUndecoratedPWDBForDM);
  1082. }
  1083. /* 3============================================================ */
  1084. /* 3 Tx Power Tracking */
  1085. /* 3============================================================ */
  1086. void odm_TXPowerTrackingInit(struct odm_dm_struct *pDM_Odm)
  1087. {
  1088. odm_TXPowerTrackingThermalMeterInit(pDM_Odm);
  1089. }
  1090. void odm_TXPowerTrackingThermalMeterInit(struct odm_dm_struct *pDM_Odm)
  1091. {
  1092. pDM_Odm->RFCalibrateInfo.bTXPowerTracking = true;
  1093. pDM_Odm->RFCalibrateInfo.TXPowercount = 0;
  1094. pDM_Odm->RFCalibrateInfo.bTXPowerTrackingInit = false;
  1095. if (*(pDM_Odm->mp_mode) != 1)
  1096. pDM_Odm->RFCalibrateInfo.TxPowerTrackControl = true;
  1097. MSG_88E("pDM_Odm TxPowerTrackControl = %d\n", pDM_Odm->RFCalibrateInfo.TxPowerTrackControl);
  1098. pDM_Odm->RFCalibrateInfo.TxPowerTrackControl = true;
  1099. }
  1100. void ODM_TXPowerTrackingCheck(struct odm_dm_struct *pDM_Odm)
  1101. {
  1102. /* 2011/09/29 MH In HW integration first stage, we provide 4 different handle to operate */
  1103. /* at the same time. In the stage2/3, we need to prive universal interface and merge all */
  1104. /* HW dynamic mechanism. */
  1105. odm_TXPowerTrackingCheckCE(pDM_Odm);
  1106. }
  1107. void odm_TXPowerTrackingCheckCE(struct odm_dm_struct *pDM_Odm)
  1108. {
  1109. struct adapter *Adapter = pDM_Odm->Adapter;
  1110. if (!(pDM_Odm->SupportAbility & ODM_RF_TX_PWR_TRACK))
  1111. return;
  1112. if (!pDM_Odm->RFCalibrateInfo.TM_Trigger) { /* at least delay 1 sec */
  1113. phy_set_rf_reg(Adapter, RF_PATH_A, RF_T_METER_88E, BIT(17) | BIT(16), 0x03);
  1114. pDM_Odm->RFCalibrateInfo.TM_Trigger = 1;
  1115. return;
  1116. } else {
  1117. rtl88eu_dm_txpower_tracking_callback_thermalmeter(Adapter);
  1118. pDM_Odm->RFCalibrateInfo.TM_Trigger = 0;
  1119. }
  1120. }
  1121. /* 3============================================================ */
  1122. /* 3 SW Antenna Diversity */
  1123. /* 3============================================================ */
  1124. void odm_InitHybridAntDiv(struct odm_dm_struct *pDM_Odm)
  1125. {
  1126. if (!(pDM_Odm->SupportAbility & ODM_BB_ANT_DIV)) {
  1127. ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Return: Not Support HW AntDiv\n"));
  1128. return;
  1129. }
  1130. rtl88eu_dm_antenna_div_init(pDM_Odm);
  1131. }
  1132. void odm_HwAntDiv(struct odm_dm_struct *pDM_Odm)
  1133. {
  1134. if (!(pDM_Odm->SupportAbility & ODM_BB_ANT_DIV)) {
  1135. ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Return: Not Support HW AntDiv\n"));
  1136. return;
  1137. }
  1138. rtl88eu_dm_antenna_diversity(pDM_Odm);
  1139. }
  1140. /* EDCA Turbo */
  1141. void ODM_EdcaTurboInit(struct odm_dm_struct *pDM_Odm)
  1142. {
  1143. struct adapter *Adapter = pDM_Odm->Adapter;
  1144. pDM_Odm->DM_EDCA_Table.bCurrentTurboEDCA = false;
  1145. pDM_Odm->DM_EDCA_Table.bIsCurRDLState = false;
  1146. Adapter->recvpriv.bIsAnyNonBEPkts = false;
  1147. ODM_RT_TRACE(pDM_Odm, ODM_COMP_EDCA_TURBO, ODM_DBG_LOUD, ("Orginial VO PARAM: 0x%x\n", usb_read32(Adapter, ODM_EDCA_VO_PARAM)));
  1148. ODM_RT_TRACE(pDM_Odm, ODM_COMP_EDCA_TURBO, ODM_DBG_LOUD, ("Orginial VI PARAM: 0x%x\n", usb_read32(Adapter, ODM_EDCA_VI_PARAM)));
  1149. ODM_RT_TRACE(pDM_Odm, ODM_COMP_EDCA_TURBO, ODM_DBG_LOUD, ("Orginial BE PARAM: 0x%x\n", usb_read32(Adapter, ODM_EDCA_BE_PARAM)));
  1150. ODM_RT_TRACE(pDM_Odm, ODM_COMP_EDCA_TURBO, ODM_DBG_LOUD, ("Orginial BK PARAM: 0x%x\n", usb_read32(Adapter, ODM_EDCA_BK_PARAM)));
  1151. } /* ODM_InitEdcaTurbo */
  1152. void odm_EdcaTurboCheck(struct odm_dm_struct *pDM_Odm)
  1153. {
  1154. /* 2011/09/29 MH In HW integration first stage, we provide 4 different handle to operate */
  1155. /* at the same time. In the stage2/3, we need to prive universal interface and merge all */
  1156. /* HW dynamic mechanism. */
  1157. ODM_RT_TRACE(pDM_Odm, ODM_COMP_EDCA_TURBO, ODM_DBG_LOUD, ("odm_EdcaTurboCheck========================>\n"));
  1158. if (!(pDM_Odm->SupportAbility & ODM_MAC_EDCA_TURBO))
  1159. return;
  1160. odm_EdcaTurboCheckCE(pDM_Odm);
  1161. ODM_RT_TRACE(pDM_Odm, ODM_COMP_EDCA_TURBO, ODM_DBG_LOUD, ("<========================odm_EdcaTurboCheck\n"));
  1162. } /* odm_CheckEdcaTurbo */
  1163. void odm_EdcaTurboCheckCE(struct odm_dm_struct *pDM_Odm)
  1164. {
  1165. struct adapter *Adapter = pDM_Odm->Adapter;
  1166. u32 trafficIndex;
  1167. u32 edca_param;
  1168. u64 cur_tx_bytes = 0;
  1169. u64 cur_rx_bytes = 0;
  1170. u8 bbtchange = false;
  1171. struct hal_data_8188e *pHalData = GET_HAL_DATA(Adapter);
  1172. struct xmit_priv *pxmitpriv = &(Adapter->xmitpriv);
  1173. struct recv_priv *precvpriv = &(Adapter->recvpriv);
  1174. struct registry_priv *pregpriv = &Adapter->registrypriv;
  1175. struct mlme_ext_priv *pmlmeext = &(Adapter->mlmeextpriv);
  1176. struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info);
  1177. if ((pregpriv->wifi_spec == 1))/* (pmlmeinfo->HT_enable == 0)) */
  1178. goto dm_CheckEdcaTurbo_EXIT;
  1179. if (pmlmeinfo->assoc_AP_vendor >= HT_IOT_PEER_MAX)
  1180. goto dm_CheckEdcaTurbo_EXIT;
  1181. /* Check if the status needs to be changed. */
  1182. if ((bbtchange) || (!precvpriv->bIsAnyNonBEPkts)) {
  1183. cur_tx_bytes = pxmitpriv->tx_bytes - pxmitpriv->last_tx_bytes;
  1184. cur_rx_bytes = precvpriv->rx_bytes - precvpriv->last_rx_bytes;
  1185. /* traffic, TX or RX */
  1186. if ((pmlmeinfo->assoc_AP_vendor == HT_IOT_PEER_RALINK) ||
  1187. (pmlmeinfo->assoc_AP_vendor == HT_IOT_PEER_ATHEROS)) {
  1188. if (cur_tx_bytes > (cur_rx_bytes << 2)) {
  1189. /* Uplink TP is present. */
  1190. trafficIndex = UP_LINK;
  1191. } else {
  1192. /* Balance TP is present. */
  1193. trafficIndex = DOWN_LINK;
  1194. }
  1195. } else {
  1196. if (cur_rx_bytes > (cur_tx_bytes << 2)) {
  1197. /* Downlink TP is present. */
  1198. trafficIndex = DOWN_LINK;
  1199. } else {
  1200. /* Balance TP is present. */
  1201. trafficIndex = UP_LINK;
  1202. }
  1203. }
  1204. if ((pDM_Odm->DM_EDCA_Table.prv_traffic_idx != trafficIndex) || (!pDM_Odm->DM_EDCA_Table.bCurrentTurboEDCA)) {
  1205. if ((pmlmeinfo->assoc_AP_vendor == HT_IOT_PEER_CISCO) && (pmlmeext->cur_wireless_mode & WIRELESS_11_24N))
  1206. edca_param = EDCAParam[pmlmeinfo->assoc_AP_vendor][trafficIndex];
  1207. else
  1208. edca_param = EDCAParam[HT_IOT_PEER_UNKNOWN][trafficIndex];
  1209. usb_write32(Adapter, REG_EDCA_BE_PARAM, edca_param);
  1210. pDM_Odm->DM_EDCA_Table.prv_traffic_idx = trafficIndex;
  1211. }
  1212. pDM_Odm->DM_EDCA_Table.bCurrentTurboEDCA = true;
  1213. } else {
  1214. /* Turn Off EDCA turbo here. */
  1215. /* Restore original EDCA according to the declaration of AP. */
  1216. if (pDM_Odm->DM_EDCA_Table.bCurrentTurboEDCA) {
  1217. usb_write32(Adapter, REG_EDCA_BE_PARAM, pHalData->AcParam_BE);
  1218. pDM_Odm->DM_EDCA_Table.bCurrentTurboEDCA = false;
  1219. }
  1220. }
  1221. dm_CheckEdcaTurbo_EXIT:
  1222. /* Set variables for next time. */
  1223. precvpriv->bIsAnyNonBEPkts = false;
  1224. pxmitpriv->last_tx_bytes = pxmitpriv->tx_bytes;
  1225. precvpriv->last_rx_bytes = precvpriv->rx_bytes;
  1226. }