rtl8712_cmdctrl_bitdef.h 3.2 KB

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  1. /******************************************************************************
  2. *
  3. * Copyright(c) 2007 - 2010 Realtek Corporation. All rights reserved.
  4. *
  5. * This program is free software; you can redistribute it and/or modify it
  6. * under the terms of version 2 of the GNU General Public License as
  7. * published by the Free Software Foundation.
  8. *
  9. * This program is distributed in the hope that it will be useful, but WITHOUT
  10. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  12. * more details.
  13. *
  14. * You should have received a copy of the GNU General Public License along with
  15. * this program; if not, write to the Free Software Foundation, Inc.,
  16. * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  17. *
  18. *
  19. ******************************************************************************/
  20. #ifndef __RTL8712_CMDCTRL_BITDEF_H__
  21. #define __RTL8712_CMDCTRL_BITDEF_H__
  22. /*
  23. * 2. Command Control Registers (Offset: 0x0040 - 0x004F)
  24. */
  25. /*--------------------------------------------------------------------------*/
  26. /* 8192S (CMD) command register bits (Offset 0x40, 16 bits)*/
  27. /*--------------------------------------------------------------------------*/
  28. #define _APSDOFF_STATUS BIT(15)
  29. #define _APSDOFF BIT(14)
  30. #define _BBRSTn BIT(13) /*Enable OFDM/CCK*/
  31. #define _BB_GLB_RSTn BIT(12) /*Enable BB*/
  32. #define _SCHEDULE_EN BIT(10) /*Enable MAC scheduler*/
  33. #define _MACRXEN BIT(9)
  34. #define _MACTXEN BIT(8)
  35. #define _DDMA_EN BIT(7) /*FW off load function enable*/
  36. #define _FW2HW_EN BIT(6) /*MAC every module reset */
  37. #define _RXDMA_EN BIT(5)
  38. #define _TXDMA_EN BIT(4)
  39. #define _HCI_RXDMA_EN BIT(3)
  40. #define _HCI_TXDMA_EN BIT(2)
  41. /*TXPAUSE*/
  42. #define _STOPHCCA BIT(6)
  43. #define _STOPHIGH BIT(5)
  44. #define _STOPMGT BIT(4)
  45. #define _STOPVO BIT(3)
  46. #define _STOPVI BIT(2)
  47. #define _STOPBE BIT(1)
  48. #define _STOPBK BIT(0)
  49. /*TCR*/
  50. #define _DISCW BIT(20)
  51. #define _ICV BIT(19)
  52. #define _CFEND_FMT BIT(17)
  53. #define _CRC BIT(16)
  54. #define _FWRDY BIT(7)
  55. #define _BASECHG BIT(6)
  56. #define _IMEM_RDY BIT(5)
  57. #define _DMEM_CODE_DONE BIT(4)
  58. #define _EMEM_CHK_RPT BIT(3)
  59. #define _EMEM_CODE_DONE BIT(2)
  60. #define _IMEM_CHK_RPT BIT(1)
  61. #define _IMEM_CODE_DONE BIT(0)
  62. #define _TXDMA_INIT_VALUE (_IMEM_CHK_RPT|_EMEM_CHK_RPT)
  63. /*RCR*/
  64. #define _ENMBID BIT(27)
  65. #define _APP_PHYST_RXFF BIT(25)
  66. #define _APP_PHYST_STAFF BIT(24)
  67. #define _CBSSID BIT(23)
  68. #define _APWRMGT BIT(22)
  69. #define _ADD3 BIT(21)
  70. #define _AMF BIT(20)
  71. #define _ACF BIT(19)
  72. #define _ADF BIT(18)
  73. #define _APP_MIC BIT(17)
  74. #define _APP_ICV BIT(16)
  75. #define _RXFTH_MSK 0x0000E000
  76. #define _RXFTH_SHT 13
  77. #define _AICV BIT(12)
  78. #define _RXPKTLMT_MSK 0x00000FC0
  79. #define _RXPKTLMT_SHT 6
  80. #define _ACRC32 BIT(5)
  81. #define _AB BIT(3)
  82. #define _AM BIT(2)
  83. #define _APM BIT(1)
  84. #define _AAP BIT(0)
  85. /*MSR*/
  86. #define _NETTYPE_MSK 0x03
  87. #define _NETTYPE_SHT 0
  88. /*BT*/
  89. #define _BTMODE_MSK 0x06
  90. #define _BTMODE_SHT 1
  91. #define _ENBT BIT(0)
  92. /*MBIDCTRL*/
  93. #define _ENMBID_MODE BIT(15)
  94. #define _BCNNO_MSK 0x7000
  95. #define _BCNNO_SHT 12
  96. #define _BCNSPACE_MSK 0x0FFF
  97. #define _BCNSPACE_SHT 0
  98. #endif /* __RTL8712_CMDCTRL_BITDEF_H__*/