rtl8712_edcasetting_bitdef.h 2.2 KB

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  1. /******************************************************************************
  2. *
  3. * Copyright(c) 2007 - 2010 Realtek Corporation. All rights reserved.
  4. *
  5. * This program is free software; you can redistribute it and/or modify it
  6. * under the terms of version 2 of the GNU General Public License as
  7. * published by the Free Software Foundation.
  8. *
  9. * This program is distributed in the hope that it will be useful, but WITHOUT
  10. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  12. * more details.
  13. *
  14. * You should have received a copy of the GNU General Public License along with
  15. * this program; if not, write to the Free Software Foundation, Inc.,
  16. * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  17. *
  18. * Modifications for inclusion into the Linux staging tree are
  19. * Copyright(c) 2010 Larry Finger. All rights reserved.
  20. *
  21. * Contact information:
  22. * WLAN FAE <wlanfae@realtek.com>
  23. * Larry Finger <Larry.Finger@lwfinger.net>
  24. *
  25. ******************************************************************************/
  26. #ifndef __RTL8712_EDCASETTING_BITDEF_H__
  27. #define __RTL8712_EDCASETTING_BITDEF_H__
  28. /*EDCAPARAM*/
  29. #define _TXOPLIMIT_MSK 0xFFFF0000
  30. #define _TXOPLIMIT_SHT 16
  31. #define _ECWIN_MSK 0x0000FF00
  32. #define _ECWIN_SHT 8
  33. #define _AIFS_MSK 0x000000FF
  34. #define _AIFS_SHT 0
  35. /*BCNTCFG*/
  36. #define _BCNECW_MSK 0xFF00
  37. #define _BCNECW_SHT 8
  38. #define _BCNIFS_MSK 0x00FF
  39. #define _BCNIFS_SHT 0
  40. /*CWRR*/
  41. #define _CWRR_MSK 0x03FF
  42. /*ACMAVG*/
  43. #define _AVG_TIME_UP BIT(3)
  44. #define _AVGPERIOD_MSK 0x03
  45. /*ACMHWCTRL*/
  46. #define _VOQ_ACM_STATUS BIT(6)
  47. #define _VIQ_ACM_STATUS BIT(5)
  48. #define _BEQ_ACM_STATUS BIT(4)
  49. #define _VOQ_ACM_EN BIT(3)
  50. #define _VIQ_ACM_EN BIT(2)
  51. #define _BEQ_ACM_EN BIT(1)
  52. #define _ACMHWEN BIT(0)
  53. /*VO_ADMTIME*/
  54. #define _VO_ACM_RUT BIT(18)
  55. #define _VO_ADMTIME_MSK 0x0003FFF
  56. /*VI_ADMTIME*/
  57. #define _VI_ACM_RUT BIT(18)
  58. #define _VI_ADMTIME_MSK 0x0003FFF
  59. /*BE_ADMTIME*/
  60. #define _BE_ACM_RUT BIT(18)
  61. #define _BE_ADMTIME_MSK 0x0003FFF
  62. /*Retry limit reg*/
  63. #define _SRL_MSK 0xFF00
  64. #define _SRL_SHT 8
  65. #define _LRL_MSK 0x00FF
  66. #define _LRL_SHT 0
  67. #endif /* __RTL8712_EDCASETTING_BITDEF_H__*/