udc.c 48 KB

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  1. /*
  2. * udc.c - ChipIdea UDC driver
  3. *
  4. * Copyright (C) 2008 Chipidea - MIPS Technologies, Inc. All rights reserved.
  5. *
  6. * Author: David Lopo
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License version 2 as
  10. * published by the Free Software Foundation.
  11. */
  12. #include <linux/delay.h>
  13. #include <linux/device.h>
  14. #include <linux/dmapool.h>
  15. #include <linux/err.h>
  16. #include <linux/irqreturn.h>
  17. #include <linux/kernel.h>
  18. #include <linux/slab.h>
  19. #include <linux/pm_runtime.h>
  20. #include <linux/usb/ch9.h>
  21. #include <linux/usb/gadget.h>
  22. #include <linux/usb/otg-fsm.h>
  23. #include <linux/usb/chipidea.h>
  24. #include "ci.h"
  25. #include "udc.h"
  26. #include "bits.h"
  27. #include "debug.h"
  28. #include "otg.h"
  29. #include "otg_fsm.h"
  30. /* control endpoint description */
  31. static const struct usb_endpoint_descriptor
  32. ctrl_endpt_out_desc = {
  33. .bLength = USB_DT_ENDPOINT_SIZE,
  34. .bDescriptorType = USB_DT_ENDPOINT,
  35. .bEndpointAddress = USB_DIR_OUT,
  36. .bmAttributes = USB_ENDPOINT_XFER_CONTROL,
  37. .wMaxPacketSize = cpu_to_le16(CTRL_PAYLOAD_MAX),
  38. };
  39. static const struct usb_endpoint_descriptor
  40. ctrl_endpt_in_desc = {
  41. .bLength = USB_DT_ENDPOINT_SIZE,
  42. .bDescriptorType = USB_DT_ENDPOINT,
  43. .bEndpointAddress = USB_DIR_IN,
  44. .bmAttributes = USB_ENDPOINT_XFER_CONTROL,
  45. .wMaxPacketSize = cpu_to_le16(CTRL_PAYLOAD_MAX),
  46. };
  47. /**
  48. * hw_ep_bit: calculates the bit number
  49. * @num: endpoint number
  50. * @dir: endpoint direction
  51. *
  52. * This function returns bit number
  53. */
  54. static inline int hw_ep_bit(int num, int dir)
  55. {
  56. return num + (dir ? 16 : 0);
  57. }
  58. static inline int ep_to_bit(struct ci_hdrc *ci, int n)
  59. {
  60. int fill = 16 - ci->hw_ep_max / 2;
  61. if (n >= ci->hw_ep_max / 2)
  62. n += fill;
  63. return n;
  64. }
  65. /**
  66. * hw_device_state: enables/disables interrupts (execute without interruption)
  67. * @dma: 0 => disable, !0 => enable and set dma engine
  68. *
  69. * This function returns an error code
  70. */
  71. static int hw_device_state(struct ci_hdrc *ci, u32 dma)
  72. {
  73. if (dma) {
  74. hw_write(ci, OP_ENDPTLISTADDR, ~0, dma);
  75. /* interrupt, error, port change, reset, sleep/suspend */
  76. hw_write(ci, OP_USBINTR, ~0,
  77. USBi_UI|USBi_UEI|USBi_PCI|USBi_URI|USBi_SLI);
  78. } else {
  79. hw_write(ci, OP_USBINTR, ~0, 0);
  80. }
  81. return 0;
  82. }
  83. /**
  84. * hw_ep_flush: flush endpoint fifo (execute without interruption)
  85. * @num: endpoint number
  86. * @dir: endpoint direction
  87. *
  88. * This function returns an error code
  89. */
  90. static int hw_ep_flush(struct ci_hdrc *ci, int num, int dir)
  91. {
  92. int n = hw_ep_bit(num, dir);
  93. do {
  94. /* flush any pending transfer */
  95. hw_write(ci, OP_ENDPTFLUSH, ~0, BIT(n));
  96. while (hw_read(ci, OP_ENDPTFLUSH, BIT(n)))
  97. cpu_relax();
  98. } while (hw_read(ci, OP_ENDPTSTAT, BIT(n)));
  99. return 0;
  100. }
  101. /**
  102. * hw_ep_disable: disables endpoint (execute without interruption)
  103. * @num: endpoint number
  104. * @dir: endpoint direction
  105. *
  106. * This function returns an error code
  107. */
  108. static int hw_ep_disable(struct ci_hdrc *ci, int num, int dir)
  109. {
  110. hw_ep_flush(ci, num, dir);
  111. hw_write(ci, OP_ENDPTCTRL + num,
  112. dir ? ENDPTCTRL_TXE : ENDPTCTRL_RXE, 0);
  113. return 0;
  114. }
  115. /**
  116. * hw_ep_enable: enables endpoint (execute without interruption)
  117. * @num: endpoint number
  118. * @dir: endpoint direction
  119. * @type: endpoint type
  120. *
  121. * This function returns an error code
  122. */
  123. static int hw_ep_enable(struct ci_hdrc *ci, int num, int dir, int type)
  124. {
  125. u32 mask, data;
  126. if (dir) {
  127. mask = ENDPTCTRL_TXT; /* type */
  128. data = type << __ffs(mask);
  129. mask |= ENDPTCTRL_TXS; /* unstall */
  130. mask |= ENDPTCTRL_TXR; /* reset data toggle */
  131. data |= ENDPTCTRL_TXR;
  132. mask |= ENDPTCTRL_TXE; /* enable */
  133. data |= ENDPTCTRL_TXE;
  134. } else {
  135. mask = ENDPTCTRL_RXT; /* type */
  136. data = type << __ffs(mask);
  137. mask |= ENDPTCTRL_RXS; /* unstall */
  138. mask |= ENDPTCTRL_RXR; /* reset data toggle */
  139. data |= ENDPTCTRL_RXR;
  140. mask |= ENDPTCTRL_RXE; /* enable */
  141. data |= ENDPTCTRL_RXE;
  142. }
  143. hw_write(ci, OP_ENDPTCTRL + num, mask, data);
  144. return 0;
  145. }
  146. /**
  147. * hw_ep_get_halt: return endpoint halt status
  148. * @num: endpoint number
  149. * @dir: endpoint direction
  150. *
  151. * This function returns 1 if endpoint halted
  152. */
  153. static int hw_ep_get_halt(struct ci_hdrc *ci, int num, int dir)
  154. {
  155. u32 mask = dir ? ENDPTCTRL_TXS : ENDPTCTRL_RXS;
  156. return hw_read(ci, OP_ENDPTCTRL + num, mask) ? 1 : 0;
  157. }
  158. /**
  159. * hw_ep_prime: primes endpoint (execute without interruption)
  160. * @num: endpoint number
  161. * @dir: endpoint direction
  162. * @is_ctrl: true if control endpoint
  163. *
  164. * This function returns an error code
  165. */
  166. static int hw_ep_prime(struct ci_hdrc *ci, int num, int dir, int is_ctrl)
  167. {
  168. int n = hw_ep_bit(num, dir);
  169. if (is_ctrl && dir == RX && hw_read(ci, OP_ENDPTSETUPSTAT, BIT(num)))
  170. return -EAGAIN;
  171. hw_write(ci, OP_ENDPTPRIME, ~0, BIT(n));
  172. while (hw_read(ci, OP_ENDPTPRIME, BIT(n)))
  173. cpu_relax();
  174. if (is_ctrl && dir == RX && hw_read(ci, OP_ENDPTSETUPSTAT, BIT(num)))
  175. return -EAGAIN;
  176. /* status shoult be tested according with manual but it doesn't work */
  177. return 0;
  178. }
  179. /**
  180. * hw_ep_set_halt: configures ep halt & resets data toggle after clear (execute
  181. * without interruption)
  182. * @num: endpoint number
  183. * @dir: endpoint direction
  184. * @value: true => stall, false => unstall
  185. *
  186. * This function returns an error code
  187. */
  188. static int hw_ep_set_halt(struct ci_hdrc *ci, int num, int dir, int value)
  189. {
  190. if (value != 0 && value != 1)
  191. return -EINVAL;
  192. do {
  193. enum ci_hw_regs reg = OP_ENDPTCTRL + num;
  194. u32 mask_xs = dir ? ENDPTCTRL_TXS : ENDPTCTRL_RXS;
  195. u32 mask_xr = dir ? ENDPTCTRL_TXR : ENDPTCTRL_RXR;
  196. /* data toggle - reserved for EP0 but it's in ESS */
  197. hw_write(ci, reg, mask_xs|mask_xr,
  198. value ? mask_xs : mask_xr);
  199. } while (value != hw_ep_get_halt(ci, num, dir));
  200. return 0;
  201. }
  202. /**
  203. * hw_is_port_high_speed: test if port is high speed
  204. *
  205. * This function returns true if high speed port
  206. */
  207. static int hw_port_is_high_speed(struct ci_hdrc *ci)
  208. {
  209. return ci->hw_bank.lpm ? hw_read(ci, OP_DEVLC, DEVLC_PSPD) :
  210. hw_read(ci, OP_PORTSC, PORTSC_HSP);
  211. }
  212. /**
  213. * hw_test_and_clear_complete: test & clear complete status (execute without
  214. * interruption)
  215. * @n: endpoint number
  216. *
  217. * This function returns complete status
  218. */
  219. static int hw_test_and_clear_complete(struct ci_hdrc *ci, int n)
  220. {
  221. n = ep_to_bit(ci, n);
  222. return hw_test_and_clear(ci, OP_ENDPTCOMPLETE, BIT(n));
  223. }
  224. /**
  225. * hw_test_and_clear_intr_active: test & clear active interrupts (execute
  226. * without interruption)
  227. *
  228. * This function returns active interrutps
  229. */
  230. static u32 hw_test_and_clear_intr_active(struct ci_hdrc *ci)
  231. {
  232. u32 reg = hw_read_intr_status(ci) & hw_read_intr_enable(ci);
  233. hw_write(ci, OP_USBSTS, ~0, reg);
  234. return reg;
  235. }
  236. /**
  237. * hw_test_and_clear_setup_guard: test & clear setup guard (execute without
  238. * interruption)
  239. *
  240. * This function returns guard value
  241. */
  242. static int hw_test_and_clear_setup_guard(struct ci_hdrc *ci)
  243. {
  244. return hw_test_and_write(ci, OP_USBCMD, USBCMD_SUTW, 0);
  245. }
  246. /**
  247. * hw_test_and_set_setup_guard: test & set setup guard (execute without
  248. * interruption)
  249. *
  250. * This function returns guard value
  251. */
  252. static int hw_test_and_set_setup_guard(struct ci_hdrc *ci)
  253. {
  254. return hw_test_and_write(ci, OP_USBCMD, USBCMD_SUTW, USBCMD_SUTW);
  255. }
  256. /**
  257. * hw_usb_set_address: configures USB address (execute without interruption)
  258. * @value: new USB address
  259. *
  260. * This function explicitly sets the address, without the "USBADRA" (advance)
  261. * feature, which is not supported by older versions of the controller.
  262. */
  263. static void hw_usb_set_address(struct ci_hdrc *ci, u8 value)
  264. {
  265. hw_write(ci, OP_DEVICEADDR, DEVICEADDR_USBADR,
  266. value << __ffs(DEVICEADDR_USBADR));
  267. }
  268. /**
  269. * hw_usb_reset: restart device after a bus reset (execute without
  270. * interruption)
  271. *
  272. * This function returns an error code
  273. */
  274. static int hw_usb_reset(struct ci_hdrc *ci)
  275. {
  276. hw_usb_set_address(ci, 0);
  277. /* ESS flushes only at end?!? */
  278. hw_write(ci, OP_ENDPTFLUSH, ~0, ~0);
  279. /* clear setup token semaphores */
  280. hw_write(ci, OP_ENDPTSETUPSTAT, 0, 0);
  281. /* clear complete status */
  282. hw_write(ci, OP_ENDPTCOMPLETE, 0, 0);
  283. /* wait until all bits cleared */
  284. while (hw_read(ci, OP_ENDPTPRIME, ~0))
  285. udelay(10); /* not RTOS friendly */
  286. /* reset all endpoints ? */
  287. /* reset internal status and wait for further instructions
  288. no need to verify the port reset status (ESS does it) */
  289. return 0;
  290. }
  291. /******************************************************************************
  292. * UTIL block
  293. *****************************************************************************/
  294. static int add_td_to_list(struct ci_hw_ep *hwep, struct ci_hw_req *hwreq,
  295. unsigned length)
  296. {
  297. int i;
  298. u32 temp;
  299. struct td_node *lastnode, *node = kzalloc(sizeof(struct td_node),
  300. GFP_ATOMIC);
  301. if (node == NULL)
  302. return -ENOMEM;
  303. node->ptr = dma_pool_alloc(hwep->td_pool, GFP_ATOMIC,
  304. &node->dma);
  305. if (node->ptr == NULL) {
  306. kfree(node);
  307. return -ENOMEM;
  308. }
  309. memset(node->ptr, 0, sizeof(struct ci_hw_td));
  310. node->ptr->token = cpu_to_le32(length << __ffs(TD_TOTAL_BYTES));
  311. node->ptr->token &= cpu_to_le32(TD_TOTAL_BYTES);
  312. node->ptr->token |= cpu_to_le32(TD_STATUS_ACTIVE);
  313. if (hwep->type == USB_ENDPOINT_XFER_ISOC && hwep->dir == TX) {
  314. u32 mul = hwreq->req.length / hwep->ep.maxpacket;
  315. if (hwreq->req.length == 0
  316. || hwreq->req.length % hwep->ep.maxpacket)
  317. mul++;
  318. node->ptr->token |= mul << __ffs(TD_MULTO);
  319. }
  320. temp = (u32) (hwreq->req.dma + hwreq->req.actual);
  321. if (length) {
  322. node->ptr->page[0] = cpu_to_le32(temp);
  323. for (i = 1; i < TD_PAGE_COUNT; i++) {
  324. u32 page = temp + i * CI_HDRC_PAGE_SIZE;
  325. page &= ~TD_RESERVED_MASK;
  326. node->ptr->page[i] = cpu_to_le32(page);
  327. }
  328. }
  329. hwreq->req.actual += length;
  330. if (!list_empty(&hwreq->tds)) {
  331. /* get the last entry */
  332. lastnode = list_entry(hwreq->tds.prev,
  333. struct td_node, td);
  334. lastnode->ptr->next = cpu_to_le32(node->dma);
  335. }
  336. INIT_LIST_HEAD(&node->td);
  337. list_add_tail(&node->td, &hwreq->tds);
  338. return 0;
  339. }
  340. /**
  341. * _usb_addr: calculates endpoint address from direction & number
  342. * @ep: endpoint
  343. */
  344. static inline u8 _usb_addr(struct ci_hw_ep *ep)
  345. {
  346. return ((ep->dir == TX) ? USB_ENDPOINT_DIR_MASK : 0) | ep->num;
  347. }
  348. /**
  349. * _hardware_queue: configures a request at hardware level
  350. * @gadget: gadget
  351. * @hwep: endpoint
  352. *
  353. * This function returns an error code
  354. */
  355. static int _hardware_enqueue(struct ci_hw_ep *hwep, struct ci_hw_req *hwreq)
  356. {
  357. struct ci_hdrc *ci = hwep->ci;
  358. int ret = 0;
  359. unsigned rest = hwreq->req.length;
  360. int pages = TD_PAGE_COUNT;
  361. struct td_node *firstnode, *lastnode;
  362. /* don't queue twice */
  363. if (hwreq->req.status == -EALREADY)
  364. return -EALREADY;
  365. hwreq->req.status = -EALREADY;
  366. ret = usb_gadget_map_request(&ci->gadget, &hwreq->req, hwep->dir);
  367. if (ret)
  368. return ret;
  369. /*
  370. * The first buffer could be not page aligned.
  371. * In that case we have to span into one extra td.
  372. */
  373. if (hwreq->req.dma % PAGE_SIZE)
  374. pages--;
  375. if (rest == 0)
  376. add_td_to_list(hwep, hwreq, 0);
  377. while (rest > 0) {
  378. unsigned count = min(hwreq->req.length - hwreq->req.actual,
  379. (unsigned)(pages * CI_HDRC_PAGE_SIZE));
  380. add_td_to_list(hwep, hwreq, count);
  381. rest -= count;
  382. }
  383. if (hwreq->req.zero && hwreq->req.length && hwep->dir == TX
  384. && (hwreq->req.length % hwep->ep.maxpacket == 0))
  385. add_td_to_list(hwep, hwreq, 0);
  386. firstnode = list_first_entry(&hwreq->tds, struct td_node, td);
  387. lastnode = list_entry(hwreq->tds.prev,
  388. struct td_node, td);
  389. lastnode->ptr->next = cpu_to_le32(TD_TERMINATE);
  390. if (!hwreq->req.no_interrupt)
  391. lastnode->ptr->token |= cpu_to_le32(TD_IOC);
  392. wmb();
  393. hwreq->req.actual = 0;
  394. if (!list_empty(&hwep->qh.queue)) {
  395. struct ci_hw_req *hwreqprev;
  396. int n = hw_ep_bit(hwep->num, hwep->dir);
  397. int tmp_stat;
  398. struct td_node *prevlastnode;
  399. u32 next = firstnode->dma & TD_ADDR_MASK;
  400. hwreqprev = list_entry(hwep->qh.queue.prev,
  401. struct ci_hw_req, queue);
  402. prevlastnode = list_entry(hwreqprev->tds.prev,
  403. struct td_node, td);
  404. prevlastnode->ptr->next = cpu_to_le32(next);
  405. wmb();
  406. if (hw_read(ci, OP_ENDPTPRIME, BIT(n)))
  407. goto done;
  408. do {
  409. hw_write(ci, OP_USBCMD, USBCMD_ATDTW, USBCMD_ATDTW);
  410. tmp_stat = hw_read(ci, OP_ENDPTSTAT, BIT(n));
  411. } while (!hw_read(ci, OP_USBCMD, USBCMD_ATDTW));
  412. hw_write(ci, OP_USBCMD, USBCMD_ATDTW, 0);
  413. if (tmp_stat)
  414. goto done;
  415. }
  416. /* QH configuration */
  417. hwep->qh.ptr->td.next = cpu_to_le32(firstnode->dma);
  418. hwep->qh.ptr->td.token &=
  419. cpu_to_le32(~(TD_STATUS_HALTED|TD_STATUS_ACTIVE));
  420. if (hwep->type == USB_ENDPOINT_XFER_ISOC && hwep->dir == RX) {
  421. u32 mul = hwreq->req.length / hwep->ep.maxpacket;
  422. if (hwreq->req.length == 0
  423. || hwreq->req.length % hwep->ep.maxpacket)
  424. mul++;
  425. hwep->qh.ptr->cap |= mul << __ffs(QH_MULT);
  426. }
  427. wmb(); /* synchronize before ep prime */
  428. ret = hw_ep_prime(ci, hwep->num, hwep->dir,
  429. hwep->type == USB_ENDPOINT_XFER_CONTROL);
  430. done:
  431. return ret;
  432. }
  433. /*
  434. * free_pending_td: remove a pending request for the endpoint
  435. * @hwep: endpoint
  436. */
  437. static void free_pending_td(struct ci_hw_ep *hwep)
  438. {
  439. struct td_node *pending = hwep->pending_td;
  440. dma_pool_free(hwep->td_pool, pending->ptr, pending->dma);
  441. hwep->pending_td = NULL;
  442. kfree(pending);
  443. }
  444. static int reprime_dtd(struct ci_hdrc *ci, struct ci_hw_ep *hwep,
  445. struct td_node *node)
  446. {
  447. hwep->qh.ptr->td.next = node->dma;
  448. hwep->qh.ptr->td.token &=
  449. cpu_to_le32(~(TD_STATUS_HALTED | TD_STATUS_ACTIVE));
  450. /* Synchronize before ep prime */
  451. wmb();
  452. return hw_ep_prime(ci, hwep->num, hwep->dir,
  453. hwep->type == USB_ENDPOINT_XFER_CONTROL);
  454. }
  455. /**
  456. * _hardware_dequeue: handles a request at hardware level
  457. * @gadget: gadget
  458. * @hwep: endpoint
  459. *
  460. * This function returns an error code
  461. */
  462. static int _hardware_dequeue(struct ci_hw_ep *hwep, struct ci_hw_req *hwreq)
  463. {
  464. u32 tmptoken;
  465. struct td_node *node, *tmpnode;
  466. unsigned remaining_length;
  467. unsigned actual = hwreq->req.length;
  468. struct ci_hdrc *ci = hwep->ci;
  469. if (hwreq->req.status != -EALREADY)
  470. return -EINVAL;
  471. hwreq->req.status = 0;
  472. list_for_each_entry_safe(node, tmpnode, &hwreq->tds, td) {
  473. tmptoken = le32_to_cpu(node->ptr->token);
  474. if ((TD_STATUS_ACTIVE & tmptoken) != 0) {
  475. int n = hw_ep_bit(hwep->num, hwep->dir);
  476. if (ci->rev == CI_REVISION_24)
  477. if (!hw_read(ci, OP_ENDPTSTAT, BIT(n)))
  478. reprime_dtd(ci, hwep, node);
  479. hwreq->req.status = -EALREADY;
  480. return -EBUSY;
  481. }
  482. remaining_length = (tmptoken & TD_TOTAL_BYTES);
  483. remaining_length >>= __ffs(TD_TOTAL_BYTES);
  484. actual -= remaining_length;
  485. hwreq->req.status = tmptoken & TD_STATUS;
  486. if ((TD_STATUS_HALTED & hwreq->req.status)) {
  487. hwreq->req.status = -EPIPE;
  488. break;
  489. } else if ((TD_STATUS_DT_ERR & hwreq->req.status)) {
  490. hwreq->req.status = -EPROTO;
  491. break;
  492. } else if ((TD_STATUS_TR_ERR & hwreq->req.status)) {
  493. hwreq->req.status = -EILSEQ;
  494. break;
  495. }
  496. if (remaining_length) {
  497. if (hwep->dir) {
  498. hwreq->req.status = -EPROTO;
  499. break;
  500. }
  501. }
  502. /*
  503. * As the hardware could still address the freed td
  504. * which will run the udc unusable, the cleanup of the
  505. * td has to be delayed by one.
  506. */
  507. if (hwep->pending_td)
  508. free_pending_td(hwep);
  509. hwep->pending_td = node;
  510. list_del_init(&node->td);
  511. }
  512. usb_gadget_unmap_request(&hwep->ci->gadget, &hwreq->req, hwep->dir);
  513. hwreq->req.actual += actual;
  514. if (hwreq->req.status)
  515. return hwreq->req.status;
  516. return hwreq->req.actual;
  517. }
  518. /**
  519. * _ep_nuke: dequeues all endpoint requests
  520. * @hwep: endpoint
  521. *
  522. * This function returns an error code
  523. * Caller must hold lock
  524. */
  525. static int _ep_nuke(struct ci_hw_ep *hwep)
  526. __releases(hwep->lock)
  527. __acquires(hwep->lock)
  528. {
  529. struct td_node *node, *tmpnode;
  530. if (hwep == NULL)
  531. return -EINVAL;
  532. hw_ep_flush(hwep->ci, hwep->num, hwep->dir);
  533. while (!list_empty(&hwep->qh.queue)) {
  534. /* pop oldest request */
  535. struct ci_hw_req *hwreq = list_entry(hwep->qh.queue.next,
  536. struct ci_hw_req, queue);
  537. list_for_each_entry_safe(node, tmpnode, &hwreq->tds, td) {
  538. dma_pool_free(hwep->td_pool, node->ptr, node->dma);
  539. list_del_init(&node->td);
  540. node->ptr = NULL;
  541. kfree(node);
  542. }
  543. list_del_init(&hwreq->queue);
  544. hwreq->req.status = -ESHUTDOWN;
  545. if (hwreq->req.complete != NULL) {
  546. spin_unlock(hwep->lock);
  547. usb_gadget_giveback_request(&hwep->ep, &hwreq->req);
  548. spin_lock(hwep->lock);
  549. }
  550. }
  551. if (hwep->pending_td)
  552. free_pending_td(hwep);
  553. return 0;
  554. }
  555. static int _ep_set_halt(struct usb_ep *ep, int value, bool check_transfer)
  556. {
  557. struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
  558. int direction, retval = 0;
  559. unsigned long flags;
  560. if (ep == NULL || hwep->ep.desc == NULL)
  561. return -EINVAL;
  562. if (usb_endpoint_xfer_isoc(hwep->ep.desc))
  563. return -EOPNOTSUPP;
  564. spin_lock_irqsave(hwep->lock, flags);
  565. if (value && hwep->dir == TX && check_transfer &&
  566. !list_empty(&hwep->qh.queue) &&
  567. !usb_endpoint_xfer_control(hwep->ep.desc)) {
  568. spin_unlock_irqrestore(hwep->lock, flags);
  569. return -EAGAIN;
  570. }
  571. direction = hwep->dir;
  572. do {
  573. retval |= hw_ep_set_halt(hwep->ci, hwep->num, hwep->dir, value);
  574. if (!value)
  575. hwep->wedge = 0;
  576. if (hwep->type == USB_ENDPOINT_XFER_CONTROL)
  577. hwep->dir = (hwep->dir == TX) ? RX : TX;
  578. } while (hwep->dir != direction);
  579. spin_unlock_irqrestore(hwep->lock, flags);
  580. return retval;
  581. }
  582. /**
  583. * _gadget_stop_activity: stops all USB activity, flushes & disables all endpts
  584. * @gadget: gadget
  585. *
  586. * This function returns an error code
  587. */
  588. static int _gadget_stop_activity(struct usb_gadget *gadget)
  589. {
  590. struct usb_ep *ep;
  591. struct ci_hdrc *ci = container_of(gadget, struct ci_hdrc, gadget);
  592. unsigned long flags;
  593. spin_lock_irqsave(&ci->lock, flags);
  594. ci->gadget.speed = USB_SPEED_UNKNOWN;
  595. ci->remote_wakeup = 0;
  596. ci->suspended = 0;
  597. spin_unlock_irqrestore(&ci->lock, flags);
  598. /* flush all endpoints */
  599. gadget_for_each_ep(ep, gadget) {
  600. usb_ep_fifo_flush(ep);
  601. }
  602. usb_ep_fifo_flush(&ci->ep0out->ep);
  603. usb_ep_fifo_flush(&ci->ep0in->ep);
  604. /* make sure to disable all endpoints */
  605. gadget_for_each_ep(ep, gadget) {
  606. usb_ep_disable(ep);
  607. }
  608. if (ci->status != NULL) {
  609. usb_ep_free_request(&ci->ep0in->ep, ci->status);
  610. ci->status = NULL;
  611. }
  612. return 0;
  613. }
  614. /******************************************************************************
  615. * ISR block
  616. *****************************************************************************/
  617. /**
  618. * isr_reset_handler: USB reset interrupt handler
  619. * @ci: UDC device
  620. *
  621. * This function resets USB engine after a bus reset occurred
  622. */
  623. static void isr_reset_handler(struct ci_hdrc *ci)
  624. __releases(ci->lock)
  625. __acquires(ci->lock)
  626. {
  627. int retval;
  628. spin_unlock(&ci->lock);
  629. if (ci->gadget.speed != USB_SPEED_UNKNOWN)
  630. usb_gadget_udc_reset(&ci->gadget, ci->driver);
  631. retval = _gadget_stop_activity(&ci->gadget);
  632. if (retval)
  633. goto done;
  634. retval = hw_usb_reset(ci);
  635. if (retval)
  636. goto done;
  637. ci->status = usb_ep_alloc_request(&ci->ep0in->ep, GFP_ATOMIC);
  638. if (ci->status == NULL)
  639. retval = -ENOMEM;
  640. done:
  641. spin_lock(&ci->lock);
  642. if (retval)
  643. dev_err(ci->dev, "error: %i\n", retval);
  644. }
  645. /**
  646. * isr_get_status_complete: get_status request complete function
  647. * @ep: endpoint
  648. * @req: request handled
  649. *
  650. * Caller must release lock
  651. */
  652. static void isr_get_status_complete(struct usb_ep *ep, struct usb_request *req)
  653. {
  654. if (ep == NULL || req == NULL)
  655. return;
  656. kfree(req->buf);
  657. usb_ep_free_request(ep, req);
  658. }
  659. /**
  660. * _ep_queue: queues (submits) an I/O request to an endpoint
  661. *
  662. * Caller must hold lock
  663. */
  664. static int _ep_queue(struct usb_ep *ep, struct usb_request *req,
  665. gfp_t __maybe_unused gfp_flags)
  666. {
  667. struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
  668. struct ci_hw_req *hwreq = container_of(req, struct ci_hw_req, req);
  669. struct ci_hdrc *ci = hwep->ci;
  670. int retval = 0;
  671. if (ep == NULL || req == NULL || hwep->ep.desc == NULL)
  672. return -EINVAL;
  673. if (hwep->type == USB_ENDPOINT_XFER_CONTROL) {
  674. if (req->length)
  675. hwep = (ci->ep0_dir == RX) ?
  676. ci->ep0out : ci->ep0in;
  677. if (!list_empty(&hwep->qh.queue)) {
  678. _ep_nuke(hwep);
  679. retval = -EOVERFLOW;
  680. dev_warn(hwep->ci->dev, "endpoint ctrl %X nuked\n",
  681. _usb_addr(hwep));
  682. }
  683. }
  684. if (usb_endpoint_xfer_isoc(hwep->ep.desc) &&
  685. hwreq->req.length > (1 + hwep->ep.mult) * hwep->ep.maxpacket) {
  686. dev_err(hwep->ci->dev, "request length too big for isochronous\n");
  687. return -EMSGSIZE;
  688. }
  689. /* first nuke then test link, e.g. previous status has not sent */
  690. if (!list_empty(&hwreq->queue)) {
  691. dev_err(hwep->ci->dev, "request already in queue\n");
  692. return -EBUSY;
  693. }
  694. /* push request */
  695. hwreq->req.status = -EINPROGRESS;
  696. hwreq->req.actual = 0;
  697. retval = _hardware_enqueue(hwep, hwreq);
  698. if (retval == -EALREADY)
  699. retval = 0;
  700. if (!retval)
  701. list_add_tail(&hwreq->queue, &hwep->qh.queue);
  702. return retval;
  703. }
  704. /**
  705. * isr_get_status_response: get_status request response
  706. * @ci: ci struct
  707. * @setup: setup request packet
  708. *
  709. * This function returns an error code
  710. */
  711. static int isr_get_status_response(struct ci_hdrc *ci,
  712. struct usb_ctrlrequest *setup)
  713. __releases(hwep->lock)
  714. __acquires(hwep->lock)
  715. {
  716. struct ci_hw_ep *hwep = ci->ep0in;
  717. struct usb_request *req = NULL;
  718. gfp_t gfp_flags = GFP_ATOMIC;
  719. int dir, num, retval;
  720. if (hwep == NULL || setup == NULL)
  721. return -EINVAL;
  722. spin_unlock(hwep->lock);
  723. req = usb_ep_alloc_request(&hwep->ep, gfp_flags);
  724. spin_lock(hwep->lock);
  725. if (req == NULL)
  726. return -ENOMEM;
  727. req->complete = isr_get_status_complete;
  728. req->length = 2;
  729. req->buf = kzalloc(req->length, gfp_flags);
  730. if (req->buf == NULL) {
  731. retval = -ENOMEM;
  732. goto err_free_req;
  733. }
  734. if ((setup->bRequestType & USB_RECIP_MASK) == USB_RECIP_DEVICE) {
  735. *(u16 *)req->buf = (ci->remote_wakeup << 1) |
  736. ci->gadget.is_selfpowered;
  737. } else if ((setup->bRequestType & USB_RECIP_MASK) \
  738. == USB_RECIP_ENDPOINT) {
  739. dir = (le16_to_cpu(setup->wIndex) & USB_ENDPOINT_DIR_MASK) ?
  740. TX : RX;
  741. num = le16_to_cpu(setup->wIndex) & USB_ENDPOINT_NUMBER_MASK;
  742. *(u16 *)req->buf = hw_ep_get_halt(ci, num, dir);
  743. }
  744. /* else do nothing; reserved for future use */
  745. retval = _ep_queue(&hwep->ep, req, gfp_flags);
  746. if (retval)
  747. goto err_free_buf;
  748. return 0;
  749. err_free_buf:
  750. kfree(req->buf);
  751. err_free_req:
  752. spin_unlock(hwep->lock);
  753. usb_ep_free_request(&hwep->ep, req);
  754. spin_lock(hwep->lock);
  755. return retval;
  756. }
  757. /**
  758. * isr_setup_status_complete: setup_status request complete function
  759. * @ep: endpoint
  760. * @req: request handled
  761. *
  762. * Caller must release lock. Put the port in test mode if test mode
  763. * feature is selected.
  764. */
  765. static void
  766. isr_setup_status_complete(struct usb_ep *ep, struct usb_request *req)
  767. {
  768. struct ci_hdrc *ci = req->context;
  769. unsigned long flags;
  770. if (ci->setaddr) {
  771. hw_usb_set_address(ci, ci->address);
  772. ci->setaddr = false;
  773. if (ci->address)
  774. usb_gadget_set_state(&ci->gadget, USB_STATE_ADDRESS);
  775. }
  776. spin_lock_irqsave(&ci->lock, flags);
  777. if (ci->test_mode)
  778. hw_port_test_set(ci, ci->test_mode);
  779. spin_unlock_irqrestore(&ci->lock, flags);
  780. }
  781. /**
  782. * isr_setup_status_phase: queues the status phase of a setup transation
  783. * @ci: ci struct
  784. *
  785. * This function returns an error code
  786. */
  787. static int isr_setup_status_phase(struct ci_hdrc *ci)
  788. {
  789. int retval;
  790. struct ci_hw_ep *hwep;
  791. /*
  792. * Unexpected USB controller behavior, caused by bad signal integrity
  793. * or ground reference problems, can lead to isr_setup_status_phase
  794. * being called with ci->status equal to NULL.
  795. * If this situation occurs, you should review your USB hardware design.
  796. */
  797. if (WARN_ON_ONCE(!ci->status))
  798. return -EPIPE;
  799. hwep = (ci->ep0_dir == TX) ? ci->ep0out : ci->ep0in;
  800. ci->status->context = ci;
  801. ci->status->complete = isr_setup_status_complete;
  802. retval = _ep_queue(&hwep->ep, ci->status, GFP_ATOMIC);
  803. return retval;
  804. }
  805. /**
  806. * isr_tr_complete_low: transaction complete low level handler
  807. * @hwep: endpoint
  808. *
  809. * This function returns an error code
  810. * Caller must hold lock
  811. */
  812. static int isr_tr_complete_low(struct ci_hw_ep *hwep)
  813. __releases(hwep->lock)
  814. __acquires(hwep->lock)
  815. {
  816. struct ci_hw_req *hwreq, *hwreqtemp;
  817. struct ci_hw_ep *hweptemp = hwep;
  818. int retval = 0;
  819. list_for_each_entry_safe(hwreq, hwreqtemp, &hwep->qh.queue,
  820. queue) {
  821. retval = _hardware_dequeue(hwep, hwreq);
  822. if (retval < 0)
  823. break;
  824. list_del_init(&hwreq->queue);
  825. if (hwreq->req.complete != NULL) {
  826. spin_unlock(hwep->lock);
  827. if ((hwep->type == USB_ENDPOINT_XFER_CONTROL) &&
  828. hwreq->req.length)
  829. hweptemp = hwep->ci->ep0in;
  830. usb_gadget_giveback_request(&hweptemp->ep, &hwreq->req);
  831. spin_lock(hwep->lock);
  832. }
  833. }
  834. if (retval == -EBUSY)
  835. retval = 0;
  836. return retval;
  837. }
  838. static int otg_a_alt_hnp_support(struct ci_hdrc *ci)
  839. {
  840. dev_warn(&ci->gadget.dev,
  841. "connect the device to an alternate port if you want HNP\n");
  842. return isr_setup_status_phase(ci);
  843. }
  844. /**
  845. * isr_setup_packet_handler: setup packet handler
  846. * @ci: UDC descriptor
  847. *
  848. * This function handles setup packet
  849. */
  850. static void isr_setup_packet_handler(struct ci_hdrc *ci)
  851. __releases(ci->lock)
  852. __acquires(ci->lock)
  853. {
  854. struct ci_hw_ep *hwep = &ci->ci_hw_ep[0];
  855. struct usb_ctrlrequest req;
  856. int type, num, dir, err = -EINVAL;
  857. u8 tmode = 0;
  858. /*
  859. * Flush data and handshake transactions of previous
  860. * setup packet.
  861. */
  862. _ep_nuke(ci->ep0out);
  863. _ep_nuke(ci->ep0in);
  864. /* read_setup_packet */
  865. do {
  866. hw_test_and_set_setup_guard(ci);
  867. memcpy(&req, &hwep->qh.ptr->setup, sizeof(req));
  868. } while (!hw_test_and_clear_setup_guard(ci));
  869. type = req.bRequestType;
  870. ci->ep0_dir = (type & USB_DIR_IN) ? TX : RX;
  871. switch (req.bRequest) {
  872. case USB_REQ_CLEAR_FEATURE:
  873. if (type == (USB_DIR_OUT|USB_RECIP_ENDPOINT) &&
  874. le16_to_cpu(req.wValue) ==
  875. USB_ENDPOINT_HALT) {
  876. if (req.wLength != 0)
  877. break;
  878. num = le16_to_cpu(req.wIndex);
  879. dir = num & USB_ENDPOINT_DIR_MASK;
  880. num &= USB_ENDPOINT_NUMBER_MASK;
  881. if (dir) /* TX */
  882. num += ci->hw_ep_max / 2;
  883. if (!ci->ci_hw_ep[num].wedge) {
  884. spin_unlock(&ci->lock);
  885. err = usb_ep_clear_halt(
  886. &ci->ci_hw_ep[num].ep);
  887. spin_lock(&ci->lock);
  888. if (err)
  889. break;
  890. }
  891. err = isr_setup_status_phase(ci);
  892. } else if (type == (USB_DIR_OUT|USB_RECIP_DEVICE) &&
  893. le16_to_cpu(req.wValue) ==
  894. USB_DEVICE_REMOTE_WAKEUP) {
  895. if (req.wLength != 0)
  896. break;
  897. ci->remote_wakeup = 0;
  898. err = isr_setup_status_phase(ci);
  899. } else {
  900. goto delegate;
  901. }
  902. break;
  903. case USB_REQ_GET_STATUS:
  904. if (type != (USB_DIR_IN|USB_RECIP_DEVICE) &&
  905. type != (USB_DIR_IN|USB_RECIP_ENDPOINT) &&
  906. type != (USB_DIR_IN|USB_RECIP_INTERFACE))
  907. goto delegate;
  908. if (le16_to_cpu(req.wLength) != 2 ||
  909. le16_to_cpu(req.wValue) != 0)
  910. break;
  911. err = isr_get_status_response(ci, &req);
  912. break;
  913. case USB_REQ_SET_ADDRESS:
  914. if (type != (USB_DIR_OUT|USB_RECIP_DEVICE))
  915. goto delegate;
  916. if (le16_to_cpu(req.wLength) != 0 ||
  917. le16_to_cpu(req.wIndex) != 0)
  918. break;
  919. ci->address = (u8)le16_to_cpu(req.wValue);
  920. ci->setaddr = true;
  921. err = isr_setup_status_phase(ci);
  922. break;
  923. case USB_REQ_SET_FEATURE:
  924. if (type == (USB_DIR_OUT|USB_RECIP_ENDPOINT) &&
  925. le16_to_cpu(req.wValue) ==
  926. USB_ENDPOINT_HALT) {
  927. if (req.wLength != 0)
  928. break;
  929. num = le16_to_cpu(req.wIndex);
  930. dir = num & USB_ENDPOINT_DIR_MASK;
  931. num &= USB_ENDPOINT_NUMBER_MASK;
  932. if (dir) /* TX */
  933. num += ci->hw_ep_max / 2;
  934. spin_unlock(&ci->lock);
  935. err = _ep_set_halt(&ci->ci_hw_ep[num].ep, 1, false);
  936. spin_lock(&ci->lock);
  937. if (!err)
  938. isr_setup_status_phase(ci);
  939. } else if (type == (USB_DIR_OUT|USB_RECIP_DEVICE)) {
  940. if (req.wLength != 0)
  941. break;
  942. switch (le16_to_cpu(req.wValue)) {
  943. case USB_DEVICE_REMOTE_WAKEUP:
  944. ci->remote_wakeup = 1;
  945. err = isr_setup_status_phase(ci);
  946. break;
  947. case USB_DEVICE_TEST_MODE:
  948. tmode = le16_to_cpu(req.wIndex) >> 8;
  949. switch (tmode) {
  950. case TEST_J:
  951. case TEST_K:
  952. case TEST_SE0_NAK:
  953. case TEST_PACKET:
  954. case TEST_FORCE_EN:
  955. ci->test_mode = tmode;
  956. err = isr_setup_status_phase(
  957. ci);
  958. break;
  959. default:
  960. break;
  961. }
  962. break;
  963. case USB_DEVICE_B_HNP_ENABLE:
  964. if (ci_otg_is_fsm_mode(ci)) {
  965. ci->gadget.b_hnp_enable = 1;
  966. err = isr_setup_status_phase(
  967. ci);
  968. }
  969. break;
  970. case USB_DEVICE_A_ALT_HNP_SUPPORT:
  971. if (ci_otg_is_fsm_mode(ci))
  972. err = otg_a_alt_hnp_support(ci);
  973. break;
  974. case USB_DEVICE_A_HNP_SUPPORT:
  975. if (ci_otg_is_fsm_mode(ci)) {
  976. ci->gadget.a_hnp_support = 1;
  977. err = isr_setup_status_phase(
  978. ci);
  979. }
  980. break;
  981. default:
  982. goto delegate;
  983. }
  984. } else {
  985. goto delegate;
  986. }
  987. break;
  988. default:
  989. delegate:
  990. if (req.wLength == 0) /* no data phase */
  991. ci->ep0_dir = TX;
  992. spin_unlock(&ci->lock);
  993. err = ci->driver->setup(&ci->gadget, &req);
  994. spin_lock(&ci->lock);
  995. break;
  996. }
  997. if (err < 0) {
  998. spin_unlock(&ci->lock);
  999. if (_ep_set_halt(&hwep->ep, 1, false))
  1000. dev_err(ci->dev, "error: _ep_set_halt\n");
  1001. spin_lock(&ci->lock);
  1002. }
  1003. }
  1004. /**
  1005. * isr_tr_complete_handler: transaction complete interrupt handler
  1006. * @ci: UDC descriptor
  1007. *
  1008. * This function handles traffic events
  1009. */
  1010. static void isr_tr_complete_handler(struct ci_hdrc *ci)
  1011. __releases(ci->lock)
  1012. __acquires(ci->lock)
  1013. {
  1014. unsigned i;
  1015. int err;
  1016. for (i = 0; i < ci->hw_ep_max; i++) {
  1017. struct ci_hw_ep *hwep = &ci->ci_hw_ep[i];
  1018. if (hwep->ep.desc == NULL)
  1019. continue; /* not configured */
  1020. if (hw_test_and_clear_complete(ci, i)) {
  1021. err = isr_tr_complete_low(hwep);
  1022. if (hwep->type == USB_ENDPOINT_XFER_CONTROL) {
  1023. if (err > 0) /* needs status phase */
  1024. err = isr_setup_status_phase(ci);
  1025. if (err < 0) {
  1026. spin_unlock(&ci->lock);
  1027. if (_ep_set_halt(&hwep->ep, 1, false))
  1028. dev_err(ci->dev,
  1029. "error: _ep_set_halt\n");
  1030. spin_lock(&ci->lock);
  1031. }
  1032. }
  1033. }
  1034. /* Only handle setup packet below */
  1035. if (i == 0 &&
  1036. hw_test_and_clear(ci, OP_ENDPTSETUPSTAT, BIT(0)))
  1037. isr_setup_packet_handler(ci);
  1038. }
  1039. }
  1040. /******************************************************************************
  1041. * ENDPT block
  1042. *****************************************************************************/
  1043. /**
  1044. * ep_enable: configure endpoint, making it usable
  1045. *
  1046. * Check usb_ep_enable() at "usb_gadget.h" for details
  1047. */
  1048. static int ep_enable(struct usb_ep *ep,
  1049. const struct usb_endpoint_descriptor *desc)
  1050. {
  1051. struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
  1052. int retval = 0;
  1053. unsigned long flags;
  1054. u32 cap = 0;
  1055. if (ep == NULL || desc == NULL)
  1056. return -EINVAL;
  1057. spin_lock_irqsave(hwep->lock, flags);
  1058. /* only internal SW should enable ctrl endpts */
  1059. if (!list_empty(&hwep->qh.queue)) {
  1060. dev_warn(hwep->ci->dev, "enabling a non-empty endpoint!\n");
  1061. spin_unlock_irqrestore(hwep->lock, flags);
  1062. return -EBUSY;
  1063. }
  1064. hwep->ep.desc = desc;
  1065. hwep->dir = usb_endpoint_dir_in(desc) ? TX : RX;
  1066. hwep->num = usb_endpoint_num(desc);
  1067. hwep->type = usb_endpoint_type(desc);
  1068. hwep->ep.maxpacket = usb_endpoint_maxp(desc) & 0x07ff;
  1069. hwep->ep.mult = QH_ISO_MULT(usb_endpoint_maxp(desc));
  1070. if (hwep->type == USB_ENDPOINT_XFER_CONTROL)
  1071. cap |= QH_IOS;
  1072. cap |= QH_ZLT;
  1073. cap |= (hwep->ep.maxpacket << __ffs(QH_MAX_PKT)) & QH_MAX_PKT;
  1074. /*
  1075. * For ISO-TX, we set mult at QH as the largest value, and use
  1076. * MultO at TD as real mult value.
  1077. */
  1078. if (hwep->type == USB_ENDPOINT_XFER_ISOC && hwep->dir == TX)
  1079. cap |= 3 << __ffs(QH_MULT);
  1080. hwep->qh.ptr->cap = cpu_to_le32(cap);
  1081. hwep->qh.ptr->td.next |= cpu_to_le32(TD_TERMINATE); /* needed? */
  1082. if (hwep->num != 0 && hwep->type == USB_ENDPOINT_XFER_CONTROL) {
  1083. dev_err(hwep->ci->dev, "Set control xfer at non-ep0\n");
  1084. retval = -EINVAL;
  1085. }
  1086. /*
  1087. * Enable endpoints in the HW other than ep0 as ep0
  1088. * is always enabled
  1089. */
  1090. if (hwep->num)
  1091. retval |= hw_ep_enable(hwep->ci, hwep->num, hwep->dir,
  1092. hwep->type);
  1093. spin_unlock_irqrestore(hwep->lock, flags);
  1094. return retval;
  1095. }
  1096. /**
  1097. * ep_disable: endpoint is no longer usable
  1098. *
  1099. * Check usb_ep_disable() at "usb_gadget.h" for details
  1100. */
  1101. static int ep_disable(struct usb_ep *ep)
  1102. {
  1103. struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
  1104. int direction, retval = 0;
  1105. unsigned long flags;
  1106. if (ep == NULL)
  1107. return -EINVAL;
  1108. else if (hwep->ep.desc == NULL)
  1109. return -EBUSY;
  1110. spin_lock_irqsave(hwep->lock, flags);
  1111. /* only internal SW should disable ctrl endpts */
  1112. direction = hwep->dir;
  1113. do {
  1114. retval |= _ep_nuke(hwep);
  1115. retval |= hw_ep_disable(hwep->ci, hwep->num, hwep->dir);
  1116. if (hwep->type == USB_ENDPOINT_XFER_CONTROL)
  1117. hwep->dir = (hwep->dir == TX) ? RX : TX;
  1118. } while (hwep->dir != direction);
  1119. hwep->ep.desc = NULL;
  1120. spin_unlock_irqrestore(hwep->lock, flags);
  1121. return retval;
  1122. }
  1123. /**
  1124. * ep_alloc_request: allocate a request object to use with this endpoint
  1125. *
  1126. * Check usb_ep_alloc_request() at "usb_gadget.h" for details
  1127. */
  1128. static struct usb_request *ep_alloc_request(struct usb_ep *ep, gfp_t gfp_flags)
  1129. {
  1130. struct ci_hw_req *hwreq = NULL;
  1131. if (ep == NULL)
  1132. return NULL;
  1133. hwreq = kzalloc(sizeof(struct ci_hw_req), gfp_flags);
  1134. if (hwreq != NULL) {
  1135. INIT_LIST_HEAD(&hwreq->queue);
  1136. INIT_LIST_HEAD(&hwreq->tds);
  1137. }
  1138. return (hwreq == NULL) ? NULL : &hwreq->req;
  1139. }
  1140. /**
  1141. * ep_free_request: frees a request object
  1142. *
  1143. * Check usb_ep_free_request() at "usb_gadget.h" for details
  1144. */
  1145. static void ep_free_request(struct usb_ep *ep, struct usb_request *req)
  1146. {
  1147. struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
  1148. struct ci_hw_req *hwreq = container_of(req, struct ci_hw_req, req);
  1149. struct td_node *node, *tmpnode;
  1150. unsigned long flags;
  1151. if (ep == NULL || req == NULL) {
  1152. return;
  1153. } else if (!list_empty(&hwreq->queue)) {
  1154. dev_err(hwep->ci->dev, "freeing queued request\n");
  1155. return;
  1156. }
  1157. spin_lock_irqsave(hwep->lock, flags);
  1158. list_for_each_entry_safe(node, tmpnode, &hwreq->tds, td) {
  1159. dma_pool_free(hwep->td_pool, node->ptr, node->dma);
  1160. list_del_init(&node->td);
  1161. node->ptr = NULL;
  1162. kfree(node);
  1163. }
  1164. kfree(hwreq);
  1165. spin_unlock_irqrestore(hwep->lock, flags);
  1166. }
  1167. /**
  1168. * ep_queue: queues (submits) an I/O request to an endpoint
  1169. *
  1170. * Check usb_ep_queue()* at usb_gadget.h" for details
  1171. */
  1172. static int ep_queue(struct usb_ep *ep, struct usb_request *req,
  1173. gfp_t __maybe_unused gfp_flags)
  1174. {
  1175. struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
  1176. int retval = 0;
  1177. unsigned long flags;
  1178. if (ep == NULL || req == NULL || hwep->ep.desc == NULL)
  1179. return -EINVAL;
  1180. spin_lock_irqsave(hwep->lock, flags);
  1181. retval = _ep_queue(ep, req, gfp_flags);
  1182. spin_unlock_irqrestore(hwep->lock, flags);
  1183. return retval;
  1184. }
  1185. /**
  1186. * ep_dequeue: dequeues (cancels, unlinks) an I/O request from an endpoint
  1187. *
  1188. * Check usb_ep_dequeue() at "usb_gadget.h" for details
  1189. */
  1190. static int ep_dequeue(struct usb_ep *ep, struct usb_request *req)
  1191. {
  1192. struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
  1193. struct ci_hw_req *hwreq = container_of(req, struct ci_hw_req, req);
  1194. unsigned long flags;
  1195. struct td_node *node, *tmpnode;
  1196. if (ep == NULL || req == NULL || hwreq->req.status != -EALREADY ||
  1197. hwep->ep.desc == NULL || list_empty(&hwreq->queue) ||
  1198. list_empty(&hwep->qh.queue))
  1199. return -EINVAL;
  1200. spin_lock_irqsave(hwep->lock, flags);
  1201. hw_ep_flush(hwep->ci, hwep->num, hwep->dir);
  1202. list_for_each_entry_safe(node, tmpnode, &hwreq->tds, td) {
  1203. dma_pool_free(hwep->td_pool, node->ptr, node->dma);
  1204. list_del(&node->td);
  1205. kfree(node);
  1206. }
  1207. /* pop request */
  1208. list_del_init(&hwreq->queue);
  1209. usb_gadget_unmap_request(&hwep->ci->gadget, req, hwep->dir);
  1210. req->status = -ECONNRESET;
  1211. if (hwreq->req.complete != NULL) {
  1212. spin_unlock(hwep->lock);
  1213. usb_gadget_giveback_request(&hwep->ep, &hwreq->req);
  1214. spin_lock(hwep->lock);
  1215. }
  1216. spin_unlock_irqrestore(hwep->lock, flags);
  1217. return 0;
  1218. }
  1219. /**
  1220. * ep_set_halt: sets the endpoint halt feature
  1221. *
  1222. * Check usb_ep_set_halt() at "usb_gadget.h" for details
  1223. */
  1224. static int ep_set_halt(struct usb_ep *ep, int value)
  1225. {
  1226. return _ep_set_halt(ep, value, true);
  1227. }
  1228. /**
  1229. * ep_set_wedge: sets the halt feature and ignores clear requests
  1230. *
  1231. * Check usb_ep_set_wedge() at "usb_gadget.h" for details
  1232. */
  1233. static int ep_set_wedge(struct usb_ep *ep)
  1234. {
  1235. struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
  1236. unsigned long flags;
  1237. if (ep == NULL || hwep->ep.desc == NULL)
  1238. return -EINVAL;
  1239. spin_lock_irqsave(hwep->lock, flags);
  1240. hwep->wedge = 1;
  1241. spin_unlock_irqrestore(hwep->lock, flags);
  1242. return usb_ep_set_halt(ep);
  1243. }
  1244. /**
  1245. * ep_fifo_flush: flushes contents of a fifo
  1246. *
  1247. * Check usb_ep_fifo_flush() at "usb_gadget.h" for details
  1248. */
  1249. static void ep_fifo_flush(struct usb_ep *ep)
  1250. {
  1251. struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
  1252. unsigned long flags;
  1253. if (ep == NULL) {
  1254. dev_err(hwep->ci->dev, "%02X: -EINVAL\n", _usb_addr(hwep));
  1255. return;
  1256. }
  1257. spin_lock_irqsave(hwep->lock, flags);
  1258. hw_ep_flush(hwep->ci, hwep->num, hwep->dir);
  1259. spin_unlock_irqrestore(hwep->lock, flags);
  1260. }
  1261. /**
  1262. * Endpoint-specific part of the API to the USB controller hardware
  1263. * Check "usb_gadget.h" for details
  1264. */
  1265. static const struct usb_ep_ops usb_ep_ops = {
  1266. .enable = ep_enable,
  1267. .disable = ep_disable,
  1268. .alloc_request = ep_alloc_request,
  1269. .free_request = ep_free_request,
  1270. .queue = ep_queue,
  1271. .dequeue = ep_dequeue,
  1272. .set_halt = ep_set_halt,
  1273. .set_wedge = ep_set_wedge,
  1274. .fifo_flush = ep_fifo_flush,
  1275. };
  1276. /******************************************************************************
  1277. * GADGET block
  1278. *****************************************************************************/
  1279. static int ci_udc_vbus_session(struct usb_gadget *_gadget, int is_active)
  1280. {
  1281. struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
  1282. unsigned long flags;
  1283. int gadget_ready = 0;
  1284. spin_lock_irqsave(&ci->lock, flags);
  1285. ci->vbus_active = is_active;
  1286. if (ci->driver)
  1287. gadget_ready = 1;
  1288. spin_unlock_irqrestore(&ci->lock, flags);
  1289. if (gadget_ready) {
  1290. if (is_active) {
  1291. pm_runtime_get_sync(&_gadget->dev);
  1292. hw_device_reset(ci);
  1293. hw_device_state(ci, ci->ep0out->qh.dma);
  1294. usb_gadget_set_state(_gadget, USB_STATE_POWERED);
  1295. usb_udc_vbus_handler(_gadget, true);
  1296. } else {
  1297. usb_udc_vbus_handler(_gadget, false);
  1298. if (ci->driver)
  1299. ci->driver->disconnect(&ci->gadget);
  1300. hw_device_state(ci, 0);
  1301. if (ci->platdata->notify_event)
  1302. ci->platdata->notify_event(ci,
  1303. CI_HDRC_CONTROLLER_STOPPED_EVENT);
  1304. _gadget_stop_activity(&ci->gadget);
  1305. pm_runtime_put_sync(&_gadget->dev);
  1306. usb_gadget_set_state(_gadget, USB_STATE_NOTATTACHED);
  1307. }
  1308. }
  1309. return 0;
  1310. }
  1311. static int ci_udc_wakeup(struct usb_gadget *_gadget)
  1312. {
  1313. struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
  1314. unsigned long flags;
  1315. int ret = 0;
  1316. spin_lock_irqsave(&ci->lock, flags);
  1317. if (!ci->remote_wakeup) {
  1318. ret = -EOPNOTSUPP;
  1319. goto out;
  1320. }
  1321. if (!hw_read(ci, OP_PORTSC, PORTSC_SUSP)) {
  1322. ret = -EINVAL;
  1323. goto out;
  1324. }
  1325. hw_write(ci, OP_PORTSC, PORTSC_FPR, PORTSC_FPR);
  1326. out:
  1327. spin_unlock_irqrestore(&ci->lock, flags);
  1328. return ret;
  1329. }
  1330. static int ci_udc_vbus_draw(struct usb_gadget *_gadget, unsigned ma)
  1331. {
  1332. struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
  1333. if (ci->usb_phy)
  1334. return usb_phy_set_power(ci->usb_phy, ma);
  1335. return -ENOTSUPP;
  1336. }
  1337. static int ci_udc_selfpowered(struct usb_gadget *_gadget, int is_on)
  1338. {
  1339. struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
  1340. struct ci_hw_ep *hwep = ci->ep0in;
  1341. unsigned long flags;
  1342. spin_lock_irqsave(hwep->lock, flags);
  1343. _gadget->is_selfpowered = (is_on != 0);
  1344. spin_unlock_irqrestore(hwep->lock, flags);
  1345. return 0;
  1346. }
  1347. /* Change Data+ pullup status
  1348. * this func is used by usb_gadget_connect/disconnet
  1349. */
  1350. static int ci_udc_pullup(struct usb_gadget *_gadget, int is_on)
  1351. {
  1352. struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
  1353. /*
  1354. * Data+ pullup controlled by OTG state machine in OTG fsm mode;
  1355. * and don't touch Data+ in host mode for dual role config.
  1356. */
  1357. if (ci_otg_is_fsm_mode(ci) || ci->role == CI_ROLE_HOST)
  1358. return 0;
  1359. pm_runtime_get_sync(&ci->gadget.dev);
  1360. if (is_on)
  1361. hw_write(ci, OP_USBCMD, USBCMD_RS, USBCMD_RS);
  1362. else
  1363. hw_write(ci, OP_USBCMD, USBCMD_RS, 0);
  1364. pm_runtime_put_sync(&ci->gadget.dev);
  1365. return 0;
  1366. }
  1367. static int ci_udc_start(struct usb_gadget *gadget,
  1368. struct usb_gadget_driver *driver);
  1369. static int ci_udc_stop(struct usb_gadget *gadget);
  1370. /**
  1371. * Device operations part of the API to the USB controller hardware,
  1372. * which don't involve endpoints (or i/o)
  1373. * Check "usb_gadget.h" for details
  1374. */
  1375. static const struct usb_gadget_ops usb_gadget_ops = {
  1376. .vbus_session = ci_udc_vbus_session,
  1377. .wakeup = ci_udc_wakeup,
  1378. .set_selfpowered = ci_udc_selfpowered,
  1379. .pullup = ci_udc_pullup,
  1380. .vbus_draw = ci_udc_vbus_draw,
  1381. .udc_start = ci_udc_start,
  1382. .udc_stop = ci_udc_stop,
  1383. };
  1384. static int init_eps(struct ci_hdrc *ci)
  1385. {
  1386. int retval = 0, i, j;
  1387. for (i = 0; i < ci->hw_ep_max/2; i++)
  1388. for (j = RX; j <= TX; j++) {
  1389. int k = i + j * ci->hw_ep_max/2;
  1390. struct ci_hw_ep *hwep = &ci->ci_hw_ep[k];
  1391. scnprintf(hwep->name, sizeof(hwep->name), "ep%i%s", i,
  1392. (j == TX) ? "in" : "out");
  1393. hwep->ci = ci;
  1394. hwep->lock = &ci->lock;
  1395. hwep->td_pool = ci->td_pool;
  1396. hwep->ep.name = hwep->name;
  1397. hwep->ep.ops = &usb_ep_ops;
  1398. if (i == 0) {
  1399. hwep->ep.caps.type_control = true;
  1400. } else {
  1401. hwep->ep.caps.type_iso = true;
  1402. hwep->ep.caps.type_bulk = true;
  1403. hwep->ep.caps.type_int = true;
  1404. }
  1405. if (j == TX)
  1406. hwep->ep.caps.dir_in = true;
  1407. else
  1408. hwep->ep.caps.dir_out = true;
  1409. /*
  1410. * for ep0: maxP defined in desc, for other
  1411. * eps, maxP is set by epautoconfig() called
  1412. * by gadget layer
  1413. */
  1414. usb_ep_set_maxpacket_limit(&hwep->ep, (unsigned short)~0);
  1415. INIT_LIST_HEAD(&hwep->qh.queue);
  1416. hwep->qh.ptr = dma_pool_alloc(ci->qh_pool, GFP_KERNEL,
  1417. &hwep->qh.dma);
  1418. if (hwep->qh.ptr == NULL)
  1419. retval = -ENOMEM;
  1420. else
  1421. memset(hwep->qh.ptr, 0, sizeof(*hwep->qh.ptr));
  1422. /*
  1423. * set up shorthands for ep0 out and in endpoints,
  1424. * don't add to gadget's ep_list
  1425. */
  1426. if (i == 0) {
  1427. if (j == RX)
  1428. ci->ep0out = hwep;
  1429. else
  1430. ci->ep0in = hwep;
  1431. usb_ep_set_maxpacket_limit(&hwep->ep, CTRL_PAYLOAD_MAX);
  1432. continue;
  1433. }
  1434. list_add_tail(&hwep->ep.ep_list, &ci->gadget.ep_list);
  1435. }
  1436. return retval;
  1437. }
  1438. static void destroy_eps(struct ci_hdrc *ci)
  1439. {
  1440. int i;
  1441. for (i = 0; i < ci->hw_ep_max; i++) {
  1442. struct ci_hw_ep *hwep = &ci->ci_hw_ep[i];
  1443. if (hwep->pending_td)
  1444. free_pending_td(hwep);
  1445. dma_pool_free(ci->qh_pool, hwep->qh.ptr, hwep->qh.dma);
  1446. }
  1447. }
  1448. /**
  1449. * ci_udc_start: register a gadget driver
  1450. * @gadget: our gadget
  1451. * @driver: the driver being registered
  1452. *
  1453. * Interrupts are enabled here.
  1454. */
  1455. static int ci_udc_start(struct usb_gadget *gadget,
  1456. struct usb_gadget_driver *driver)
  1457. {
  1458. struct ci_hdrc *ci = container_of(gadget, struct ci_hdrc, gadget);
  1459. unsigned long flags;
  1460. int retval = -ENOMEM;
  1461. if (driver->disconnect == NULL)
  1462. return -EINVAL;
  1463. ci->ep0out->ep.desc = &ctrl_endpt_out_desc;
  1464. retval = usb_ep_enable(&ci->ep0out->ep);
  1465. if (retval)
  1466. return retval;
  1467. ci->ep0in->ep.desc = &ctrl_endpt_in_desc;
  1468. retval = usb_ep_enable(&ci->ep0in->ep);
  1469. if (retval)
  1470. return retval;
  1471. ci->driver = driver;
  1472. /* Start otg fsm for B-device */
  1473. if (ci_otg_is_fsm_mode(ci) && ci->fsm.id) {
  1474. ci_hdrc_otg_fsm_start(ci);
  1475. return retval;
  1476. }
  1477. pm_runtime_get_sync(&ci->gadget.dev);
  1478. if (ci->vbus_active) {
  1479. spin_lock_irqsave(&ci->lock, flags);
  1480. hw_device_reset(ci);
  1481. } else {
  1482. usb_udc_vbus_handler(&ci->gadget, false);
  1483. pm_runtime_put_sync(&ci->gadget.dev);
  1484. return retval;
  1485. }
  1486. retval = hw_device_state(ci, ci->ep0out->qh.dma);
  1487. spin_unlock_irqrestore(&ci->lock, flags);
  1488. if (retval)
  1489. pm_runtime_put_sync(&ci->gadget.dev);
  1490. return retval;
  1491. }
  1492. static void ci_udc_stop_for_otg_fsm(struct ci_hdrc *ci)
  1493. {
  1494. if (!ci_otg_is_fsm_mode(ci))
  1495. return;
  1496. mutex_lock(&ci->fsm.lock);
  1497. if (ci->fsm.otg->state == OTG_STATE_A_PERIPHERAL) {
  1498. ci->fsm.a_bidl_adis_tmout = 1;
  1499. ci_hdrc_otg_fsm_start(ci);
  1500. } else if (ci->fsm.otg->state == OTG_STATE_B_PERIPHERAL) {
  1501. ci->fsm.protocol = PROTO_UNDEF;
  1502. ci->fsm.otg->state = OTG_STATE_UNDEFINED;
  1503. }
  1504. mutex_unlock(&ci->fsm.lock);
  1505. }
  1506. /**
  1507. * ci_udc_stop: unregister a gadget driver
  1508. */
  1509. static int ci_udc_stop(struct usb_gadget *gadget)
  1510. {
  1511. struct ci_hdrc *ci = container_of(gadget, struct ci_hdrc, gadget);
  1512. unsigned long flags;
  1513. spin_lock_irqsave(&ci->lock, flags);
  1514. if (ci->vbus_active) {
  1515. hw_device_state(ci, 0);
  1516. if (ci->platdata->notify_event)
  1517. ci->platdata->notify_event(ci,
  1518. CI_HDRC_CONTROLLER_STOPPED_EVENT);
  1519. spin_unlock_irqrestore(&ci->lock, flags);
  1520. _gadget_stop_activity(&ci->gadget);
  1521. spin_lock_irqsave(&ci->lock, flags);
  1522. pm_runtime_put(&ci->gadget.dev);
  1523. }
  1524. ci->driver = NULL;
  1525. spin_unlock_irqrestore(&ci->lock, flags);
  1526. ci_udc_stop_for_otg_fsm(ci);
  1527. return 0;
  1528. }
  1529. /******************************************************************************
  1530. * BUS block
  1531. *****************************************************************************/
  1532. /**
  1533. * udc_irq: ci interrupt handler
  1534. *
  1535. * This function returns IRQ_HANDLED if the IRQ has been handled
  1536. * It locks access to registers
  1537. */
  1538. static irqreturn_t udc_irq(struct ci_hdrc *ci)
  1539. {
  1540. irqreturn_t retval;
  1541. u32 intr;
  1542. if (ci == NULL)
  1543. return IRQ_HANDLED;
  1544. spin_lock(&ci->lock);
  1545. if (ci->platdata->flags & CI_HDRC_REGS_SHARED) {
  1546. if (hw_read(ci, OP_USBMODE, USBMODE_CM) !=
  1547. USBMODE_CM_DC) {
  1548. spin_unlock(&ci->lock);
  1549. return IRQ_NONE;
  1550. }
  1551. }
  1552. intr = hw_test_and_clear_intr_active(ci);
  1553. if (intr) {
  1554. /* order defines priority - do NOT change it */
  1555. if (USBi_URI & intr)
  1556. isr_reset_handler(ci);
  1557. if (USBi_PCI & intr) {
  1558. ci->gadget.speed = hw_port_is_high_speed(ci) ?
  1559. USB_SPEED_HIGH : USB_SPEED_FULL;
  1560. if (ci->suspended && ci->driver->resume) {
  1561. spin_unlock(&ci->lock);
  1562. ci->driver->resume(&ci->gadget);
  1563. spin_lock(&ci->lock);
  1564. ci->suspended = 0;
  1565. }
  1566. }
  1567. if (USBi_UI & intr)
  1568. isr_tr_complete_handler(ci);
  1569. if (USBi_SLI & intr) {
  1570. if (ci->gadget.speed != USB_SPEED_UNKNOWN &&
  1571. ci->driver->suspend) {
  1572. ci->suspended = 1;
  1573. spin_unlock(&ci->lock);
  1574. ci->driver->suspend(&ci->gadget);
  1575. usb_gadget_set_state(&ci->gadget,
  1576. USB_STATE_SUSPENDED);
  1577. spin_lock(&ci->lock);
  1578. }
  1579. }
  1580. retval = IRQ_HANDLED;
  1581. } else {
  1582. retval = IRQ_NONE;
  1583. }
  1584. spin_unlock(&ci->lock);
  1585. return retval;
  1586. }
  1587. /**
  1588. * udc_start: initialize gadget role
  1589. * @ci: chipidea controller
  1590. */
  1591. static int udc_start(struct ci_hdrc *ci)
  1592. {
  1593. struct device *dev = ci->dev;
  1594. struct usb_otg_caps *otg_caps = &ci->platdata->ci_otg_caps;
  1595. int retval = 0;
  1596. ci->gadget.ops = &usb_gadget_ops;
  1597. ci->gadget.speed = USB_SPEED_UNKNOWN;
  1598. ci->gadget.max_speed = USB_SPEED_HIGH;
  1599. ci->gadget.name = ci->platdata->name;
  1600. ci->gadget.otg_caps = otg_caps;
  1601. if (ci->is_otg && (otg_caps->hnp_support || otg_caps->srp_support ||
  1602. otg_caps->adp_support))
  1603. ci->gadget.is_otg = 1;
  1604. INIT_LIST_HEAD(&ci->gadget.ep_list);
  1605. /* alloc resources */
  1606. ci->qh_pool = dma_pool_create("ci_hw_qh", dev,
  1607. sizeof(struct ci_hw_qh),
  1608. 64, CI_HDRC_PAGE_SIZE);
  1609. if (ci->qh_pool == NULL)
  1610. return -ENOMEM;
  1611. ci->td_pool = dma_pool_create("ci_hw_td", dev,
  1612. sizeof(struct ci_hw_td),
  1613. 64, CI_HDRC_PAGE_SIZE);
  1614. if (ci->td_pool == NULL) {
  1615. retval = -ENOMEM;
  1616. goto free_qh_pool;
  1617. }
  1618. retval = init_eps(ci);
  1619. if (retval)
  1620. goto free_pools;
  1621. ci->gadget.ep0 = &ci->ep0in->ep;
  1622. retval = usb_add_gadget_udc(dev, &ci->gadget);
  1623. if (retval)
  1624. goto destroy_eps;
  1625. pm_runtime_no_callbacks(&ci->gadget.dev);
  1626. pm_runtime_enable(&ci->gadget.dev);
  1627. return retval;
  1628. destroy_eps:
  1629. destroy_eps(ci);
  1630. free_pools:
  1631. dma_pool_destroy(ci->td_pool);
  1632. free_qh_pool:
  1633. dma_pool_destroy(ci->qh_pool);
  1634. return retval;
  1635. }
  1636. /**
  1637. * ci_hdrc_gadget_destroy: parent remove must call this to remove UDC
  1638. *
  1639. * No interrupts active, the IRQ has been released
  1640. */
  1641. void ci_hdrc_gadget_destroy(struct ci_hdrc *ci)
  1642. {
  1643. if (!ci->roles[CI_ROLE_GADGET])
  1644. return;
  1645. usb_del_gadget_udc(&ci->gadget);
  1646. destroy_eps(ci);
  1647. dma_pool_destroy(ci->td_pool);
  1648. dma_pool_destroy(ci->qh_pool);
  1649. }
  1650. static int udc_id_switch_for_device(struct ci_hdrc *ci)
  1651. {
  1652. if (ci->is_otg)
  1653. /* Clear and enable BSV irq */
  1654. hw_write_otgsc(ci, OTGSC_BSVIS | OTGSC_BSVIE,
  1655. OTGSC_BSVIS | OTGSC_BSVIE);
  1656. return 0;
  1657. }
  1658. static void udc_id_switch_for_host(struct ci_hdrc *ci)
  1659. {
  1660. /*
  1661. * host doesn't care B_SESSION_VALID event
  1662. * so clear and disbale BSV irq
  1663. */
  1664. if (ci->is_otg)
  1665. hw_write_otgsc(ci, OTGSC_BSVIE | OTGSC_BSVIS, OTGSC_BSVIS);
  1666. }
  1667. /**
  1668. * ci_hdrc_gadget_init - initialize device related bits
  1669. * ci: the controller
  1670. *
  1671. * This function initializes the gadget, if the device is "device capable".
  1672. */
  1673. int ci_hdrc_gadget_init(struct ci_hdrc *ci)
  1674. {
  1675. struct ci_role_driver *rdrv;
  1676. int ret;
  1677. if (!hw_read(ci, CAP_DCCPARAMS, DCCPARAMS_DC))
  1678. return -ENXIO;
  1679. rdrv = devm_kzalloc(ci->dev, sizeof(struct ci_role_driver), GFP_KERNEL);
  1680. if (!rdrv)
  1681. return -ENOMEM;
  1682. rdrv->start = udc_id_switch_for_device;
  1683. rdrv->stop = udc_id_switch_for_host;
  1684. rdrv->irq = udc_irq;
  1685. rdrv->name = "gadget";
  1686. ret = udc_start(ci);
  1687. if (!ret)
  1688. ci->roles[CI_ROLE_GADGET] = rdrv;
  1689. return ret;
  1690. }