Kconfig 3.0 KB

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  1. config USB_DWC3
  2. tristate "DesignWare USB3 DRD Core Support"
  3. depends on (USB || USB_GADGET) && HAS_DMA
  4. select USB_XHCI_PLATFORM if USB_SUPPORT && USB_XHCI_HCD
  5. help
  6. Say Y or M here if your system has a Dual Role SuperSpeed
  7. USB controller based on the DesignWare USB3 IP Core.
  8. If you choose to build this driver is a dynamically linked
  9. module, the module will be called dwc3.ko.
  10. if USB_DWC3
  11. config USB_DWC3_ULPI
  12. bool "Register ULPI PHY Interface"
  13. depends on USB_ULPI_BUS=y || USB_ULPI_BUS=USB_DWC3
  14. help
  15. Select this if you have ULPI type PHY attached to your DWC3
  16. controller.
  17. choice
  18. bool "DWC3 Mode Selection"
  19. default USB_DWC3_DUAL_ROLE if (USB && USB_GADGET)
  20. default USB_DWC3_HOST if (USB && !USB_GADGET)
  21. default USB_DWC3_GADGET if (!USB && USB_GADGET)
  22. config USB_DWC3_HOST
  23. bool "Host only mode"
  24. depends on USB=y || USB=USB_DWC3
  25. help
  26. Select this when you want to use DWC3 in host mode only,
  27. thereby the gadget feature will be regressed.
  28. config USB_DWC3_GADGET
  29. bool "Gadget only mode"
  30. depends on USB_GADGET=y || USB_GADGET=USB_DWC3
  31. help
  32. Select this when you want to use DWC3 in gadget mode only,
  33. thereby the host feature will be regressed.
  34. config USB_DWC3_DUAL_ROLE
  35. bool "Dual Role mode"
  36. depends on ((USB=y || USB=USB_DWC3) && (USB_GADGET=y || USB_GADGET=USB_DWC3))
  37. help
  38. This is the default mode of working of DWC3 controller where
  39. both host and gadget features are enabled.
  40. endchoice
  41. comment "Platform Glue Driver Support"
  42. config USB_DWC3_OMAP
  43. tristate "Texas Instruments OMAP5 and similar Platforms"
  44. depends on EXTCON && (ARCH_OMAP2PLUS || COMPILE_TEST)
  45. depends on OF
  46. default USB_DWC3
  47. help
  48. Some platforms from Texas Instruments like OMAP5, DRA7xxx and
  49. AM437x use this IP for USB2/3 functionality.
  50. Say 'Y' or 'M' here if you have one such device
  51. config USB_DWC3_EXYNOS
  52. tristate "Samsung Exynos Platform"
  53. depends on ARCH_EXYNOS && OF || COMPILE_TEST
  54. default USB_DWC3
  55. help
  56. Recent Exynos5 SoCs ship with one DesignWare Core USB3 IP inside,
  57. say 'Y' or 'M' if you have one such device.
  58. config USB_DWC3_PCI
  59. tristate "PCIe-based Platforms"
  60. depends on PCI
  61. default USB_DWC3
  62. help
  63. If you're using the DesignWare Core IP with a PCIe, please say
  64. 'Y' or 'M' here.
  65. One such PCIe-based platform is Synopsys' PCIe HAPS model of
  66. this IP.
  67. config USB_DWC3_KEYSTONE
  68. tristate "Texas Instruments Keystone2 Platforms"
  69. depends on ARCH_KEYSTONE || COMPILE_TEST
  70. default USB_DWC3
  71. help
  72. Support of USB2/3 functionality in TI Keystone2 platforms.
  73. Say 'Y' or 'M' here if you have one such device
  74. config USB_DWC3_ST
  75. tristate "STMicroelectronics Platforms"
  76. depends on ARCH_STI && OF
  77. default USB_DWC3
  78. help
  79. STMicroelectronics SoCs with one DesignWare Core USB3 IP
  80. inside (i.e. STiH407).
  81. Say 'Y' or 'M' if you have one such device.
  82. config USB_DWC3_QCOM
  83. tristate "Qualcomm Platforms"
  84. depends on ARCH_QCOM || COMPILE_TEST
  85. default USB_DWC3
  86. help
  87. Recent Qualcomm SoCs ship with one DesignWare Core USB3 IP inside,
  88. say 'Y' or 'M' if you have one such device.
  89. endif