atmel_usba_udc.c 54 KB

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  1. /*
  2. * Driver for the Atmel USBA high speed USB device controller
  3. *
  4. * Copyright (C) 2005-2007 Atmel Corporation
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License version 2 as
  8. * published by the Free Software Foundation.
  9. */
  10. #include <linux/clk.h>
  11. #include <linux/clk/at91_pmc.h>
  12. #include <linux/module.h>
  13. #include <linux/init.h>
  14. #include <linux/interrupt.h>
  15. #include <linux/io.h>
  16. #include <linux/slab.h>
  17. #include <linux/device.h>
  18. #include <linux/dma-mapping.h>
  19. #include <linux/list.h>
  20. #include <linux/platform_device.h>
  21. #include <linux/usb/ch9.h>
  22. #include <linux/usb/gadget.h>
  23. #include <linux/usb/atmel_usba_udc.h>
  24. #include <linux/delay.h>
  25. #include <linux/of.h>
  26. #include <linux/of_gpio.h>
  27. #include <asm/gpio.h>
  28. #include "atmel_usba_udc.h"
  29. #define USBA_VBUS_IRQFLAGS (IRQF_ONESHOT \
  30. | IRQF_TRIGGER_FALLING | IRQF_TRIGGER_RISING)
  31. #ifdef CONFIG_USB_GADGET_DEBUG_FS
  32. #include <linux/debugfs.h>
  33. #include <linux/uaccess.h>
  34. static int queue_dbg_open(struct inode *inode, struct file *file)
  35. {
  36. struct usba_ep *ep = inode->i_private;
  37. struct usba_request *req, *req_copy;
  38. struct list_head *queue_data;
  39. queue_data = kmalloc(sizeof(*queue_data), GFP_KERNEL);
  40. if (!queue_data)
  41. return -ENOMEM;
  42. INIT_LIST_HEAD(queue_data);
  43. spin_lock_irq(&ep->udc->lock);
  44. list_for_each_entry(req, &ep->queue, queue) {
  45. req_copy = kmemdup(req, sizeof(*req_copy), GFP_ATOMIC);
  46. if (!req_copy)
  47. goto fail;
  48. list_add_tail(&req_copy->queue, queue_data);
  49. }
  50. spin_unlock_irq(&ep->udc->lock);
  51. file->private_data = queue_data;
  52. return 0;
  53. fail:
  54. spin_unlock_irq(&ep->udc->lock);
  55. list_for_each_entry_safe(req, req_copy, queue_data, queue) {
  56. list_del(&req->queue);
  57. kfree(req);
  58. }
  59. kfree(queue_data);
  60. return -ENOMEM;
  61. }
  62. /*
  63. * bbbbbbbb llllllll IZS sssss nnnn FDL\n\0
  64. *
  65. * b: buffer address
  66. * l: buffer length
  67. * I/i: interrupt/no interrupt
  68. * Z/z: zero/no zero
  69. * S/s: short ok/short not ok
  70. * s: status
  71. * n: nr_packets
  72. * F/f: submitted/not submitted to FIFO
  73. * D/d: using/not using DMA
  74. * L/l: last transaction/not last transaction
  75. */
  76. static ssize_t queue_dbg_read(struct file *file, char __user *buf,
  77. size_t nbytes, loff_t *ppos)
  78. {
  79. struct list_head *queue = file->private_data;
  80. struct usba_request *req, *tmp_req;
  81. size_t len, remaining, actual = 0;
  82. char tmpbuf[38];
  83. if (!access_ok(VERIFY_WRITE, buf, nbytes))
  84. return -EFAULT;
  85. mutex_lock(&file_inode(file)->i_mutex);
  86. list_for_each_entry_safe(req, tmp_req, queue, queue) {
  87. len = snprintf(tmpbuf, sizeof(tmpbuf),
  88. "%8p %08x %c%c%c %5d %c%c%c\n",
  89. req->req.buf, req->req.length,
  90. req->req.no_interrupt ? 'i' : 'I',
  91. req->req.zero ? 'Z' : 'z',
  92. req->req.short_not_ok ? 's' : 'S',
  93. req->req.status,
  94. req->submitted ? 'F' : 'f',
  95. req->using_dma ? 'D' : 'd',
  96. req->last_transaction ? 'L' : 'l');
  97. len = min(len, sizeof(tmpbuf));
  98. if (len > nbytes)
  99. break;
  100. list_del(&req->queue);
  101. kfree(req);
  102. remaining = __copy_to_user(buf, tmpbuf, len);
  103. actual += len - remaining;
  104. if (remaining)
  105. break;
  106. nbytes -= len;
  107. buf += len;
  108. }
  109. mutex_unlock(&file_inode(file)->i_mutex);
  110. return actual;
  111. }
  112. static int queue_dbg_release(struct inode *inode, struct file *file)
  113. {
  114. struct list_head *queue_data = file->private_data;
  115. struct usba_request *req, *tmp_req;
  116. list_for_each_entry_safe(req, tmp_req, queue_data, queue) {
  117. list_del(&req->queue);
  118. kfree(req);
  119. }
  120. kfree(queue_data);
  121. return 0;
  122. }
  123. static int regs_dbg_open(struct inode *inode, struct file *file)
  124. {
  125. struct usba_udc *udc;
  126. unsigned int i;
  127. u32 *data;
  128. int ret = -ENOMEM;
  129. mutex_lock(&inode->i_mutex);
  130. udc = inode->i_private;
  131. data = kmalloc(inode->i_size, GFP_KERNEL);
  132. if (!data)
  133. goto out;
  134. spin_lock_irq(&udc->lock);
  135. for (i = 0; i < inode->i_size / 4; i++)
  136. data[i] = usba_io_readl(udc->regs + i * 4);
  137. spin_unlock_irq(&udc->lock);
  138. file->private_data = data;
  139. ret = 0;
  140. out:
  141. mutex_unlock(&inode->i_mutex);
  142. return ret;
  143. }
  144. static ssize_t regs_dbg_read(struct file *file, char __user *buf,
  145. size_t nbytes, loff_t *ppos)
  146. {
  147. struct inode *inode = file_inode(file);
  148. int ret;
  149. mutex_lock(&inode->i_mutex);
  150. ret = simple_read_from_buffer(buf, nbytes, ppos,
  151. file->private_data,
  152. file_inode(file)->i_size);
  153. mutex_unlock(&inode->i_mutex);
  154. return ret;
  155. }
  156. static int regs_dbg_release(struct inode *inode, struct file *file)
  157. {
  158. kfree(file->private_data);
  159. return 0;
  160. }
  161. const struct file_operations queue_dbg_fops = {
  162. .owner = THIS_MODULE,
  163. .open = queue_dbg_open,
  164. .llseek = no_llseek,
  165. .read = queue_dbg_read,
  166. .release = queue_dbg_release,
  167. };
  168. const struct file_operations regs_dbg_fops = {
  169. .owner = THIS_MODULE,
  170. .open = regs_dbg_open,
  171. .llseek = generic_file_llseek,
  172. .read = regs_dbg_read,
  173. .release = regs_dbg_release,
  174. };
  175. static void usba_ep_init_debugfs(struct usba_udc *udc,
  176. struct usba_ep *ep)
  177. {
  178. struct dentry *ep_root;
  179. ep_root = debugfs_create_dir(ep->ep.name, udc->debugfs_root);
  180. if (!ep_root)
  181. goto err_root;
  182. ep->debugfs_dir = ep_root;
  183. ep->debugfs_queue = debugfs_create_file("queue", 0400, ep_root,
  184. ep, &queue_dbg_fops);
  185. if (!ep->debugfs_queue)
  186. goto err_queue;
  187. if (ep->can_dma) {
  188. ep->debugfs_dma_status
  189. = debugfs_create_u32("dma_status", 0400, ep_root,
  190. &ep->last_dma_status);
  191. if (!ep->debugfs_dma_status)
  192. goto err_dma_status;
  193. }
  194. if (ep_is_control(ep)) {
  195. ep->debugfs_state
  196. = debugfs_create_u32("state", 0400, ep_root,
  197. &ep->state);
  198. if (!ep->debugfs_state)
  199. goto err_state;
  200. }
  201. return;
  202. err_state:
  203. if (ep->can_dma)
  204. debugfs_remove(ep->debugfs_dma_status);
  205. err_dma_status:
  206. debugfs_remove(ep->debugfs_queue);
  207. err_queue:
  208. debugfs_remove(ep_root);
  209. err_root:
  210. dev_err(&ep->udc->pdev->dev,
  211. "failed to create debugfs directory for %s\n", ep->ep.name);
  212. }
  213. static void usba_ep_cleanup_debugfs(struct usba_ep *ep)
  214. {
  215. debugfs_remove(ep->debugfs_queue);
  216. debugfs_remove(ep->debugfs_dma_status);
  217. debugfs_remove(ep->debugfs_state);
  218. debugfs_remove(ep->debugfs_dir);
  219. ep->debugfs_dma_status = NULL;
  220. ep->debugfs_dir = NULL;
  221. }
  222. static void usba_init_debugfs(struct usba_udc *udc)
  223. {
  224. struct dentry *root, *regs;
  225. struct resource *regs_resource;
  226. root = debugfs_create_dir(udc->gadget.name, NULL);
  227. if (IS_ERR(root) || !root)
  228. goto err_root;
  229. udc->debugfs_root = root;
  230. regs_resource = platform_get_resource(udc->pdev, IORESOURCE_MEM,
  231. CTRL_IOMEM_ID);
  232. if (regs_resource) {
  233. regs = debugfs_create_file_size("regs", 0400, root, udc,
  234. &regs_dbg_fops,
  235. resource_size(regs_resource));
  236. if (!regs)
  237. goto err_regs;
  238. udc->debugfs_regs = regs;
  239. }
  240. usba_ep_init_debugfs(udc, to_usba_ep(udc->gadget.ep0));
  241. return;
  242. err_regs:
  243. debugfs_remove(root);
  244. err_root:
  245. udc->debugfs_root = NULL;
  246. dev_err(&udc->pdev->dev, "debugfs is not available\n");
  247. }
  248. static void usba_cleanup_debugfs(struct usba_udc *udc)
  249. {
  250. usba_ep_cleanup_debugfs(to_usba_ep(udc->gadget.ep0));
  251. debugfs_remove(udc->debugfs_regs);
  252. debugfs_remove(udc->debugfs_root);
  253. udc->debugfs_regs = NULL;
  254. udc->debugfs_root = NULL;
  255. }
  256. #else
  257. static inline void usba_ep_init_debugfs(struct usba_udc *udc,
  258. struct usba_ep *ep)
  259. {
  260. }
  261. static inline void usba_ep_cleanup_debugfs(struct usba_ep *ep)
  262. {
  263. }
  264. static inline void usba_init_debugfs(struct usba_udc *udc)
  265. {
  266. }
  267. static inline void usba_cleanup_debugfs(struct usba_udc *udc)
  268. {
  269. }
  270. #endif
  271. static inline u32 usba_int_enb_get(struct usba_udc *udc)
  272. {
  273. return udc->int_enb_cache;
  274. }
  275. static inline void usba_int_enb_set(struct usba_udc *udc, u32 val)
  276. {
  277. usba_writel(udc, INT_ENB, val);
  278. udc->int_enb_cache = val;
  279. }
  280. static int vbus_is_present(struct usba_udc *udc)
  281. {
  282. if (gpio_is_valid(udc->vbus_pin))
  283. return gpio_get_value(udc->vbus_pin) ^ udc->vbus_pin_inverted;
  284. /* No Vbus detection: Assume always present */
  285. return 1;
  286. }
  287. static void toggle_bias(struct usba_udc *udc, int is_on)
  288. {
  289. if (udc->errata && udc->errata->toggle_bias)
  290. udc->errata->toggle_bias(udc, is_on);
  291. }
  292. static void generate_bias_pulse(struct usba_udc *udc)
  293. {
  294. if (!udc->bias_pulse_needed)
  295. return;
  296. if (udc->errata && udc->errata->pulse_bias)
  297. udc->errata->pulse_bias(udc);
  298. udc->bias_pulse_needed = false;
  299. }
  300. static void next_fifo_transaction(struct usba_ep *ep, struct usba_request *req)
  301. {
  302. unsigned int transaction_len;
  303. transaction_len = req->req.length - req->req.actual;
  304. req->last_transaction = 1;
  305. if (transaction_len > ep->ep.maxpacket) {
  306. transaction_len = ep->ep.maxpacket;
  307. req->last_transaction = 0;
  308. } else if (transaction_len == ep->ep.maxpacket && req->req.zero)
  309. req->last_transaction = 0;
  310. DBG(DBG_QUEUE, "%s: submit_transaction, req %p (length %d)%s\n",
  311. ep->ep.name, req, transaction_len,
  312. req->last_transaction ? ", done" : "");
  313. memcpy_toio(ep->fifo, req->req.buf + req->req.actual, transaction_len);
  314. usba_ep_writel(ep, SET_STA, USBA_TX_PK_RDY);
  315. req->req.actual += transaction_len;
  316. }
  317. static void submit_request(struct usba_ep *ep, struct usba_request *req)
  318. {
  319. DBG(DBG_QUEUE, "%s: submit_request: req %p (length %d)\n",
  320. ep->ep.name, req, req->req.length);
  321. req->req.actual = 0;
  322. req->submitted = 1;
  323. if (req->using_dma) {
  324. if (req->req.length == 0) {
  325. usba_ep_writel(ep, CTL_ENB, USBA_TX_PK_RDY);
  326. return;
  327. }
  328. if (req->req.zero)
  329. usba_ep_writel(ep, CTL_ENB, USBA_SHORT_PACKET);
  330. else
  331. usba_ep_writel(ep, CTL_DIS, USBA_SHORT_PACKET);
  332. usba_dma_writel(ep, ADDRESS, req->req.dma);
  333. usba_dma_writel(ep, CONTROL, req->ctrl);
  334. } else {
  335. next_fifo_transaction(ep, req);
  336. if (req->last_transaction) {
  337. usba_ep_writel(ep, CTL_DIS, USBA_TX_PK_RDY);
  338. usba_ep_writel(ep, CTL_ENB, USBA_TX_COMPLETE);
  339. } else {
  340. usba_ep_writel(ep, CTL_DIS, USBA_TX_COMPLETE);
  341. usba_ep_writel(ep, CTL_ENB, USBA_TX_PK_RDY);
  342. }
  343. }
  344. }
  345. static void submit_next_request(struct usba_ep *ep)
  346. {
  347. struct usba_request *req;
  348. if (list_empty(&ep->queue)) {
  349. usba_ep_writel(ep, CTL_DIS, USBA_TX_PK_RDY | USBA_RX_BK_RDY);
  350. return;
  351. }
  352. req = list_entry(ep->queue.next, struct usba_request, queue);
  353. if (!req->submitted)
  354. submit_request(ep, req);
  355. }
  356. static void send_status(struct usba_udc *udc, struct usba_ep *ep)
  357. {
  358. ep->state = STATUS_STAGE_IN;
  359. usba_ep_writel(ep, SET_STA, USBA_TX_PK_RDY);
  360. usba_ep_writel(ep, CTL_ENB, USBA_TX_COMPLETE);
  361. }
  362. static void receive_data(struct usba_ep *ep)
  363. {
  364. struct usba_udc *udc = ep->udc;
  365. struct usba_request *req;
  366. unsigned long status;
  367. unsigned int bytecount, nr_busy;
  368. int is_complete = 0;
  369. status = usba_ep_readl(ep, STA);
  370. nr_busy = USBA_BFEXT(BUSY_BANKS, status);
  371. DBG(DBG_QUEUE, "receive data: nr_busy=%u\n", nr_busy);
  372. while (nr_busy > 0) {
  373. if (list_empty(&ep->queue)) {
  374. usba_ep_writel(ep, CTL_DIS, USBA_RX_BK_RDY);
  375. break;
  376. }
  377. req = list_entry(ep->queue.next,
  378. struct usba_request, queue);
  379. bytecount = USBA_BFEXT(BYTE_COUNT, status);
  380. if (status & (1 << 31))
  381. is_complete = 1;
  382. if (req->req.actual + bytecount >= req->req.length) {
  383. is_complete = 1;
  384. bytecount = req->req.length - req->req.actual;
  385. }
  386. memcpy_fromio(req->req.buf + req->req.actual,
  387. ep->fifo, bytecount);
  388. req->req.actual += bytecount;
  389. usba_ep_writel(ep, CLR_STA, USBA_RX_BK_RDY);
  390. if (is_complete) {
  391. DBG(DBG_QUEUE, "%s: request done\n", ep->ep.name);
  392. req->req.status = 0;
  393. list_del_init(&req->queue);
  394. usba_ep_writel(ep, CTL_DIS, USBA_RX_BK_RDY);
  395. spin_unlock(&udc->lock);
  396. usb_gadget_giveback_request(&ep->ep, &req->req);
  397. spin_lock(&udc->lock);
  398. }
  399. status = usba_ep_readl(ep, STA);
  400. nr_busy = USBA_BFEXT(BUSY_BANKS, status);
  401. if (is_complete && ep_is_control(ep)) {
  402. send_status(udc, ep);
  403. break;
  404. }
  405. }
  406. }
  407. static void
  408. request_complete(struct usba_ep *ep, struct usba_request *req, int status)
  409. {
  410. struct usba_udc *udc = ep->udc;
  411. WARN_ON(!list_empty(&req->queue));
  412. if (req->req.status == -EINPROGRESS)
  413. req->req.status = status;
  414. if (req->using_dma)
  415. usb_gadget_unmap_request(&udc->gadget, &req->req, ep->is_in);
  416. DBG(DBG_GADGET | DBG_REQ,
  417. "%s: req %p complete: status %d, actual %u\n",
  418. ep->ep.name, req, req->req.status, req->req.actual);
  419. spin_unlock(&udc->lock);
  420. usb_gadget_giveback_request(&ep->ep, &req->req);
  421. spin_lock(&udc->lock);
  422. }
  423. static void
  424. request_complete_list(struct usba_ep *ep, struct list_head *list, int status)
  425. {
  426. struct usba_request *req, *tmp_req;
  427. list_for_each_entry_safe(req, tmp_req, list, queue) {
  428. list_del_init(&req->queue);
  429. request_complete(ep, req, status);
  430. }
  431. }
  432. static int
  433. usba_ep_enable(struct usb_ep *_ep, const struct usb_endpoint_descriptor *desc)
  434. {
  435. struct usba_ep *ep = to_usba_ep(_ep);
  436. struct usba_udc *udc = ep->udc;
  437. unsigned long flags, ept_cfg, maxpacket;
  438. unsigned int nr_trans;
  439. DBG(DBG_GADGET, "%s: ep_enable: desc=%p\n", ep->ep.name, desc);
  440. maxpacket = usb_endpoint_maxp(desc) & 0x7ff;
  441. if (((desc->bEndpointAddress & USB_ENDPOINT_NUMBER_MASK) != ep->index)
  442. || ep->index == 0
  443. || desc->bDescriptorType != USB_DT_ENDPOINT
  444. || maxpacket == 0
  445. || maxpacket > ep->fifo_size) {
  446. DBG(DBG_ERR, "ep_enable: Invalid argument");
  447. return -EINVAL;
  448. }
  449. ep->is_isoc = 0;
  450. ep->is_in = 0;
  451. if (maxpacket <= 8)
  452. ept_cfg = USBA_BF(EPT_SIZE, USBA_EPT_SIZE_8);
  453. else
  454. /* LSB is bit 1, not 0 */
  455. ept_cfg = USBA_BF(EPT_SIZE, fls(maxpacket - 1) - 3);
  456. DBG(DBG_HW, "%s: EPT_SIZE = %lu (maxpacket = %lu)\n",
  457. ep->ep.name, ept_cfg, maxpacket);
  458. if (usb_endpoint_dir_in(desc)) {
  459. ep->is_in = 1;
  460. ept_cfg |= USBA_EPT_DIR_IN;
  461. }
  462. switch (usb_endpoint_type(desc)) {
  463. case USB_ENDPOINT_XFER_CONTROL:
  464. ept_cfg |= USBA_BF(EPT_TYPE, USBA_EPT_TYPE_CONTROL);
  465. ept_cfg |= USBA_BF(BK_NUMBER, USBA_BK_NUMBER_ONE);
  466. break;
  467. case USB_ENDPOINT_XFER_ISOC:
  468. if (!ep->can_isoc) {
  469. DBG(DBG_ERR, "ep_enable: %s is not isoc capable\n",
  470. ep->ep.name);
  471. return -EINVAL;
  472. }
  473. /*
  474. * Bits 11:12 specify number of _additional_
  475. * transactions per microframe.
  476. */
  477. nr_trans = ((usb_endpoint_maxp(desc) >> 11) & 3) + 1;
  478. if (nr_trans > 3)
  479. return -EINVAL;
  480. ep->is_isoc = 1;
  481. ept_cfg |= USBA_BF(EPT_TYPE, USBA_EPT_TYPE_ISO);
  482. /*
  483. * Do triple-buffering on high-bandwidth iso endpoints.
  484. */
  485. if (nr_trans > 1 && ep->nr_banks == 3)
  486. ept_cfg |= USBA_BF(BK_NUMBER, USBA_BK_NUMBER_TRIPLE);
  487. else
  488. ept_cfg |= USBA_BF(BK_NUMBER, USBA_BK_NUMBER_DOUBLE);
  489. ept_cfg |= USBA_BF(NB_TRANS, nr_trans);
  490. break;
  491. case USB_ENDPOINT_XFER_BULK:
  492. ept_cfg |= USBA_BF(EPT_TYPE, USBA_EPT_TYPE_BULK);
  493. ept_cfg |= USBA_BF(BK_NUMBER, USBA_BK_NUMBER_DOUBLE);
  494. break;
  495. case USB_ENDPOINT_XFER_INT:
  496. ept_cfg |= USBA_BF(EPT_TYPE, USBA_EPT_TYPE_INT);
  497. ept_cfg |= USBA_BF(BK_NUMBER, USBA_BK_NUMBER_DOUBLE);
  498. break;
  499. }
  500. spin_lock_irqsave(&ep->udc->lock, flags);
  501. ep->ep.desc = desc;
  502. ep->ep.maxpacket = maxpacket;
  503. usba_ep_writel(ep, CFG, ept_cfg);
  504. usba_ep_writel(ep, CTL_ENB, USBA_EPT_ENABLE);
  505. if (ep->can_dma) {
  506. u32 ctrl;
  507. usba_int_enb_set(udc, usba_int_enb_get(udc) |
  508. USBA_BF(EPT_INT, 1 << ep->index) |
  509. USBA_BF(DMA_INT, 1 << ep->index));
  510. ctrl = USBA_AUTO_VALID | USBA_INTDIS_DMA;
  511. usba_ep_writel(ep, CTL_ENB, ctrl);
  512. } else {
  513. usba_int_enb_set(udc, usba_int_enb_get(udc) |
  514. USBA_BF(EPT_INT, 1 << ep->index));
  515. }
  516. spin_unlock_irqrestore(&udc->lock, flags);
  517. DBG(DBG_HW, "EPT_CFG%d after init: %#08lx\n", ep->index,
  518. (unsigned long)usba_ep_readl(ep, CFG));
  519. DBG(DBG_HW, "INT_ENB after init: %#08lx\n",
  520. (unsigned long)usba_int_enb_get(udc));
  521. return 0;
  522. }
  523. static int usba_ep_disable(struct usb_ep *_ep)
  524. {
  525. struct usba_ep *ep = to_usba_ep(_ep);
  526. struct usba_udc *udc = ep->udc;
  527. LIST_HEAD(req_list);
  528. unsigned long flags;
  529. DBG(DBG_GADGET, "ep_disable: %s\n", ep->ep.name);
  530. spin_lock_irqsave(&udc->lock, flags);
  531. if (!ep->ep.desc) {
  532. spin_unlock_irqrestore(&udc->lock, flags);
  533. /* REVISIT because this driver disables endpoints in
  534. * reset_all_endpoints() before calling disconnect(),
  535. * most gadget drivers would trigger this non-error ...
  536. */
  537. if (udc->gadget.speed != USB_SPEED_UNKNOWN)
  538. DBG(DBG_ERR, "ep_disable: %s not enabled\n",
  539. ep->ep.name);
  540. return -EINVAL;
  541. }
  542. ep->ep.desc = NULL;
  543. list_splice_init(&ep->queue, &req_list);
  544. if (ep->can_dma) {
  545. usba_dma_writel(ep, CONTROL, 0);
  546. usba_dma_writel(ep, ADDRESS, 0);
  547. usba_dma_readl(ep, STATUS);
  548. }
  549. usba_ep_writel(ep, CTL_DIS, USBA_EPT_ENABLE);
  550. usba_int_enb_set(udc, usba_int_enb_get(udc) &
  551. ~USBA_BF(EPT_INT, 1 << ep->index));
  552. request_complete_list(ep, &req_list, -ESHUTDOWN);
  553. spin_unlock_irqrestore(&udc->lock, flags);
  554. return 0;
  555. }
  556. static struct usb_request *
  557. usba_ep_alloc_request(struct usb_ep *_ep, gfp_t gfp_flags)
  558. {
  559. struct usba_request *req;
  560. DBG(DBG_GADGET, "ep_alloc_request: %p, 0x%x\n", _ep, gfp_flags);
  561. req = kzalloc(sizeof(*req), gfp_flags);
  562. if (!req)
  563. return NULL;
  564. INIT_LIST_HEAD(&req->queue);
  565. return &req->req;
  566. }
  567. static void
  568. usba_ep_free_request(struct usb_ep *_ep, struct usb_request *_req)
  569. {
  570. struct usba_request *req = to_usba_req(_req);
  571. DBG(DBG_GADGET, "ep_free_request: %p, %p\n", _ep, _req);
  572. kfree(req);
  573. }
  574. static int queue_dma(struct usba_udc *udc, struct usba_ep *ep,
  575. struct usba_request *req, gfp_t gfp_flags)
  576. {
  577. unsigned long flags;
  578. int ret;
  579. DBG(DBG_DMA, "%s: req l/%u d/%pad %c%c%c\n",
  580. ep->ep.name, req->req.length, &req->req.dma,
  581. req->req.zero ? 'Z' : 'z',
  582. req->req.short_not_ok ? 'S' : 's',
  583. req->req.no_interrupt ? 'I' : 'i');
  584. if (req->req.length > 0x10000) {
  585. /* Lengths from 0 to 65536 (inclusive) are supported */
  586. DBG(DBG_ERR, "invalid request length %u\n", req->req.length);
  587. return -EINVAL;
  588. }
  589. ret = usb_gadget_map_request(&udc->gadget, &req->req, ep->is_in);
  590. if (ret)
  591. return ret;
  592. req->using_dma = 1;
  593. req->ctrl = USBA_BF(DMA_BUF_LEN, req->req.length)
  594. | USBA_DMA_CH_EN | USBA_DMA_END_BUF_IE
  595. | USBA_DMA_END_BUF_EN;
  596. if (!ep->is_in)
  597. req->ctrl |= USBA_DMA_END_TR_EN | USBA_DMA_END_TR_IE;
  598. /*
  599. * Add this request to the queue and submit for DMA if
  600. * possible. Check if we're still alive first -- we may have
  601. * received a reset since last time we checked.
  602. */
  603. ret = -ESHUTDOWN;
  604. spin_lock_irqsave(&udc->lock, flags);
  605. if (ep->ep.desc) {
  606. if (list_empty(&ep->queue))
  607. submit_request(ep, req);
  608. list_add_tail(&req->queue, &ep->queue);
  609. ret = 0;
  610. }
  611. spin_unlock_irqrestore(&udc->lock, flags);
  612. return ret;
  613. }
  614. static int
  615. usba_ep_queue(struct usb_ep *_ep, struct usb_request *_req, gfp_t gfp_flags)
  616. {
  617. struct usba_request *req = to_usba_req(_req);
  618. struct usba_ep *ep = to_usba_ep(_ep);
  619. struct usba_udc *udc = ep->udc;
  620. unsigned long flags;
  621. int ret;
  622. DBG(DBG_GADGET | DBG_QUEUE | DBG_REQ, "%s: queue req %p, len %u\n",
  623. ep->ep.name, req, _req->length);
  624. if (!udc->driver || udc->gadget.speed == USB_SPEED_UNKNOWN ||
  625. !ep->ep.desc)
  626. return -ESHUTDOWN;
  627. req->submitted = 0;
  628. req->using_dma = 0;
  629. req->last_transaction = 0;
  630. _req->status = -EINPROGRESS;
  631. _req->actual = 0;
  632. if (ep->can_dma)
  633. return queue_dma(udc, ep, req, gfp_flags);
  634. /* May have received a reset since last time we checked */
  635. ret = -ESHUTDOWN;
  636. spin_lock_irqsave(&udc->lock, flags);
  637. if (ep->ep.desc) {
  638. list_add_tail(&req->queue, &ep->queue);
  639. if ((!ep_is_control(ep) && ep->is_in) ||
  640. (ep_is_control(ep)
  641. && (ep->state == DATA_STAGE_IN
  642. || ep->state == STATUS_STAGE_IN)))
  643. usba_ep_writel(ep, CTL_ENB, USBA_TX_PK_RDY);
  644. else
  645. usba_ep_writel(ep, CTL_ENB, USBA_RX_BK_RDY);
  646. ret = 0;
  647. }
  648. spin_unlock_irqrestore(&udc->lock, flags);
  649. return ret;
  650. }
  651. static void
  652. usba_update_req(struct usba_ep *ep, struct usba_request *req, u32 status)
  653. {
  654. req->req.actual = req->req.length - USBA_BFEXT(DMA_BUF_LEN, status);
  655. }
  656. static int stop_dma(struct usba_ep *ep, u32 *pstatus)
  657. {
  658. unsigned int timeout;
  659. u32 status;
  660. /*
  661. * Stop the DMA controller. When writing both CH_EN
  662. * and LINK to 0, the other bits are not affected.
  663. */
  664. usba_dma_writel(ep, CONTROL, 0);
  665. /* Wait for the FIFO to empty */
  666. for (timeout = 40; timeout; --timeout) {
  667. status = usba_dma_readl(ep, STATUS);
  668. if (!(status & USBA_DMA_CH_EN))
  669. break;
  670. udelay(1);
  671. }
  672. if (pstatus)
  673. *pstatus = status;
  674. if (timeout == 0) {
  675. dev_err(&ep->udc->pdev->dev,
  676. "%s: timed out waiting for DMA FIFO to empty\n",
  677. ep->ep.name);
  678. return -ETIMEDOUT;
  679. }
  680. return 0;
  681. }
  682. static int usba_ep_dequeue(struct usb_ep *_ep, struct usb_request *_req)
  683. {
  684. struct usba_ep *ep = to_usba_ep(_ep);
  685. struct usba_udc *udc = ep->udc;
  686. struct usba_request *req;
  687. unsigned long flags;
  688. u32 status;
  689. DBG(DBG_GADGET | DBG_QUEUE, "ep_dequeue: %s, req %p\n",
  690. ep->ep.name, req);
  691. spin_lock_irqsave(&udc->lock, flags);
  692. list_for_each_entry(req, &ep->queue, queue) {
  693. if (&req->req == _req)
  694. break;
  695. }
  696. if (&req->req != _req) {
  697. spin_unlock_irqrestore(&udc->lock, flags);
  698. return -EINVAL;
  699. }
  700. if (req->using_dma) {
  701. /*
  702. * If this request is currently being transferred,
  703. * stop the DMA controller and reset the FIFO.
  704. */
  705. if (ep->queue.next == &req->queue) {
  706. status = usba_dma_readl(ep, STATUS);
  707. if (status & USBA_DMA_CH_EN)
  708. stop_dma(ep, &status);
  709. #ifdef CONFIG_USB_GADGET_DEBUG_FS
  710. ep->last_dma_status = status;
  711. #endif
  712. usba_writel(udc, EPT_RST, 1 << ep->index);
  713. usba_update_req(ep, req, status);
  714. }
  715. }
  716. /*
  717. * Errors should stop the queue from advancing until the
  718. * completion function returns.
  719. */
  720. list_del_init(&req->queue);
  721. request_complete(ep, req, -ECONNRESET);
  722. /* Process the next request if any */
  723. submit_next_request(ep);
  724. spin_unlock_irqrestore(&udc->lock, flags);
  725. return 0;
  726. }
  727. static int usba_ep_set_halt(struct usb_ep *_ep, int value)
  728. {
  729. struct usba_ep *ep = to_usba_ep(_ep);
  730. struct usba_udc *udc = ep->udc;
  731. unsigned long flags;
  732. int ret = 0;
  733. DBG(DBG_GADGET, "endpoint %s: %s HALT\n", ep->ep.name,
  734. value ? "set" : "clear");
  735. if (!ep->ep.desc) {
  736. DBG(DBG_ERR, "Attempted to halt uninitialized ep %s\n",
  737. ep->ep.name);
  738. return -ENODEV;
  739. }
  740. if (ep->is_isoc) {
  741. DBG(DBG_ERR, "Attempted to halt isochronous ep %s\n",
  742. ep->ep.name);
  743. return -ENOTTY;
  744. }
  745. spin_lock_irqsave(&udc->lock, flags);
  746. /*
  747. * We can't halt IN endpoints while there are still data to be
  748. * transferred
  749. */
  750. if (!list_empty(&ep->queue)
  751. || ((value && ep->is_in && (usba_ep_readl(ep, STA)
  752. & USBA_BF(BUSY_BANKS, -1L))))) {
  753. ret = -EAGAIN;
  754. } else {
  755. if (value)
  756. usba_ep_writel(ep, SET_STA, USBA_FORCE_STALL);
  757. else
  758. usba_ep_writel(ep, CLR_STA,
  759. USBA_FORCE_STALL | USBA_TOGGLE_CLR);
  760. usba_ep_readl(ep, STA);
  761. }
  762. spin_unlock_irqrestore(&udc->lock, flags);
  763. return ret;
  764. }
  765. static int usba_ep_fifo_status(struct usb_ep *_ep)
  766. {
  767. struct usba_ep *ep = to_usba_ep(_ep);
  768. return USBA_BFEXT(BYTE_COUNT, usba_ep_readl(ep, STA));
  769. }
  770. static void usba_ep_fifo_flush(struct usb_ep *_ep)
  771. {
  772. struct usba_ep *ep = to_usba_ep(_ep);
  773. struct usba_udc *udc = ep->udc;
  774. usba_writel(udc, EPT_RST, 1 << ep->index);
  775. }
  776. static const struct usb_ep_ops usba_ep_ops = {
  777. .enable = usba_ep_enable,
  778. .disable = usba_ep_disable,
  779. .alloc_request = usba_ep_alloc_request,
  780. .free_request = usba_ep_free_request,
  781. .queue = usba_ep_queue,
  782. .dequeue = usba_ep_dequeue,
  783. .set_halt = usba_ep_set_halt,
  784. .fifo_status = usba_ep_fifo_status,
  785. .fifo_flush = usba_ep_fifo_flush,
  786. };
  787. static int usba_udc_get_frame(struct usb_gadget *gadget)
  788. {
  789. struct usba_udc *udc = to_usba_udc(gadget);
  790. return USBA_BFEXT(FRAME_NUMBER, usba_readl(udc, FNUM));
  791. }
  792. static int usba_udc_wakeup(struct usb_gadget *gadget)
  793. {
  794. struct usba_udc *udc = to_usba_udc(gadget);
  795. unsigned long flags;
  796. u32 ctrl;
  797. int ret = -EINVAL;
  798. spin_lock_irqsave(&udc->lock, flags);
  799. if (udc->devstatus & (1 << USB_DEVICE_REMOTE_WAKEUP)) {
  800. ctrl = usba_readl(udc, CTRL);
  801. usba_writel(udc, CTRL, ctrl | USBA_REMOTE_WAKE_UP);
  802. ret = 0;
  803. }
  804. spin_unlock_irqrestore(&udc->lock, flags);
  805. return ret;
  806. }
  807. static int
  808. usba_udc_set_selfpowered(struct usb_gadget *gadget, int is_selfpowered)
  809. {
  810. struct usba_udc *udc = to_usba_udc(gadget);
  811. unsigned long flags;
  812. gadget->is_selfpowered = (is_selfpowered != 0);
  813. spin_lock_irqsave(&udc->lock, flags);
  814. if (is_selfpowered)
  815. udc->devstatus |= 1 << USB_DEVICE_SELF_POWERED;
  816. else
  817. udc->devstatus &= ~(1 << USB_DEVICE_SELF_POWERED);
  818. spin_unlock_irqrestore(&udc->lock, flags);
  819. return 0;
  820. }
  821. static int atmel_usba_start(struct usb_gadget *gadget,
  822. struct usb_gadget_driver *driver);
  823. static int atmel_usba_stop(struct usb_gadget *gadget);
  824. static const struct usb_gadget_ops usba_udc_ops = {
  825. .get_frame = usba_udc_get_frame,
  826. .wakeup = usba_udc_wakeup,
  827. .set_selfpowered = usba_udc_set_selfpowered,
  828. .udc_start = atmel_usba_start,
  829. .udc_stop = atmel_usba_stop,
  830. };
  831. static struct usb_endpoint_descriptor usba_ep0_desc = {
  832. .bLength = USB_DT_ENDPOINT_SIZE,
  833. .bDescriptorType = USB_DT_ENDPOINT,
  834. .bEndpointAddress = 0,
  835. .bmAttributes = USB_ENDPOINT_XFER_CONTROL,
  836. .wMaxPacketSize = cpu_to_le16(64),
  837. /* FIXME: I have no idea what to put here */
  838. .bInterval = 1,
  839. };
  840. static struct usb_gadget usba_gadget_template = {
  841. .ops = &usba_udc_ops,
  842. .max_speed = USB_SPEED_HIGH,
  843. .name = "atmel_usba_udc",
  844. };
  845. /*
  846. * Called with interrupts disabled and udc->lock held.
  847. */
  848. static void reset_all_endpoints(struct usba_udc *udc)
  849. {
  850. struct usba_ep *ep;
  851. struct usba_request *req, *tmp_req;
  852. usba_writel(udc, EPT_RST, ~0UL);
  853. ep = to_usba_ep(udc->gadget.ep0);
  854. list_for_each_entry_safe(req, tmp_req, &ep->queue, queue) {
  855. list_del_init(&req->queue);
  856. request_complete(ep, req, -ECONNRESET);
  857. }
  858. /* NOTE: normally, the next call to the gadget driver is in
  859. * charge of disabling endpoints... usually disconnect().
  860. * The exception would be entering a high speed test mode.
  861. *
  862. * FIXME remove this code ... and retest thoroughly.
  863. */
  864. list_for_each_entry(ep, &udc->gadget.ep_list, ep.ep_list) {
  865. if (ep->ep.desc) {
  866. spin_unlock(&udc->lock);
  867. usba_ep_disable(&ep->ep);
  868. spin_lock(&udc->lock);
  869. }
  870. }
  871. }
  872. static struct usba_ep *get_ep_by_addr(struct usba_udc *udc, u16 wIndex)
  873. {
  874. struct usba_ep *ep;
  875. if ((wIndex & USB_ENDPOINT_NUMBER_MASK) == 0)
  876. return to_usba_ep(udc->gadget.ep0);
  877. list_for_each_entry (ep, &udc->gadget.ep_list, ep.ep_list) {
  878. u8 bEndpointAddress;
  879. if (!ep->ep.desc)
  880. continue;
  881. bEndpointAddress = ep->ep.desc->bEndpointAddress;
  882. if ((wIndex ^ bEndpointAddress) & USB_DIR_IN)
  883. continue;
  884. if ((bEndpointAddress & USB_ENDPOINT_NUMBER_MASK)
  885. == (wIndex & USB_ENDPOINT_NUMBER_MASK))
  886. return ep;
  887. }
  888. return NULL;
  889. }
  890. /* Called with interrupts disabled and udc->lock held */
  891. static inline void set_protocol_stall(struct usba_udc *udc, struct usba_ep *ep)
  892. {
  893. usba_ep_writel(ep, SET_STA, USBA_FORCE_STALL);
  894. ep->state = WAIT_FOR_SETUP;
  895. }
  896. static inline int is_stalled(struct usba_udc *udc, struct usba_ep *ep)
  897. {
  898. if (usba_ep_readl(ep, STA) & USBA_FORCE_STALL)
  899. return 1;
  900. return 0;
  901. }
  902. static inline void set_address(struct usba_udc *udc, unsigned int addr)
  903. {
  904. u32 regval;
  905. DBG(DBG_BUS, "setting address %u...\n", addr);
  906. regval = usba_readl(udc, CTRL);
  907. regval = USBA_BFINS(DEV_ADDR, addr, regval);
  908. usba_writel(udc, CTRL, regval);
  909. }
  910. static int do_test_mode(struct usba_udc *udc)
  911. {
  912. static const char test_packet_buffer[] = {
  913. /* JKJKJKJK * 9 */
  914. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  915. /* JJKKJJKK * 8 */
  916. 0xAA, 0xAA, 0xAA, 0xAA, 0xAA, 0xAA, 0xAA, 0xAA,
  917. /* JJKKJJKK * 8 */
  918. 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE,
  919. /* JJJJJJJKKKKKKK * 8 */
  920. 0xFE, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
  921. 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
  922. /* JJJJJJJK * 8 */
  923. 0x7F, 0xBF, 0xDF, 0xEF, 0xF7, 0xFB, 0xFD,
  924. /* {JKKKKKKK * 10}, JK */
  925. 0xFC, 0x7E, 0xBF, 0xDF, 0xEF, 0xF7, 0xFB, 0xFD, 0x7E
  926. };
  927. struct usba_ep *ep;
  928. struct device *dev = &udc->pdev->dev;
  929. int test_mode;
  930. test_mode = udc->test_mode;
  931. /* Start from a clean slate */
  932. reset_all_endpoints(udc);
  933. switch (test_mode) {
  934. case 0x0100:
  935. /* Test_J */
  936. usba_writel(udc, TST, USBA_TST_J_MODE);
  937. dev_info(dev, "Entering Test_J mode...\n");
  938. break;
  939. case 0x0200:
  940. /* Test_K */
  941. usba_writel(udc, TST, USBA_TST_K_MODE);
  942. dev_info(dev, "Entering Test_K mode...\n");
  943. break;
  944. case 0x0300:
  945. /*
  946. * Test_SE0_NAK: Force high-speed mode and set up ep0
  947. * for Bulk IN transfers
  948. */
  949. ep = &udc->usba_ep[0];
  950. usba_writel(udc, TST,
  951. USBA_BF(SPEED_CFG, USBA_SPEED_CFG_FORCE_HIGH));
  952. usba_ep_writel(ep, CFG,
  953. USBA_BF(EPT_SIZE, USBA_EPT_SIZE_64)
  954. | USBA_EPT_DIR_IN
  955. | USBA_BF(EPT_TYPE, USBA_EPT_TYPE_BULK)
  956. | USBA_BF(BK_NUMBER, 1));
  957. if (!(usba_ep_readl(ep, CFG) & USBA_EPT_MAPPED)) {
  958. set_protocol_stall(udc, ep);
  959. dev_err(dev, "Test_SE0_NAK: ep0 not mapped\n");
  960. } else {
  961. usba_ep_writel(ep, CTL_ENB, USBA_EPT_ENABLE);
  962. dev_info(dev, "Entering Test_SE0_NAK mode...\n");
  963. }
  964. break;
  965. case 0x0400:
  966. /* Test_Packet */
  967. ep = &udc->usba_ep[0];
  968. usba_ep_writel(ep, CFG,
  969. USBA_BF(EPT_SIZE, USBA_EPT_SIZE_64)
  970. | USBA_EPT_DIR_IN
  971. | USBA_BF(EPT_TYPE, USBA_EPT_TYPE_BULK)
  972. | USBA_BF(BK_NUMBER, 1));
  973. if (!(usba_ep_readl(ep, CFG) & USBA_EPT_MAPPED)) {
  974. set_protocol_stall(udc, ep);
  975. dev_err(dev, "Test_Packet: ep0 not mapped\n");
  976. } else {
  977. usba_ep_writel(ep, CTL_ENB, USBA_EPT_ENABLE);
  978. usba_writel(udc, TST, USBA_TST_PKT_MODE);
  979. memcpy_toio(ep->fifo, test_packet_buffer,
  980. sizeof(test_packet_buffer));
  981. usba_ep_writel(ep, SET_STA, USBA_TX_PK_RDY);
  982. dev_info(dev, "Entering Test_Packet mode...\n");
  983. }
  984. break;
  985. default:
  986. dev_err(dev, "Invalid test mode: 0x%04x\n", test_mode);
  987. return -EINVAL;
  988. }
  989. return 0;
  990. }
  991. /* Avoid overly long expressions */
  992. static inline bool feature_is_dev_remote_wakeup(struct usb_ctrlrequest *crq)
  993. {
  994. if (crq->wValue == cpu_to_le16(USB_DEVICE_REMOTE_WAKEUP))
  995. return true;
  996. return false;
  997. }
  998. static inline bool feature_is_dev_test_mode(struct usb_ctrlrequest *crq)
  999. {
  1000. if (crq->wValue == cpu_to_le16(USB_DEVICE_TEST_MODE))
  1001. return true;
  1002. return false;
  1003. }
  1004. static inline bool feature_is_ep_halt(struct usb_ctrlrequest *crq)
  1005. {
  1006. if (crq->wValue == cpu_to_le16(USB_ENDPOINT_HALT))
  1007. return true;
  1008. return false;
  1009. }
  1010. static int handle_ep0_setup(struct usba_udc *udc, struct usba_ep *ep,
  1011. struct usb_ctrlrequest *crq)
  1012. {
  1013. int retval = 0;
  1014. switch (crq->bRequest) {
  1015. case USB_REQ_GET_STATUS: {
  1016. u16 status;
  1017. if (crq->bRequestType == (USB_DIR_IN | USB_RECIP_DEVICE)) {
  1018. status = cpu_to_le16(udc->devstatus);
  1019. } else if (crq->bRequestType
  1020. == (USB_DIR_IN | USB_RECIP_INTERFACE)) {
  1021. status = cpu_to_le16(0);
  1022. } else if (crq->bRequestType
  1023. == (USB_DIR_IN | USB_RECIP_ENDPOINT)) {
  1024. struct usba_ep *target;
  1025. target = get_ep_by_addr(udc, le16_to_cpu(crq->wIndex));
  1026. if (!target)
  1027. goto stall;
  1028. status = 0;
  1029. if (is_stalled(udc, target))
  1030. status |= cpu_to_le16(1);
  1031. } else
  1032. goto delegate;
  1033. /* Write directly to the FIFO. No queueing is done. */
  1034. if (crq->wLength != cpu_to_le16(sizeof(status)))
  1035. goto stall;
  1036. ep->state = DATA_STAGE_IN;
  1037. usba_io_writew(status, ep->fifo);
  1038. usba_ep_writel(ep, SET_STA, USBA_TX_PK_RDY);
  1039. break;
  1040. }
  1041. case USB_REQ_CLEAR_FEATURE: {
  1042. if (crq->bRequestType == USB_RECIP_DEVICE) {
  1043. if (feature_is_dev_remote_wakeup(crq))
  1044. udc->devstatus
  1045. &= ~(1 << USB_DEVICE_REMOTE_WAKEUP);
  1046. else
  1047. /* Can't CLEAR_FEATURE TEST_MODE */
  1048. goto stall;
  1049. } else if (crq->bRequestType == USB_RECIP_ENDPOINT) {
  1050. struct usba_ep *target;
  1051. if (crq->wLength != cpu_to_le16(0)
  1052. || !feature_is_ep_halt(crq))
  1053. goto stall;
  1054. target = get_ep_by_addr(udc, le16_to_cpu(crq->wIndex));
  1055. if (!target)
  1056. goto stall;
  1057. usba_ep_writel(target, CLR_STA, USBA_FORCE_STALL);
  1058. if (target->index != 0)
  1059. usba_ep_writel(target, CLR_STA,
  1060. USBA_TOGGLE_CLR);
  1061. } else {
  1062. goto delegate;
  1063. }
  1064. send_status(udc, ep);
  1065. break;
  1066. }
  1067. case USB_REQ_SET_FEATURE: {
  1068. if (crq->bRequestType == USB_RECIP_DEVICE) {
  1069. if (feature_is_dev_test_mode(crq)) {
  1070. send_status(udc, ep);
  1071. ep->state = STATUS_STAGE_TEST;
  1072. udc->test_mode = le16_to_cpu(crq->wIndex);
  1073. return 0;
  1074. } else if (feature_is_dev_remote_wakeup(crq)) {
  1075. udc->devstatus |= 1 << USB_DEVICE_REMOTE_WAKEUP;
  1076. } else {
  1077. goto stall;
  1078. }
  1079. } else if (crq->bRequestType == USB_RECIP_ENDPOINT) {
  1080. struct usba_ep *target;
  1081. if (crq->wLength != cpu_to_le16(0)
  1082. || !feature_is_ep_halt(crq))
  1083. goto stall;
  1084. target = get_ep_by_addr(udc, le16_to_cpu(crq->wIndex));
  1085. if (!target)
  1086. goto stall;
  1087. usba_ep_writel(target, SET_STA, USBA_FORCE_STALL);
  1088. } else
  1089. goto delegate;
  1090. send_status(udc, ep);
  1091. break;
  1092. }
  1093. case USB_REQ_SET_ADDRESS:
  1094. if (crq->bRequestType != (USB_DIR_OUT | USB_RECIP_DEVICE))
  1095. goto delegate;
  1096. set_address(udc, le16_to_cpu(crq->wValue));
  1097. send_status(udc, ep);
  1098. ep->state = STATUS_STAGE_ADDR;
  1099. break;
  1100. default:
  1101. delegate:
  1102. spin_unlock(&udc->lock);
  1103. retval = udc->driver->setup(&udc->gadget, crq);
  1104. spin_lock(&udc->lock);
  1105. }
  1106. return retval;
  1107. stall:
  1108. pr_err("udc: %s: Invalid setup request: %02x.%02x v%04x i%04x l%d, "
  1109. "halting endpoint...\n",
  1110. ep->ep.name, crq->bRequestType, crq->bRequest,
  1111. le16_to_cpu(crq->wValue), le16_to_cpu(crq->wIndex),
  1112. le16_to_cpu(crq->wLength));
  1113. set_protocol_stall(udc, ep);
  1114. return -1;
  1115. }
  1116. static void usba_control_irq(struct usba_udc *udc, struct usba_ep *ep)
  1117. {
  1118. struct usba_request *req;
  1119. u32 epstatus;
  1120. u32 epctrl;
  1121. restart:
  1122. epstatus = usba_ep_readl(ep, STA);
  1123. epctrl = usba_ep_readl(ep, CTL);
  1124. DBG(DBG_INT, "%s [%d]: s/%08x c/%08x\n",
  1125. ep->ep.name, ep->state, epstatus, epctrl);
  1126. req = NULL;
  1127. if (!list_empty(&ep->queue))
  1128. req = list_entry(ep->queue.next,
  1129. struct usba_request, queue);
  1130. if ((epctrl & USBA_TX_PK_RDY) && !(epstatus & USBA_TX_PK_RDY)) {
  1131. if (req->submitted)
  1132. next_fifo_transaction(ep, req);
  1133. else
  1134. submit_request(ep, req);
  1135. if (req->last_transaction) {
  1136. usba_ep_writel(ep, CTL_DIS, USBA_TX_PK_RDY);
  1137. usba_ep_writel(ep, CTL_ENB, USBA_TX_COMPLETE);
  1138. }
  1139. goto restart;
  1140. }
  1141. if ((epstatus & epctrl) & USBA_TX_COMPLETE) {
  1142. usba_ep_writel(ep, CLR_STA, USBA_TX_COMPLETE);
  1143. switch (ep->state) {
  1144. case DATA_STAGE_IN:
  1145. usba_ep_writel(ep, CTL_ENB, USBA_RX_BK_RDY);
  1146. usba_ep_writel(ep, CTL_DIS, USBA_TX_COMPLETE);
  1147. ep->state = STATUS_STAGE_OUT;
  1148. break;
  1149. case STATUS_STAGE_ADDR:
  1150. /* Activate our new address */
  1151. usba_writel(udc, CTRL, (usba_readl(udc, CTRL)
  1152. | USBA_FADDR_EN));
  1153. usba_ep_writel(ep, CTL_DIS, USBA_TX_COMPLETE);
  1154. ep->state = WAIT_FOR_SETUP;
  1155. break;
  1156. case STATUS_STAGE_IN:
  1157. if (req) {
  1158. list_del_init(&req->queue);
  1159. request_complete(ep, req, 0);
  1160. submit_next_request(ep);
  1161. }
  1162. usba_ep_writel(ep, CTL_DIS, USBA_TX_COMPLETE);
  1163. ep->state = WAIT_FOR_SETUP;
  1164. break;
  1165. case STATUS_STAGE_TEST:
  1166. usba_ep_writel(ep, CTL_DIS, USBA_TX_COMPLETE);
  1167. ep->state = WAIT_FOR_SETUP;
  1168. if (do_test_mode(udc))
  1169. set_protocol_stall(udc, ep);
  1170. break;
  1171. default:
  1172. pr_err("udc: %s: TXCOMP: Invalid endpoint state %d, "
  1173. "halting endpoint...\n",
  1174. ep->ep.name, ep->state);
  1175. set_protocol_stall(udc, ep);
  1176. break;
  1177. }
  1178. goto restart;
  1179. }
  1180. if ((epstatus & epctrl) & USBA_RX_BK_RDY) {
  1181. switch (ep->state) {
  1182. case STATUS_STAGE_OUT:
  1183. usba_ep_writel(ep, CLR_STA, USBA_RX_BK_RDY);
  1184. usba_ep_writel(ep, CTL_DIS, USBA_RX_BK_RDY);
  1185. if (req) {
  1186. list_del_init(&req->queue);
  1187. request_complete(ep, req, 0);
  1188. }
  1189. ep->state = WAIT_FOR_SETUP;
  1190. break;
  1191. case DATA_STAGE_OUT:
  1192. receive_data(ep);
  1193. break;
  1194. default:
  1195. usba_ep_writel(ep, CLR_STA, USBA_RX_BK_RDY);
  1196. usba_ep_writel(ep, CTL_DIS, USBA_RX_BK_RDY);
  1197. pr_err("udc: %s: RXRDY: Invalid endpoint state %d, "
  1198. "halting endpoint...\n",
  1199. ep->ep.name, ep->state);
  1200. set_protocol_stall(udc, ep);
  1201. break;
  1202. }
  1203. goto restart;
  1204. }
  1205. if (epstatus & USBA_RX_SETUP) {
  1206. union {
  1207. struct usb_ctrlrequest crq;
  1208. unsigned long data[2];
  1209. } crq;
  1210. unsigned int pkt_len;
  1211. int ret;
  1212. if (ep->state != WAIT_FOR_SETUP) {
  1213. /*
  1214. * Didn't expect a SETUP packet at this
  1215. * point. Clean up any pending requests (which
  1216. * may be successful).
  1217. */
  1218. int status = -EPROTO;
  1219. /*
  1220. * RXRDY and TXCOMP are dropped when SETUP
  1221. * packets arrive. Just pretend we received
  1222. * the status packet.
  1223. */
  1224. if (ep->state == STATUS_STAGE_OUT
  1225. || ep->state == STATUS_STAGE_IN) {
  1226. usba_ep_writel(ep, CTL_DIS, USBA_RX_BK_RDY);
  1227. status = 0;
  1228. }
  1229. if (req) {
  1230. list_del_init(&req->queue);
  1231. request_complete(ep, req, status);
  1232. }
  1233. }
  1234. pkt_len = USBA_BFEXT(BYTE_COUNT, usba_ep_readl(ep, STA));
  1235. DBG(DBG_HW, "Packet length: %u\n", pkt_len);
  1236. if (pkt_len != sizeof(crq)) {
  1237. pr_warning("udc: Invalid packet length %u "
  1238. "(expected %zu)\n", pkt_len, sizeof(crq));
  1239. set_protocol_stall(udc, ep);
  1240. return;
  1241. }
  1242. DBG(DBG_FIFO, "Copying ctrl request from 0x%p:\n", ep->fifo);
  1243. memcpy_fromio(crq.data, ep->fifo, sizeof(crq));
  1244. /* Free up one bank in the FIFO so that we can
  1245. * generate or receive a reply right away. */
  1246. usba_ep_writel(ep, CLR_STA, USBA_RX_SETUP);
  1247. /* printk(KERN_DEBUG "setup: %d: %02x.%02x\n",
  1248. ep->state, crq.crq.bRequestType,
  1249. crq.crq.bRequest); */
  1250. if (crq.crq.bRequestType & USB_DIR_IN) {
  1251. /*
  1252. * The USB 2.0 spec states that "if wLength is
  1253. * zero, there is no data transfer phase."
  1254. * However, testusb #14 seems to actually
  1255. * expect a data phase even if wLength = 0...
  1256. */
  1257. ep->state = DATA_STAGE_IN;
  1258. } else {
  1259. if (crq.crq.wLength != cpu_to_le16(0))
  1260. ep->state = DATA_STAGE_OUT;
  1261. else
  1262. ep->state = STATUS_STAGE_IN;
  1263. }
  1264. ret = -1;
  1265. if (ep->index == 0)
  1266. ret = handle_ep0_setup(udc, ep, &crq.crq);
  1267. else {
  1268. spin_unlock(&udc->lock);
  1269. ret = udc->driver->setup(&udc->gadget, &crq.crq);
  1270. spin_lock(&udc->lock);
  1271. }
  1272. DBG(DBG_BUS, "req %02x.%02x, length %d, state %d, ret %d\n",
  1273. crq.crq.bRequestType, crq.crq.bRequest,
  1274. le16_to_cpu(crq.crq.wLength), ep->state, ret);
  1275. if (ret < 0) {
  1276. /* Let the host know that we failed */
  1277. set_protocol_stall(udc, ep);
  1278. }
  1279. }
  1280. }
  1281. static void usba_ep_irq(struct usba_udc *udc, struct usba_ep *ep)
  1282. {
  1283. struct usba_request *req;
  1284. u32 epstatus;
  1285. u32 epctrl;
  1286. epstatus = usba_ep_readl(ep, STA);
  1287. epctrl = usba_ep_readl(ep, CTL);
  1288. DBG(DBG_INT, "%s: interrupt, status: 0x%08x\n", ep->ep.name, epstatus);
  1289. while ((epctrl & USBA_TX_PK_RDY) && !(epstatus & USBA_TX_PK_RDY)) {
  1290. DBG(DBG_BUS, "%s: TX PK ready\n", ep->ep.name);
  1291. if (list_empty(&ep->queue)) {
  1292. dev_warn(&udc->pdev->dev, "ep_irq: queue empty\n");
  1293. usba_ep_writel(ep, CTL_DIS, USBA_TX_PK_RDY);
  1294. return;
  1295. }
  1296. req = list_entry(ep->queue.next, struct usba_request, queue);
  1297. if (req->using_dma) {
  1298. /* Send a zero-length packet */
  1299. usba_ep_writel(ep, SET_STA,
  1300. USBA_TX_PK_RDY);
  1301. usba_ep_writel(ep, CTL_DIS,
  1302. USBA_TX_PK_RDY);
  1303. list_del_init(&req->queue);
  1304. submit_next_request(ep);
  1305. request_complete(ep, req, 0);
  1306. } else {
  1307. if (req->submitted)
  1308. next_fifo_transaction(ep, req);
  1309. else
  1310. submit_request(ep, req);
  1311. if (req->last_transaction) {
  1312. list_del_init(&req->queue);
  1313. submit_next_request(ep);
  1314. request_complete(ep, req, 0);
  1315. }
  1316. }
  1317. epstatus = usba_ep_readl(ep, STA);
  1318. epctrl = usba_ep_readl(ep, CTL);
  1319. }
  1320. if ((epstatus & epctrl) & USBA_RX_BK_RDY) {
  1321. DBG(DBG_BUS, "%s: RX data ready\n", ep->ep.name);
  1322. receive_data(ep);
  1323. }
  1324. }
  1325. static void usba_dma_irq(struct usba_udc *udc, struct usba_ep *ep)
  1326. {
  1327. struct usba_request *req;
  1328. u32 status, control, pending;
  1329. status = usba_dma_readl(ep, STATUS);
  1330. control = usba_dma_readl(ep, CONTROL);
  1331. #ifdef CONFIG_USB_GADGET_DEBUG_FS
  1332. ep->last_dma_status = status;
  1333. #endif
  1334. pending = status & control;
  1335. DBG(DBG_INT | DBG_DMA, "dma irq, s/%#08x, c/%#08x\n", status, control);
  1336. if (status & USBA_DMA_CH_EN) {
  1337. dev_err(&udc->pdev->dev,
  1338. "DMA_CH_EN is set after transfer is finished!\n");
  1339. dev_err(&udc->pdev->dev,
  1340. "status=%#08x, pending=%#08x, control=%#08x\n",
  1341. status, pending, control);
  1342. /*
  1343. * try to pretend nothing happened. We might have to
  1344. * do something here...
  1345. */
  1346. }
  1347. if (list_empty(&ep->queue))
  1348. /* Might happen if a reset comes along at the right moment */
  1349. return;
  1350. if (pending & (USBA_DMA_END_TR_ST | USBA_DMA_END_BUF_ST)) {
  1351. req = list_entry(ep->queue.next, struct usba_request, queue);
  1352. usba_update_req(ep, req, status);
  1353. list_del_init(&req->queue);
  1354. submit_next_request(ep);
  1355. request_complete(ep, req, 0);
  1356. }
  1357. }
  1358. static irqreturn_t usba_udc_irq(int irq, void *devid)
  1359. {
  1360. struct usba_udc *udc = devid;
  1361. u32 status, int_enb;
  1362. u32 dma_status;
  1363. u32 ep_status;
  1364. spin_lock(&udc->lock);
  1365. int_enb = usba_int_enb_get(udc);
  1366. status = usba_readl(udc, INT_STA) & (int_enb | USBA_HIGH_SPEED);
  1367. DBG(DBG_INT, "irq, status=%#08x\n", status);
  1368. if (status & USBA_DET_SUSPEND) {
  1369. toggle_bias(udc, 0);
  1370. usba_writel(udc, INT_CLR, USBA_DET_SUSPEND);
  1371. usba_int_enb_set(udc, int_enb | USBA_WAKE_UP);
  1372. udc->bias_pulse_needed = true;
  1373. DBG(DBG_BUS, "Suspend detected\n");
  1374. if (udc->gadget.speed != USB_SPEED_UNKNOWN
  1375. && udc->driver && udc->driver->suspend) {
  1376. spin_unlock(&udc->lock);
  1377. udc->driver->suspend(&udc->gadget);
  1378. spin_lock(&udc->lock);
  1379. }
  1380. }
  1381. if (status & USBA_WAKE_UP) {
  1382. toggle_bias(udc, 1);
  1383. usba_writel(udc, INT_CLR, USBA_WAKE_UP);
  1384. usba_int_enb_set(udc, int_enb & ~USBA_WAKE_UP);
  1385. DBG(DBG_BUS, "Wake Up CPU detected\n");
  1386. }
  1387. if (status & USBA_END_OF_RESUME) {
  1388. usba_writel(udc, INT_CLR, USBA_END_OF_RESUME);
  1389. generate_bias_pulse(udc);
  1390. DBG(DBG_BUS, "Resume detected\n");
  1391. if (udc->gadget.speed != USB_SPEED_UNKNOWN
  1392. && udc->driver && udc->driver->resume) {
  1393. spin_unlock(&udc->lock);
  1394. udc->driver->resume(&udc->gadget);
  1395. spin_lock(&udc->lock);
  1396. }
  1397. }
  1398. dma_status = USBA_BFEXT(DMA_INT, status);
  1399. if (dma_status) {
  1400. int i;
  1401. for (i = 1; i <= USBA_NR_DMAS; i++)
  1402. if (dma_status & (1 << i))
  1403. usba_dma_irq(udc, &udc->usba_ep[i]);
  1404. }
  1405. ep_status = USBA_BFEXT(EPT_INT, status);
  1406. if (ep_status) {
  1407. int i;
  1408. for (i = 0; i < udc->num_ep; i++)
  1409. if (ep_status & (1 << i)) {
  1410. if (ep_is_control(&udc->usba_ep[i]))
  1411. usba_control_irq(udc, &udc->usba_ep[i]);
  1412. else
  1413. usba_ep_irq(udc, &udc->usba_ep[i]);
  1414. }
  1415. }
  1416. if (status & USBA_END_OF_RESET) {
  1417. struct usba_ep *ep0;
  1418. usba_writel(udc, INT_CLR, USBA_END_OF_RESET);
  1419. generate_bias_pulse(udc);
  1420. reset_all_endpoints(udc);
  1421. if (udc->gadget.speed != USB_SPEED_UNKNOWN && udc->driver) {
  1422. udc->gadget.speed = USB_SPEED_UNKNOWN;
  1423. spin_unlock(&udc->lock);
  1424. usb_gadget_udc_reset(&udc->gadget, udc->driver);
  1425. spin_lock(&udc->lock);
  1426. }
  1427. if (status & USBA_HIGH_SPEED)
  1428. udc->gadget.speed = USB_SPEED_HIGH;
  1429. else
  1430. udc->gadget.speed = USB_SPEED_FULL;
  1431. DBG(DBG_BUS, "%s bus reset detected\n",
  1432. usb_speed_string(udc->gadget.speed));
  1433. ep0 = &udc->usba_ep[0];
  1434. ep0->ep.desc = &usba_ep0_desc;
  1435. ep0->state = WAIT_FOR_SETUP;
  1436. usba_ep_writel(ep0, CFG,
  1437. (USBA_BF(EPT_SIZE, EP0_EPT_SIZE)
  1438. | USBA_BF(EPT_TYPE, USBA_EPT_TYPE_CONTROL)
  1439. | USBA_BF(BK_NUMBER, USBA_BK_NUMBER_ONE)));
  1440. usba_ep_writel(ep0, CTL_ENB,
  1441. USBA_EPT_ENABLE | USBA_RX_SETUP);
  1442. usba_int_enb_set(udc, int_enb | USBA_BF(EPT_INT, 1) |
  1443. USBA_DET_SUSPEND | USBA_END_OF_RESUME);
  1444. /*
  1445. * Unclear why we hit this irregularly, e.g. in usbtest,
  1446. * but it's clearly harmless...
  1447. */
  1448. if (!(usba_ep_readl(ep0, CFG) & USBA_EPT_MAPPED))
  1449. dev_dbg(&udc->pdev->dev,
  1450. "ODD: EP0 configuration is invalid!\n");
  1451. }
  1452. spin_unlock(&udc->lock);
  1453. return IRQ_HANDLED;
  1454. }
  1455. static int start_clock(struct usba_udc *udc)
  1456. {
  1457. int ret;
  1458. if (udc->clocked)
  1459. return 0;
  1460. ret = clk_prepare_enable(udc->pclk);
  1461. if (ret)
  1462. return ret;
  1463. ret = clk_prepare_enable(udc->hclk);
  1464. if (ret) {
  1465. clk_disable_unprepare(udc->pclk);
  1466. return ret;
  1467. }
  1468. udc->clocked = true;
  1469. return 0;
  1470. }
  1471. static void stop_clock(struct usba_udc *udc)
  1472. {
  1473. if (!udc->clocked)
  1474. return;
  1475. clk_disable_unprepare(udc->hclk);
  1476. clk_disable_unprepare(udc->pclk);
  1477. udc->clocked = false;
  1478. }
  1479. static int usba_start(struct usba_udc *udc)
  1480. {
  1481. unsigned long flags;
  1482. int ret;
  1483. ret = start_clock(udc);
  1484. if (ret)
  1485. return ret;
  1486. spin_lock_irqsave(&udc->lock, flags);
  1487. toggle_bias(udc, 1);
  1488. usba_writel(udc, CTRL, USBA_ENABLE_MASK);
  1489. usba_int_enb_set(udc, USBA_END_OF_RESET);
  1490. spin_unlock_irqrestore(&udc->lock, flags);
  1491. return 0;
  1492. }
  1493. static void usba_stop(struct usba_udc *udc)
  1494. {
  1495. unsigned long flags;
  1496. spin_lock_irqsave(&udc->lock, flags);
  1497. udc->gadget.speed = USB_SPEED_UNKNOWN;
  1498. reset_all_endpoints(udc);
  1499. /* This will also disable the DP pullup */
  1500. toggle_bias(udc, 0);
  1501. usba_writel(udc, CTRL, USBA_DISABLE_MASK);
  1502. spin_unlock_irqrestore(&udc->lock, flags);
  1503. stop_clock(udc);
  1504. }
  1505. static irqreturn_t usba_vbus_irq_thread(int irq, void *devid)
  1506. {
  1507. struct usba_udc *udc = devid;
  1508. int vbus;
  1509. /* debounce */
  1510. udelay(10);
  1511. mutex_lock(&udc->vbus_mutex);
  1512. vbus = vbus_is_present(udc);
  1513. if (vbus != udc->vbus_prev) {
  1514. if (vbus) {
  1515. usba_start(udc);
  1516. } else {
  1517. usba_stop(udc);
  1518. if (udc->driver->disconnect)
  1519. udc->driver->disconnect(&udc->gadget);
  1520. }
  1521. udc->vbus_prev = vbus;
  1522. }
  1523. mutex_unlock(&udc->vbus_mutex);
  1524. return IRQ_HANDLED;
  1525. }
  1526. static int atmel_usba_start(struct usb_gadget *gadget,
  1527. struct usb_gadget_driver *driver)
  1528. {
  1529. int ret;
  1530. struct usba_udc *udc = container_of(gadget, struct usba_udc, gadget);
  1531. unsigned long flags;
  1532. spin_lock_irqsave(&udc->lock, flags);
  1533. udc->devstatus = 1 << USB_DEVICE_SELF_POWERED;
  1534. udc->driver = driver;
  1535. spin_unlock_irqrestore(&udc->lock, flags);
  1536. mutex_lock(&udc->vbus_mutex);
  1537. if (gpio_is_valid(udc->vbus_pin))
  1538. enable_irq(gpio_to_irq(udc->vbus_pin));
  1539. /* If Vbus is present, enable the controller and wait for reset */
  1540. udc->vbus_prev = vbus_is_present(udc);
  1541. if (udc->vbus_prev) {
  1542. ret = usba_start(udc);
  1543. if (ret)
  1544. goto err;
  1545. }
  1546. mutex_unlock(&udc->vbus_mutex);
  1547. return 0;
  1548. err:
  1549. if (gpio_is_valid(udc->vbus_pin))
  1550. disable_irq(gpio_to_irq(udc->vbus_pin));
  1551. mutex_unlock(&udc->vbus_mutex);
  1552. spin_lock_irqsave(&udc->lock, flags);
  1553. udc->devstatus &= ~(1 << USB_DEVICE_SELF_POWERED);
  1554. udc->driver = NULL;
  1555. spin_unlock_irqrestore(&udc->lock, flags);
  1556. return ret;
  1557. }
  1558. static int atmel_usba_stop(struct usb_gadget *gadget)
  1559. {
  1560. struct usba_udc *udc = container_of(gadget, struct usba_udc, gadget);
  1561. if (gpio_is_valid(udc->vbus_pin))
  1562. disable_irq(gpio_to_irq(udc->vbus_pin));
  1563. usba_stop(udc);
  1564. udc->driver = NULL;
  1565. return 0;
  1566. }
  1567. #ifdef CONFIG_OF
  1568. static void at91sam9rl_toggle_bias(struct usba_udc *udc, int is_on)
  1569. {
  1570. unsigned int uckr = at91_pmc_read(AT91_CKGR_UCKR);
  1571. if (is_on)
  1572. at91_pmc_write(AT91_CKGR_UCKR, uckr | AT91_PMC_BIASEN);
  1573. else
  1574. at91_pmc_write(AT91_CKGR_UCKR, uckr & ~(AT91_PMC_BIASEN));
  1575. }
  1576. static void at91sam9g45_pulse_bias(struct usba_udc *udc)
  1577. {
  1578. unsigned int uckr = at91_pmc_read(AT91_CKGR_UCKR);
  1579. at91_pmc_write(AT91_CKGR_UCKR, uckr & ~(AT91_PMC_BIASEN));
  1580. at91_pmc_write(AT91_CKGR_UCKR, uckr | AT91_PMC_BIASEN);
  1581. }
  1582. static const struct usba_udc_errata at91sam9rl_errata = {
  1583. .toggle_bias = at91sam9rl_toggle_bias,
  1584. };
  1585. static const struct usba_udc_errata at91sam9g45_errata = {
  1586. .pulse_bias = at91sam9g45_pulse_bias,
  1587. };
  1588. static const struct of_device_id atmel_udc_dt_ids[] = {
  1589. { .compatible = "atmel,at91sam9rl-udc", .data = &at91sam9rl_errata },
  1590. { .compatible = "atmel,at91sam9g45-udc", .data = &at91sam9g45_errata },
  1591. { .compatible = "atmel,sama5d3-udc" },
  1592. { /* sentinel */ }
  1593. };
  1594. MODULE_DEVICE_TABLE(of, atmel_udc_dt_ids);
  1595. static struct usba_ep * atmel_udc_of_init(struct platform_device *pdev,
  1596. struct usba_udc *udc)
  1597. {
  1598. u32 val;
  1599. const char *name;
  1600. enum of_gpio_flags flags;
  1601. struct device_node *np = pdev->dev.of_node;
  1602. const struct of_device_id *match;
  1603. struct device_node *pp;
  1604. int i, ret;
  1605. struct usba_ep *eps, *ep;
  1606. match = of_match_node(atmel_udc_dt_ids, np);
  1607. if (!match)
  1608. return ERR_PTR(-EINVAL);
  1609. udc->errata = match->data;
  1610. udc->num_ep = 0;
  1611. udc->vbus_pin = of_get_named_gpio_flags(np, "atmel,vbus-gpio", 0,
  1612. &flags);
  1613. udc->vbus_pin_inverted = (flags & OF_GPIO_ACTIVE_LOW) ? 1 : 0;
  1614. pp = NULL;
  1615. while ((pp = of_get_next_child(np, pp)))
  1616. udc->num_ep++;
  1617. eps = devm_kzalloc(&pdev->dev, sizeof(struct usba_ep) * udc->num_ep,
  1618. GFP_KERNEL);
  1619. if (!eps)
  1620. return ERR_PTR(-ENOMEM);
  1621. udc->gadget.ep0 = &eps[0].ep;
  1622. INIT_LIST_HEAD(&eps[0].ep.ep_list);
  1623. pp = NULL;
  1624. i = 0;
  1625. while ((pp = of_get_next_child(np, pp))) {
  1626. ep = &eps[i];
  1627. ret = of_property_read_u32(pp, "reg", &val);
  1628. if (ret) {
  1629. dev_err(&pdev->dev, "of_probe: reg error(%d)\n", ret);
  1630. goto err;
  1631. }
  1632. ep->index = val;
  1633. ret = of_property_read_u32(pp, "atmel,fifo-size", &val);
  1634. if (ret) {
  1635. dev_err(&pdev->dev, "of_probe: fifo-size error(%d)\n", ret);
  1636. goto err;
  1637. }
  1638. ep->fifo_size = val;
  1639. ret = of_property_read_u32(pp, "atmel,nb-banks", &val);
  1640. if (ret) {
  1641. dev_err(&pdev->dev, "of_probe: nb-banks error(%d)\n", ret);
  1642. goto err;
  1643. }
  1644. ep->nr_banks = val;
  1645. ep->can_dma = of_property_read_bool(pp, "atmel,can-dma");
  1646. ep->can_isoc = of_property_read_bool(pp, "atmel,can-isoc");
  1647. ret = of_property_read_string(pp, "name", &name);
  1648. if (ret) {
  1649. dev_err(&pdev->dev, "of_probe: name error(%d)\n", ret);
  1650. goto err;
  1651. }
  1652. ep->ep.name = name;
  1653. ep->ep_regs = udc->regs + USBA_EPT_BASE(i);
  1654. ep->dma_regs = udc->regs + USBA_DMA_BASE(i);
  1655. ep->fifo = udc->fifo + USBA_FIFO_BASE(i);
  1656. ep->ep.ops = &usba_ep_ops;
  1657. usb_ep_set_maxpacket_limit(&ep->ep, ep->fifo_size);
  1658. ep->udc = udc;
  1659. INIT_LIST_HEAD(&ep->queue);
  1660. if (ep->index == 0) {
  1661. ep->ep.caps.type_control = true;
  1662. } else {
  1663. ep->ep.caps.type_iso = ep->can_isoc;
  1664. ep->ep.caps.type_bulk = true;
  1665. ep->ep.caps.type_int = true;
  1666. }
  1667. ep->ep.caps.dir_in = true;
  1668. ep->ep.caps.dir_out = true;
  1669. if (i)
  1670. list_add_tail(&ep->ep.ep_list, &udc->gadget.ep_list);
  1671. i++;
  1672. }
  1673. if (i == 0) {
  1674. dev_err(&pdev->dev, "of_probe: no endpoint specified\n");
  1675. ret = -EINVAL;
  1676. goto err;
  1677. }
  1678. return eps;
  1679. err:
  1680. return ERR_PTR(ret);
  1681. }
  1682. #else
  1683. static struct usba_ep * atmel_udc_of_init(struct platform_device *pdev,
  1684. struct usba_udc *udc)
  1685. {
  1686. return ERR_PTR(-ENOSYS);
  1687. }
  1688. #endif
  1689. static struct usba_ep * usba_udc_pdata(struct platform_device *pdev,
  1690. struct usba_udc *udc)
  1691. {
  1692. struct usba_platform_data *pdata = dev_get_platdata(&pdev->dev);
  1693. struct usba_ep *eps;
  1694. int i;
  1695. if (!pdata)
  1696. return ERR_PTR(-ENXIO);
  1697. eps = devm_kzalloc(&pdev->dev, sizeof(struct usba_ep) * pdata->num_ep,
  1698. GFP_KERNEL);
  1699. if (!eps)
  1700. return ERR_PTR(-ENOMEM);
  1701. udc->gadget.ep0 = &eps[0].ep;
  1702. udc->vbus_pin = pdata->vbus_pin;
  1703. udc->vbus_pin_inverted = pdata->vbus_pin_inverted;
  1704. udc->num_ep = pdata->num_ep;
  1705. INIT_LIST_HEAD(&eps[0].ep.ep_list);
  1706. for (i = 0; i < pdata->num_ep; i++) {
  1707. struct usba_ep *ep = &eps[i];
  1708. ep->ep_regs = udc->regs + USBA_EPT_BASE(i);
  1709. ep->dma_regs = udc->regs + USBA_DMA_BASE(i);
  1710. ep->fifo = udc->fifo + USBA_FIFO_BASE(i);
  1711. ep->ep.ops = &usba_ep_ops;
  1712. ep->ep.name = pdata->ep[i].name;
  1713. ep->fifo_size = pdata->ep[i].fifo_size;
  1714. usb_ep_set_maxpacket_limit(&ep->ep, ep->fifo_size);
  1715. ep->udc = udc;
  1716. INIT_LIST_HEAD(&ep->queue);
  1717. ep->nr_banks = pdata->ep[i].nr_banks;
  1718. ep->index = pdata->ep[i].index;
  1719. ep->can_dma = pdata->ep[i].can_dma;
  1720. ep->can_isoc = pdata->ep[i].can_isoc;
  1721. if (i == 0) {
  1722. ep->ep.caps.type_control = true;
  1723. } else {
  1724. ep->ep.caps.type_iso = ep->can_isoc;
  1725. ep->ep.caps.type_bulk = true;
  1726. ep->ep.caps.type_int = true;
  1727. }
  1728. ep->ep.caps.dir_in = true;
  1729. ep->ep.caps.dir_out = true;
  1730. if (i)
  1731. list_add_tail(&ep->ep.ep_list, &udc->gadget.ep_list);
  1732. }
  1733. return eps;
  1734. }
  1735. static int usba_udc_probe(struct platform_device *pdev)
  1736. {
  1737. struct resource *regs, *fifo;
  1738. struct clk *pclk, *hclk;
  1739. struct usba_udc *udc;
  1740. int irq, ret, i;
  1741. udc = devm_kzalloc(&pdev->dev, sizeof(*udc), GFP_KERNEL);
  1742. if (!udc)
  1743. return -ENOMEM;
  1744. udc->gadget = usba_gadget_template;
  1745. INIT_LIST_HEAD(&udc->gadget.ep_list);
  1746. regs = platform_get_resource(pdev, IORESOURCE_MEM, CTRL_IOMEM_ID);
  1747. fifo = platform_get_resource(pdev, IORESOURCE_MEM, FIFO_IOMEM_ID);
  1748. if (!regs || !fifo)
  1749. return -ENXIO;
  1750. irq = platform_get_irq(pdev, 0);
  1751. if (irq < 0)
  1752. return irq;
  1753. pclk = devm_clk_get(&pdev->dev, "pclk");
  1754. if (IS_ERR(pclk))
  1755. return PTR_ERR(pclk);
  1756. hclk = devm_clk_get(&pdev->dev, "hclk");
  1757. if (IS_ERR(hclk))
  1758. return PTR_ERR(hclk);
  1759. spin_lock_init(&udc->lock);
  1760. mutex_init(&udc->vbus_mutex);
  1761. udc->pdev = pdev;
  1762. udc->pclk = pclk;
  1763. udc->hclk = hclk;
  1764. udc->vbus_pin = -ENODEV;
  1765. ret = -ENOMEM;
  1766. udc->regs = devm_ioremap(&pdev->dev, regs->start, resource_size(regs));
  1767. if (!udc->regs) {
  1768. dev_err(&pdev->dev, "Unable to map I/O memory, aborting.\n");
  1769. return ret;
  1770. }
  1771. dev_info(&pdev->dev, "MMIO registers at 0x%08lx mapped at %p\n",
  1772. (unsigned long)regs->start, udc->regs);
  1773. udc->fifo = devm_ioremap(&pdev->dev, fifo->start, resource_size(fifo));
  1774. if (!udc->fifo) {
  1775. dev_err(&pdev->dev, "Unable to map FIFO, aborting.\n");
  1776. return ret;
  1777. }
  1778. dev_info(&pdev->dev, "FIFO at 0x%08lx mapped at %p\n",
  1779. (unsigned long)fifo->start, udc->fifo);
  1780. platform_set_drvdata(pdev, udc);
  1781. /* Make sure we start from a clean slate */
  1782. ret = clk_prepare_enable(pclk);
  1783. if (ret) {
  1784. dev_err(&pdev->dev, "Unable to enable pclk, aborting.\n");
  1785. return ret;
  1786. }
  1787. usba_writel(udc, CTRL, USBA_DISABLE_MASK);
  1788. clk_disable_unprepare(pclk);
  1789. if (pdev->dev.of_node)
  1790. udc->usba_ep = atmel_udc_of_init(pdev, udc);
  1791. else
  1792. udc->usba_ep = usba_udc_pdata(pdev, udc);
  1793. toggle_bias(udc, 0);
  1794. if (IS_ERR(udc->usba_ep))
  1795. return PTR_ERR(udc->usba_ep);
  1796. ret = devm_request_irq(&pdev->dev, irq, usba_udc_irq, 0,
  1797. "atmel_usba_udc", udc);
  1798. if (ret) {
  1799. dev_err(&pdev->dev, "Cannot request irq %d (error %d)\n",
  1800. irq, ret);
  1801. return ret;
  1802. }
  1803. udc->irq = irq;
  1804. if (gpio_is_valid(udc->vbus_pin)) {
  1805. if (!devm_gpio_request(&pdev->dev, udc->vbus_pin, "atmel_usba_udc")) {
  1806. irq_set_status_flags(gpio_to_irq(udc->vbus_pin),
  1807. IRQ_NOAUTOEN);
  1808. ret = devm_request_threaded_irq(&pdev->dev,
  1809. gpio_to_irq(udc->vbus_pin), NULL,
  1810. usba_vbus_irq_thread, USBA_VBUS_IRQFLAGS,
  1811. "atmel_usba_udc", udc);
  1812. if (ret) {
  1813. udc->vbus_pin = -ENODEV;
  1814. dev_warn(&udc->pdev->dev,
  1815. "failed to request vbus irq; "
  1816. "assuming always on\n");
  1817. }
  1818. } else {
  1819. /* gpio_request fail so use -EINVAL for gpio_is_valid */
  1820. udc->vbus_pin = -EINVAL;
  1821. }
  1822. }
  1823. ret = usb_add_gadget_udc(&pdev->dev, &udc->gadget);
  1824. if (ret)
  1825. return ret;
  1826. device_init_wakeup(&pdev->dev, 1);
  1827. usba_init_debugfs(udc);
  1828. for (i = 1; i < udc->num_ep; i++)
  1829. usba_ep_init_debugfs(udc, &udc->usba_ep[i]);
  1830. return 0;
  1831. }
  1832. static int usba_udc_remove(struct platform_device *pdev)
  1833. {
  1834. struct usba_udc *udc;
  1835. int i;
  1836. udc = platform_get_drvdata(pdev);
  1837. device_init_wakeup(&pdev->dev, 0);
  1838. usb_del_gadget_udc(&udc->gadget);
  1839. for (i = 1; i < udc->num_ep; i++)
  1840. usba_ep_cleanup_debugfs(&udc->usba_ep[i]);
  1841. usba_cleanup_debugfs(udc);
  1842. return 0;
  1843. }
  1844. #ifdef CONFIG_PM_SLEEP
  1845. static int usba_udc_suspend(struct device *dev)
  1846. {
  1847. struct usba_udc *udc = dev_get_drvdata(dev);
  1848. /* Not started */
  1849. if (!udc->driver)
  1850. return 0;
  1851. mutex_lock(&udc->vbus_mutex);
  1852. if (!device_may_wakeup(dev)) {
  1853. usba_stop(udc);
  1854. goto out;
  1855. }
  1856. /*
  1857. * Device may wake up. We stay clocked if we failed
  1858. * to request vbus irq, assuming always on.
  1859. */
  1860. if (gpio_is_valid(udc->vbus_pin)) {
  1861. usba_stop(udc);
  1862. enable_irq_wake(gpio_to_irq(udc->vbus_pin));
  1863. }
  1864. out:
  1865. mutex_unlock(&udc->vbus_mutex);
  1866. return 0;
  1867. }
  1868. static int usba_udc_resume(struct device *dev)
  1869. {
  1870. struct usba_udc *udc = dev_get_drvdata(dev);
  1871. /* Not started */
  1872. if (!udc->driver)
  1873. return 0;
  1874. if (device_may_wakeup(dev) && gpio_is_valid(udc->vbus_pin))
  1875. disable_irq_wake(gpio_to_irq(udc->vbus_pin));
  1876. /* If Vbus is present, enable the controller and wait for reset */
  1877. mutex_lock(&udc->vbus_mutex);
  1878. udc->vbus_prev = vbus_is_present(udc);
  1879. if (udc->vbus_prev)
  1880. usba_start(udc);
  1881. mutex_unlock(&udc->vbus_mutex);
  1882. return 0;
  1883. }
  1884. #endif
  1885. static SIMPLE_DEV_PM_OPS(usba_udc_pm_ops, usba_udc_suspend, usba_udc_resume);
  1886. static struct platform_driver udc_driver = {
  1887. .remove = usba_udc_remove,
  1888. .driver = {
  1889. .name = "atmel_usba_udc",
  1890. .pm = &usba_udc_pm_ops,
  1891. .of_match_table = of_match_ptr(atmel_udc_dt_ids),
  1892. },
  1893. };
  1894. module_platform_driver_probe(udc_driver, usba_udc_probe);
  1895. MODULE_DESCRIPTION("Atmel USBA UDC driver");
  1896. MODULE_AUTHOR("Haavard Skinnemoen (Atmel)");
  1897. MODULE_LICENSE("GPL");
  1898. MODULE_ALIAS("platform:atmel_usba_udc");