fsl_qe_udc.c 62 KB

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  1. /*
  2. * driver/usb/gadget/fsl_qe_udc.c
  3. *
  4. * Copyright (c) 2006-2008 Freescale Semiconductor, Inc. All rights reserved.
  5. *
  6. * Xie Xiaobo <X.Xie@freescale.com>
  7. * Li Yang <leoli@freescale.com>
  8. * Based on bareboard code from Shlomi Gridish.
  9. *
  10. * Description:
  11. * Freescle QE/CPM USB Pheripheral Controller Driver
  12. * The controller can be found on MPC8360, MPC8272, and etc.
  13. * MPC8360 Rev 1.1 may need QE mircocode update
  14. *
  15. * This program is free software; you can redistribute it and/or modify it
  16. * under the terms of the GNU General Public License as published by the
  17. * Free Software Foundation; either version 2 of the License, or (at your
  18. * option) any later version.
  19. */
  20. #undef USB_TRACE
  21. #include <linux/module.h>
  22. #include <linux/kernel.h>
  23. #include <linux/ioport.h>
  24. #include <linux/types.h>
  25. #include <linux/errno.h>
  26. #include <linux/err.h>
  27. #include <linux/slab.h>
  28. #include <linux/list.h>
  29. #include <linux/interrupt.h>
  30. #include <linux/io.h>
  31. #include <linux/moduleparam.h>
  32. #include <linux/of_address.h>
  33. #include <linux/of_irq.h>
  34. #include <linux/of_platform.h>
  35. #include <linux/dma-mapping.h>
  36. #include <linux/usb/ch9.h>
  37. #include <linux/usb/gadget.h>
  38. #include <linux/usb/otg.h>
  39. #include <asm/qe.h>
  40. #include <asm/cpm.h>
  41. #include <asm/dma.h>
  42. #include <asm/reg.h>
  43. #include "fsl_qe_udc.h"
  44. #define DRIVER_DESC "Freescale QE/CPM USB Device Controller driver"
  45. #define DRIVER_AUTHOR "Xie XiaoBo"
  46. #define DRIVER_VERSION "1.0"
  47. #define DMA_ADDR_INVALID (~(dma_addr_t)0)
  48. static const char driver_name[] = "fsl_qe_udc";
  49. static const char driver_desc[] = DRIVER_DESC;
  50. /*ep name is important in gadget, it should obey the convention of ep_match()*/
  51. static const char *const ep_name[] = {
  52. "ep0-control", /* everyone has ep0 */
  53. /* 3 configurable endpoints */
  54. "ep1",
  55. "ep2",
  56. "ep3",
  57. };
  58. static struct usb_endpoint_descriptor qe_ep0_desc = {
  59. .bLength = USB_DT_ENDPOINT_SIZE,
  60. .bDescriptorType = USB_DT_ENDPOINT,
  61. .bEndpointAddress = 0,
  62. .bmAttributes = USB_ENDPOINT_XFER_CONTROL,
  63. .wMaxPacketSize = USB_MAX_CTRL_PAYLOAD,
  64. };
  65. /********************************************************************
  66. * Internal Used Function Start
  67. ********************************************************************/
  68. /*-----------------------------------------------------------------
  69. * done() - retire a request; caller blocked irqs
  70. *--------------------------------------------------------------*/
  71. static void done(struct qe_ep *ep, struct qe_req *req, int status)
  72. {
  73. struct qe_udc *udc = ep->udc;
  74. unsigned char stopped = ep->stopped;
  75. /* the req->queue pointer is used by ep_queue() func, in which
  76. * the request will be added into a udc_ep->queue 'd tail
  77. * so here the req will be dropped from the ep->queue
  78. */
  79. list_del_init(&req->queue);
  80. /* req.status should be set as -EINPROGRESS in ep_queue() */
  81. if (req->req.status == -EINPROGRESS)
  82. req->req.status = status;
  83. else
  84. status = req->req.status;
  85. if (req->mapped) {
  86. dma_unmap_single(udc->gadget.dev.parent,
  87. req->req.dma, req->req.length,
  88. ep_is_in(ep)
  89. ? DMA_TO_DEVICE
  90. : DMA_FROM_DEVICE);
  91. req->req.dma = DMA_ADDR_INVALID;
  92. req->mapped = 0;
  93. } else
  94. dma_sync_single_for_cpu(udc->gadget.dev.parent,
  95. req->req.dma, req->req.length,
  96. ep_is_in(ep)
  97. ? DMA_TO_DEVICE
  98. : DMA_FROM_DEVICE);
  99. if (status && (status != -ESHUTDOWN))
  100. dev_vdbg(udc->dev, "complete %s req %p stat %d len %u/%u\n",
  101. ep->ep.name, &req->req, status,
  102. req->req.actual, req->req.length);
  103. /* don't modify queue heads during completion callback */
  104. ep->stopped = 1;
  105. spin_unlock(&udc->lock);
  106. usb_gadget_giveback_request(&ep->ep, &req->req);
  107. spin_lock(&udc->lock);
  108. ep->stopped = stopped;
  109. }
  110. /*-----------------------------------------------------------------
  111. * nuke(): delete all requests related to this ep
  112. *--------------------------------------------------------------*/
  113. static void nuke(struct qe_ep *ep, int status)
  114. {
  115. /* Whether this eq has request linked */
  116. while (!list_empty(&ep->queue)) {
  117. struct qe_req *req = NULL;
  118. req = list_entry(ep->queue.next, struct qe_req, queue);
  119. done(ep, req, status);
  120. }
  121. }
  122. /*---------------------------------------------------------------------------*
  123. * USB and Endpoint manipulate process, include parameter and register *
  124. *---------------------------------------------------------------------------*/
  125. /* @value: 1--set stall 0--clean stall */
  126. static int qe_eprx_stall_change(struct qe_ep *ep, int value)
  127. {
  128. u16 tem_usep;
  129. u8 epnum = ep->epnum;
  130. struct qe_udc *udc = ep->udc;
  131. tem_usep = in_be16(&udc->usb_regs->usb_usep[epnum]);
  132. tem_usep = tem_usep & ~USB_RHS_MASK;
  133. if (value == 1)
  134. tem_usep |= USB_RHS_STALL;
  135. else if (ep->dir == USB_DIR_IN)
  136. tem_usep |= USB_RHS_IGNORE_OUT;
  137. out_be16(&udc->usb_regs->usb_usep[epnum], tem_usep);
  138. return 0;
  139. }
  140. static int qe_eptx_stall_change(struct qe_ep *ep, int value)
  141. {
  142. u16 tem_usep;
  143. u8 epnum = ep->epnum;
  144. struct qe_udc *udc = ep->udc;
  145. tem_usep = in_be16(&udc->usb_regs->usb_usep[epnum]);
  146. tem_usep = tem_usep & ~USB_THS_MASK;
  147. if (value == 1)
  148. tem_usep |= USB_THS_STALL;
  149. else if (ep->dir == USB_DIR_OUT)
  150. tem_usep |= USB_THS_IGNORE_IN;
  151. out_be16(&udc->usb_regs->usb_usep[epnum], tem_usep);
  152. return 0;
  153. }
  154. static int qe_ep0_stall(struct qe_udc *udc)
  155. {
  156. qe_eptx_stall_change(&udc->eps[0], 1);
  157. qe_eprx_stall_change(&udc->eps[0], 1);
  158. udc->ep0_state = WAIT_FOR_SETUP;
  159. udc->ep0_dir = 0;
  160. return 0;
  161. }
  162. static int qe_eprx_nack(struct qe_ep *ep)
  163. {
  164. u8 epnum = ep->epnum;
  165. struct qe_udc *udc = ep->udc;
  166. if (ep->state == EP_STATE_IDLE) {
  167. /* Set the ep's nack */
  168. clrsetbits_be16(&udc->usb_regs->usb_usep[epnum],
  169. USB_RHS_MASK, USB_RHS_NACK);
  170. /* Mask Rx and Busy interrupts */
  171. clrbits16(&udc->usb_regs->usb_usbmr,
  172. (USB_E_RXB_MASK | USB_E_BSY_MASK));
  173. ep->state = EP_STATE_NACK;
  174. }
  175. return 0;
  176. }
  177. static int qe_eprx_normal(struct qe_ep *ep)
  178. {
  179. struct qe_udc *udc = ep->udc;
  180. if (ep->state == EP_STATE_NACK) {
  181. clrsetbits_be16(&udc->usb_regs->usb_usep[ep->epnum],
  182. USB_RTHS_MASK, USB_THS_IGNORE_IN);
  183. /* Unmask RX interrupts */
  184. out_be16(&udc->usb_regs->usb_usber,
  185. USB_E_BSY_MASK | USB_E_RXB_MASK);
  186. setbits16(&udc->usb_regs->usb_usbmr,
  187. (USB_E_RXB_MASK | USB_E_BSY_MASK));
  188. ep->state = EP_STATE_IDLE;
  189. ep->has_data = 0;
  190. }
  191. return 0;
  192. }
  193. static int qe_ep_cmd_stoptx(struct qe_ep *ep)
  194. {
  195. if (ep->udc->soc_type == PORT_CPM)
  196. cpm_command(CPM_USB_STOP_TX | (ep->epnum << CPM_USB_EP_SHIFT),
  197. CPM_USB_STOP_TX_OPCODE);
  198. else
  199. qe_issue_cmd(QE_USB_STOP_TX, QE_CR_SUBBLOCK_USB,
  200. ep->epnum, 0);
  201. return 0;
  202. }
  203. static int qe_ep_cmd_restarttx(struct qe_ep *ep)
  204. {
  205. if (ep->udc->soc_type == PORT_CPM)
  206. cpm_command(CPM_USB_RESTART_TX | (ep->epnum <<
  207. CPM_USB_EP_SHIFT), CPM_USB_RESTART_TX_OPCODE);
  208. else
  209. qe_issue_cmd(QE_USB_RESTART_TX, QE_CR_SUBBLOCK_USB,
  210. ep->epnum, 0);
  211. return 0;
  212. }
  213. static int qe_ep_flushtxfifo(struct qe_ep *ep)
  214. {
  215. struct qe_udc *udc = ep->udc;
  216. int i;
  217. i = (int)ep->epnum;
  218. qe_ep_cmd_stoptx(ep);
  219. out_8(&udc->usb_regs->usb_uscom,
  220. USB_CMD_FLUSH_FIFO | (USB_CMD_EP_MASK & (ep->epnum)));
  221. out_be16(&udc->ep_param[i]->tbptr, in_be16(&udc->ep_param[i]->tbase));
  222. out_be32(&udc->ep_param[i]->tstate, 0);
  223. out_be16(&udc->ep_param[i]->tbcnt, 0);
  224. ep->c_txbd = ep->txbase;
  225. ep->n_txbd = ep->txbase;
  226. qe_ep_cmd_restarttx(ep);
  227. return 0;
  228. }
  229. static int qe_ep_filltxfifo(struct qe_ep *ep)
  230. {
  231. struct qe_udc *udc = ep->udc;
  232. out_8(&udc->usb_regs->usb_uscom,
  233. USB_CMD_STR_FIFO | (USB_CMD_EP_MASK & (ep->epnum)));
  234. return 0;
  235. }
  236. static int qe_epbds_reset(struct qe_udc *udc, int pipe_num)
  237. {
  238. struct qe_ep *ep;
  239. u32 bdring_len;
  240. struct qe_bd __iomem *bd;
  241. int i;
  242. ep = &udc->eps[pipe_num];
  243. if (ep->dir == USB_DIR_OUT)
  244. bdring_len = USB_BDRING_LEN_RX;
  245. else
  246. bdring_len = USB_BDRING_LEN;
  247. bd = ep->rxbase;
  248. for (i = 0; i < (bdring_len - 1); i++) {
  249. out_be32((u32 __iomem *)bd, R_E | R_I);
  250. bd++;
  251. }
  252. out_be32((u32 __iomem *)bd, R_E | R_I | R_W);
  253. bd = ep->txbase;
  254. for (i = 0; i < USB_BDRING_LEN_TX - 1; i++) {
  255. out_be32(&bd->buf, 0);
  256. out_be32((u32 __iomem *)bd, 0);
  257. bd++;
  258. }
  259. out_be32((u32 __iomem *)bd, T_W);
  260. return 0;
  261. }
  262. static int qe_ep_reset(struct qe_udc *udc, int pipe_num)
  263. {
  264. struct qe_ep *ep;
  265. u16 tmpusep;
  266. ep = &udc->eps[pipe_num];
  267. tmpusep = in_be16(&udc->usb_regs->usb_usep[pipe_num]);
  268. tmpusep &= ~USB_RTHS_MASK;
  269. switch (ep->dir) {
  270. case USB_DIR_BOTH:
  271. qe_ep_flushtxfifo(ep);
  272. break;
  273. case USB_DIR_OUT:
  274. tmpusep |= USB_THS_IGNORE_IN;
  275. break;
  276. case USB_DIR_IN:
  277. qe_ep_flushtxfifo(ep);
  278. tmpusep |= USB_RHS_IGNORE_OUT;
  279. break;
  280. default:
  281. break;
  282. }
  283. out_be16(&udc->usb_regs->usb_usep[pipe_num], tmpusep);
  284. qe_epbds_reset(udc, pipe_num);
  285. return 0;
  286. }
  287. static int qe_ep_toggledata01(struct qe_ep *ep)
  288. {
  289. ep->data01 ^= 0x1;
  290. return 0;
  291. }
  292. static int qe_ep_bd_init(struct qe_udc *udc, unsigned char pipe_num)
  293. {
  294. struct qe_ep *ep = &udc->eps[pipe_num];
  295. unsigned long tmp_addr = 0;
  296. struct usb_ep_para __iomem *epparam;
  297. int i;
  298. struct qe_bd __iomem *bd;
  299. int bdring_len;
  300. if (ep->dir == USB_DIR_OUT)
  301. bdring_len = USB_BDRING_LEN_RX;
  302. else
  303. bdring_len = USB_BDRING_LEN;
  304. epparam = udc->ep_param[pipe_num];
  305. /* alloc multi-ram for BD rings and set the ep parameters */
  306. tmp_addr = cpm_muram_alloc(sizeof(struct qe_bd) * (bdring_len +
  307. USB_BDRING_LEN_TX), QE_ALIGNMENT_OF_BD);
  308. if (IS_ERR_VALUE(tmp_addr))
  309. return -ENOMEM;
  310. out_be16(&epparam->rbase, (u16)tmp_addr);
  311. out_be16(&epparam->tbase, (u16)(tmp_addr +
  312. (sizeof(struct qe_bd) * bdring_len)));
  313. out_be16(&epparam->rbptr, in_be16(&epparam->rbase));
  314. out_be16(&epparam->tbptr, in_be16(&epparam->tbase));
  315. ep->rxbase = cpm_muram_addr(tmp_addr);
  316. ep->txbase = cpm_muram_addr(tmp_addr + (sizeof(struct qe_bd)
  317. * bdring_len));
  318. ep->n_rxbd = ep->rxbase;
  319. ep->e_rxbd = ep->rxbase;
  320. ep->n_txbd = ep->txbase;
  321. ep->c_txbd = ep->txbase;
  322. ep->data01 = 0; /* data0 */
  323. /* Init TX and RX bds */
  324. bd = ep->rxbase;
  325. for (i = 0; i < bdring_len - 1; i++) {
  326. out_be32(&bd->buf, 0);
  327. out_be32((u32 __iomem *)bd, 0);
  328. bd++;
  329. }
  330. out_be32(&bd->buf, 0);
  331. out_be32((u32 __iomem *)bd, R_W);
  332. bd = ep->txbase;
  333. for (i = 0; i < USB_BDRING_LEN_TX - 1; i++) {
  334. out_be32(&bd->buf, 0);
  335. out_be32((u32 __iomem *)bd, 0);
  336. bd++;
  337. }
  338. out_be32(&bd->buf, 0);
  339. out_be32((u32 __iomem *)bd, T_W);
  340. return 0;
  341. }
  342. static int qe_ep_rxbd_update(struct qe_ep *ep)
  343. {
  344. unsigned int size;
  345. int i;
  346. unsigned int tmp;
  347. struct qe_bd __iomem *bd;
  348. unsigned int bdring_len;
  349. if (ep->rxbase == NULL)
  350. return -EINVAL;
  351. bd = ep->rxbase;
  352. ep->rxframe = kmalloc(sizeof(*ep->rxframe), GFP_ATOMIC);
  353. if (ep->rxframe == NULL) {
  354. dev_err(ep->udc->dev, "malloc rxframe failed\n");
  355. return -ENOMEM;
  356. }
  357. qe_frame_init(ep->rxframe);
  358. if (ep->dir == USB_DIR_OUT)
  359. bdring_len = USB_BDRING_LEN_RX;
  360. else
  361. bdring_len = USB_BDRING_LEN;
  362. size = (ep->ep.maxpacket + USB_CRC_SIZE + 2) * (bdring_len + 1);
  363. ep->rxbuffer = kzalloc(size, GFP_ATOMIC);
  364. if (ep->rxbuffer == NULL) {
  365. dev_err(ep->udc->dev, "malloc rxbuffer failed,size=%d\n",
  366. size);
  367. kfree(ep->rxframe);
  368. return -ENOMEM;
  369. }
  370. ep->rxbuf_d = virt_to_phys((void *)ep->rxbuffer);
  371. if (ep->rxbuf_d == DMA_ADDR_INVALID) {
  372. ep->rxbuf_d = dma_map_single(ep->udc->gadget.dev.parent,
  373. ep->rxbuffer,
  374. size,
  375. DMA_FROM_DEVICE);
  376. ep->rxbufmap = 1;
  377. } else {
  378. dma_sync_single_for_device(ep->udc->gadget.dev.parent,
  379. ep->rxbuf_d, size,
  380. DMA_FROM_DEVICE);
  381. ep->rxbufmap = 0;
  382. }
  383. size = ep->ep.maxpacket + USB_CRC_SIZE + 2;
  384. tmp = ep->rxbuf_d;
  385. tmp = (u32)(((tmp >> 2) << 2) + 4);
  386. for (i = 0; i < bdring_len - 1; i++) {
  387. out_be32(&bd->buf, tmp);
  388. out_be32((u32 __iomem *)bd, (R_E | R_I));
  389. tmp = tmp + size;
  390. bd++;
  391. }
  392. out_be32(&bd->buf, tmp);
  393. out_be32((u32 __iomem *)bd, (R_E | R_I | R_W));
  394. return 0;
  395. }
  396. static int qe_ep_register_init(struct qe_udc *udc, unsigned char pipe_num)
  397. {
  398. struct qe_ep *ep = &udc->eps[pipe_num];
  399. struct usb_ep_para __iomem *epparam;
  400. u16 usep, logepnum;
  401. u16 tmp;
  402. u8 rtfcr = 0;
  403. epparam = udc->ep_param[pipe_num];
  404. usep = 0;
  405. logepnum = (ep->ep.desc->bEndpointAddress & USB_ENDPOINT_NUMBER_MASK);
  406. usep |= (logepnum << USB_EPNUM_SHIFT);
  407. switch (ep->ep.desc->bmAttributes & 0x03) {
  408. case USB_ENDPOINT_XFER_BULK:
  409. usep |= USB_TRANS_BULK;
  410. break;
  411. case USB_ENDPOINT_XFER_ISOC:
  412. usep |= USB_TRANS_ISO;
  413. break;
  414. case USB_ENDPOINT_XFER_INT:
  415. usep |= USB_TRANS_INT;
  416. break;
  417. default:
  418. usep |= USB_TRANS_CTR;
  419. break;
  420. }
  421. switch (ep->dir) {
  422. case USB_DIR_OUT:
  423. usep |= USB_THS_IGNORE_IN;
  424. break;
  425. case USB_DIR_IN:
  426. usep |= USB_RHS_IGNORE_OUT;
  427. break;
  428. default:
  429. break;
  430. }
  431. out_be16(&udc->usb_regs->usb_usep[pipe_num], usep);
  432. rtfcr = 0x30;
  433. out_8(&epparam->rbmr, rtfcr);
  434. out_8(&epparam->tbmr, rtfcr);
  435. tmp = (u16)(ep->ep.maxpacket + USB_CRC_SIZE);
  436. /* MRBLR must be divisble by 4 */
  437. tmp = (u16)(((tmp >> 2) << 2) + 4);
  438. out_be16(&epparam->mrblr, tmp);
  439. return 0;
  440. }
  441. static int qe_ep_init(struct qe_udc *udc,
  442. unsigned char pipe_num,
  443. const struct usb_endpoint_descriptor *desc)
  444. {
  445. struct qe_ep *ep = &udc->eps[pipe_num];
  446. unsigned long flags;
  447. int reval = 0;
  448. u16 max = 0;
  449. max = usb_endpoint_maxp(desc);
  450. /* check the max package size validate for this endpoint */
  451. /* Refer to USB2.0 spec table 9-13,
  452. */
  453. if (pipe_num != 0) {
  454. switch (desc->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK) {
  455. case USB_ENDPOINT_XFER_BULK:
  456. if (strstr(ep->ep.name, "-iso")
  457. || strstr(ep->ep.name, "-int"))
  458. goto en_done;
  459. switch (udc->gadget.speed) {
  460. case USB_SPEED_HIGH:
  461. if ((max == 128) || (max == 256) || (max == 512))
  462. break;
  463. default:
  464. switch (max) {
  465. case 4:
  466. case 8:
  467. case 16:
  468. case 32:
  469. case 64:
  470. break;
  471. default:
  472. case USB_SPEED_LOW:
  473. goto en_done;
  474. }
  475. }
  476. break;
  477. case USB_ENDPOINT_XFER_INT:
  478. if (strstr(ep->ep.name, "-iso")) /* bulk is ok */
  479. goto en_done;
  480. switch (udc->gadget.speed) {
  481. case USB_SPEED_HIGH:
  482. if (max <= 1024)
  483. break;
  484. case USB_SPEED_FULL:
  485. if (max <= 64)
  486. break;
  487. default:
  488. if (max <= 8)
  489. break;
  490. goto en_done;
  491. }
  492. break;
  493. case USB_ENDPOINT_XFER_ISOC:
  494. if (strstr(ep->ep.name, "-bulk")
  495. || strstr(ep->ep.name, "-int"))
  496. goto en_done;
  497. switch (udc->gadget.speed) {
  498. case USB_SPEED_HIGH:
  499. if (max <= 1024)
  500. break;
  501. case USB_SPEED_FULL:
  502. if (max <= 1023)
  503. break;
  504. default:
  505. goto en_done;
  506. }
  507. break;
  508. case USB_ENDPOINT_XFER_CONTROL:
  509. if (strstr(ep->ep.name, "-iso")
  510. || strstr(ep->ep.name, "-int"))
  511. goto en_done;
  512. switch (udc->gadget.speed) {
  513. case USB_SPEED_HIGH:
  514. case USB_SPEED_FULL:
  515. switch (max) {
  516. case 1:
  517. case 2:
  518. case 4:
  519. case 8:
  520. case 16:
  521. case 32:
  522. case 64:
  523. break;
  524. default:
  525. goto en_done;
  526. }
  527. case USB_SPEED_LOW:
  528. switch (max) {
  529. case 1:
  530. case 2:
  531. case 4:
  532. case 8:
  533. break;
  534. default:
  535. goto en_done;
  536. }
  537. default:
  538. goto en_done;
  539. }
  540. break;
  541. default:
  542. goto en_done;
  543. }
  544. } /* if ep0*/
  545. spin_lock_irqsave(&udc->lock, flags);
  546. /* initialize ep structure */
  547. ep->ep.maxpacket = max;
  548. ep->tm = (u8)(desc->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK);
  549. ep->ep.desc = desc;
  550. ep->stopped = 0;
  551. ep->init = 1;
  552. if (pipe_num == 0) {
  553. ep->dir = USB_DIR_BOTH;
  554. udc->ep0_dir = USB_DIR_OUT;
  555. udc->ep0_state = WAIT_FOR_SETUP;
  556. } else {
  557. switch (desc->bEndpointAddress & USB_ENDPOINT_DIR_MASK) {
  558. case USB_DIR_OUT:
  559. ep->dir = USB_DIR_OUT;
  560. break;
  561. case USB_DIR_IN:
  562. ep->dir = USB_DIR_IN;
  563. default:
  564. break;
  565. }
  566. }
  567. /* hardware special operation */
  568. qe_ep_bd_init(udc, pipe_num);
  569. if ((ep->tm == USBP_TM_CTL) || (ep->dir == USB_DIR_OUT)) {
  570. reval = qe_ep_rxbd_update(ep);
  571. if (reval)
  572. goto en_done1;
  573. }
  574. if ((ep->tm == USBP_TM_CTL) || (ep->dir == USB_DIR_IN)) {
  575. ep->txframe = kmalloc(sizeof(*ep->txframe), GFP_ATOMIC);
  576. if (ep->txframe == NULL) {
  577. dev_err(udc->dev, "malloc txframe failed\n");
  578. goto en_done2;
  579. }
  580. qe_frame_init(ep->txframe);
  581. }
  582. qe_ep_register_init(udc, pipe_num);
  583. /* Now HW will be NAKing transfers to that EP,
  584. * until a buffer is queued to it. */
  585. spin_unlock_irqrestore(&udc->lock, flags);
  586. return 0;
  587. en_done2:
  588. kfree(ep->rxbuffer);
  589. kfree(ep->rxframe);
  590. en_done1:
  591. spin_unlock_irqrestore(&udc->lock, flags);
  592. en_done:
  593. dev_err(udc->dev, "failed to initialize %s\n", ep->ep.name);
  594. return -ENODEV;
  595. }
  596. static inline void qe_usb_enable(struct qe_udc *udc)
  597. {
  598. setbits8(&udc->usb_regs->usb_usmod, USB_MODE_EN);
  599. }
  600. static inline void qe_usb_disable(struct qe_udc *udc)
  601. {
  602. clrbits8(&udc->usb_regs->usb_usmod, USB_MODE_EN);
  603. }
  604. /*----------------------------------------------------------------------------*
  605. * USB and EP basic manipulate function end *
  606. *----------------------------------------------------------------------------*/
  607. /******************************************************************************
  608. UDC transmit and receive process
  609. ******************************************************************************/
  610. static void recycle_one_rxbd(struct qe_ep *ep)
  611. {
  612. u32 bdstatus;
  613. bdstatus = in_be32((u32 __iomem *)ep->e_rxbd);
  614. bdstatus = R_I | R_E | (bdstatus & R_W);
  615. out_be32((u32 __iomem *)ep->e_rxbd, bdstatus);
  616. if (bdstatus & R_W)
  617. ep->e_rxbd = ep->rxbase;
  618. else
  619. ep->e_rxbd++;
  620. }
  621. static void recycle_rxbds(struct qe_ep *ep, unsigned char stopatnext)
  622. {
  623. u32 bdstatus;
  624. struct qe_bd __iomem *bd, *nextbd;
  625. unsigned char stop = 0;
  626. nextbd = ep->n_rxbd;
  627. bd = ep->e_rxbd;
  628. bdstatus = in_be32((u32 __iomem *)bd);
  629. while (!(bdstatus & R_E) && !(bdstatus & BD_LENGTH_MASK) && !stop) {
  630. bdstatus = R_E | R_I | (bdstatus & R_W);
  631. out_be32((u32 __iomem *)bd, bdstatus);
  632. if (bdstatus & R_W)
  633. bd = ep->rxbase;
  634. else
  635. bd++;
  636. bdstatus = in_be32((u32 __iomem *)bd);
  637. if (stopatnext && (bd == nextbd))
  638. stop = 1;
  639. }
  640. ep->e_rxbd = bd;
  641. }
  642. static void ep_recycle_rxbds(struct qe_ep *ep)
  643. {
  644. struct qe_bd __iomem *bd = ep->n_rxbd;
  645. u32 bdstatus;
  646. u8 epnum = ep->epnum;
  647. struct qe_udc *udc = ep->udc;
  648. bdstatus = in_be32((u32 __iomem *)bd);
  649. if (!(bdstatus & R_E) && !(bdstatus & BD_LENGTH_MASK)) {
  650. bd = ep->rxbase +
  651. ((in_be16(&udc->ep_param[epnum]->rbptr) -
  652. in_be16(&udc->ep_param[epnum]->rbase))
  653. >> 3);
  654. bdstatus = in_be32((u32 __iomem *)bd);
  655. if (bdstatus & R_W)
  656. bd = ep->rxbase;
  657. else
  658. bd++;
  659. ep->e_rxbd = bd;
  660. recycle_rxbds(ep, 0);
  661. ep->e_rxbd = ep->n_rxbd;
  662. } else
  663. recycle_rxbds(ep, 1);
  664. if (in_be16(&udc->usb_regs->usb_usber) & USB_E_BSY_MASK)
  665. out_be16(&udc->usb_regs->usb_usber, USB_E_BSY_MASK);
  666. if (ep->has_data <= 0 && (!list_empty(&ep->queue)))
  667. qe_eprx_normal(ep);
  668. ep->localnack = 0;
  669. }
  670. static void setup_received_handle(struct qe_udc *udc,
  671. struct usb_ctrlrequest *setup);
  672. static int qe_ep_rxframe_handle(struct qe_ep *ep);
  673. static void ep0_req_complete(struct qe_udc *udc, struct qe_req *req);
  674. /* when BD PID is setup, handle the packet */
  675. static int ep0_setup_handle(struct qe_udc *udc)
  676. {
  677. struct qe_ep *ep = &udc->eps[0];
  678. struct qe_frame *pframe;
  679. unsigned int fsize;
  680. u8 *cp;
  681. pframe = ep->rxframe;
  682. if ((frame_get_info(pframe) & PID_SETUP)
  683. && (udc->ep0_state == WAIT_FOR_SETUP)) {
  684. fsize = frame_get_length(pframe);
  685. if (unlikely(fsize != 8))
  686. return -EINVAL;
  687. cp = (u8 *)&udc->local_setup_buff;
  688. memcpy(cp, pframe->data, fsize);
  689. ep->data01 = 1;
  690. /* handle the usb command base on the usb_ctrlrequest */
  691. setup_received_handle(udc, &udc->local_setup_buff);
  692. return 0;
  693. }
  694. return -EINVAL;
  695. }
  696. static int qe_ep0_rx(struct qe_udc *udc)
  697. {
  698. struct qe_ep *ep = &udc->eps[0];
  699. struct qe_frame *pframe;
  700. struct qe_bd __iomem *bd;
  701. u32 bdstatus, length;
  702. u32 vaddr;
  703. pframe = ep->rxframe;
  704. if (ep->dir == USB_DIR_IN) {
  705. dev_err(udc->dev, "ep0 not a control endpoint\n");
  706. return -EINVAL;
  707. }
  708. bd = ep->n_rxbd;
  709. bdstatus = in_be32((u32 __iomem *)bd);
  710. length = bdstatus & BD_LENGTH_MASK;
  711. while (!(bdstatus & R_E) && length) {
  712. if ((bdstatus & R_F) && (bdstatus & R_L)
  713. && !(bdstatus & R_ERROR)) {
  714. if (length == USB_CRC_SIZE) {
  715. udc->ep0_state = WAIT_FOR_SETUP;
  716. dev_vdbg(udc->dev,
  717. "receive a ZLP in status phase\n");
  718. } else {
  719. qe_frame_clean(pframe);
  720. vaddr = (u32)phys_to_virt(in_be32(&bd->buf));
  721. frame_set_data(pframe, (u8 *)vaddr);
  722. frame_set_length(pframe,
  723. (length - USB_CRC_SIZE));
  724. frame_set_status(pframe, FRAME_OK);
  725. switch (bdstatus & R_PID) {
  726. case R_PID_SETUP:
  727. frame_set_info(pframe, PID_SETUP);
  728. break;
  729. case R_PID_DATA1:
  730. frame_set_info(pframe, PID_DATA1);
  731. break;
  732. default:
  733. frame_set_info(pframe, PID_DATA0);
  734. break;
  735. }
  736. if ((bdstatus & R_PID) == R_PID_SETUP)
  737. ep0_setup_handle(udc);
  738. else
  739. qe_ep_rxframe_handle(ep);
  740. }
  741. } else {
  742. dev_err(udc->dev, "The receive frame with error!\n");
  743. }
  744. /* note: don't clear the rxbd's buffer address */
  745. recycle_one_rxbd(ep);
  746. /* Get next BD */
  747. if (bdstatus & R_W)
  748. bd = ep->rxbase;
  749. else
  750. bd++;
  751. bdstatus = in_be32((u32 __iomem *)bd);
  752. length = bdstatus & BD_LENGTH_MASK;
  753. }
  754. ep->n_rxbd = bd;
  755. return 0;
  756. }
  757. static int qe_ep_rxframe_handle(struct qe_ep *ep)
  758. {
  759. struct qe_frame *pframe;
  760. u8 framepid = 0;
  761. unsigned int fsize;
  762. u8 *cp;
  763. struct qe_req *req;
  764. pframe = ep->rxframe;
  765. if (frame_get_info(pframe) & PID_DATA1)
  766. framepid = 0x1;
  767. if (framepid != ep->data01) {
  768. dev_err(ep->udc->dev, "the data01 error!\n");
  769. return -EIO;
  770. }
  771. fsize = frame_get_length(pframe);
  772. if (list_empty(&ep->queue)) {
  773. dev_err(ep->udc->dev, "the %s have no requeue!\n", ep->name);
  774. } else {
  775. req = list_entry(ep->queue.next, struct qe_req, queue);
  776. cp = (u8 *)(req->req.buf) + req->req.actual;
  777. if (cp) {
  778. memcpy(cp, pframe->data, fsize);
  779. req->req.actual += fsize;
  780. if ((fsize < ep->ep.maxpacket) ||
  781. (req->req.actual >= req->req.length)) {
  782. if (ep->epnum == 0)
  783. ep0_req_complete(ep->udc, req);
  784. else
  785. done(ep, req, 0);
  786. if (list_empty(&ep->queue) && ep->epnum != 0)
  787. qe_eprx_nack(ep);
  788. }
  789. }
  790. }
  791. qe_ep_toggledata01(ep);
  792. return 0;
  793. }
  794. static void ep_rx_tasklet(unsigned long data)
  795. {
  796. struct qe_udc *udc = (struct qe_udc *)data;
  797. struct qe_ep *ep;
  798. struct qe_frame *pframe;
  799. struct qe_bd __iomem *bd;
  800. unsigned long flags;
  801. u32 bdstatus, length;
  802. u32 vaddr, i;
  803. spin_lock_irqsave(&udc->lock, flags);
  804. for (i = 1; i < USB_MAX_ENDPOINTS; i++) {
  805. ep = &udc->eps[i];
  806. if (ep->dir == USB_DIR_IN || ep->enable_tasklet == 0) {
  807. dev_dbg(udc->dev,
  808. "This is a transmit ep or disable tasklet!\n");
  809. continue;
  810. }
  811. pframe = ep->rxframe;
  812. bd = ep->n_rxbd;
  813. bdstatus = in_be32((u32 __iomem *)bd);
  814. length = bdstatus & BD_LENGTH_MASK;
  815. while (!(bdstatus & R_E) && length) {
  816. if (list_empty(&ep->queue)) {
  817. qe_eprx_nack(ep);
  818. dev_dbg(udc->dev,
  819. "The rxep have noreq %d\n",
  820. ep->has_data);
  821. break;
  822. }
  823. if ((bdstatus & R_F) && (bdstatus & R_L)
  824. && !(bdstatus & R_ERROR)) {
  825. qe_frame_clean(pframe);
  826. vaddr = (u32)phys_to_virt(in_be32(&bd->buf));
  827. frame_set_data(pframe, (u8 *)vaddr);
  828. frame_set_length(pframe,
  829. (length - USB_CRC_SIZE));
  830. frame_set_status(pframe, FRAME_OK);
  831. switch (bdstatus & R_PID) {
  832. case R_PID_DATA1:
  833. frame_set_info(pframe, PID_DATA1);
  834. break;
  835. case R_PID_SETUP:
  836. frame_set_info(pframe, PID_SETUP);
  837. break;
  838. default:
  839. frame_set_info(pframe, PID_DATA0);
  840. break;
  841. }
  842. /* handle the rx frame */
  843. qe_ep_rxframe_handle(ep);
  844. } else {
  845. dev_err(udc->dev,
  846. "error in received frame\n");
  847. }
  848. /* note: don't clear the rxbd's buffer address */
  849. /*clear the length */
  850. out_be32((u32 __iomem *)bd, bdstatus & BD_STATUS_MASK);
  851. ep->has_data--;
  852. if (!(ep->localnack))
  853. recycle_one_rxbd(ep);
  854. /* Get next BD */
  855. if (bdstatus & R_W)
  856. bd = ep->rxbase;
  857. else
  858. bd++;
  859. bdstatus = in_be32((u32 __iomem *)bd);
  860. length = bdstatus & BD_LENGTH_MASK;
  861. }
  862. ep->n_rxbd = bd;
  863. if (ep->localnack)
  864. ep_recycle_rxbds(ep);
  865. ep->enable_tasklet = 0;
  866. } /* for i=1 */
  867. spin_unlock_irqrestore(&udc->lock, flags);
  868. }
  869. static int qe_ep_rx(struct qe_ep *ep)
  870. {
  871. struct qe_udc *udc;
  872. struct qe_frame *pframe;
  873. struct qe_bd __iomem *bd;
  874. u16 swoffs, ucoffs, emptybds;
  875. udc = ep->udc;
  876. pframe = ep->rxframe;
  877. if (ep->dir == USB_DIR_IN) {
  878. dev_err(udc->dev, "transmit ep in rx function\n");
  879. return -EINVAL;
  880. }
  881. bd = ep->n_rxbd;
  882. swoffs = (u16)(bd - ep->rxbase);
  883. ucoffs = (u16)((in_be16(&udc->ep_param[ep->epnum]->rbptr) -
  884. in_be16(&udc->ep_param[ep->epnum]->rbase)) >> 3);
  885. if (swoffs < ucoffs)
  886. emptybds = USB_BDRING_LEN_RX - ucoffs + swoffs;
  887. else
  888. emptybds = swoffs - ucoffs;
  889. if (emptybds < MIN_EMPTY_BDS) {
  890. qe_eprx_nack(ep);
  891. ep->localnack = 1;
  892. dev_vdbg(udc->dev, "%d empty bds, send NACK\n", emptybds);
  893. }
  894. ep->has_data = USB_BDRING_LEN_RX - emptybds;
  895. if (list_empty(&ep->queue)) {
  896. qe_eprx_nack(ep);
  897. dev_vdbg(udc->dev, "The rxep have no req queued with %d BDs\n",
  898. ep->has_data);
  899. return 0;
  900. }
  901. tasklet_schedule(&udc->rx_tasklet);
  902. ep->enable_tasklet = 1;
  903. return 0;
  904. }
  905. /* send data from a frame, no matter what tx_req */
  906. static int qe_ep_tx(struct qe_ep *ep, struct qe_frame *frame)
  907. {
  908. struct qe_udc *udc = ep->udc;
  909. struct qe_bd __iomem *bd;
  910. u16 saveusbmr;
  911. u32 bdstatus, pidmask;
  912. u32 paddr;
  913. if (ep->dir == USB_DIR_OUT) {
  914. dev_err(udc->dev, "receive ep passed to tx function\n");
  915. return -EINVAL;
  916. }
  917. /* Disable the Tx interrupt */
  918. saveusbmr = in_be16(&udc->usb_regs->usb_usbmr);
  919. out_be16(&udc->usb_regs->usb_usbmr,
  920. saveusbmr & ~(USB_E_TXB_MASK | USB_E_TXE_MASK));
  921. bd = ep->n_txbd;
  922. bdstatus = in_be32((u32 __iomem *)bd);
  923. if (!(bdstatus & (T_R | BD_LENGTH_MASK))) {
  924. if (frame_get_length(frame) == 0) {
  925. frame_set_data(frame, udc->nullbuf);
  926. frame_set_length(frame, 2);
  927. frame->info |= (ZLP | NO_CRC);
  928. dev_vdbg(udc->dev, "the frame size = 0\n");
  929. }
  930. paddr = virt_to_phys((void *)frame->data);
  931. out_be32(&bd->buf, paddr);
  932. bdstatus = (bdstatus&T_W);
  933. if (!(frame_get_info(frame) & NO_CRC))
  934. bdstatus |= T_R | T_I | T_L | T_TC
  935. | frame_get_length(frame);
  936. else
  937. bdstatus |= T_R | T_I | T_L | frame_get_length(frame);
  938. /* if the packet is a ZLP in status phase */
  939. if ((ep->epnum == 0) && (udc->ep0_state == DATA_STATE_NEED_ZLP))
  940. ep->data01 = 0x1;
  941. if (ep->data01) {
  942. pidmask = T_PID_DATA1;
  943. frame->info |= PID_DATA1;
  944. } else {
  945. pidmask = T_PID_DATA0;
  946. frame->info |= PID_DATA0;
  947. }
  948. bdstatus |= T_CNF;
  949. bdstatus |= pidmask;
  950. out_be32((u32 __iomem *)bd, bdstatus);
  951. qe_ep_filltxfifo(ep);
  952. /* enable the TX interrupt */
  953. out_be16(&udc->usb_regs->usb_usbmr, saveusbmr);
  954. qe_ep_toggledata01(ep);
  955. if (bdstatus & T_W)
  956. ep->n_txbd = ep->txbase;
  957. else
  958. ep->n_txbd++;
  959. return 0;
  960. } else {
  961. out_be16(&udc->usb_regs->usb_usbmr, saveusbmr);
  962. dev_vdbg(udc->dev, "The tx bd is not ready!\n");
  963. return -EBUSY;
  964. }
  965. }
  966. /* when a bd was transmitted, the function can
  967. * handle the tx_req, not include ep0 */
  968. static int txcomplete(struct qe_ep *ep, unsigned char restart)
  969. {
  970. if (ep->tx_req != NULL) {
  971. struct qe_req *req = ep->tx_req;
  972. unsigned zlp = 0, last_len = 0;
  973. last_len = min_t(unsigned, req->req.length - ep->sent,
  974. ep->ep.maxpacket);
  975. if (!restart) {
  976. int asent = ep->last;
  977. ep->sent += asent;
  978. ep->last -= asent;
  979. } else {
  980. ep->last = 0;
  981. }
  982. /* zlp needed when req->re.zero is set */
  983. if (req->req.zero) {
  984. if (last_len == 0 ||
  985. (req->req.length % ep->ep.maxpacket) != 0)
  986. zlp = 0;
  987. else
  988. zlp = 1;
  989. } else
  990. zlp = 0;
  991. /* a request already were transmitted completely */
  992. if (((ep->tx_req->req.length - ep->sent) <= 0) && !zlp) {
  993. done(ep, ep->tx_req, 0);
  994. ep->tx_req = NULL;
  995. ep->last = 0;
  996. ep->sent = 0;
  997. }
  998. }
  999. /* we should gain a new tx_req fot this endpoint */
  1000. if (ep->tx_req == NULL) {
  1001. if (!list_empty(&ep->queue)) {
  1002. ep->tx_req = list_entry(ep->queue.next, struct qe_req,
  1003. queue);
  1004. ep->last = 0;
  1005. ep->sent = 0;
  1006. }
  1007. }
  1008. return 0;
  1009. }
  1010. /* give a frame and a tx_req, send some data */
  1011. static int qe_usb_senddata(struct qe_ep *ep, struct qe_frame *frame)
  1012. {
  1013. unsigned int size;
  1014. u8 *buf;
  1015. qe_frame_clean(frame);
  1016. size = min_t(u32, (ep->tx_req->req.length - ep->sent),
  1017. ep->ep.maxpacket);
  1018. buf = (u8 *)ep->tx_req->req.buf + ep->sent;
  1019. if (buf && size) {
  1020. ep->last = size;
  1021. ep->tx_req->req.actual += size;
  1022. frame_set_data(frame, buf);
  1023. frame_set_length(frame, size);
  1024. frame_set_status(frame, FRAME_OK);
  1025. frame_set_info(frame, 0);
  1026. return qe_ep_tx(ep, frame);
  1027. }
  1028. return -EIO;
  1029. }
  1030. /* give a frame struct,send a ZLP */
  1031. static int sendnulldata(struct qe_ep *ep, struct qe_frame *frame, uint infor)
  1032. {
  1033. struct qe_udc *udc = ep->udc;
  1034. if (frame == NULL)
  1035. return -ENODEV;
  1036. qe_frame_clean(frame);
  1037. frame_set_data(frame, (u8 *)udc->nullbuf);
  1038. frame_set_length(frame, 2);
  1039. frame_set_status(frame, FRAME_OK);
  1040. frame_set_info(frame, (ZLP | NO_CRC | infor));
  1041. return qe_ep_tx(ep, frame);
  1042. }
  1043. static int frame_create_tx(struct qe_ep *ep, struct qe_frame *frame)
  1044. {
  1045. struct qe_req *req = ep->tx_req;
  1046. int reval;
  1047. if (req == NULL)
  1048. return -ENODEV;
  1049. if ((req->req.length - ep->sent) > 0)
  1050. reval = qe_usb_senddata(ep, frame);
  1051. else
  1052. reval = sendnulldata(ep, frame, 0);
  1053. return reval;
  1054. }
  1055. /* if direction is DIR_IN, the status is Device->Host
  1056. * if direction is DIR_OUT, the status transaction is Device<-Host
  1057. * in status phase, udc create a request and gain status */
  1058. static int ep0_prime_status(struct qe_udc *udc, int direction)
  1059. {
  1060. struct qe_ep *ep = &udc->eps[0];
  1061. if (direction == USB_DIR_IN) {
  1062. udc->ep0_state = DATA_STATE_NEED_ZLP;
  1063. udc->ep0_dir = USB_DIR_IN;
  1064. sendnulldata(ep, ep->txframe, SETUP_STATUS | NO_REQ);
  1065. } else {
  1066. udc->ep0_dir = USB_DIR_OUT;
  1067. udc->ep0_state = WAIT_FOR_OUT_STATUS;
  1068. }
  1069. return 0;
  1070. }
  1071. /* a request complete in ep0, whether gadget request or udc request */
  1072. static void ep0_req_complete(struct qe_udc *udc, struct qe_req *req)
  1073. {
  1074. struct qe_ep *ep = &udc->eps[0];
  1075. /* because usb and ep's status already been set in ch9setaddress() */
  1076. switch (udc->ep0_state) {
  1077. case DATA_STATE_XMIT:
  1078. done(ep, req, 0);
  1079. /* receive status phase */
  1080. if (ep0_prime_status(udc, USB_DIR_OUT))
  1081. qe_ep0_stall(udc);
  1082. break;
  1083. case DATA_STATE_NEED_ZLP:
  1084. done(ep, req, 0);
  1085. udc->ep0_state = WAIT_FOR_SETUP;
  1086. break;
  1087. case DATA_STATE_RECV:
  1088. done(ep, req, 0);
  1089. /* send status phase */
  1090. if (ep0_prime_status(udc, USB_DIR_IN))
  1091. qe_ep0_stall(udc);
  1092. break;
  1093. case WAIT_FOR_OUT_STATUS:
  1094. done(ep, req, 0);
  1095. udc->ep0_state = WAIT_FOR_SETUP;
  1096. break;
  1097. case WAIT_FOR_SETUP:
  1098. dev_vdbg(udc->dev, "Unexpected interrupt\n");
  1099. break;
  1100. default:
  1101. qe_ep0_stall(udc);
  1102. break;
  1103. }
  1104. }
  1105. static int ep0_txcomplete(struct qe_ep *ep, unsigned char restart)
  1106. {
  1107. struct qe_req *tx_req = NULL;
  1108. struct qe_frame *frame = ep->txframe;
  1109. if ((frame_get_info(frame) & (ZLP | NO_REQ)) == (ZLP | NO_REQ)) {
  1110. if (!restart)
  1111. ep->udc->ep0_state = WAIT_FOR_SETUP;
  1112. else
  1113. sendnulldata(ep, ep->txframe, SETUP_STATUS | NO_REQ);
  1114. return 0;
  1115. }
  1116. tx_req = ep->tx_req;
  1117. if (tx_req != NULL) {
  1118. if (!restart) {
  1119. int asent = ep->last;
  1120. ep->sent += asent;
  1121. ep->last -= asent;
  1122. } else {
  1123. ep->last = 0;
  1124. }
  1125. /* a request already were transmitted completely */
  1126. if ((ep->tx_req->req.length - ep->sent) <= 0) {
  1127. ep->tx_req->req.actual = (unsigned int)ep->sent;
  1128. ep0_req_complete(ep->udc, ep->tx_req);
  1129. ep->tx_req = NULL;
  1130. ep->last = 0;
  1131. ep->sent = 0;
  1132. }
  1133. } else {
  1134. dev_vdbg(ep->udc->dev, "the ep0_controller have no req\n");
  1135. }
  1136. return 0;
  1137. }
  1138. static int ep0_txframe_handle(struct qe_ep *ep)
  1139. {
  1140. /* if have error, transmit again */
  1141. if (frame_get_status(ep->txframe) & FRAME_ERROR) {
  1142. qe_ep_flushtxfifo(ep);
  1143. dev_vdbg(ep->udc->dev, "The EP0 transmit data have error!\n");
  1144. if (frame_get_info(ep->txframe) & PID_DATA0)
  1145. ep->data01 = 0;
  1146. else
  1147. ep->data01 = 1;
  1148. ep0_txcomplete(ep, 1);
  1149. } else
  1150. ep0_txcomplete(ep, 0);
  1151. frame_create_tx(ep, ep->txframe);
  1152. return 0;
  1153. }
  1154. static int qe_ep0_txconf(struct qe_ep *ep)
  1155. {
  1156. struct qe_bd __iomem *bd;
  1157. struct qe_frame *pframe;
  1158. u32 bdstatus;
  1159. bd = ep->c_txbd;
  1160. bdstatus = in_be32((u32 __iomem *)bd);
  1161. while (!(bdstatus & T_R) && (bdstatus & ~T_W)) {
  1162. pframe = ep->txframe;
  1163. /* clear and recycle the BD */
  1164. out_be32((u32 __iomem *)bd, bdstatus & T_W);
  1165. out_be32(&bd->buf, 0);
  1166. if (bdstatus & T_W)
  1167. ep->c_txbd = ep->txbase;
  1168. else
  1169. ep->c_txbd++;
  1170. if (ep->c_txbd == ep->n_txbd) {
  1171. if (bdstatus & DEVICE_T_ERROR) {
  1172. frame_set_status(pframe, FRAME_ERROR);
  1173. if (bdstatus & T_TO)
  1174. pframe->status |= TX_ER_TIMEOUT;
  1175. if (bdstatus & T_UN)
  1176. pframe->status |= TX_ER_UNDERUN;
  1177. }
  1178. ep0_txframe_handle(ep);
  1179. }
  1180. bd = ep->c_txbd;
  1181. bdstatus = in_be32((u32 __iomem *)bd);
  1182. }
  1183. return 0;
  1184. }
  1185. static int ep_txframe_handle(struct qe_ep *ep)
  1186. {
  1187. if (frame_get_status(ep->txframe) & FRAME_ERROR) {
  1188. qe_ep_flushtxfifo(ep);
  1189. dev_vdbg(ep->udc->dev, "The EP0 transmit data have error!\n");
  1190. if (frame_get_info(ep->txframe) & PID_DATA0)
  1191. ep->data01 = 0;
  1192. else
  1193. ep->data01 = 1;
  1194. txcomplete(ep, 1);
  1195. } else
  1196. txcomplete(ep, 0);
  1197. frame_create_tx(ep, ep->txframe); /* send the data */
  1198. return 0;
  1199. }
  1200. /* confirm the already trainsmited bd */
  1201. static int qe_ep_txconf(struct qe_ep *ep)
  1202. {
  1203. struct qe_bd __iomem *bd;
  1204. struct qe_frame *pframe = NULL;
  1205. u32 bdstatus;
  1206. unsigned char breakonrxinterrupt = 0;
  1207. bd = ep->c_txbd;
  1208. bdstatus = in_be32((u32 __iomem *)bd);
  1209. while (!(bdstatus & T_R) && (bdstatus & ~T_W)) {
  1210. pframe = ep->txframe;
  1211. if (bdstatus & DEVICE_T_ERROR) {
  1212. frame_set_status(pframe, FRAME_ERROR);
  1213. if (bdstatus & T_TO)
  1214. pframe->status |= TX_ER_TIMEOUT;
  1215. if (bdstatus & T_UN)
  1216. pframe->status |= TX_ER_UNDERUN;
  1217. }
  1218. /* clear and recycle the BD */
  1219. out_be32((u32 __iomem *)bd, bdstatus & T_W);
  1220. out_be32(&bd->buf, 0);
  1221. if (bdstatus & T_W)
  1222. ep->c_txbd = ep->txbase;
  1223. else
  1224. ep->c_txbd++;
  1225. /* handle the tx frame */
  1226. ep_txframe_handle(ep);
  1227. bd = ep->c_txbd;
  1228. bdstatus = in_be32((u32 __iomem *)bd);
  1229. }
  1230. if (breakonrxinterrupt)
  1231. return -EIO;
  1232. else
  1233. return 0;
  1234. }
  1235. /* Add a request in queue, and try to transmit a packet */
  1236. static int ep_req_send(struct qe_ep *ep, struct qe_req *req)
  1237. {
  1238. int reval = 0;
  1239. if (ep->tx_req == NULL) {
  1240. ep->sent = 0;
  1241. ep->last = 0;
  1242. txcomplete(ep, 0); /* can gain a new tx_req */
  1243. reval = frame_create_tx(ep, ep->txframe);
  1244. }
  1245. return reval;
  1246. }
  1247. /* Maybe this is a good ideal */
  1248. static int ep_req_rx(struct qe_ep *ep, struct qe_req *req)
  1249. {
  1250. struct qe_udc *udc = ep->udc;
  1251. struct qe_frame *pframe = NULL;
  1252. struct qe_bd __iomem *bd;
  1253. u32 bdstatus, length;
  1254. u32 vaddr, fsize;
  1255. u8 *cp;
  1256. u8 finish_req = 0;
  1257. u8 framepid;
  1258. if (list_empty(&ep->queue)) {
  1259. dev_vdbg(udc->dev, "the req already finish!\n");
  1260. return 0;
  1261. }
  1262. pframe = ep->rxframe;
  1263. bd = ep->n_rxbd;
  1264. bdstatus = in_be32((u32 __iomem *)bd);
  1265. length = bdstatus & BD_LENGTH_MASK;
  1266. while (!(bdstatus & R_E) && length) {
  1267. if (finish_req)
  1268. break;
  1269. if ((bdstatus & R_F) && (bdstatus & R_L)
  1270. && !(bdstatus & R_ERROR)) {
  1271. qe_frame_clean(pframe);
  1272. vaddr = (u32)phys_to_virt(in_be32(&bd->buf));
  1273. frame_set_data(pframe, (u8 *)vaddr);
  1274. frame_set_length(pframe, (length - USB_CRC_SIZE));
  1275. frame_set_status(pframe, FRAME_OK);
  1276. switch (bdstatus & R_PID) {
  1277. case R_PID_DATA1:
  1278. frame_set_info(pframe, PID_DATA1); break;
  1279. default:
  1280. frame_set_info(pframe, PID_DATA0); break;
  1281. }
  1282. /* handle the rx frame */
  1283. if (frame_get_info(pframe) & PID_DATA1)
  1284. framepid = 0x1;
  1285. else
  1286. framepid = 0;
  1287. if (framepid != ep->data01) {
  1288. dev_vdbg(udc->dev, "the data01 error!\n");
  1289. } else {
  1290. fsize = frame_get_length(pframe);
  1291. cp = (u8 *)(req->req.buf) + req->req.actual;
  1292. if (cp) {
  1293. memcpy(cp, pframe->data, fsize);
  1294. req->req.actual += fsize;
  1295. if ((fsize < ep->ep.maxpacket)
  1296. || (req->req.actual >=
  1297. req->req.length)) {
  1298. finish_req = 1;
  1299. done(ep, req, 0);
  1300. if (list_empty(&ep->queue))
  1301. qe_eprx_nack(ep);
  1302. }
  1303. }
  1304. qe_ep_toggledata01(ep);
  1305. }
  1306. } else {
  1307. dev_err(udc->dev, "The receive frame with error!\n");
  1308. }
  1309. /* note: don't clear the rxbd's buffer address *
  1310. * only Clear the length */
  1311. out_be32((u32 __iomem *)bd, (bdstatus & BD_STATUS_MASK));
  1312. ep->has_data--;
  1313. /* Get next BD */
  1314. if (bdstatus & R_W)
  1315. bd = ep->rxbase;
  1316. else
  1317. bd++;
  1318. bdstatus = in_be32((u32 __iomem *)bd);
  1319. length = bdstatus & BD_LENGTH_MASK;
  1320. }
  1321. ep->n_rxbd = bd;
  1322. ep_recycle_rxbds(ep);
  1323. return 0;
  1324. }
  1325. /* only add the request in queue */
  1326. static int ep_req_receive(struct qe_ep *ep, struct qe_req *req)
  1327. {
  1328. if (ep->state == EP_STATE_NACK) {
  1329. if (ep->has_data <= 0) {
  1330. /* Enable rx and unmask rx interrupt */
  1331. qe_eprx_normal(ep);
  1332. } else {
  1333. /* Copy the exist BD data */
  1334. ep_req_rx(ep, req);
  1335. }
  1336. }
  1337. return 0;
  1338. }
  1339. /********************************************************************
  1340. Internal Used Function End
  1341. ********************************************************************/
  1342. /*-----------------------------------------------------------------------
  1343. Endpoint Management Functions For Gadget
  1344. -----------------------------------------------------------------------*/
  1345. static int qe_ep_enable(struct usb_ep *_ep,
  1346. const struct usb_endpoint_descriptor *desc)
  1347. {
  1348. struct qe_udc *udc;
  1349. struct qe_ep *ep;
  1350. int retval = 0;
  1351. unsigned char epnum;
  1352. ep = container_of(_ep, struct qe_ep, ep);
  1353. /* catch various bogus parameters */
  1354. if (!_ep || !desc || _ep->name == ep_name[0] ||
  1355. (desc->bDescriptorType != USB_DT_ENDPOINT))
  1356. return -EINVAL;
  1357. udc = ep->udc;
  1358. if (!udc->driver || (udc->gadget.speed == USB_SPEED_UNKNOWN))
  1359. return -ESHUTDOWN;
  1360. epnum = (u8)desc->bEndpointAddress & 0xF;
  1361. retval = qe_ep_init(udc, epnum, desc);
  1362. if (retval != 0) {
  1363. cpm_muram_free(cpm_muram_offset(ep->rxbase));
  1364. dev_dbg(udc->dev, "enable ep%d failed\n", ep->epnum);
  1365. return -EINVAL;
  1366. }
  1367. dev_dbg(udc->dev, "enable ep%d successful\n", ep->epnum);
  1368. return 0;
  1369. }
  1370. static int qe_ep_disable(struct usb_ep *_ep)
  1371. {
  1372. struct qe_udc *udc;
  1373. struct qe_ep *ep;
  1374. unsigned long flags;
  1375. unsigned int size;
  1376. ep = container_of(_ep, struct qe_ep, ep);
  1377. udc = ep->udc;
  1378. if (!_ep || !ep->ep.desc) {
  1379. dev_dbg(udc->dev, "%s not enabled\n", _ep ? ep->ep.name : NULL);
  1380. return -EINVAL;
  1381. }
  1382. spin_lock_irqsave(&udc->lock, flags);
  1383. /* Nuke all pending requests (does flush) */
  1384. nuke(ep, -ESHUTDOWN);
  1385. ep->ep.desc = NULL;
  1386. ep->stopped = 1;
  1387. ep->tx_req = NULL;
  1388. qe_ep_reset(udc, ep->epnum);
  1389. spin_unlock_irqrestore(&udc->lock, flags);
  1390. cpm_muram_free(cpm_muram_offset(ep->rxbase));
  1391. if (ep->dir == USB_DIR_OUT)
  1392. size = (ep->ep.maxpacket + USB_CRC_SIZE + 2) *
  1393. (USB_BDRING_LEN_RX + 1);
  1394. else
  1395. size = (ep->ep.maxpacket + USB_CRC_SIZE + 2) *
  1396. (USB_BDRING_LEN + 1);
  1397. if (ep->dir != USB_DIR_IN) {
  1398. kfree(ep->rxframe);
  1399. if (ep->rxbufmap) {
  1400. dma_unmap_single(udc->gadget.dev.parent,
  1401. ep->rxbuf_d, size,
  1402. DMA_FROM_DEVICE);
  1403. ep->rxbuf_d = DMA_ADDR_INVALID;
  1404. } else {
  1405. dma_sync_single_for_cpu(
  1406. udc->gadget.dev.parent,
  1407. ep->rxbuf_d, size,
  1408. DMA_FROM_DEVICE);
  1409. }
  1410. kfree(ep->rxbuffer);
  1411. }
  1412. if (ep->dir != USB_DIR_OUT)
  1413. kfree(ep->txframe);
  1414. dev_dbg(udc->dev, "disabled %s OK\n", _ep->name);
  1415. return 0;
  1416. }
  1417. static struct usb_request *qe_alloc_request(struct usb_ep *_ep, gfp_t gfp_flags)
  1418. {
  1419. struct qe_req *req;
  1420. req = kzalloc(sizeof(*req), gfp_flags);
  1421. if (!req)
  1422. return NULL;
  1423. req->req.dma = DMA_ADDR_INVALID;
  1424. INIT_LIST_HEAD(&req->queue);
  1425. return &req->req;
  1426. }
  1427. static void qe_free_request(struct usb_ep *_ep, struct usb_request *_req)
  1428. {
  1429. struct qe_req *req;
  1430. req = container_of(_req, struct qe_req, req);
  1431. if (_req)
  1432. kfree(req);
  1433. }
  1434. static int __qe_ep_queue(struct usb_ep *_ep, struct usb_request *_req)
  1435. {
  1436. struct qe_ep *ep = container_of(_ep, struct qe_ep, ep);
  1437. struct qe_req *req = container_of(_req, struct qe_req, req);
  1438. struct qe_udc *udc;
  1439. int reval;
  1440. udc = ep->udc;
  1441. /* catch various bogus parameters */
  1442. if (!_req || !req->req.complete || !req->req.buf
  1443. || !list_empty(&req->queue)) {
  1444. dev_dbg(udc->dev, "bad params\n");
  1445. return -EINVAL;
  1446. }
  1447. if (!_ep || (!ep->ep.desc && ep_index(ep))) {
  1448. dev_dbg(udc->dev, "bad ep\n");
  1449. return -EINVAL;
  1450. }
  1451. if (!udc->driver || udc->gadget.speed == USB_SPEED_UNKNOWN)
  1452. return -ESHUTDOWN;
  1453. req->ep = ep;
  1454. /* map virtual address to hardware */
  1455. if (req->req.dma == DMA_ADDR_INVALID) {
  1456. req->req.dma = dma_map_single(ep->udc->gadget.dev.parent,
  1457. req->req.buf,
  1458. req->req.length,
  1459. ep_is_in(ep)
  1460. ? DMA_TO_DEVICE :
  1461. DMA_FROM_DEVICE);
  1462. req->mapped = 1;
  1463. } else {
  1464. dma_sync_single_for_device(ep->udc->gadget.dev.parent,
  1465. req->req.dma, req->req.length,
  1466. ep_is_in(ep)
  1467. ? DMA_TO_DEVICE :
  1468. DMA_FROM_DEVICE);
  1469. req->mapped = 0;
  1470. }
  1471. req->req.status = -EINPROGRESS;
  1472. req->req.actual = 0;
  1473. list_add_tail(&req->queue, &ep->queue);
  1474. dev_vdbg(udc->dev, "gadget have request in %s! %d\n",
  1475. ep->name, req->req.length);
  1476. /* push the request to device */
  1477. if (ep_is_in(ep))
  1478. reval = ep_req_send(ep, req);
  1479. /* EP0 */
  1480. if (ep_index(ep) == 0 && req->req.length > 0) {
  1481. if (ep_is_in(ep))
  1482. udc->ep0_state = DATA_STATE_XMIT;
  1483. else
  1484. udc->ep0_state = DATA_STATE_RECV;
  1485. }
  1486. if (ep->dir == USB_DIR_OUT)
  1487. reval = ep_req_receive(ep, req);
  1488. return 0;
  1489. }
  1490. /* queues (submits) an I/O request to an endpoint */
  1491. static int qe_ep_queue(struct usb_ep *_ep, struct usb_request *_req,
  1492. gfp_t gfp_flags)
  1493. {
  1494. struct qe_ep *ep = container_of(_ep, struct qe_ep, ep);
  1495. struct qe_udc *udc = ep->udc;
  1496. unsigned long flags;
  1497. int ret;
  1498. spin_lock_irqsave(&udc->lock, flags);
  1499. ret = __qe_ep_queue(_ep, _req);
  1500. spin_unlock_irqrestore(&udc->lock, flags);
  1501. return ret;
  1502. }
  1503. /* dequeues (cancels, unlinks) an I/O request from an endpoint */
  1504. static int qe_ep_dequeue(struct usb_ep *_ep, struct usb_request *_req)
  1505. {
  1506. struct qe_ep *ep = container_of(_ep, struct qe_ep, ep);
  1507. struct qe_req *req;
  1508. unsigned long flags;
  1509. if (!_ep || !_req)
  1510. return -EINVAL;
  1511. spin_lock_irqsave(&ep->udc->lock, flags);
  1512. /* make sure it's actually queued on this endpoint */
  1513. list_for_each_entry(req, &ep->queue, queue) {
  1514. if (&req->req == _req)
  1515. break;
  1516. }
  1517. if (&req->req != _req) {
  1518. spin_unlock_irqrestore(&ep->udc->lock, flags);
  1519. return -EINVAL;
  1520. }
  1521. done(ep, req, -ECONNRESET);
  1522. spin_unlock_irqrestore(&ep->udc->lock, flags);
  1523. return 0;
  1524. }
  1525. /*-----------------------------------------------------------------
  1526. * modify the endpoint halt feature
  1527. * @ep: the non-isochronous endpoint being stalled
  1528. * @value: 1--set halt 0--clear halt
  1529. * Returns zero, or a negative error code.
  1530. *----------------------------------------------------------------*/
  1531. static int qe_ep_set_halt(struct usb_ep *_ep, int value)
  1532. {
  1533. struct qe_ep *ep;
  1534. unsigned long flags;
  1535. int status = -EOPNOTSUPP;
  1536. struct qe_udc *udc;
  1537. ep = container_of(_ep, struct qe_ep, ep);
  1538. if (!_ep || !ep->ep.desc) {
  1539. status = -EINVAL;
  1540. goto out;
  1541. }
  1542. udc = ep->udc;
  1543. /* Attempt to halt IN ep will fail if any transfer requests
  1544. * are still queue */
  1545. if (value && ep_is_in(ep) && !list_empty(&ep->queue)) {
  1546. status = -EAGAIN;
  1547. goto out;
  1548. }
  1549. status = 0;
  1550. spin_lock_irqsave(&ep->udc->lock, flags);
  1551. qe_eptx_stall_change(ep, value);
  1552. qe_eprx_stall_change(ep, value);
  1553. spin_unlock_irqrestore(&ep->udc->lock, flags);
  1554. if (ep->epnum == 0) {
  1555. udc->ep0_state = WAIT_FOR_SETUP;
  1556. udc->ep0_dir = 0;
  1557. }
  1558. /* set data toggle to DATA0 on clear halt */
  1559. if (value == 0)
  1560. ep->data01 = 0;
  1561. out:
  1562. dev_vdbg(udc->dev, "%s %s halt stat %d\n", ep->ep.name,
  1563. value ? "set" : "clear", status);
  1564. return status;
  1565. }
  1566. static struct usb_ep_ops qe_ep_ops = {
  1567. .enable = qe_ep_enable,
  1568. .disable = qe_ep_disable,
  1569. .alloc_request = qe_alloc_request,
  1570. .free_request = qe_free_request,
  1571. .queue = qe_ep_queue,
  1572. .dequeue = qe_ep_dequeue,
  1573. .set_halt = qe_ep_set_halt,
  1574. };
  1575. /*------------------------------------------------------------------------
  1576. Gadget Driver Layer Operations
  1577. ------------------------------------------------------------------------*/
  1578. /* Get the current frame number */
  1579. static int qe_get_frame(struct usb_gadget *gadget)
  1580. {
  1581. struct qe_udc *udc = container_of(gadget, struct qe_udc, gadget);
  1582. u16 tmp;
  1583. tmp = in_be16(&udc->usb_param->frame_n);
  1584. if (tmp & 0x8000)
  1585. return tmp & 0x07ff;
  1586. return -EINVAL;
  1587. }
  1588. static int fsl_qe_start(struct usb_gadget *gadget,
  1589. struct usb_gadget_driver *driver);
  1590. static int fsl_qe_stop(struct usb_gadget *gadget);
  1591. /* defined in usb_gadget.h */
  1592. static const struct usb_gadget_ops qe_gadget_ops = {
  1593. .get_frame = qe_get_frame,
  1594. .udc_start = fsl_qe_start,
  1595. .udc_stop = fsl_qe_stop,
  1596. };
  1597. /*-------------------------------------------------------------------------
  1598. USB ep0 Setup process in BUS Enumeration
  1599. -------------------------------------------------------------------------*/
  1600. static int udc_reset_ep_queue(struct qe_udc *udc, u8 pipe)
  1601. {
  1602. struct qe_ep *ep = &udc->eps[pipe];
  1603. nuke(ep, -ECONNRESET);
  1604. ep->tx_req = NULL;
  1605. return 0;
  1606. }
  1607. static int reset_queues(struct qe_udc *udc)
  1608. {
  1609. u8 pipe;
  1610. for (pipe = 0; pipe < USB_MAX_ENDPOINTS; pipe++)
  1611. udc_reset_ep_queue(udc, pipe);
  1612. /* report disconnect; the driver is already quiesced */
  1613. spin_unlock(&udc->lock);
  1614. usb_gadget_udc_reset(&udc->gadget, udc->driver);
  1615. spin_lock(&udc->lock);
  1616. return 0;
  1617. }
  1618. static void ch9setaddress(struct qe_udc *udc, u16 value, u16 index,
  1619. u16 length)
  1620. {
  1621. /* Save the new address to device struct */
  1622. udc->device_address = (u8) value;
  1623. /* Update usb state */
  1624. udc->usb_state = USB_STATE_ADDRESS;
  1625. /* Status phase , send a ZLP */
  1626. if (ep0_prime_status(udc, USB_DIR_IN))
  1627. qe_ep0_stall(udc);
  1628. }
  1629. static void ownercomplete(struct usb_ep *_ep, struct usb_request *_req)
  1630. {
  1631. struct qe_req *req = container_of(_req, struct qe_req, req);
  1632. req->req.buf = NULL;
  1633. kfree(req);
  1634. }
  1635. static void ch9getstatus(struct qe_udc *udc, u8 request_type, u16 value,
  1636. u16 index, u16 length)
  1637. {
  1638. u16 usb_status = 0;
  1639. struct qe_req *req;
  1640. struct qe_ep *ep;
  1641. int status = 0;
  1642. ep = &udc->eps[0];
  1643. if ((request_type & USB_RECIP_MASK) == USB_RECIP_DEVICE) {
  1644. /* Get device status */
  1645. usb_status = 1 << USB_DEVICE_SELF_POWERED;
  1646. } else if ((request_type & USB_RECIP_MASK) == USB_RECIP_INTERFACE) {
  1647. /* Get interface status */
  1648. /* We don't have interface information in udc driver */
  1649. usb_status = 0;
  1650. } else if ((request_type & USB_RECIP_MASK) == USB_RECIP_ENDPOINT) {
  1651. /* Get endpoint status */
  1652. int pipe = index & USB_ENDPOINT_NUMBER_MASK;
  1653. struct qe_ep *target_ep = &udc->eps[pipe];
  1654. u16 usep;
  1655. /* stall if endpoint doesn't exist */
  1656. if (!target_ep->ep.desc)
  1657. goto stall;
  1658. usep = in_be16(&udc->usb_regs->usb_usep[pipe]);
  1659. if (index & USB_DIR_IN) {
  1660. if (target_ep->dir != USB_DIR_IN)
  1661. goto stall;
  1662. if ((usep & USB_THS_MASK) == USB_THS_STALL)
  1663. usb_status = 1 << USB_ENDPOINT_HALT;
  1664. } else {
  1665. if (target_ep->dir != USB_DIR_OUT)
  1666. goto stall;
  1667. if ((usep & USB_RHS_MASK) == USB_RHS_STALL)
  1668. usb_status = 1 << USB_ENDPOINT_HALT;
  1669. }
  1670. }
  1671. req = container_of(qe_alloc_request(&ep->ep, GFP_KERNEL),
  1672. struct qe_req, req);
  1673. req->req.length = 2;
  1674. req->req.buf = udc->statusbuf;
  1675. *(u16 *)req->req.buf = cpu_to_le16(usb_status);
  1676. req->req.status = -EINPROGRESS;
  1677. req->req.actual = 0;
  1678. req->req.complete = ownercomplete;
  1679. udc->ep0_dir = USB_DIR_IN;
  1680. /* data phase */
  1681. status = __qe_ep_queue(&ep->ep, &req->req);
  1682. if (status == 0)
  1683. return;
  1684. stall:
  1685. dev_err(udc->dev, "Can't respond to getstatus request \n");
  1686. qe_ep0_stall(udc);
  1687. }
  1688. /* only handle the setup request, suppose the device in normal status */
  1689. static void setup_received_handle(struct qe_udc *udc,
  1690. struct usb_ctrlrequest *setup)
  1691. {
  1692. /* Fix Endian (udc->local_setup_buff is cpu Endian now)*/
  1693. u16 wValue = le16_to_cpu(setup->wValue);
  1694. u16 wIndex = le16_to_cpu(setup->wIndex);
  1695. u16 wLength = le16_to_cpu(setup->wLength);
  1696. /* clear the previous request in the ep0 */
  1697. udc_reset_ep_queue(udc, 0);
  1698. if (setup->bRequestType & USB_DIR_IN)
  1699. udc->ep0_dir = USB_DIR_IN;
  1700. else
  1701. udc->ep0_dir = USB_DIR_OUT;
  1702. switch (setup->bRequest) {
  1703. case USB_REQ_GET_STATUS:
  1704. /* Data+Status phase form udc */
  1705. if ((setup->bRequestType & (USB_DIR_IN | USB_TYPE_MASK))
  1706. != (USB_DIR_IN | USB_TYPE_STANDARD))
  1707. break;
  1708. ch9getstatus(udc, setup->bRequestType, wValue, wIndex,
  1709. wLength);
  1710. return;
  1711. case USB_REQ_SET_ADDRESS:
  1712. /* Status phase from udc */
  1713. if (setup->bRequestType != (USB_DIR_OUT | USB_TYPE_STANDARD |
  1714. USB_RECIP_DEVICE))
  1715. break;
  1716. ch9setaddress(udc, wValue, wIndex, wLength);
  1717. return;
  1718. case USB_REQ_CLEAR_FEATURE:
  1719. case USB_REQ_SET_FEATURE:
  1720. /* Requests with no data phase, status phase from udc */
  1721. if ((setup->bRequestType & USB_TYPE_MASK)
  1722. != USB_TYPE_STANDARD)
  1723. break;
  1724. if ((setup->bRequestType & USB_RECIP_MASK)
  1725. == USB_RECIP_ENDPOINT) {
  1726. int pipe = wIndex & USB_ENDPOINT_NUMBER_MASK;
  1727. struct qe_ep *ep;
  1728. if (wValue != 0 || wLength != 0
  1729. || pipe >= USB_MAX_ENDPOINTS)
  1730. break;
  1731. ep = &udc->eps[pipe];
  1732. spin_unlock(&udc->lock);
  1733. qe_ep_set_halt(&ep->ep,
  1734. (setup->bRequest == USB_REQ_SET_FEATURE)
  1735. ? 1 : 0);
  1736. spin_lock(&udc->lock);
  1737. }
  1738. ep0_prime_status(udc, USB_DIR_IN);
  1739. return;
  1740. default:
  1741. break;
  1742. }
  1743. if (wLength) {
  1744. /* Data phase from gadget, status phase from udc */
  1745. if (setup->bRequestType & USB_DIR_IN) {
  1746. udc->ep0_state = DATA_STATE_XMIT;
  1747. udc->ep0_dir = USB_DIR_IN;
  1748. } else {
  1749. udc->ep0_state = DATA_STATE_RECV;
  1750. udc->ep0_dir = USB_DIR_OUT;
  1751. }
  1752. spin_unlock(&udc->lock);
  1753. if (udc->driver->setup(&udc->gadget,
  1754. &udc->local_setup_buff) < 0)
  1755. qe_ep0_stall(udc);
  1756. spin_lock(&udc->lock);
  1757. } else {
  1758. /* No data phase, IN status from gadget */
  1759. udc->ep0_dir = USB_DIR_IN;
  1760. spin_unlock(&udc->lock);
  1761. if (udc->driver->setup(&udc->gadget,
  1762. &udc->local_setup_buff) < 0)
  1763. qe_ep0_stall(udc);
  1764. spin_lock(&udc->lock);
  1765. udc->ep0_state = DATA_STATE_NEED_ZLP;
  1766. }
  1767. }
  1768. /*-------------------------------------------------------------------------
  1769. USB Interrupt handlers
  1770. -------------------------------------------------------------------------*/
  1771. static void suspend_irq(struct qe_udc *udc)
  1772. {
  1773. udc->resume_state = udc->usb_state;
  1774. udc->usb_state = USB_STATE_SUSPENDED;
  1775. /* report suspend to the driver ,serial.c not support this*/
  1776. if (udc->driver->suspend)
  1777. udc->driver->suspend(&udc->gadget);
  1778. }
  1779. static void resume_irq(struct qe_udc *udc)
  1780. {
  1781. udc->usb_state = udc->resume_state;
  1782. udc->resume_state = 0;
  1783. /* report resume to the driver , serial.c not support this*/
  1784. if (udc->driver->resume)
  1785. udc->driver->resume(&udc->gadget);
  1786. }
  1787. static void idle_irq(struct qe_udc *udc)
  1788. {
  1789. u8 usbs;
  1790. usbs = in_8(&udc->usb_regs->usb_usbs);
  1791. if (usbs & USB_IDLE_STATUS_MASK) {
  1792. if ((udc->usb_state) != USB_STATE_SUSPENDED)
  1793. suspend_irq(udc);
  1794. } else {
  1795. if (udc->usb_state == USB_STATE_SUSPENDED)
  1796. resume_irq(udc);
  1797. }
  1798. }
  1799. static int reset_irq(struct qe_udc *udc)
  1800. {
  1801. unsigned char i;
  1802. if (udc->usb_state == USB_STATE_DEFAULT)
  1803. return 0;
  1804. qe_usb_disable(udc);
  1805. out_8(&udc->usb_regs->usb_usadr, 0);
  1806. for (i = 0; i < USB_MAX_ENDPOINTS; i++) {
  1807. if (udc->eps[i].init)
  1808. qe_ep_reset(udc, i);
  1809. }
  1810. reset_queues(udc);
  1811. udc->usb_state = USB_STATE_DEFAULT;
  1812. udc->ep0_state = WAIT_FOR_SETUP;
  1813. udc->ep0_dir = USB_DIR_OUT;
  1814. qe_usb_enable(udc);
  1815. return 0;
  1816. }
  1817. static int bsy_irq(struct qe_udc *udc)
  1818. {
  1819. return 0;
  1820. }
  1821. static int txe_irq(struct qe_udc *udc)
  1822. {
  1823. return 0;
  1824. }
  1825. /* ep0 tx interrupt also in here */
  1826. static int tx_irq(struct qe_udc *udc)
  1827. {
  1828. struct qe_ep *ep;
  1829. struct qe_bd __iomem *bd;
  1830. int i, res = 0;
  1831. if ((udc->usb_state == USB_STATE_ADDRESS)
  1832. && (in_8(&udc->usb_regs->usb_usadr) == 0))
  1833. out_8(&udc->usb_regs->usb_usadr, udc->device_address);
  1834. for (i = (USB_MAX_ENDPOINTS-1); ((i >= 0) && (res == 0)); i--) {
  1835. ep = &udc->eps[i];
  1836. if (ep && ep->init && (ep->dir != USB_DIR_OUT)) {
  1837. bd = ep->c_txbd;
  1838. if (!(in_be32((u32 __iomem *)bd) & T_R)
  1839. && (in_be32(&bd->buf))) {
  1840. /* confirm the transmitted bd */
  1841. if (ep->epnum == 0)
  1842. res = qe_ep0_txconf(ep);
  1843. else
  1844. res = qe_ep_txconf(ep);
  1845. }
  1846. }
  1847. }
  1848. return res;
  1849. }
  1850. /* setup packect's rx is handle in the function too */
  1851. static void rx_irq(struct qe_udc *udc)
  1852. {
  1853. struct qe_ep *ep;
  1854. struct qe_bd __iomem *bd;
  1855. int i;
  1856. for (i = 0; i < USB_MAX_ENDPOINTS; i++) {
  1857. ep = &udc->eps[i];
  1858. if (ep && ep->init && (ep->dir != USB_DIR_IN)) {
  1859. bd = ep->n_rxbd;
  1860. if (!(in_be32((u32 __iomem *)bd) & R_E)
  1861. && (in_be32(&bd->buf))) {
  1862. if (ep->epnum == 0) {
  1863. qe_ep0_rx(udc);
  1864. } else {
  1865. /*non-setup package receive*/
  1866. qe_ep_rx(ep);
  1867. }
  1868. }
  1869. }
  1870. }
  1871. }
  1872. static irqreturn_t qe_udc_irq(int irq, void *_udc)
  1873. {
  1874. struct qe_udc *udc = (struct qe_udc *)_udc;
  1875. u16 irq_src;
  1876. irqreturn_t status = IRQ_NONE;
  1877. unsigned long flags;
  1878. spin_lock_irqsave(&udc->lock, flags);
  1879. irq_src = in_be16(&udc->usb_regs->usb_usber) &
  1880. in_be16(&udc->usb_regs->usb_usbmr);
  1881. /* Clear notification bits */
  1882. out_be16(&udc->usb_regs->usb_usber, irq_src);
  1883. /* USB Interrupt */
  1884. if (irq_src & USB_E_IDLE_MASK) {
  1885. idle_irq(udc);
  1886. irq_src &= ~USB_E_IDLE_MASK;
  1887. status = IRQ_HANDLED;
  1888. }
  1889. if (irq_src & USB_E_TXB_MASK) {
  1890. tx_irq(udc);
  1891. irq_src &= ~USB_E_TXB_MASK;
  1892. status = IRQ_HANDLED;
  1893. }
  1894. if (irq_src & USB_E_RXB_MASK) {
  1895. rx_irq(udc);
  1896. irq_src &= ~USB_E_RXB_MASK;
  1897. status = IRQ_HANDLED;
  1898. }
  1899. if (irq_src & USB_E_RESET_MASK) {
  1900. reset_irq(udc);
  1901. irq_src &= ~USB_E_RESET_MASK;
  1902. status = IRQ_HANDLED;
  1903. }
  1904. if (irq_src & USB_E_BSY_MASK) {
  1905. bsy_irq(udc);
  1906. irq_src &= ~USB_E_BSY_MASK;
  1907. status = IRQ_HANDLED;
  1908. }
  1909. if (irq_src & USB_E_TXE_MASK) {
  1910. txe_irq(udc);
  1911. irq_src &= ~USB_E_TXE_MASK;
  1912. status = IRQ_HANDLED;
  1913. }
  1914. spin_unlock_irqrestore(&udc->lock, flags);
  1915. return status;
  1916. }
  1917. /*-------------------------------------------------------------------------
  1918. Gadget driver probe and unregister.
  1919. --------------------------------------------------------------------------*/
  1920. static int fsl_qe_start(struct usb_gadget *gadget,
  1921. struct usb_gadget_driver *driver)
  1922. {
  1923. struct qe_udc *udc;
  1924. unsigned long flags;
  1925. udc = container_of(gadget, struct qe_udc, gadget);
  1926. /* lock is needed but whether should use this lock or another */
  1927. spin_lock_irqsave(&udc->lock, flags);
  1928. driver->driver.bus = NULL;
  1929. /* hook up the driver */
  1930. udc->driver = driver;
  1931. udc->gadget.speed = driver->max_speed;
  1932. /* Enable IRQ reg and Set usbcmd reg EN bit */
  1933. qe_usb_enable(udc);
  1934. out_be16(&udc->usb_regs->usb_usber, 0xffff);
  1935. out_be16(&udc->usb_regs->usb_usbmr, USB_E_DEFAULT_DEVICE);
  1936. udc->usb_state = USB_STATE_ATTACHED;
  1937. udc->ep0_state = WAIT_FOR_SETUP;
  1938. udc->ep0_dir = USB_DIR_OUT;
  1939. spin_unlock_irqrestore(&udc->lock, flags);
  1940. return 0;
  1941. }
  1942. static int fsl_qe_stop(struct usb_gadget *gadget)
  1943. {
  1944. struct qe_udc *udc;
  1945. struct qe_ep *loop_ep;
  1946. unsigned long flags;
  1947. udc = container_of(gadget, struct qe_udc, gadget);
  1948. /* stop usb controller, disable intr */
  1949. qe_usb_disable(udc);
  1950. /* in fact, no needed */
  1951. udc->usb_state = USB_STATE_ATTACHED;
  1952. udc->ep0_state = WAIT_FOR_SETUP;
  1953. udc->ep0_dir = 0;
  1954. /* stand operation */
  1955. spin_lock_irqsave(&udc->lock, flags);
  1956. udc->gadget.speed = USB_SPEED_UNKNOWN;
  1957. nuke(&udc->eps[0], -ESHUTDOWN);
  1958. list_for_each_entry(loop_ep, &udc->gadget.ep_list, ep.ep_list)
  1959. nuke(loop_ep, -ESHUTDOWN);
  1960. spin_unlock_irqrestore(&udc->lock, flags);
  1961. udc->driver = NULL;
  1962. return 0;
  1963. }
  1964. /* udc structure's alloc and setup, include ep-param alloc */
  1965. static struct qe_udc *qe_udc_config(struct platform_device *ofdev)
  1966. {
  1967. struct qe_udc *udc;
  1968. struct device_node *np = ofdev->dev.of_node;
  1969. unsigned int tmp_addr = 0;
  1970. struct usb_device_para __iomem *usbpram;
  1971. unsigned int i;
  1972. u64 size;
  1973. u32 offset;
  1974. udc = kzalloc(sizeof(*udc), GFP_KERNEL);
  1975. if (udc == NULL) {
  1976. dev_err(&ofdev->dev, "malloc udc failed\n");
  1977. goto cleanup;
  1978. }
  1979. udc->dev = &ofdev->dev;
  1980. /* get default address of usb parameter in MURAM from device tree */
  1981. offset = *of_get_address(np, 1, &size, NULL);
  1982. udc->usb_param = cpm_muram_addr(offset);
  1983. memset_io(udc->usb_param, 0, size);
  1984. usbpram = udc->usb_param;
  1985. out_be16(&usbpram->frame_n, 0);
  1986. out_be32(&usbpram->rstate, 0);
  1987. tmp_addr = cpm_muram_alloc((USB_MAX_ENDPOINTS *
  1988. sizeof(struct usb_ep_para)),
  1989. USB_EP_PARA_ALIGNMENT);
  1990. if (IS_ERR_VALUE(tmp_addr))
  1991. goto cleanup;
  1992. for (i = 0; i < USB_MAX_ENDPOINTS; i++) {
  1993. out_be16(&usbpram->epptr[i], (u16)tmp_addr);
  1994. udc->ep_param[i] = cpm_muram_addr(tmp_addr);
  1995. tmp_addr += 32;
  1996. }
  1997. memset_io(udc->ep_param[0], 0,
  1998. USB_MAX_ENDPOINTS * sizeof(struct usb_ep_para));
  1999. udc->resume_state = USB_STATE_NOTATTACHED;
  2000. udc->usb_state = USB_STATE_POWERED;
  2001. udc->ep0_dir = 0;
  2002. spin_lock_init(&udc->lock);
  2003. return udc;
  2004. cleanup:
  2005. kfree(udc);
  2006. return NULL;
  2007. }
  2008. /* USB Controller register init */
  2009. static int qe_udc_reg_init(struct qe_udc *udc)
  2010. {
  2011. struct usb_ctlr __iomem *qe_usbregs;
  2012. qe_usbregs = udc->usb_regs;
  2013. /* Spec says that we must enable the USB controller to change mode. */
  2014. out_8(&qe_usbregs->usb_usmod, 0x01);
  2015. /* Mode changed, now disable it, since muram isn't initialized yet. */
  2016. out_8(&qe_usbregs->usb_usmod, 0x00);
  2017. /* Initialize the rest. */
  2018. out_be16(&qe_usbregs->usb_usbmr, 0);
  2019. out_8(&qe_usbregs->usb_uscom, 0);
  2020. out_be16(&qe_usbregs->usb_usber, USBER_ALL_CLEAR);
  2021. return 0;
  2022. }
  2023. static int qe_ep_config(struct qe_udc *udc, unsigned char pipe_num)
  2024. {
  2025. struct qe_ep *ep = &udc->eps[pipe_num];
  2026. ep->udc = udc;
  2027. strcpy(ep->name, ep_name[pipe_num]);
  2028. ep->ep.name = ep_name[pipe_num];
  2029. if (pipe_num == 0) {
  2030. ep->ep.caps.type_control = true;
  2031. } else {
  2032. ep->ep.caps.type_iso = true;
  2033. ep->ep.caps.type_bulk = true;
  2034. ep->ep.caps.type_int = true;
  2035. }
  2036. ep->ep.caps.dir_in = true;
  2037. ep->ep.caps.dir_out = true;
  2038. ep->ep.ops = &qe_ep_ops;
  2039. ep->stopped = 1;
  2040. usb_ep_set_maxpacket_limit(&ep->ep, (unsigned short) ~0);
  2041. ep->ep.desc = NULL;
  2042. ep->dir = 0xff;
  2043. ep->epnum = (u8)pipe_num;
  2044. ep->sent = 0;
  2045. ep->last = 0;
  2046. ep->init = 0;
  2047. ep->rxframe = NULL;
  2048. ep->txframe = NULL;
  2049. ep->tx_req = NULL;
  2050. ep->state = EP_STATE_IDLE;
  2051. ep->has_data = 0;
  2052. /* the queue lists any req for this ep */
  2053. INIT_LIST_HEAD(&ep->queue);
  2054. /* gagdet.ep_list used for ep_autoconfig so no ep0*/
  2055. if (pipe_num != 0)
  2056. list_add_tail(&ep->ep.ep_list, &udc->gadget.ep_list);
  2057. ep->gadget = &udc->gadget;
  2058. return 0;
  2059. }
  2060. /*-----------------------------------------------------------------------
  2061. * UDC device Driver operation functions *
  2062. *----------------------------------------------------------------------*/
  2063. static void qe_udc_release(struct device *dev)
  2064. {
  2065. struct qe_udc *udc = container_of(dev, struct qe_udc, gadget.dev);
  2066. int i;
  2067. complete(udc->done);
  2068. cpm_muram_free(cpm_muram_offset(udc->ep_param[0]));
  2069. for (i = 0; i < USB_MAX_ENDPOINTS; i++)
  2070. udc->ep_param[i] = NULL;
  2071. kfree(udc);
  2072. }
  2073. /* Driver probe functions */
  2074. static const struct of_device_id qe_udc_match[];
  2075. static int qe_udc_probe(struct platform_device *ofdev)
  2076. {
  2077. struct qe_udc *udc;
  2078. const struct of_device_id *match;
  2079. struct device_node *np = ofdev->dev.of_node;
  2080. struct qe_ep *ep;
  2081. unsigned int ret = 0;
  2082. unsigned int i;
  2083. const void *prop;
  2084. match = of_match_device(qe_udc_match, &ofdev->dev);
  2085. if (!match)
  2086. return -EINVAL;
  2087. prop = of_get_property(np, "mode", NULL);
  2088. if (!prop || strcmp(prop, "peripheral"))
  2089. return -ENODEV;
  2090. /* Initialize the udc structure including QH member and other member */
  2091. udc = qe_udc_config(ofdev);
  2092. if (!udc) {
  2093. dev_err(&ofdev->dev, "failed to initialize\n");
  2094. return -ENOMEM;
  2095. }
  2096. udc->soc_type = (unsigned long)match->data;
  2097. udc->usb_regs = of_iomap(np, 0);
  2098. if (!udc->usb_regs) {
  2099. ret = -ENOMEM;
  2100. goto err1;
  2101. }
  2102. /* initialize usb hw reg except for regs for EP,
  2103. * leave usbintr reg untouched*/
  2104. qe_udc_reg_init(udc);
  2105. /* here comes the stand operations for probe
  2106. * set the qe_udc->gadget.xxx */
  2107. udc->gadget.ops = &qe_gadget_ops;
  2108. /* gadget.ep0 is a pointer */
  2109. udc->gadget.ep0 = &udc->eps[0].ep;
  2110. INIT_LIST_HEAD(&udc->gadget.ep_list);
  2111. /* modify in register gadget process */
  2112. udc->gadget.speed = USB_SPEED_UNKNOWN;
  2113. /* name: Identifies the controller hardware type. */
  2114. udc->gadget.name = driver_name;
  2115. udc->gadget.dev.parent = &ofdev->dev;
  2116. /* initialize qe_ep struct */
  2117. for (i = 0; i < USB_MAX_ENDPOINTS ; i++) {
  2118. /* because the ep type isn't decide here so
  2119. * qe_ep_init() should be called in ep_enable() */
  2120. /* setup the qe_ep struct and link ep.ep.list
  2121. * into gadget.ep_list */
  2122. qe_ep_config(udc, (unsigned char)i);
  2123. }
  2124. /* ep0 initialization in here */
  2125. ret = qe_ep_init(udc, 0, &qe_ep0_desc);
  2126. if (ret)
  2127. goto err2;
  2128. /* create a buf for ZLP send, need to remain zeroed */
  2129. udc->nullbuf = devm_kzalloc(&ofdev->dev, 256, GFP_KERNEL);
  2130. if (udc->nullbuf == NULL) {
  2131. ret = -ENOMEM;
  2132. goto err3;
  2133. }
  2134. /* buffer for data of get_status request */
  2135. udc->statusbuf = devm_kzalloc(&ofdev->dev, 2, GFP_KERNEL);
  2136. if (udc->statusbuf == NULL) {
  2137. ret = -ENOMEM;
  2138. goto err3;
  2139. }
  2140. udc->nullp = virt_to_phys((void *)udc->nullbuf);
  2141. if (udc->nullp == DMA_ADDR_INVALID) {
  2142. udc->nullp = dma_map_single(
  2143. udc->gadget.dev.parent,
  2144. udc->nullbuf,
  2145. 256,
  2146. DMA_TO_DEVICE);
  2147. udc->nullmap = 1;
  2148. } else {
  2149. dma_sync_single_for_device(udc->gadget.dev.parent,
  2150. udc->nullp, 256,
  2151. DMA_TO_DEVICE);
  2152. }
  2153. tasklet_init(&udc->rx_tasklet, ep_rx_tasklet,
  2154. (unsigned long)udc);
  2155. /* request irq and disable DR */
  2156. udc->usb_irq = irq_of_parse_and_map(np, 0);
  2157. if (!udc->usb_irq) {
  2158. ret = -EINVAL;
  2159. goto err_noirq;
  2160. }
  2161. ret = request_irq(udc->usb_irq, qe_udc_irq, 0,
  2162. driver_name, udc);
  2163. if (ret) {
  2164. dev_err(udc->dev, "cannot request irq %d err %d\n",
  2165. udc->usb_irq, ret);
  2166. goto err4;
  2167. }
  2168. ret = usb_add_gadget_udc_release(&ofdev->dev, &udc->gadget,
  2169. qe_udc_release);
  2170. if (ret)
  2171. goto err5;
  2172. platform_set_drvdata(ofdev, udc);
  2173. dev_info(udc->dev,
  2174. "%s USB controller initialized as device\n",
  2175. (udc->soc_type == PORT_QE) ? "QE" : "CPM");
  2176. return 0;
  2177. err5:
  2178. free_irq(udc->usb_irq, udc);
  2179. err4:
  2180. irq_dispose_mapping(udc->usb_irq);
  2181. err_noirq:
  2182. if (udc->nullmap) {
  2183. dma_unmap_single(udc->gadget.dev.parent,
  2184. udc->nullp, 256,
  2185. DMA_TO_DEVICE);
  2186. udc->nullp = DMA_ADDR_INVALID;
  2187. } else {
  2188. dma_sync_single_for_cpu(udc->gadget.dev.parent,
  2189. udc->nullp, 256,
  2190. DMA_TO_DEVICE);
  2191. }
  2192. err3:
  2193. ep = &udc->eps[0];
  2194. cpm_muram_free(cpm_muram_offset(ep->rxbase));
  2195. kfree(ep->rxframe);
  2196. kfree(ep->rxbuffer);
  2197. kfree(ep->txframe);
  2198. err2:
  2199. iounmap(udc->usb_regs);
  2200. err1:
  2201. kfree(udc);
  2202. return ret;
  2203. }
  2204. #ifdef CONFIG_PM
  2205. static int qe_udc_suspend(struct platform_device *dev, pm_message_t state)
  2206. {
  2207. return -ENOTSUPP;
  2208. }
  2209. static int qe_udc_resume(struct platform_device *dev)
  2210. {
  2211. return -ENOTSUPP;
  2212. }
  2213. #endif
  2214. static int qe_udc_remove(struct platform_device *ofdev)
  2215. {
  2216. struct qe_udc *udc = platform_get_drvdata(ofdev);
  2217. struct qe_ep *ep;
  2218. unsigned int size;
  2219. DECLARE_COMPLETION_ONSTACK(done);
  2220. usb_del_gadget_udc(&udc->gadget);
  2221. udc->done = &done;
  2222. tasklet_disable(&udc->rx_tasklet);
  2223. if (udc->nullmap) {
  2224. dma_unmap_single(udc->gadget.dev.parent,
  2225. udc->nullp, 256,
  2226. DMA_TO_DEVICE);
  2227. udc->nullp = DMA_ADDR_INVALID;
  2228. } else {
  2229. dma_sync_single_for_cpu(udc->gadget.dev.parent,
  2230. udc->nullp, 256,
  2231. DMA_TO_DEVICE);
  2232. }
  2233. ep = &udc->eps[0];
  2234. cpm_muram_free(cpm_muram_offset(ep->rxbase));
  2235. size = (ep->ep.maxpacket + USB_CRC_SIZE + 2) * (USB_BDRING_LEN + 1);
  2236. kfree(ep->rxframe);
  2237. if (ep->rxbufmap) {
  2238. dma_unmap_single(udc->gadget.dev.parent,
  2239. ep->rxbuf_d, size,
  2240. DMA_FROM_DEVICE);
  2241. ep->rxbuf_d = DMA_ADDR_INVALID;
  2242. } else {
  2243. dma_sync_single_for_cpu(udc->gadget.dev.parent,
  2244. ep->rxbuf_d, size,
  2245. DMA_FROM_DEVICE);
  2246. }
  2247. kfree(ep->rxbuffer);
  2248. kfree(ep->txframe);
  2249. free_irq(udc->usb_irq, udc);
  2250. irq_dispose_mapping(udc->usb_irq);
  2251. tasklet_kill(&udc->rx_tasklet);
  2252. iounmap(udc->usb_regs);
  2253. /* wait for release() of gadget.dev to free udc */
  2254. wait_for_completion(&done);
  2255. return 0;
  2256. }
  2257. /*-------------------------------------------------------------------------*/
  2258. static const struct of_device_id qe_udc_match[] = {
  2259. {
  2260. .compatible = "fsl,mpc8323-qe-usb",
  2261. .data = (void *)PORT_QE,
  2262. },
  2263. {
  2264. .compatible = "fsl,mpc8360-qe-usb",
  2265. .data = (void *)PORT_QE,
  2266. },
  2267. {
  2268. .compatible = "fsl,mpc8272-cpm-usb",
  2269. .data = (void *)PORT_CPM,
  2270. },
  2271. {},
  2272. };
  2273. MODULE_DEVICE_TABLE(of, qe_udc_match);
  2274. static struct platform_driver udc_driver = {
  2275. .driver = {
  2276. .name = driver_name,
  2277. .of_match_table = qe_udc_match,
  2278. },
  2279. .probe = qe_udc_probe,
  2280. .remove = qe_udc_remove,
  2281. #ifdef CONFIG_PM
  2282. .suspend = qe_udc_suspend,
  2283. .resume = qe_udc_resume,
  2284. #endif
  2285. };
  2286. module_platform_driver(udc_driver);
  2287. MODULE_DESCRIPTION(DRIVER_DESC);
  2288. MODULE_AUTHOR(DRIVER_AUTHOR);
  2289. MODULE_LICENSE("GPL");