net2280.c 98 KB

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  1. /*
  2. * Driver for the PLX NET2280 USB device controller.
  3. * Specs and errata are available from <http://www.plxtech.com>.
  4. *
  5. * PLX Technology Inc. (formerly NetChip Technology) supported the
  6. * development of this driver.
  7. *
  8. *
  9. * CODE STATUS HIGHLIGHTS
  10. *
  11. * This driver should work well with most "gadget" drivers, including
  12. * the Mass Storage, Serial, and Ethernet/RNDIS gadget drivers
  13. * as well as Gadget Zero and Gadgetfs.
  14. *
  15. * DMA is enabled by default.
  16. *
  17. * MSI is enabled by default. The legacy IRQ is used if MSI couldn't
  18. * be enabled.
  19. *
  20. * Note that almost all the errata workarounds here are only needed for
  21. * rev1 chips. Rev1a silicon (0110) fixes almost all of them.
  22. */
  23. /*
  24. * Copyright (C) 2003 David Brownell
  25. * Copyright (C) 2003-2005 PLX Technology, Inc.
  26. * Copyright (C) 2014 Ricardo Ribalda - Qtechnology/AS
  27. *
  28. * Modified Seth Levy 2005 PLX Technology, Inc. to provide compatibility
  29. * with 2282 chip
  30. *
  31. * Modified Ricardo Ribalda Qtechnology AS to provide compatibility
  32. * with usb 338x chip. Based on PLX driver
  33. *
  34. * This program is free software; you can redistribute it and/or modify
  35. * it under the terms of the GNU General Public License as published by
  36. * the Free Software Foundation; either version 2 of the License, or
  37. * (at your option) any later version.
  38. */
  39. #include <linux/module.h>
  40. #include <linux/pci.h>
  41. #include <linux/dma-mapping.h>
  42. #include <linux/kernel.h>
  43. #include <linux/delay.h>
  44. #include <linux/ioport.h>
  45. #include <linux/slab.h>
  46. #include <linux/errno.h>
  47. #include <linux/init.h>
  48. #include <linux/timer.h>
  49. #include <linux/list.h>
  50. #include <linux/interrupt.h>
  51. #include <linux/moduleparam.h>
  52. #include <linux/device.h>
  53. #include <linux/usb/ch9.h>
  54. #include <linux/usb/gadget.h>
  55. #include <linux/prefetch.h>
  56. #include <linux/io.h>
  57. #include <asm/byteorder.h>
  58. #include <asm/irq.h>
  59. #include <asm/unaligned.h>
  60. #define DRIVER_DESC "PLX NET228x/USB338x USB Peripheral Controller"
  61. #define DRIVER_VERSION "2005 Sept 27/v3.0"
  62. #define EP_DONTUSE 13 /* nonzero */
  63. #define USE_RDK_LEDS /* GPIO pins control three LEDs */
  64. static const char driver_name[] = "net2280";
  65. static const char driver_desc[] = DRIVER_DESC;
  66. static const u32 ep_bit[9] = { 0, 17, 2, 19, 4, 1, 18, 3, 20 };
  67. static const char ep0name[] = "ep0";
  68. #define EP_INFO(_name, _caps) \
  69. { \
  70. .name = _name, \
  71. .caps = _caps, \
  72. }
  73. static const struct {
  74. const char *name;
  75. const struct usb_ep_caps caps;
  76. } ep_info_dft[] = { /* Default endpoint configuration */
  77. EP_INFO(ep0name,
  78. USB_EP_CAPS(USB_EP_CAPS_TYPE_CONTROL, USB_EP_CAPS_DIR_ALL)),
  79. EP_INFO("ep-a",
  80. USB_EP_CAPS(USB_EP_CAPS_TYPE_ALL, USB_EP_CAPS_DIR_ALL)),
  81. EP_INFO("ep-b",
  82. USB_EP_CAPS(USB_EP_CAPS_TYPE_ALL, USB_EP_CAPS_DIR_ALL)),
  83. EP_INFO("ep-c",
  84. USB_EP_CAPS(USB_EP_CAPS_TYPE_ALL, USB_EP_CAPS_DIR_ALL)),
  85. EP_INFO("ep-d",
  86. USB_EP_CAPS(USB_EP_CAPS_TYPE_ALL, USB_EP_CAPS_DIR_ALL)),
  87. EP_INFO("ep-e",
  88. USB_EP_CAPS(USB_EP_CAPS_TYPE_ALL, USB_EP_CAPS_DIR_ALL)),
  89. EP_INFO("ep-f",
  90. USB_EP_CAPS(USB_EP_CAPS_TYPE_ALL, USB_EP_CAPS_DIR_ALL)),
  91. EP_INFO("ep-g",
  92. USB_EP_CAPS(USB_EP_CAPS_TYPE_ALL, USB_EP_CAPS_DIR_ALL)),
  93. EP_INFO("ep-h",
  94. USB_EP_CAPS(USB_EP_CAPS_TYPE_ALL, USB_EP_CAPS_DIR_ALL)),
  95. }, ep_info_adv[] = { /* Endpoints for usb3380 advance mode */
  96. EP_INFO(ep0name,
  97. USB_EP_CAPS(USB_EP_CAPS_TYPE_CONTROL, USB_EP_CAPS_DIR_ALL)),
  98. EP_INFO("ep1in",
  99. USB_EP_CAPS(USB_EP_CAPS_TYPE_ALL, USB_EP_CAPS_DIR_IN)),
  100. EP_INFO("ep2out",
  101. USB_EP_CAPS(USB_EP_CAPS_TYPE_ALL, USB_EP_CAPS_DIR_OUT)),
  102. EP_INFO("ep3in",
  103. USB_EP_CAPS(USB_EP_CAPS_TYPE_ALL, USB_EP_CAPS_DIR_IN)),
  104. EP_INFO("ep4out",
  105. USB_EP_CAPS(USB_EP_CAPS_TYPE_ALL, USB_EP_CAPS_DIR_OUT)),
  106. EP_INFO("ep1out",
  107. USB_EP_CAPS(USB_EP_CAPS_TYPE_ALL, USB_EP_CAPS_DIR_OUT)),
  108. EP_INFO("ep2in",
  109. USB_EP_CAPS(USB_EP_CAPS_TYPE_ALL, USB_EP_CAPS_DIR_IN)),
  110. EP_INFO("ep3out",
  111. USB_EP_CAPS(USB_EP_CAPS_TYPE_ALL, USB_EP_CAPS_DIR_OUT)),
  112. EP_INFO("ep4in",
  113. USB_EP_CAPS(USB_EP_CAPS_TYPE_ALL, USB_EP_CAPS_DIR_IN)),
  114. };
  115. #undef EP_INFO
  116. /* mode 0 == ep-{a,b,c,d} 1K fifo each
  117. * mode 1 == ep-{a,b} 2K fifo each, ep-{c,d} unavailable
  118. * mode 2 == ep-a 2K fifo, ep-{b,c} 1K each, ep-d unavailable
  119. */
  120. static ushort fifo_mode;
  121. /* "modprobe net2280 fifo_mode=1" etc */
  122. module_param(fifo_mode, ushort, 0644);
  123. /* enable_suspend -- When enabled, the driver will respond to
  124. * USB suspend requests by powering down the NET2280. Otherwise,
  125. * USB suspend requests will be ignored. This is acceptable for
  126. * self-powered devices
  127. */
  128. static bool enable_suspend;
  129. /* "modprobe net2280 enable_suspend=1" etc */
  130. module_param(enable_suspend, bool, 0444);
  131. #define DIR_STRING(bAddress) (((bAddress) & USB_DIR_IN) ? "in" : "out")
  132. static char *type_string(u8 bmAttributes)
  133. {
  134. switch ((bmAttributes) & USB_ENDPOINT_XFERTYPE_MASK) {
  135. case USB_ENDPOINT_XFER_BULK: return "bulk";
  136. case USB_ENDPOINT_XFER_ISOC: return "iso";
  137. case USB_ENDPOINT_XFER_INT: return "intr";
  138. }
  139. return "control";
  140. }
  141. #include "net2280.h"
  142. #define valid_bit cpu_to_le32(BIT(VALID_BIT))
  143. #define dma_done_ie cpu_to_le32(BIT(DMA_DONE_INTERRUPT_ENABLE))
  144. static void ep_clear_seqnum(struct net2280_ep *ep);
  145. static void stop_activity(struct net2280 *dev,
  146. struct usb_gadget_driver *driver);
  147. static void ep0_start(struct net2280 *dev);
  148. /*-------------------------------------------------------------------------*/
  149. static inline void enable_pciirqenb(struct net2280_ep *ep)
  150. {
  151. u32 tmp = readl(&ep->dev->regs->pciirqenb0);
  152. if (ep->dev->quirks & PLX_LEGACY)
  153. tmp |= BIT(ep->num);
  154. else
  155. tmp |= BIT(ep_bit[ep->num]);
  156. writel(tmp, &ep->dev->regs->pciirqenb0);
  157. return;
  158. }
  159. static int
  160. net2280_enable(struct usb_ep *_ep, const struct usb_endpoint_descriptor *desc)
  161. {
  162. struct net2280 *dev;
  163. struct net2280_ep *ep;
  164. u32 max;
  165. u32 tmp = 0;
  166. u32 type;
  167. unsigned long flags;
  168. static const u32 ep_key[9] = { 1, 0, 1, 0, 1, 1, 0, 1, 0 };
  169. int ret = 0;
  170. ep = container_of(_ep, struct net2280_ep, ep);
  171. if (!_ep || !desc || ep->desc || _ep->name == ep0name ||
  172. desc->bDescriptorType != USB_DT_ENDPOINT) {
  173. pr_err("%s: failed at line=%d\n", __func__, __LINE__);
  174. return -EINVAL;
  175. }
  176. dev = ep->dev;
  177. if (!dev->driver || dev->gadget.speed == USB_SPEED_UNKNOWN) {
  178. ret = -ESHUTDOWN;
  179. goto print_err;
  180. }
  181. /* erratum 0119 workaround ties up an endpoint number */
  182. if ((desc->bEndpointAddress & 0x0f) == EP_DONTUSE) {
  183. ret = -EDOM;
  184. goto print_err;
  185. }
  186. if (dev->quirks & PLX_SUPERSPEED) {
  187. if ((desc->bEndpointAddress & 0x0f) >= 0x0c) {
  188. ret = -EDOM;
  189. goto print_err;
  190. }
  191. ep->is_in = !!usb_endpoint_dir_in(desc);
  192. if (dev->enhanced_mode && ep->is_in && ep_key[ep->num]) {
  193. ret = -EINVAL;
  194. goto print_err;
  195. }
  196. }
  197. /* sanity check ep-e/ep-f since their fifos are small */
  198. max = usb_endpoint_maxp(desc) & 0x1fff;
  199. if (ep->num > 4 && max > 64 && (dev->quirks & PLX_LEGACY)) {
  200. ret = -ERANGE;
  201. goto print_err;
  202. }
  203. spin_lock_irqsave(&dev->lock, flags);
  204. _ep->maxpacket = max & 0x7ff;
  205. ep->desc = desc;
  206. /* ep_reset() has already been called */
  207. ep->stopped = 0;
  208. ep->wedged = 0;
  209. ep->out_overflow = 0;
  210. /* set speed-dependent max packet; may kick in high bandwidth */
  211. set_max_speed(ep, max);
  212. /* set type, direction, address; reset fifo counters */
  213. writel(BIT(FIFO_FLUSH), &ep->regs->ep_stat);
  214. if ((dev->quirks & PLX_SUPERSPEED) && dev->enhanced_mode) {
  215. tmp = readl(&ep->cfg->ep_cfg);
  216. /* If USB ep number doesn't match hardware ep number */
  217. if ((tmp & 0xf) != usb_endpoint_num(desc)) {
  218. ret = -EINVAL;
  219. spin_unlock_irqrestore(&dev->lock, flags);
  220. goto print_err;
  221. }
  222. if (ep->is_in)
  223. tmp &= ~USB3380_EP_CFG_MASK_IN;
  224. else
  225. tmp &= ~USB3380_EP_CFG_MASK_OUT;
  226. }
  227. type = (desc->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK);
  228. if (type == USB_ENDPOINT_XFER_INT) {
  229. /* erratum 0105 workaround prevents hs NYET */
  230. if (dev->chiprev == 0100 &&
  231. dev->gadget.speed == USB_SPEED_HIGH &&
  232. !(desc->bEndpointAddress & USB_DIR_IN))
  233. writel(BIT(CLEAR_NAK_OUT_PACKETS_MODE),
  234. &ep->regs->ep_rsp);
  235. } else if (type == USB_ENDPOINT_XFER_BULK) {
  236. /* catch some particularly blatant driver bugs */
  237. if ((dev->gadget.speed == USB_SPEED_SUPER && max != 1024) ||
  238. (dev->gadget.speed == USB_SPEED_HIGH && max != 512) ||
  239. (dev->gadget.speed == USB_SPEED_FULL && max > 64)) {
  240. spin_unlock_irqrestore(&dev->lock, flags);
  241. ret = -ERANGE;
  242. goto print_err;
  243. }
  244. }
  245. ep->is_iso = (type == USB_ENDPOINT_XFER_ISOC);
  246. /* Enable this endpoint */
  247. if (dev->quirks & PLX_LEGACY) {
  248. tmp |= type << ENDPOINT_TYPE;
  249. tmp |= desc->bEndpointAddress;
  250. /* default full fifo lines */
  251. tmp |= (4 << ENDPOINT_BYTE_COUNT);
  252. tmp |= BIT(ENDPOINT_ENABLE);
  253. ep->is_in = (tmp & USB_DIR_IN) != 0;
  254. } else {
  255. /* In Legacy mode, only OUT endpoints are used */
  256. if (dev->enhanced_mode && ep->is_in) {
  257. tmp |= type << IN_ENDPOINT_TYPE;
  258. tmp |= BIT(IN_ENDPOINT_ENABLE);
  259. } else {
  260. tmp |= type << OUT_ENDPOINT_TYPE;
  261. tmp |= BIT(OUT_ENDPOINT_ENABLE);
  262. tmp |= (ep->is_in << ENDPOINT_DIRECTION);
  263. }
  264. tmp |= (4 << ENDPOINT_BYTE_COUNT);
  265. if (!dev->enhanced_mode)
  266. tmp |= usb_endpoint_num(desc);
  267. tmp |= (ep->ep.maxburst << MAX_BURST_SIZE);
  268. }
  269. /* Make sure all the registers are written before ep_rsp*/
  270. wmb();
  271. /* for OUT transfers, block the rx fifo until a read is posted */
  272. if (!ep->is_in)
  273. writel(BIT(SET_NAK_OUT_PACKETS), &ep->regs->ep_rsp);
  274. else if (!(dev->quirks & PLX_2280)) {
  275. /* Added for 2282, Don't use nak packets on an in endpoint,
  276. * this was ignored on 2280
  277. */
  278. writel(BIT(CLEAR_NAK_OUT_PACKETS) |
  279. BIT(CLEAR_NAK_OUT_PACKETS_MODE), &ep->regs->ep_rsp);
  280. }
  281. if (dev->quirks & PLX_SUPERSPEED)
  282. ep_clear_seqnum(ep);
  283. writel(tmp, &ep->cfg->ep_cfg);
  284. /* enable irqs */
  285. if (!ep->dma) { /* pio, per-packet */
  286. enable_pciirqenb(ep);
  287. tmp = BIT(DATA_PACKET_RECEIVED_INTERRUPT_ENABLE) |
  288. BIT(DATA_PACKET_TRANSMITTED_INTERRUPT_ENABLE);
  289. if (dev->quirks & PLX_2280)
  290. tmp |= readl(&ep->regs->ep_irqenb);
  291. writel(tmp, &ep->regs->ep_irqenb);
  292. } else { /* dma, per-request */
  293. tmp = BIT((8 + ep->num)); /* completion */
  294. tmp |= readl(&dev->regs->pciirqenb1);
  295. writel(tmp, &dev->regs->pciirqenb1);
  296. /* for short OUT transfers, dma completions can't
  297. * advance the queue; do it pio-style, by hand.
  298. * NOTE erratum 0112 workaround #2
  299. */
  300. if ((desc->bEndpointAddress & USB_DIR_IN) == 0) {
  301. tmp = BIT(SHORT_PACKET_TRANSFERRED_INTERRUPT_ENABLE);
  302. writel(tmp, &ep->regs->ep_irqenb);
  303. enable_pciirqenb(ep);
  304. }
  305. }
  306. tmp = desc->bEndpointAddress;
  307. ep_dbg(dev, "enabled %s (ep%d%s-%s) %s max %04x\n",
  308. _ep->name, tmp & 0x0f, DIR_STRING(tmp),
  309. type_string(desc->bmAttributes),
  310. ep->dma ? "dma" : "pio", max);
  311. /* pci writes may still be posted */
  312. spin_unlock_irqrestore(&dev->lock, flags);
  313. return ret;
  314. print_err:
  315. dev_err(&ep->dev->pdev->dev, "%s: error=%d\n", __func__, ret);
  316. return ret;
  317. }
  318. static int handshake(u32 __iomem *ptr, u32 mask, u32 done, int usec)
  319. {
  320. u32 result;
  321. do {
  322. result = readl(ptr);
  323. if (result == ~(u32)0) /* "device unplugged" */
  324. return -ENODEV;
  325. result &= mask;
  326. if (result == done)
  327. return 0;
  328. udelay(1);
  329. usec--;
  330. } while (usec > 0);
  331. return -ETIMEDOUT;
  332. }
  333. static const struct usb_ep_ops net2280_ep_ops;
  334. static void ep_reset_228x(struct net2280_regs __iomem *regs,
  335. struct net2280_ep *ep)
  336. {
  337. u32 tmp;
  338. ep->desc = NULL;
  339. INIT_LIST_HEAD(&ep->queue);
  340. usb_ep_set_maxpacket_limit(&ep->ep, ~0);
  341. ep->ep.ops = &net2280_ep_ops;
  342. /* disable the dma, irqs, endpoint... */
  343. if (ep->dma) {
  344. writel(0, &ep->dma->dmactl);
  345. writel(BIT(DMA_SCATTER_GATHER_DONE_INTERRUPT) |
  346. BIT(DMA_TRANSACTION_DONE_INTERRUPT) |
  347. BIT(DMA_ABORT),
  348. &ep->dma->dmastat);
  349. tmp = readl(&regs->pciirqenb0);
  350. tmp &= ~BIT(ep->num);
  351. writel(tmp, &regs->pciirqenb0);
  352. } else {
  353. tmp = readl(&regs->pciirqenb1);
  354. tmp &= ~BIT((8 + ep->num)); /* completion */
  355. writel(tmp, &regs->pciirqenb1);
  356. }
  357. writel(0, &ep->regs->ep_irqenb);
  358. /* init to our chosen defaults, notably so that we NAK OUT
  359. * packets until the driver queues a read (+note erratum 0112)
  360. */
  361. if (!ep->is_in || (ep->dev->quirks & PLX_2280)) {
  362. tmp = BIT(SET_NAK_OUT_PACKETS_MODE) |
  363. BIT(SET_NAK_OUT_PACKETS) |
  364. BIT(CLEAR_EP_HIDE_STATUS_PHASE) |
  365. BIT(CLEAR_INTERRUPT_MODE);
  366. } else {
  367. /* added for 2282 */
  368. tmp = BIT(CLEAR_NAK_OUT_PACKETS_MODE) |
  369. BIT(CLEAR_NAK_OUT_PACKETS) |
  370. BIT(CLEAR_EP_HIDE_STATUS_PHASE) |
  371. BIT(CLEAR_INTERRUPT_MODE);
  372. }
  373. if (ep->num != 0) {
  374. tmp |= BIT(CLEAR_ENDPOINT_TOGGLE) |
  375. BIT(CLEAR_ENDPOINT_HALT);
  376. }
  377. writel(tmp, &ep->regs->ep_rsp);
  378. /* scrub most status bits, and flush any fifo state */
  379. if (ep->dev->quirks & PLX_2280)
  380. tmp = BIT(FIFO_OVERFLOW) |
  381. BIT(FIFO_UNDERFLOW);
  382. else
  383. tmp = 0;
  384. writel(tmp | BIT(TIMEOUT) |
  385. BIT(USB_STALL_SENT) |
  386. BIT(USB_IN_NAK_SENT) |
  387. BIT(USB_IN_ACK_RCVD) |
  388. BIT(USB_OUT_PING_NAK_SENT) |
  389. BIT(USB_OUT_ACK_SENT) |
  390. BIT(FIFO_FLUSH) |
  391. BIT(SHORT_PACKET_OUT_DONE_INTERRUPT) |
  392. BIT(SHORT_PACKET_TRANSFERRED_INTERRUPT) |
  393. BIT(DATA_PACKET_RECEIVED_INTERRUPT) |
  394. BIT(DATA_PACKET_TRANSMITTED_INTERRUPT) |
  395. BIT(DATA_OUT_PING_TOKEN_INTERRUPT) |
  396. BIT(DATA_IN_TOKEN_INTERRUPT),
  397. &ep->regs->ep_stat);
  398. /* fifo size is handled separately */
  399. }
  400. static void ep_reset_338x(struct net2280_regs __iomem *regs,
  401. struct net2280_ep *ep)
  402. {
  403. u32 tmp, dmastat;
  404. ep->desc = NULL;
  405. INIT_LIST_HEAD(&ep->queue);
  406. usb_ep_set_maxpacket_limit(&ep->ep, ~0);
  407. ep->ep.ops = &net2280_ep_ops;
  408. /* disable the dma, irqs, endpoint... */
  409. if (ep->dma) {
  410. writel(0, &ep->dma->dmactl);
  411. writel(BIT(DMA_ABORT_DONE_INTERRUPT) |
  412. BIT(DMA_PAUSE_DONE_INTERRUPT) |
  413. BIT(DMA_SCATTER_GATHER_DONE_INTERRUPT) |
  414. BIT(DMA_TRANSACTION_DONE_INTERRUPT),
  415. /* | BIT(DMA_ABORT), */
  416. &ep->dma->dmastat);
  417. dmastat = readl(&ep->dma->dmastat);
  418. if (dmastat == 0x5002) {
  419. ep_warn(ep->dev, "The dmastat return = %x!!\n",
  420. dmastat);
  421. writel(0x5a, &ep->dma->dmastat);
  422. }
  423. tmp = readl(&regs->pciirqenb0);
  424. tmp &= ~BIT(ep_bit[ep->num]);
  425. writel(tmp, &regs->pciirqenb0);
  426. } else {
  427. if (ep->num < 5) {
  428. tmp = readl(&regs->pciirqenb1);
  429. tmp &= ~BIT((8 + ep->num)); /* completion */
  430. writel(tmp, &regs->pciirqenb1);
  431. }
  432. }
  433. writel(0, &ep->regs->ep_irqenb);
  434. writel(BIT(SHORT_PACKET_OUT_DONE_INTERRUPT) |
  435. BIT(SHORT_PACKET_TRANSFERRED_INTERRUPT) |
  436. BIT(FIFO_OVERFLOW) |
  437. BIT(DATA_PACKET_RECEIVED_INTERRUPT) |
  438. BIT(DATA_PACKET_TRANSMITTED_INTERRUPT) |
  439. BIT(DATA_OUT_PING_TOKEN_INTERRUPT) |
  440. BIT(DATA_IN_TOKEN_INTERRUPT), &ep->regs->ep_stat);
  441. tmp = readl(&ep->cfg->ep_cfg);
  442. if (ep->is_in)
  443. tmp &= ~USB3380_EP_CFG_MASK_IN;
  444. else
  445. tmp &= ~USB3380_EP_CFG_MASK_OUT;
  446. writel(tmp, &ep->cfg->ep_cfg);
  447. }
  448. static void nuke(struct net2280_ep *);
  449. static int net2280_disable(struct usb_ep *_ep)
  450. {
  451. struct net2280_ep *ep;
  452. unsigned long flags;
  453. ep = container_of(_ep, struct net2280_ep, ep);
  454. if (!_ep || !ep->desc || _ep->name == ep0name) {
  455. pr_err("%s: Invalid ep=%p or ep->desc\n", __func__, _ep);
  456. return -EINVAL;
  457. }
  458. spin_lock_irqsave(&ep->dev->lock, flags);
  459. nuke(ep);
  460. if (ep->dev->quirks & PLX_SUPERSPEED)
  461. ep_reset_338x(ep->dev->regs, ep);
  462. else
  463. ep_reset_228x(ep->dev->regs, ep);
  464. ep_vdbg(ep->dev, "disabled %s %s\n",
  465. ep->dma ? "dma" : "pio", _ep->name);
  466. /* synch memory views with the device */
  467. (void)readl(&ep->cfg->ep_cfg);
  468. if (!ep->dma && ep->num >= 1 && ep->num <= 4)
  469. ep->dma = &ep->dev->dma[ep->num - 1];
  470. spin_unlock_irqrestore(&ep->dev->lock, flags);
  471. return 0;
  472. }
  473. /*-------------------------------------------------------------------------*/
  474. static struct usb_request
  475. *net2280_alloc_request(struct usb_ep *_ep, gfp_t gfp_flags)
  476. {
  477. struct net2280_ep *ep;
  478. struct net2280_request *req;
  479. if (!_ep) {
  480. pr_err("%s: Invalid ep\n", __func__);
  481. return NULL;
  482. }
  483. ep = container_of(_ep, struct net2280_ep, ep);
  484. req = kzalloc(sizeof(*req), gfp_flags);
  485. if (!req)
  486. return NULL;
  487. INIT_LIST_HEAD(&req->queue);
  488. /* this dma descriptor may be swapped with the previous dummy */
  489. if (ep->dma) {
  490. struct net2280_dma *td;
  491. td = pci_pool_alloc(ep->dev->requests, gfp_flags,
  492. &req->td_dma);
  493. if (!td) {
  494. kfree(req);
  495. return NULL;
  496. }
  497. td->dmacount = 0; /* not VALID */
  498. td->dmadesc = td->dmaaddr;
  499. req->td = td;
  500. }
  501. return &req->req;
  502. }
  503. static void net2280_free_request(struct usb_ep *_ep, struct usb_request *_req)
  504. {
  505. struct net2280_ep *ep;
  506. struct net2280_request *req;
  507. ep = container_of(_ep, struct net2280_ep, ep);
  508. if (!_ep || !_req) {
  509. dev_err(&ep->dev->pdev->dev, "%s: Inavlid ep=%p or req=%p\n",
  510. __func__, _ep, _req);
  511. return;
  512. }
  513. req = container_of(_req, struct net2280_request, req);
  514. WARN_ON(!list_empty(&req->queue));
  515. if (req->td)
  516. pci_pool_free(ep->dev->requests, req->td, req->td_dma);
  517. kfree(req);
  518. }
  519. /*-------------------------------------------------------------------------*/
  520. /* load a packet into the fifo we use for usb IN transfers.
  521. * works for all endpoints.
  522. *
  523. * NOTE: pio with ep-a..ep-d could stuff multiple packets into the fifo
  524. * at a time, but this code is simpler because it knows it only writes
  525. * one packet. ep-a..ep-d should use dma instead.
  526. */
  527. static void write_fifo(struct net2280_ep *ep, struct usb_request *req)
  528. {
  529. struct net2280_ep_regs __iomem *regs = ep->regs;
  530. u8 *buf;
  531. u32 tmp;
  532. unsigned count, total;
  533. /* INVARIANT: fifo is currently empty. (testable) */
  534. if (req) {
  535. buf = req->buf + req->actual;
  536. prefetch(buf);
  537. total = req->length - req->actual;
  538. } else {
  539. total = 0;
  540. buf = NULL;
  541. }
  542. /* write just one packet at a time */
  543. count = ep->ep.maxpacket;
  544. if (count > total) /* min() cannot be used on a bitfield */
  545. count = total;
  546. ep_vdbg(ep->dev, "write %s fifo (IN) %d bytes%s req %p\n",
  547. ep->ep.name, count,
  548. (count != ep->ep.maxpacket) ? " (short)" : "",
  549. req);
  550. while (count >= 4) {
  551. /* NOTE be careful if you try to align these. fifo lines
  552. * should normally be full (4 bytes) and successive partial
  553. * lines are ok only in certain cases.
  554. */
  555. tmp = get_unaligned((u32 *)buf);
  556. cpu_to_le32s(&tmp);
  557. writel(tmp, &regs->ep_data);
  558. buf += 4;
  559. count -= 4;
  560. }
  561. /* last fifo entry is "short" unless we wrote a full packet.
  562. * also explicitly validate last word in (periodic) transfers
  563. * when maxpacket is not a multiple of 4 bytes.
  564. */
  565. if (count || total < ep->ep.maxpacket) {
  566. tmp = count ? get_unaligned((u32 *)buf) : count;
  567. cpu_to_le32s(&tmp);
  568. set_fifo_bytecount(ep, count & 0x03);
  569. writel(tmp, &regs->ep_data);
  570. }
  571. /* pci writes may still be posted */
  572. }
  573. /* work around erratum 0106: PCI and USB race over the OUT fifo.
  574. * caller guarantees chiprev 0100, out endpoint is NAKing, and
  575. * there's no real data in the fifo.
  576. *
  577. * NOTE: also used in cases where that erratum doesn't apply:
  578. * where the host wrote "too much" data to us.
  579. */
  580. static void out_flush(struct net2280_ep *ep)
  581. {
  582. u32 __iomem *statp;
  583. u32 tmp;
  584. statp = &ep->regs->ep_stat;
  585. tmp = readl(statp);
  586. if (tmp & BIT(NAK_OUT_PACKETS)) {
  587. ep_dbg(ep->dev, "%s %s %08x !NAK\n",
  588. ep->ep.name, __func__, tmp);
  589. writel(BIT(SET_NAK_OUT_PACKETS), &ep->regs->ep_rsp);
  590. }
  591. writel(BIT(DATA_OUT_PING_TOKEN_INTERRUPT) |
  592. BIT(DATA_PACKET_RECEIVED_INTERRUPT),
  593. statp);
  594. writel(BIT(FIFO_FLUSH), statp);
  595. /* Make sure that stap is written */
  596. mb();
  597. tmp = readl(statp);
  598. if (tmp & BIT(DATA_OUT_PING_TOKEN_INTERRUPT) &&
  599. /* high speed did bulk NYET; fifo isn't filling */
  600. ep->dev->gadget.speed == USB_SPEED_FULL) {
  601. unsigned usec;
  602. usec = 50; /* 64 byte bulk/interrupt */
  603. handshake(statp, BIT(USB_OUT_PING_NAK_SENT),
  604. BIT(USB_OUT_PING_NAK_SENT), usec);
  605. /* NAK done; now CLEAR_NAK_OUT_PACKETS is safe */
  606. }
  607. }
  608. /* unload packet(s) from the fifo we use for usb OUT transfers.
  609. * returns true iff the request completed, because of short packet
  610. * or the request buffer having filled with full packets.
  611. *
  612. * for ep-a..ep-d this will read multiple packets out when they
  613. * have been accepted.
  614. */
  615. static int read_fifo(struct net2280_ep *ep, struct net2280_request *req)
  616. {
  617. struct net2280_ep_regs __iomem *regs = ep->regs;
  618. u8 *buf = req->req.buf + req->req.actual;
  619. unsigned count, tmp, is_short;
  620. unsigned cleanup = 0, prevent = 0;
  621. /* erratum 0106 ... packets coming in during fifo reads might
  622. * be incompletely rejected. not all cases have workarounds.
  623. */
  624. if (ep->dev->chiprev == 0x0100 &&
  625. ep->dev->gadget.speed == USB_SPEED_FULL) {
  626. udelay(1);
  627. tmp = readl(&ep->regs->ep_stat);
  628. if ((tmp & BIT(NAK_OUT_PACKETS)))
  629. cleanup = 1;
  630. else if ((tmp & BIT(FIFO_FULL))) {
  631. start_out_naking(ep);
  632. prevent = 1;
  633. }
  634. /* else: hope we don't see the problem */
  635. }
  636. /* never overflow the rx buffer. the fifo reads packets until
  637. * it sees a short one; we might not be ready for them all.
  638. */
  639. prefetchw(buf);
  640. count = readl(&regs->ep_avail);
  641. if (unlikely(count == 0)) {
  642. udelay(1);
  643. tmp = readl(&ep->regs->ep_stat);
  644. count = readl(&regs->ep_avail);
  645. /* handled that data already? */
  646. if (count == 0 && (tmp & BIT(NAK_OUT_PACKETS)) == 0)
  647. return 0;
  648. }
  649. tmp = req->req.length - req->req.actual;
  650. if (count > tmp) {
  651. /* as with DMA, data overflow gets flushed */
  652. if ((tmp % ep->ep.maxpacket) != 0) {
  653. ep_err(ep->dev,
  654. "%s out fifo %d bytes, expected %d\n",
  655. ep->ep.name, count, tmp);
  656. req->req.status = -EOVERFLOW;
  657. cleanup = 1;
  658. /* NAK_OUT_PACKETS will be set, so flushing is safe;
  659. * the next read will start with the next packet
  660. */
  661. } /* else it's a ZLP, no worries */
  662. count = tmp;
  663. }
  664. req->req.actual += count;
  665. is_short = (count == 0) || ((count % ep->ep.maxpacket) != 0);
  666. ep_vdbg(ep->dev, "read %s fifo (OUT) %d bytes%s%s%s req %p %d/%d\n",
  667. ep->ep.name, count, is_short ? " (short)" : "",
  668. cleanup ? " flush" : "", prevent ? " nak" : "",
  669. req, req->req.actual, req->req.length);
  670. while (count >= 4) {
  671. tmp = readl(&regs->ep_data);
  672. cpu_to_le32s(&tmp);
  673. put_unaligned(tmp, (u32 *)buf);
  674. buf += 4;
  675. count -= 4;
  676. }
  677. if (count) {
  678. tmp = readl(&regs->ep_data);
  679. /* LE conversion is implicit here: */
  680. do {
  681. *buf++ = (u8) tmp;
  682. tmp >>= 8;
  683. } while (--count);
  684. }
  685. if (cleanup)
  686. out_flush(ep);
  687. if (prevent) {
  688. writel(BIT(CLEAR_NAK_OUT_PACKETS), &ep->regs->ep_rsp);
  689. (void) readl(&ep->regs->ep_rsp);
  690. }
  691. return is_short || ((req->req.actual == req->req.length) &&
  692. !req->req.zero);
  693. }
  694. /* fill out dma descriptor to match a given request */
  695. static void fill_dma_desc(struct net2280_ep *ep,
  696. struct net2280_request *req, int valid)
  697. {
  698. struct net2280_dma *td = req->td;
  699. u32 dmacount = req->req.length;
  700. /* don't let DMA continue after a short OUT packet,
  701. * so overruns can't affect the next transfer.
  702. * in case of overruns on max-size packets, we can't
  703. * stop the fifo from filling but we can flush it.
  704. */
  705. if (ep->is_in)
  706. dmacount |= BIT(DMA_DIRECTION);
  707. if ((!ep->is_in && (dmacount % ep->ep.maxpacket) != 0) ||
  708. !(ep->dev->quirks & PLX_2280))
  709. dmacount |= BIT(END_OF_CHAIN);
  710. req->valid = valid;
  711. if (valid)
  712. dmacount |= BIT(VALID_BIT);
  713. dmacount |= BIT(DMA_DONE_INTERRUPT_ENABLE);
  714. /* td->dmadesc = previously set by caller */
  715. td->dmaaddr = cpu_to_le32 (req->req.dma);
  716. /* 2280 may be polling VALID_BIT through ep->dma->dmadesc */
  717. wmb();
  718. td->dmacount = cpu_to_le32(dmacount);
  719. }
  720. static const u32 dmactl_default =
  721. BIT(DMA_SCATTER_GATHER_DONE_INTERRUPT) |
  722. BIT(DMA_CLEAR_COUNT_ENABLE) |
  723. /* erratum 0116 workaround part 1 (use POLLING) */
  724. (POLL_100_USEC << DESCRIPTOR_POLLING_RATE) |
  725. BIT(DMA_VALID_BIT_POLLING_ENABLE) |
  726. BIT(DMA_VALID_BIT_ENABLE) |
  727. BIT(DMA_SCATTER_GATHER_ENABLE) |
  728. /* erratum 0116 workaround part 2 (no AUTOSTART) */
  729. BIT(DMA_ENABLE);
  730. static inline void spin_stop_dma(struct net2280_dma_regs __iomem *dma)
  731. {
  732. handshake(&dma->dmactl, BIT(DMA_ENABLE), 0, 50);
  733. }
  734. static inline void stop_dma(struct net2280_dma_regs __iomem *dma)
  735. {
  736. writel(readl(&dma->dmactl) & ~BIT(DMA_ENABLE), &dma->dmactl);
  737. spin_stop_dma(dma);
  738. }
  739. static void start_queue(struct net2280_ep *ep, u32 dmactl, u32 td_dma)
  740. {
  741. struct net2280_dma_regs __iomem *dma = ep->dma;
  742. unsigned int tmp = BIT(VALID_BIT) | (ep->is_in << DMA_DIRECTION);
  743. if (!(ep->dev->quirks & PLX_2280))
  744. tmp |= BIT(END_OF_CHAIN);
  745. writel(tmp, &dma->dmacount);
  746. writel(readl(&dma->dmastat), &dma->dmastat);
  747. writel(td_dma, &dma->dmadesc);
  748. if (ep->dev->quirks & PLX_SUPERSPEED)
  749. dmactl |= BIT(DMA_REQUEST_OUTSTANDING);
  750. writel(dmactl, &dma->dmactl);
  751. /* erratum 0116 workaround part 3: pci arbiter away from net2280 */
  752. (void) readl(&ep->dev->pci->pcimstctl);
  753. writel(BIT(DMA_START), &dma->dmastat);
  754. if (!ep->is_in)
  755. stop_out_naking(ep);
  756. }
  757. static void start_dma(struct net2280_ep *ep, struct net2280_request *req)
  758. {
  759. u32 tmp;
  760. struct net2280_dma_regs __iomem *dma = ep->dma;
  761. /* FIXME can't use DMA for ZLPs */
  762. /* on this path we "know" there's no dma active (yet) */
  763. WARN_ON(readl(&dma->dmactl) & BIT(DMA_ENABLE));
  764. writel(0, &ep->dma->dmactl);
  765. /* previous OUT packet might have been short */
  766. if (!ep->is_in && (readl(&ep->regs->ep_stat) &
  767. BIT(NAK_OUT_PACKETS))) {
  768. writel(BIT(SHORT_PACKET_TRANSFERRED_INTERRUPT),
  769. &ep->regs->ep_stat);
  770. tmp = readl(&ep->regs->ep_avail);
  771. if (tmp) {
  772. writel(readl(&dma->dmastat), &dma->dmastat);
  773. /* transfer all/some fifo data */
  774. writel(req->req.dma, &dma->dmaaddr);
  775. tmp = min(tmp, req->req.length);
  776. /* dma irq, faking scatterlist status */
  777. req->td->dmacount = cpu_to_le32(req->req.length - tmp);
  778. writel(BIT(DMA_DONE_INTERRUPT_ENABLE) | tmp,
  779. &dma->dmacount);
  780. req->td->dmadesc = 0;
  781. req->valid = 1;
  782. writel(BIT(DMA_ENABLE), &dma->dmactl);
  783. writel(BIT(DMA_START), &dma->dmastat);
  784. return;
  785. }
  786. }
  787. tmp = dmactl_default;
  788. /* force packet boundaries between dma requests, but prevent the
  789. * controller from automagically writing a last "short" packet
  790. * (zero length) unless the driver explicitly said to do that.
  791. */
  792. if (ep->is_in) {
  793. if (likely((req->req.length % ep->ep.maxpacket) ||
  794. req->req.zero)){
  795. tmp |= BIT(DMA_FIFO_VALIDATE);
  796. ep->in_fifo_validate = 1;
  797. } else
  798. ep->in_fifo_validate = 0;
  799. }
  800. /* init req->td, pointing to the current dummy */
  801. req->td->dmadesc = cpu_to_le32 (ep->td_dma);
  802. fill_dma_desc(ep, req, 1);
  803. req->td->dmacount |= cpu_to_le32(BIT(END_OF_CHAIN));
  804. start_queue(ep, tmp, req->td_dma);
  805. }
  806. static inline void
  807. queue_dma(struct net2280_ep *ep, struct net2280_request *req, int valid)
  808. {
  809. struct net2280_dma *end;
  810. dma_addr_t tmp;
  811. /* swap new dummy for old, link; fill and maybe activate */
  812. end = ep->dummy;
  813. ep->dummy = req->td;
  814. req->td = end;
  815. tmp = ep->td_dma;
  816. ep->td_dma = req->td_dma;
  817. req->td_dma = tmp;
  818. end->dmadesc = cpu_to_le32 (ep->td_dma);
  819. fill_dma_desc(ep, req, valid);
  820. }
  821. static void
  822. done(struct net2280_ep *ep, struct net2280_request *req, int status)
  823. {
  824. struct net2280 *dev;
  825. unsigned stopped = ep->stopped;
  826. list_del_init(&req->queue);
  827. if (req->req.status == -EINPROGRESS)
  828. req->req.status = status;
  829. else
  830. status = req->req.status;
  831. dev = ep->dev;
  832. if (ep->dma)
  833. usb_gadget_unmap_request(&dev->gadget, &req->req, ep->is_in);
  834. if (status && status != -ESHUTDOWN)
  835. ep_vdbg(dev, "complete %s req %p stat %d len %u/%u\n",
  836. ep->ep.name, &req->req, status,
  837. req->req.actual, req->req.length);
  838. /* don't modify queue heads during completion callback */
  839. ep->stopped = 1;
  840. spin_unlock(&dev->lock);
  841. usb_gadget_giveback_request(&ep->ep, &req->req);
  842. spin_lock(&dev->lock);
  843. ep->stopped = stopped;
  844. }
  845. /*-------------------------------------------------------------------------*/
  846. static int
  847. net2280_queue(struct usb_ep *_ep, struct usb_request *_req, gfp_t gfp_flags)
  848. {
  849. struct net2280_request *req;
  850. struct net2280_ep *ep;
  851. struct net2280 *dev;
  852. unsigned long flags;
  853. int ret = 0;
  854. /* we always require a cpu-view buffer, so that we can
  855. * always use pio (as fallback or whatever).
  856. */
  857. ep = container_of(_ep, struct net2280_ep, ep);
  858. if (!_ep || (!ep->desc && ep->num != 0)) {
  859. pr_err("%s: Invalid ep=%p or ep->desc\n", __func__, _ep);
  860. return -EINVAL;
  861. }
  862. req = container_of(_req, struct net2280_request, req);
  863. if (!_req || !_req->complete || !_req->buf ||
  864. !list_empty(&req->queue)) {
  865. ret = -EINVAL;
  866. goto print_err;
  867. }
  868. if (_req->length > (~0 & DMA_BYTE_COUNT_MASK)) {
  869. ret = -EDOM;
  870. goto print_err;
  871. }
  872. dev = ep->dev;
  873. if (!dev->driver || dev->gadget.speed == USB_SPEED_UNKNOWN) {
  874. ret = -ESHUTDOWN;
  875. goto print_err;
  876. }
  877. /* FIXME implement PIO fallback for ZLPs with DMA */
  878. if (ep->dma && _req->length == 0) {
  879. ret = -EOPNOTSUPP;
  880. goto print_err;
  881. }
  882. /* set up dma mapping in case the caller didn't */
  883. if (ep->dma) {
  884. ret = usb_gadget_map_request(&dev->gadget, _req,
  885. ep->is_in);
  886. if (ret)
  887. goto print_err;
  888. }
  889. ep_vdbg(dev, "%s queue req %p, len %d buf %p\n",
  890. _ep->name, _req, _req->length, _req->buf);
  891. spin_lock_irqsave(&dev->lock, flags);
  892. _req->status = -EINPROGRESS;
  893. _req->actual = 0;
  894. /* kickstart this i/o queue? */
  895. if (list_empty(&ep->queue) && !ep->stopped &&
  896. !((dev->quirks & PLX_SUPERSPEED) && ep->dma &&
  897. (readl(&ep->regs->ep_rsp) & BIT(CLEAR_ENDPOINT_HALT)))) {
  898. /* use DMA if the endpoint supports it, else pio */
  899. if (ep->dma)
  900. start_dma(ep, req);
  901. else {
  902. /* maybe there's no control data, just status ack */
  903. if (ep->num == 0 && _req->length == 0) {
  904. allow_status(ep);
  905. done(ep, req, 0);
  906. ep_vdbg(dev, "%s status ack\n", ep->ep.name);
  907. goto done;
  908. }
  909. /* PIO ... stuff the fifo, or unblock it. */
  910. if (ep->is_in)
  911. write_fifo(ep, _req);
  912. else if (list_empty(&ep->queue)) {
  913. u32 s;
  914. /* OUT FIFO might have packet(s) buffered */
  915. s = readl(&ep->regs->ep_stat);
  916. if ((s & BIT(FIFO_EMPTY)) == 0) {
  917. /* note: _req->short_not_ok is
  918. * ignored here since PIO _always_
  919. * stops queue advance here, and
  920. * _req->status doesn't change for
  921. * short reads (only _req->actual)
  922. */
  923. if (read_fifo(ep, req) &&
  924. ep->num == 0) {
  925. done(ep, req, 0);
  926. allow_status(ep);
  927. /* don't queue it */
  928. req = NULL;
  929. } else if (read_fifo(ep, req) &&
  930. ep->num != 0) {
  931. done(ep, req, 0);
  932. req = NULL;
  933. } else
  934. s = readl(&ep->regs->ep_stat);
  935. }
  936. /* don't NAK, let the fifo fill */
  937. if (req && (s & BIT(NAK_OUT_PACKETS)))
  938. writel(BIT(CLEAR_NAK_OUT_PACKETS),
  939. &ep->regs->ep_rsp);
  940. }
  941. }
  942. } else if (ep->dma) {
  943. int valid = 1;
  944. if (ep->is_in) {
  945. int expect;
  946. /* preventing magic zlps is per-engine state, not
  947. * per-transfer; irq logic must recover hiccups.
  948. */
  949. expect = likely(req->req.zero ||
  950. (req->req.length % ep->ep.maxpacket));
  951. if (expect != ep->in_fifo_validate)
  952. valid = 0;
  953. }
  954. queue_dma(ep, req, valid);
  955. } /* else the irq handler advances the queue. */
  956. ep->responded = 1;
  957. if (req)
  958. list_add_tail(&req->queue, &ep->queue);
  959. done:
  960. spin_unlock_irqrestore(&dev->lock, flags);
  961. /* pci writes may still be posted */
  962. return ret;
  963. print_err:
  964. dev_err(&ep->dev->pdev->dev, "%s: error=%d\n", __func__, ret);
  965. return ret;
  966. }
  967. static inline void
  968. dma_done(struct net2280_ep *ep, struct net2280_request *req, u32 dmacount,
  969. int status)
  970. {
  971. req->req.actual = req->req.length - (DMA_BYTE_COUNT_MASK & dmacount);
  972. done(ep, req, status);
  973. }
  974. static void scan_dma_completions(struct net2280_ep *ep)
  975. {
  976. /* only look at descriptors that were "naturally" retired,
  977. * so fifo and list head state won't matter
  978. */
  979. while (!list_empty(&ep->queue)) {
  980. struct net2280_request *req;
  981. u32 tmp;
  982. req = list_entry(ep->queue.next,
  983. struct net2280_request, queue);
  984. if (!req->valid)
  985. break;
  986. rmb();
  987. tmp = le32_to_cpup(&req->td->dmacount);
  988. if ((tmp & BIT(VALID_BIT)) != 0)
  989. break;
  990. /* SHORT_PACKET_TRANSFERRED_INTERRUPT handles "usb-short"
  991. * cases where DMA must be aborted; this code handles
  992. * all non-abort DMA completions.
  993. */
  994. if (unlikely(req->td->dmadesc == 0)) {
  995. /* paranoia */
  996. tmp = readl(&ep->dma->dmacount);
  997. if (tmp & DMA_BYTE_COUNT_MASK)
  998. break;
  999. /* single transfer mode */
  1000. dma_done(ep, req, tmp, 0);
  1001. break;
  1002. } else if (!ep->is_in &&
  1003. (req->req.length % ep->ep.maxpacket) &&
  1004. !(ep->dev->quirks & PLX_SUPERSPEED)) {
  1005. tmp = readl(&ep->regs->ep_stat);
  1006. /* AVOID TROUBLE HERE by not issuing short reads from
  1007. * your gadget driver. That helps avoids errata 0121,
  1008. * 0122, and 0124; not all cases trigger the warning.
  1009. */
  1010. if ((tmp & BIT(NAK_OUT_PACKETS)) == 0) {
  1011. ep_warn(ep->dev, "%s lost packet sync!\n",
  1012. ep->ep.name);
  1013. req->req.status = -EOVERFLOW;
  1014. } else {
  1015. tmp = readl(&ep->regs->ep_avail);
  1016. if (tmp) {
  1017. /* fifo gets flushed later */
  1018. ep->out_overflow = 1;
  1019. ep_dbg(ep->dev,
  1020. "%s dma, discard %d len %d\n",
  1021. ep->ep.name, tmp,
  1022. req->req.length);
  1023. req->req.status = -EOVERFLOW;
  1024. }
  1025. }
  1026. }
  1027. dma_done(ep, req, tmp, 0);
  1028. }
  1029. }
  1030. static void restart_dma(struct net2280_ep *ep)
  1031. {
  1032. struct net2280_request *req;
  1033. if (ep->stopped)
  1034. return;
  1035. req = list_entry(ep->queue.next, struct net2280_request, queue);
  1036. start_dma(ep, req);
  1037. }
  1038. static void abort_dma(struct net2280_ep *ep)
  1039. {
  1040. /* abort the current transfer */
  1041. if (likely(!list_empty(&ep->queue))) {
  1042. /* FIXME work around errata 0121, 0122, 0124 */
  1043. writel(BIT(DMA_ABORT), &ep->dma->dmastat);
  1044. spin_stop_dma(ep->dma);
  1045. } else
  1046. stop_dma(ep->dma);
  1047. scan_dma_completions(ep);
  1048. }
  1049. /* dequeue ALL requests */
  1050. static void nuke(struct net2280_ep *ep)
  1051. {
  1052. struct net2280_request *req;
  1053. /* called with spinlock held */
  1054. ep->stopped = 1;
  1055. if (ep->dma)
  1056. abort_dma(ep);
  1057. while (!list_empty(&ep->queue)) {
  1058. req = list_entry(ep->queue.next,
  1059. struct net2280_request,
  1060. queue);
  1061. done(ep, req, -ESHUTDOWN);
  1062. }
  1063. }
  1064. /* dequeue JUST ONE request */
  1065. static int net2280_dequeue(struct usb_ep *_ep, struct usb_request *_req)
  1066. {
  1067. struct net2280_ep *ep;
  1068. struct net2280_request *req;
  1069. unsigned long flags;
  1070. u32 dmactl;
  1071. int stopped;
  1072. ep = container_of(_ep, struct net2280_ep, ep);
  1073. if (!_ep || (!ep->desc && ep->num != 0) || !_req) {
  1074. pr_err("%s: Invalid ep=%p or ep->desc or req=%p\n",
  1075. __func__, _ep, _req);
  1076. return -EINVAL;
  1077. }
  1078. spin_lock_irqsave(&ep->dev->lock, flags);
  1079. stopped = ep->stopped;
  1080. /* quiesce dma while we patch the queue */
  1081. dmactl = 0;
  1082. ep->stopped = 1;
  1083. if (ep->dma) {
  1084. dmactl = readl(&ep->dma->dmactl);
  1085. /* WARNING erratum 0127 may kick in ... */
  1086. stop_dma(ep->dma);
  1087. scan_dma_completions(ep);
  1088. }
  1089. /* make sure it's still queued on this endpoint */
  1090. list_for_each_entry(req, &ep->queue, queue) {
  1091. if (&req->req == _req)
  1092. break;
  1093. }
  1094. if (&req->req != _req) {
  1095. spin_unlock_irqrestore(&ep->dev->lock, flags);
  1096. dev_err(&ep->dev->pdev->dev, "%s: Request mismatch\n",
  1097. __func__);
  1098. return -EINVAL;
  1099. }
  1100. /* queue head may be partially complete. */
  1101. if (ep->queue.next == &req->queue) {
  1102. if (ep->dma) {
  1103. ep_dbg(ep->dev, "unlink (%s) dma\n", _ep->name);
  1104. _req->status = -ECONNRESET;
  1105. abort_dma(ep);
  1106. if (likely(ep->queue.next == &req->queue)) {
  1107. /* NOTE: misreports single-transfer mode*/
  1108. req->td->dmacount = 0; /* invalidate */
  1109. dma_done(ep, req,
  1110. readl(&ep->dma->dmacount),
  1111. -ECONNRESET);
  1112. }
  1113. } else {
  1114. ep_dbg(ep->dev, "unlink (%s) pio\n", _ep->name);
  1115. done(ep, req, -ECONNRESET);
  1116. }
  1117. req = NULL;
  1118. }
  1119. if (req)
  1120. done(ep, req, -ECONNRESET);
  1121. ep->stopped = stopped;
  1122. if (ep->dma) {
  1123. /* turn off dma on inactive queues */
  1124. if (list_empty(&ep->queue))
  1125. stop_dma(ep->dma);
  1126. else if (!ep->stopped) {
  1127. /* resume current request, or start new one */
  1128. if (req)
  1129. writel(dmactl, &ep->dma->dmactl);
  1130. else
  1131. start_dma(ep, list_entry(ep->queue.next,
  1132. struct net2280_request, queue));
  1133. }
  1134. }
  1135. spin_unlock_irqrestore(&ep->dev->lock, flags);
  1136. return 0;
  1137. }
  1138. /*-------------------------------------------------------------------------*/
  1139. static int net2280_fifo_status(struct usb_ep *_ep);
  1140. static int
  1141. net2280_set_halt_and_wedge(struct usb_ep *_ep, int value, int wedged)
  1142. {
  1143. struct net2280_ep *ep;
  1144. unsigned long flags;
  1145. int retval = 0;
  1146. ep = container_of(_ep, struct net2280_ep, ep);
  1147. if (!_ep || (!ep->desc && ep->num != 0)) {
  1148. pr_err("%s: Invalid ep=%p or ep->desc\n", __func__, _ep);
  1149. return -EINVAL;
  1150. }
  1151. if (!ep->dev->driver || ep->dev->gadget.speed == USB_SPEED_UNKNOWN) {
  1152. retval = -ESHUTDOWN;
  1153. goto print_err;
  1154. }
  1155. if (ep->desc /* not ep0 */ && (ep->desc->bmAttributes & 0x03)
  1156. == USB_ENDPOINT_XFER_ISOC) {
  1157. retval = -EINVAL;
  1158. goto print_err;
  1159. }
  1160. spin_lock_irqsave(&ep->dev->lock, flags);
  1161. if (!list_empty(&ep->queue)) {
  1162. retval = -EAGAIN;
  1163. goto print_unlock;
  1164. } else if (ep->is_in && value && net2280_fifo_status(_ep) != 0) {
  1165. retval = -EAGAIN;
  1166. goto print_unlock;
  1167. } else {
  1168. ep_vdbg(ep->dev, "%s %s %s\n", _ep->name,
  1169. value ? "set" : "clear",
  1170. wedged ? "wedge" : "halt");
  1171. /* set/clear, then synch memory views with the device */
  1172. if (value) {
  1173. if (ep->num == 0)
  1174. ep->dev->protocol_stall = 1;
  1175. else
  1176. set_halt(ep);
  1177. if (wedged)
  1178. ep->wedged = 1;
  1179. } else {
  1180. clear_halt(ep);
  1181. if (ep->dev->quirks & PLX_SUPERSPEED &&
  1182. !list_empty(&ep->queue) && ep->td_dma)
  1183. restart_dma(ep);
  1184. ep->wedged = 0;
  1185. }
  1186. (void) readl(&ep->regs->ep_rsp);
  1187. }
  1188. spin_unlock_irqrestore(&ep->dev->lock, flags);
  1189. return retval;
  1190. print_unlock:
  1191. spin_unlock_irqrestore(&ep->dev->lock, flags);
  1192. print_err:
  1193. dev_err(&ep->dev->pdev->dev, "%s: error=%d\n", __func__, retval);
  1194. return retval;
  1195. }
  1196. static int net2280_set_halt(struct usb_ep *_ep, int value)
  1197. {
  1198. return net2280_set_halt_and_wedge(_ep, value, 0);
  1199. }
  1200. static int net2280_set_wedge(struct usb_ep *_ep)
  1201. {
  1202. if (!_ep || _ep->name == ep0name) {
  1203. pr_err("%s: Invalid ep=%p or ep0\n", __func__, _ep);
  1204. return -EINVAL;
  1205. }
  1206. return net2280_set_halt_and_wedge(_ep, 1, 1);
  1207. }
  1208. static int net2280_fifo_status(struct usb_ep *_ep)
  1209. {
  1210. struct net2280_ep *ep;
  1211. u32 avail;
  1212. ep = container_of(_ep, struct net2280_ep, ep);
  1213. if (!_ep || (!ep->desc && ep->num != 0)) {
  1214. pr_err("%s: Invalid ep=%p or ep->desc\n", __func__, _ep);
  1215. return -ENODEV;
  1216. }
  1217. if (!ep->dev->driver || ep->dev->gadget.speed == USB_SPEED_UNKNOWN) {
  1218. dev_err(&ep->dev->pdev->dev,
  1219. "%s: Invalid driver=%p or speed=%d\n",
  1220. __func__, ep->dev->driver, ep->dev->gadget.speed);
  1221. return -ESHUTDOWN;
  1222. }
  1223. avail = readl(&ep->regs->ep_avail) & (BIT(12) - 1);
  1224. if (avail > ep->fifo_size) {
  1225. dev_err(&ep->dev->pdev->dev, "%s: Fifo overflow\n", __func__);
  1226. return -EOVERFLOW;
  1227. }
  1228. if (ep->is_in)
  1229. avail = ep->fifo_size - avail;
  1230. return avail;
  1231. }
  1232. static void net2280_fifo_flush(struct usb_ep *_ep)
  1233. {
  1234. struct net2280_ep *ep;
  1235. ep = container_of(_ep, struct net2280_ep, ep);
  1236. if (!_ep || (!ep->desc && ep->num != 0)) {
  1237. pr_err("%s: Invalid ep=%p or ep->desc\n", __func__, _ep);
  1238. return;
  1239. }
  1240. if (!ep->dev->driver || ep->dev->gadget.speed == USB_SPEED_UNKNOWN) {
  1241. dev_err(&ep->dev->pdev->dev,
  1242. "%s: Invalid driver=%p or speed=%d\n",
  1243. __func__, ep->dev->driver, ep->dev->gadget.speed);
  1244. return;
  1245. }
  1246. writel(BIT(FIFO_FLUSH), &ep->regs->ep_stat);
  1247. (void) readl(&ep->regs->ep_rsp);
  1248. }
  1249. static const struct usb_ep_ops net2280_ep_ops = {
  1250. .enable = net2280_enable,
  1251. .disable = net2280_disable,
  1252. .alloc_request = net2280_alloc_request,
  1253. .free_request = net2280_free_request,
  1254. .queue = net2280_queue,
  1255. .dequeue = net2280_dequeue,
  1256. .set_halt = net2280_set_halt,
  1257. .set_wedge = net2280_set_wedge,
  1258. .fifo_status = net2280_fifo_status,
  1259. .fifo_flush = net2280_fifo_flush,
  1260. };
  1261. /*-------------------------------------------------------------------------*/
  1262. static int net2280_get_frame(struct usb_gadget *_gadget)
  1263. {
  1264. struct net2280 *dev;
  1265. unsigned long flags;
  1266. u16 retval;
  1267. if (!_gadget)
  1268. return -ENODEV;
  1269. dev = container_of(_gadget, struct net2280, gadget);
  1270. spin_lock_irqsave(&dev->lock, flags);
  1271. retval = get_idx_reg(dev->regs, REG_FRAME) & 0x03ff;
  1272. spin_unlock_irqrestore(&dev->lock, flags);
  1273. return retval;
  1274. }
  1275. static int net2280_wakeup(struct usb_gadget *_gadget)
  1276. {
  1277. struct net2280 *dev;
  1278. u32 tmp;
  1279. unsigned long flags;
  1280. if (!_gadget)
  1281. return 0;
  1282. dev = container_of(_gadget, struct net2280, gadget);
  1283. spin_lock_irqsave(&dev->lock, flags);
  1284. tmp = readl(&dev->usb->usbctl);
  1285. if (tmp & BIT(DEVICE_REMOTE_WAKEUP_ENABLE))
  1286. writel(BIT(GENERATE_RESUME), &dev->usb->usbstat);
  1287. spin_unlock_irqrestore(&dev->lock, flags);
  1288. /* pci writes may still be posted */
  1289. return 0;
  1290. }
  1291. static int net2280_set_selfpowered(struct usb_gadget *_gadget, int value)
  1292. {
  1293. struct net2280 *dev;
  1294. u32 tmp;
  1295. unsigned long flags;
  1296. if (!_gadget)
  1297. return 0;
  1298. dev = container_of(_gadget, struct net2280, gadget);
  1299. spin_lock_irqsave(&dev->lock, flags);
  1300. tmp = readl(&dev->usb->usbctl);
  1301. if (value) {
  1302. tmp |= BIT(SELF_POWERED_STATUS);
  1303. _gadget->is_selfpowered = 1;
  1304. } else {
  1305. tmp &= ~BIT(SELF_POWERED_STATUS);
  1306. _gadget->is_selfpowered = 0;
  1307. }
  1308. writel(tmp, &dev->usb->usbctl);
  1309. spin_unlock_irqrestore(&dev->lock, flags);
  1310. return 0;
  1311. }
  1312. static int net2280_pullup(struct usb_gadget *_gadget, int is_on)
  1313. {
  1314. struct net2280 *dev;
  1315. u32 tmp;
  1316. unsigned long flags;
  1317. if (!_gadget)
  1318. return -ENODEV;
  1319. dev = container_of(_gadget, struct net2280, gadget);
  1320. spin_lock_irqsave(&dev->lock, flags);
  1321. tmp = readl(&dev->usb->usbctl);
  1322. dev->softconnect = (is_on != 0);
  1323. if (is_on) {
  1324. ep0_start(dev);
  1325. writel(tmp | BIT(USB_DETECT_ENABLE), &dev->usb->usbctl);
  1326. } else {
  1327. writel(tmp & ~BIT(USB_DETECT_ENABLE), &dev->usb->usbctl);
  1328. stop_activity(dev, NULL);
  1329. }
  1330. spin_unlock_irqrestore(&dev->lock, flags);
  1331. if (!is_on && dev->driver)
  1332. dev->driver->disconnect(&dev->gadget);
  1333. return 0;
  1334. }
  1335. static struct usb_ep *net2280_match_ep(struct usb_gadget *_gadget,
  1336. struct usb_endpoint_descriptor *desc,
  1337. struct usb_ss_ep_comp_descriptor *ep_comp)
  1338. {
  1339. char name[8];
  1340. struct usb_ep *ep;
  1341. if (usb_endpoint_type(desc) == USB_ENDPOINT_XFER_INT) {
  1342. /* ep-e, ep-f are PIO with only 64 byte fifos */
  1343. ep = gadget_find_ep_by_name(_gadget, "ep-e");
  1344. if (ep && usb_gadget_ep_match_desc(_gadget, ep, desc, ep_comp))
  1345. return ep;
  1346. ep = gadget_find_ep_by_name(_gadget, "ep-f");
  1347. if (ep && usb_gadget_ep_match_desc(_gadget, ep, desc, ep_comp))
  1348. return ep;
  1349. }
  1350. /* USB3380: use same address for usb and hardware endpoints */
  1351. snprintf(name, sizeof(name), "ep%d%s", usb_endpoint_num(desc),
  1352. usb_endpoint_dir_in(desc) ? "in" : "out");
  1353. ep = gadget_find_ep_by_name(_gadget, name);
  1354. if (ep && usb_gadget_ep_match_desc(_gadget, ep, desc, ep_comp))
  1355. return ep;
  1356. return NULL;
  1357. }
  1358. static int net2280_start(struct usb_gadget *_gadget,
  1359. struct usb_gadget_driver *driver);
  1360. static int net2280_stop(struct usb_gadget *_gadget);
  1361. static const struct usb_gadget_ops net2280_ops = {
  1362. .get_frame = net2280_get_frame,
  1363. .wakeup = net2280_wakeup,
  1364. .set_selfpowered = net2280_set_selfpowered,
  1365. .pullup = net2280_pullup,
  1366. .udc_start = net2280_start,
  1367. .udc_stop = net2280_stop,
  1368. .match_ep = net2280_match_ep,
  1369. };
  1370. /*-------------------------------------------------------------------------*/
  1371. #ifdef CONFIG_USB_GADGET_DEBUG_FILES
  1372. /* FIXME move these into procfs, and use seq_file.
  1373. * Sysfs _still_ doesn't behave for arbitrarily sized files,
  1374. * and also doesn't help products using this with 2.4 kernels.
  1375. */
  1376. /* "function" sysfs attribute */
  1377. static ssize_t function_show(struct device *_dev, struct device_attribute *attr,
  1378. char *buf)
  1379. {
  1380. struct net2280 *dev = dev_get_drvdata(_dev);
  1381. if (!dev->driver || !dev->driver->function ||
  1382. strlen(dev->driver->function) > PAGE_SIZE)
  1383. return 0;
  1384. return scnprintf(buf, PAGE_SIZE, "%s\n", dev->driver->function);
  1385. }
  1386. static DEVICE_ATTR_RO(function);
  1387. static ssize_t registers_show(struct device *_dev,
  1388. struct device_attribute *attr, char *buf)
  1389. {
  1390. struct net2280 *dev;
  1391. char *next;
  1392. unsigned size, t;
  1393. unsigned long flags;
  1394. int i;
  1395. u32 t1, t2;
  1396. const char *s;
  1397. dev = dev_get_drvdata(_dev);
  1398. next = buf;
  1399. size = PAGE_SIZE;
  1400. spin_lock_irqsave(&dev->lock, flags);
  1401. if (dev->driver)
  1402. s = dev->driver->driver.name;
  1403. else
  1404. s = "(none)";
  1405. /* Main Control Registers */
  1406. t = scnprintf(next, size, "%s version " DRIVER_VERSION
  1407. ", chiprev %04x\n\n"
  1408. "devinit %03x fifoctl %08x gadget '%s'\n"
  1409. "pci irqenb0 %02x irqenb1 %08x "
  1410. "irqstat0 %04x irqstat1 %08x\n",
  1411. driver_name, dev->chiprev,
  1412. readl(&dev->regs->devinit),
  1413. readl(&dev->regs->fifoctl),
  1414. s,
  1415. readl(&dev->regs->pciirqenb0),
  1416. readl(&dev->regs->pciirqenb1),
  1417. readl(&dev->regs->irqstat0),
  1418. readl(&dev->regs->irqstat1));
  1419. size -= t;
  1420. next += t;
  1421. /* USB Control Registers */
  1422. t1 = readl(&dev->usb->usbctl);
  1423. t2 = readl(&dev->usb->usbstat);
  1424. if (t1 & BIT(VBUS_PIN)) {
  1425. if (t2 & BIT(HIGH_SPEED))
  1426. s = "high speed";
  1427. else if (dev->gadget.speed == USB_SPEED_UNKNOWN)
  1428. s = "powered";
  1429. else
  1430. s = "full speed";
  1431. /* full speed bit (6) not working?? */
  1432. } else
  1433. s = "not attached";
  1434. t = scnprintf(next, size,
  1435. "stdrsp %08x usbctl %08x usbstat %08x "
  1436. "addr 0x%02x (%s)\n",
  1437. readl(&dev->usb->stdrsp), t1, t2,
  1438. readl(&dev->usb->ouraddr), s);
  1439. size -= t;
  1440. next += t;
  1441. /* PCI Master Control Registers */
  1442. /* DMA Control Registers */
  1443. /* Configurable EP Control Registers */
  1444. for (i = 0; i < dev->n_ep; i++) {
  1445. struct net2280_ep *ep;
  1446. ep = &dev->ep[i];
  1447. if (i && !ep->desc)
  1448. continue;
  1449. t1 = readl(&ep->cfg->ep_cfg);
  1450. t2 = readl(&ep->regs->ep_rsp) & 0xff;
  1451. t = scnprintf(next, size,
  1452. "\n%s\tcfg %05x rsp (%02x) %s%s%s%s%s%s%s%s"
  1453. "irqenb %02x\n",
  1454. ep->ep.name, t1, t2,
  1455. (t2 & BIT(CLEAR_NAK_OUT_PACKETS))
  1456. ? "NAK " : "",
  1457. (t2 & BIT(CLEAR_EP_HIDE_STATUS_PHASE))
  1458. ? "hide " : "",
  1459. (t2 & BIT(CLEAR_EP_FORCE_CRC_ERROR))
  1460. ? "CRC " : "",
  1461. (t2 & BIT(CLEAR_INTERRUPT_MODE))
  1462. ? "interrupt " : "",
  1463. (t2 & BIT(CLEAR_CONTROL_STATUS_PHASE_HANDSHAKE))
  1464. ? "status " : "",
  1465. (t2 & BIT(CLEAR_NAK_OUT_PACKETS_MODE))
  1466. ? "NAKmode " : "",
  1467. (t2 & BIT(CLEAR_ENDPOINT_TOGGLE))
  1468. ? "DATA1 " : "DATA0 ",
  1469. (t2 & BIT(CLEAR_ENDPOINT_HALT))
  1470. ? "HALT " : "",
  1471. readl(&ep->regs->ep_irqenb));
  1472. size -= t;
  1473. next += t;
  1474. t = scnprintf(next, size,
  1475. "\tstat %08x avail %04x "
  1476. "(ep%d%s-%s)%s\n",
  1477. readl(&ep->regs->ep_stat),
  1478. readl(&ep->regs->ep_avail),
  1479. t1 & 0x0f, DIR_STRING(t1),
  1480. type_string(t1 >> 8),
  1481. ep->stopped ? "*" : "");
  1482. size -= t;
  1483. next += t;
  1484. if (!ep->dma)
  1485. continue;
  1486. t = scnprintf(next, size,
  1487. " dma\tctl %08x stat %08x count %08x\n"
  1488. "\taddr %08x desc %08x\n",
  1489. readl(&ep->dma->dmactl),
  1490. readl(&ep->dma->dmastat),
  1491. readl(&ep->dma->dmacount),
  1492. readl(&ep->dma->dmaaddr),
  1493. readl(&ep->dma->dmadesc));
  1494. size -= t;
  1495. next += t;
  1496. }
  1497. /* Indexed Registers (none yet) */
  1498. /* Statistics */
  1499. t = scnprintf(next, size, "\nirqs: ");
  1500. size -= t;
  1501. next += t;
  1502. for (i = 0; i < dev->n_ep; i++) {
  1503. struct net2280_ep *ep;
  1504. ep = &dev->ep[i];
  1505. if (i && !ep->irqs)
  1506. continue;
  1507. t = scnprintf(next, size, " %s/%lu", ep->ep.name, ep->irqs);
  1508. size -= t;
  1509. next += t;
  1510. }
  1511. t = scnprintf(next, size, "\n");
  1512. size -= t;
  1513. next += t;
  1514. spin_unlock_irqrestore(&dev->lock, flags);
  1515. return PAGE_SIZE - size;
  1516. }
  1517. static DEVICE_ATTR_RO(registers);
  1518. static ssize_t queues_show(struct device *_dev, struct device_attribute *attr,
  1519. char *buf)
  1520. {
  1521. struct net2280 *dev;
  1522. char *next;
  1523. unsigned size;
  1524. unsigned long flags;
  1525. int i;
  1526. dev = dev_get_drvdata(_dev);
  1527. next = buf;
  1528. size = PAGE_SIZE;
  1529. spin_lock_irqsave(&dev->lock, flags);
  1530. for (i = 0; i < dev->n_ep; i++) {
  1531. struct net2280_ep *ep = &dev->ep[i];
  1532. struct net2280_request *req;
  1533. int t;
  1534. if (i != 0) {
  1535. const struct usb_endpoint_descriptor *d;
  1536. d = ep->desc;
  1537. if (!d)
  1538. continue;
  1539. t = d->bEndpointAddress;
  1540. t = scnprintf(next, size,
  1541. "\n%s (ep%d%s-%s) max %04x %s fifo %d\n",
  1542. ep->ep.name, t & USB_ENDPOINT_NUMBER_MASK,
  1543. (t & USB_DIR_IN) ? "in" : "out",
  1544. type_string(d->bmAttributes),
  1545. usb_endpoint_maxp(d) & 0x1fff,
  1546. ep->dma ? "dma" : "pio", ep->fifo_size
  1547. );
  1548. } else /* ep0 should only have one transfer queued */
  1549. t = scnprintf(next, size, "ep0 max 64 pio %s\n",
  1550. ep->is_in ? "in" : "out");
  1551. if (t <= 0 || t > size)
  1552. goto done;
  1553. size -= t;
  1554. next += t;
  1555. if (list_empty(&ep->queue)) {
  1556. t = scnprintf(next, size, "\t(nothing queued)\n");
  1557. if (t <= 0 || t > size)
  1558. goto done;
  1559. size -= t;
  1560. next += t;
  1561. continue;
  1562. }
  1563. list_for_each_entry(req, &ep->queue, queue) {
  1564. if (ep->dma && req->td_dma == readl(&ep->dma->dmadesc))
  1565. t = scnprintf(next, size,
  1566. "\treq %p len %d/%d "
  1567. "buf %p (dmacount %08x)\n",
  1568. &req->req, req->req.actual,
  1569. req->req.length, req->req.buf,
  1570. readl(&ep->dma->dmacount));
  1571. else
  1572. t = scnprintf(next, size,
  1573. "\treq %p len %d/%d buf %p\n",
  1574. &req->req, req->req.actual,
  1575. req->req.length, req->req.buf);
  1576. if (t <= 0 || t > size)
  1577. goto done;
  1578. size -= t;
  1579. next += t;
  1580. if (ep->dma) {
  1581. struct net2280_dma *td;
  1582. td = req->td;
  1583. t = scnprintf(next, size, "\t td %08x "
  1584. " count %08x buf %08x desc %08x\n",
  1585. (u32) req->td_dma,
  1586. le32_to_cpu(td->dmacount),
  1587. le32_to_cpu(td->dmaaddr),
  1588. le32_to_cpu(td->dmadesc));
  1589. if (t <= 0 || t > size)
  1590. goto done;
  1591. size -= t;
  1592. next += t;
  1593. }
  1594. }
  1595. }
  1596. done:
  1597. spin_unlock_irqrestore(&dev->lock, flags);
  1598. return PAGE_SIZE - size;
  1599. }
  1600. static DEVICE_ATTR_RO(queues);
  1601. #else
  1602. #define device_create_file(a, b) (0)
  1603. #define device_remove_file(a, b) do { } while (0)
  1604. #endif
  1605. /*-------------------------------------------------------------------------*/
  1606. /* another driver-specific mode might be a request type doing dma
  1607. * to/from another device fifo instead of to/from memory.
  1608. */
  1609. static void set_fifo_mode(struct net2280 *dev, int mode)
  1610. {
  1611. /* keeping high bits preserves BAR2 */
  1612. writel((0xffff << PCI_BASE2_RANGE) | mode, &dev->regs->fifoctl);
  1613. /* always ep-{a,b,e,f} ... maybe not ep-c or ep-d */
  1614. INIT_LIST_HEAD(&dev->gadget.ep_list);
  1615. list_add_tail(&dev->ep[1].ep.ep_list, &dev->gadget.ep_list);
  1616. list_add_tail(&dev->ep[2].ep.ep_list, &dev->gadget.ep_list);
  1617. switch (mode) {
  1618. case 0:
  1619. list_add_tail(&dev->ep[3].ep.ep_list, &dev->gadget.ep_list);
  1620. list_add_tail(&dev->ep[4].ep.ep_list, &dev->gadget.ep_list);
  1621. dev->ep[1].fifo_size = dev->ep[2].fifo_size = 1024;
  1622. break;
  1623. case 1:
  1624. dev->ep[1].fifo_size = dev->ep[2].fifo_size = 2048;
  1625. break;
  1626. case 2:
  1627. list_add_tail(&dev->ep[3].ep.ep_list, &dev->gadget.ep_list);
  1628. dev->ep[1].fifo_size = 2048;
  1629. dev->ep[2].fifo_size = 1024;
  1630. break;
  1631. }
  1632. /* fifo sizes for ep0, ep-c, ep-d, ep-e, and ep-f never change */
  1633. list_add_tail(&dev->ep[5].ep.ep_list, &dev->gadget.ep_list);
  1634. list_add_tail(&dev->ep[6].ep.ep_list, &dev->gadget.ep_list);
  1635. }
  1636. static void defect7374_disable_data_eps(struct net2280 *dev)
  1637. {
  1638. /*
  1639. * For Defect 7374, disable data EPs (and more):
  1640. * - This phase undoes the earlier phase of the Defect 7374 workaround,
  1641. * returing ep regs back to normal.
  1642. */
  1643. struct net2280_ep *ep;
  1644. int i;
  1645. unsigned char ep_sel;
  1646. u32 tmp_reg;
  1647. for (i = 1; i < 5; i++) {
  1648. ep = &dev->ep[i];
  1649. writel(i, &ep->cfg->ep_cfg);
  1650. }
  1651. /* CSROUT, CSRIN, PCIOUT, PCIIN, STATIN, RCIN */
  1652. for (i = 0; i < 6; i++)
  1653. writel(0, &dev->dep[i].dep_cfg);
  1654. for (ep_sel = 0; ep_sel <= 21; ep_sel++) {
  1655. /* Select an endpoint for subsequent operations: */
  1656. tmp_reg = readl(&dev->plregs->pl_ep_ctrl);
  1657. writel(((tmp_reg & ~0x1f) | ep_sel), &dev->plregs->pl_ep_ctrl);
  1658. if (ep_sel < 2 || (ep_sel > 9 && ep_sel < 14) ||
  1659. ep_sel == 18 || ep_sel == 20)
  1660. continue;
  1661. /* Change settings on some selected endpoints */
  1662. tmp_reg = readl(&dev->plregs->pl_ep_cfg_4);
  1663. tmp_reg &= ~BIT(NON_CTRL_IN_TOLERATE_BAD_DIR);
  1664. writel(tmp_reg, &dev->plregs->pl_ep_cfg_4);
  1665. tmp_reg = readl(&dev->plregs->pl_ep_ctrl);
  1666. tmp_reg |= BIT(EP_INITIALIZED);
  1667. writel(tmp_reg, &dev->plregs->pl_ep_ctrl);
  1668. }
  1669. }
  1670. static void defect7374_enable_data_eps_zero(struct net2280 *dev)
  1671. {
  1672. u32 tmp = 0, tmp_reg;
  1673. u32 scratch;
  1674. int i;
  1675. unsigned char ep_sel;
  1676. scratch = get_idx_reg(dev->regs, SCRATCH);
  1677. WARN_ON((scratch & (0xf << DEFECT7374_FSM_FIELD))
  1678. == DEFECT7374_FSM_SS_CONTROL_READ);
  1679. scratch &= ~(0xf << DEFECT7374_FSM_FIELD);
  1680. ep_warn(dev, "Operate Defect 7374 workaround soft this time");
  1681. ep_warn(dev, "It will operate on cold-reboot and SS connect");
  1682. /*GPEPs:*/
  1683. tmp = ((0 << ENDPOINT_NUMBER) | BIT(ENDPOINT_DIRECTION) |
  1684. (2 << OUT_ENDPOINT_TYPE) | (2 << IN_ENDPOINT_TYPE) |
  1685. ((dev->enhanced_mode) ?
  1686. BIT(OUT_ENDPOINT_ENABLE) | BIT(IN_ENDPOINT_ENABLE) :
  1687. BIT(ENDPOINT_ENABLE)));
  1688. for (i = 1; i < 5; i++)
  1689. writel(tmp, &dev->ep[i].cfg->ep_cfg);
  1690. /* CSRIN, PCIIN, STATIN, RCIN*/
  1691. tmp = ((0 << ENDPOINT_NUMBER) | BIT(ENDPOINT_ENABLE));
  1692. writel(tmp, &dev->dep[1].dep_cfg);
  1693. writel(tmp, &dev->dep[3].dep_cfg);
  1694. writel(tmp, &dev->dep[4].dep_cfg);
  1695. writel(tmp, &dev->dep[5].dep_cfg);
  1696. /*Implemented for development and debug.
  1697. * Can be refined/tuned later.*/
  1698. for (ep_sel = 0; ep_sel <= 21; ep_sel++) {
  1699. /* Select an endpoint for subsequent operations: */
  1700. tmp_reg = readl(&dev->plregs->pl_ep_ctrl);
  1701. writel(((tmp_reg & ~0x1f) | ep_sel),
  1702. &dev->plregs->pl_ep_ctrl);
  1703. if (ep_sel == 1) {
  1704. tmp =
  1705. (readl(&dev->plregs->pl_ep_ctrl) |
  1706. BIT(CLEAR_ACK_ERROR_CODE) | 0);
  1707. writel(tmp, &dev->plregs->pl_ep_ctrl);
  1708. continue;
  1709. }
  1710. if (ep_sel == 0 || (ep_sel > 9 && ep_sel < 14) ||
  1711. ep_sel == 18 || ep_sel == 20)
  1712. continue;
  1713. tmp = (readl(&dev->plregs->pl_ep_cfg_4) |
  1714. BIT(NON_CTRL_IN_TOLERATE_BAD_DIR) | 0);
  1715. writel(tmp, &dev->plregs->pl_ep_cfg_4);
  1716. tmp = readl(&dev->plregs->pl_ep_ctrl) &
  1717. ~BIT(EP_INITIALIZED);
  1718. writel(tmp, &dev->plregs->pl_ep_ctrl);
  1719. }
  1720. /* Set FSM to focus on the first Control Read:
  1721. * - Tip: Connection speed is known upon the first
  1722. * setup request.*/
  1723. scratch |= DEFECT7374_FSM_WAITING_FOR_CONTROL_READ;
  1724. set_idx_reg(dev->regs, SCRATCH, scratch);
  1725. }
  1726. /* keeping it simple:
  1727. * - one bus driver, initted first;
  1728. * - one function driver, initted second
  1729. *
  1730. * most of the work to support multiple net2280 controllers would
  1731. * be to associate this gadget driver (yes?) with all of them, or
  1732. * perhaps to bind specific drivers to specific devices.
  1733. */
  1734. static void usb_reset_228x(struct net2280 *dev)
  1735. {
  1736. u32 tmp;
  1737. dev->gadget.speed = USB_SPEED_UNKNOWN;
  1738. (void) readl(&dev->usb->usbctl);
  1739. net2280_led_init(dev);
  1740. /* disable automatic responses, and irqs */
  1741. writel(0, &dev->usb->stdrsp);
  1742. writel(0, &dev->regs->pciirqenb0);
  1743. writel(0, &dev->regs->pciirqenb1);
  1744. /* clear old dma and irq state */
  1745. for (tmp = 0; tmp < 4; tmp++) {
  1746. struct net2280_ep *ep = &dev->ep[tmp + 1];
  1747. if (ep->dma)
  1748. abort_dma(ep);
  1749. }
  1750. writel(~0, &dev->regs->irqstat0),
  1751. writel(~(u32)BIT(SUSPEND_REQUEST_INTERRUPT), &dev->regs->irqstat1),
  1752. /* reset, and enable pci */
  1753. tmp = readl(&dev->regs->devinit) |
  1754. BIT(PCI_ENABLE) |
  1755. BIT(FIFO_SOFT_RESET) |
  1756. BIT(USB_SOFT_RESET) |
  1757. BIT(M8051_RESET);
  1758. writel(tmp, &dev->regs->devinit);
  1759. /* standard fifo and endpoint allocations */
  1760. set_fifo_mode(dev, (fifo_mode <= 2) ? fifo_mode : 0);
  1761. }
  1762. static void usb_reset_338x(struct net2280 *dev)
  1763. {
  1764. u32 tmp;
  1765. dev->gadget.speed = USB_SPEED_UNKNOWN;
  1766. (void)readl(&dev->usb->usbctl);
  1767. net2280_led_init(dev);
  1768. if (dev->bug7734_patched) {
  1769. /* disable automatic responses, and irqs */
  1770. writel(0, &dev->usb->stdrsp);
  1771. writel(0, &dev->regs->pciirqenb0);
  1772. writel(0, &dev->regs->pciirqenb1);
  1773. }
  1774. /* clear old dma and irq state */
  1775. for (tmp = 0; tmp < 4; tmp++) {
  1776. struct net2280_ep *ep = &dev->ep[tmp + 1];
  1777. struct net2280_dma_regs __iomem *dma;
  1778. if (ep->dma) {
  1779. abort_dma(ep);
  1780. } else {
  1781. dma = &dev->dma[tmp];
  1782. writel(BIT(DMA_ABORT), &dma->dmastat);
  1783. writel(0, &dma->dmactl);
  1784. }
  1785. }
  1786. writel(~0, &dev->regs->irqstat0), writel(~0, &dev->regs->irqstat1);
  1787. if (dev->bug7734_patched) {
  1788. /* reset, and enable pci */
  1789. tmp = readl(&dev->regs->devinit) |
  1790. BIT(PCI_ENABLE) |
  1791. BIT(FIFO_SOFT_RESET) |
  1792. BIT(USB_SOFT_RESET) |
  1793. BIT(M8051_RESET);
  1794. writel(tmp, &dev->regs->devinit);
  1795. }
  1796. /* always ep-{1,2,3,4} ... maybe not ep-3 or ep-4 */
  1797. INIT_LIST_HEAD(&dev->gadget.ep_list);
  1798. for (tmp = 1; tmp < dev->n_ep; tmp++)
  1799. list_add_tail(&dev->ep[tmp].ep.ep_list, &dev->gadget.ep_list);
  1800. }
  1801. static void usb_reset(struct net2280 *dev)
  1802. {
  1803. if (dev->quirks & PLX_LEGACY)
  1804. return usb_reset_228x(dev);
  1805. return usb_reset_338x(dev);
  1806. }
  1807. static void usb_reinit_228x(struct net2280 *dev)
  1808. {
  1809. u32 tmp;
  1810. /* basic endpoint init */
  1811. for (tmp = 0; tmp < 7; tmp++) {
  1812. struct net2280_ep *ep = &dev->ep[tmp];
  1813. ep->ep.name = ep_info_dft[tmp].name;
  1814. ep->ep.caps = ep_info_dft[tmp].caps;
  1815. ep->dev = dev;
  1816. ep->num = tmp;
  1817. if (tmp > 0 && tmp <= 4) {
  1818. ep->fifo_size = 1024;
  1819. ep->dma = &dev->dma[tmp - 1];
  1820. } else
  1821. ep->fifo_size = 64;
  1822. ep->regs = &dev->epregs[tmp];
  1823. ep->cfg = &dev->epregs[tmp];
  1824. ep_reset_228x(dev->regs, ep);
  1825. }
  1826. usb_ep_set_maxpacket_limit(&dev->ep[0].ep, 64);
  1827. usb_ep_set_maxpacket_limit(&dev->ep[5].ep, 64);
  1828. usb_ep_set_maxpacket_limit(&dev->ep[6].ep, 64);
  1829. dev->gadget.ep0 = &dev->ep[0].ep;
  1830. dev->ep[0].stopped = 0;
  1831. INIT_LIST_HEAD(&dev->gadget.ep0->ep_list);
  1832. /* we want to prevent lowlevel/insecure access from the USB host,
  1833. * but erratum 0119 means this enable bit is ignored
  1834. */
  1835. for (tmp = 0; tmp < 5; tmp++)
  1836. writel(EP_DONTUSE, &dev->dep[tmp].dep_cfg);
  1837. }
  1838. static void usb_reinit_338x(struct net2280 *dev)
  1839. {
  1840. int i;
  1841. u32 tmp, val;
  1842. static const u32 ne[9] = { 0, 1, 2, 3, 4, 1, 2, 3, 4 };
  1843. static const u32 ep_reg_addr[9] = { 0x00, 0xC0, 0x00, 0xC0, 0x00,
  1844. 0x00, 0xC0, 0x00, 0xC0 };
  1845. /* basic endpoint init */
  1846. for (i = 0; i < dev->n_ep; i++) {
  1847. struct net2280_ep *ep = &dev->ep[i];
  1848. ep->ep.name = dev->enhanced_mode ? ep_info_adv[i].name :
  1849. ep_info_dft[i].name;
  1850. ep->ep.caps = dev->enhanced_mode ? ep_info_adv[i].caps :
  1851. ep_info_dft[i].caps;
  1852. ep->dev = dev;
  1853. ep->num = i;
  1854. if (i > 0 && i <= 4)
  1855. ep->dma = &dev->dma[i - 1];
  1856. if (dev->enhanced_mode) {
  1857. ep->cfg = &dev->epregs[ne[i]];
  1858. /*
  1859. * Set USB endpoint number, hardware allows same number
  1860. * in both directions.
  1861. */
  1862. if (i > 0 && i < 5)
  1863. writel(ne[i], &ep->cfg->ep_cfg);
  1864. ep->regs = (struct net2280_ep_regs __iomem *)
  1865. (((void __iomem *)&dev->epregs[ne[i]]) +
  1866. ep_reg_addr[i]);
  1867. } else {
  1868. ep->cfg = &dev->epregs[i];
  1869. ep->regs = &dev->epregs[i];
  1870. }
  1871. ep->fifo_size = (i != 0) ? 2048 : 512;
  1872. ep_reset_338x(dev->regs, ep);
  1873. }
  1874. usb_ep_set_maxpacket_limit(&dev->ep[0].ep, 512);
  1875. dev->gadget.ep0 = &dev->ep[0].ep;
  1876. dev->ep[0].stopped = 0;
  1877. /* Link layer set up */
  1878. if (dev->bug7734_patched) {
  1879. tmp = readl(&dev->usb_ext->usbctl2) &
  1880. ~(BIT(U1_ENABLE) | BIT(U2_ENABLE) | BIT(LTM_ENABLE));
  1881. writel(tmp, &dev->usb_ext->usbctl2);
  1882. }
  1883. /* Hardware Defect and Workaround */
  1884. val = readl(&dev->ll_lfps_regs->ll_lfps_5);
  1885. val &= ~(0xf << TIMER_LFPS_6US);
  1886. val |= 0x5 << TIMER_LFPS_6US;
  1887. writel(val, &dev->ll_lfps_regs->ll_lfps_5);
  1888. val = readl(&dev->ll_lfps_regs->ll_lfps_6);
  1889. val &= ~(0xffff << TIMER_LFPS_80US);
  1890. val |= 0x0100 << TIMER_LFPS_80US;
  1891. writel(val, &dev->ll_lfps_regs->ll_lfps_6);
  1892. /*
  1893. * AA_AB Errata. Issue 4. Workaround for SuperSpeed USB
  1894. * Hot Reset Exit Handshake may Fail in Specific Case using
  1895. * Default Register Settings. Workaround for Enumeration test.
  1896. */
  1897. val = readl(&dev->ll_tsn_regs->ll_tsn_counters_2);
  1898. val &= ~(0x1f << HOT_TX_NORESET_TS2);
  1899. val |= 0x10 << HOT_TX_NORESET_TS2;
  1900. writel(val, &dev->ll_tsn_regs->ll_tsn_counters_2);
  1901. val = readl(&dev->ll_tsn_regs->ll_tsn_counters_3);
  1902. val &= ~(0x1f << HOT_RX_RESET_TS2);
  1903. val |= 0x3 << HOT_RX_RESET_TS2;
  1904. writel(val, &dev->ll_tsn_regs->ll_tsn_counters_3);
  1905. /*
  1906. * Set Recovery Idle to Recover bit:
  1907. * - On SS connections, setting Recovery Idle to Recover Fmw improves
  1908. * link robustness with various hosts and hubs.
  1909. * - It is safe to set for all connection speeds; all chip revisions.
  1910. * - R-M-W to leave other bits undisturbed.
  1911. * - Reference PLX TT-7372
  1912. */
  1913. val = readl(&dev->ll_chicken_reg->ll_tsn_chicken_bit);
  1914. val |= BIT(RECOVERY_IDLE_TO_RECOVER_FMW);
  1915. writel(val, &dev->ll_chicken_reg->ll_tsn_chicken_bit);
  1916. INIT_LIST_HEAD(&dev->gadget.ep0->ep_list);
  1917. /* disable dedicated endpoints */
  1918. writel(0x0D, &dev->dep[0].dep_cfg);
  1919. writel(0x0D, &dev->dep[1].dep_cfg);
  1920. writel(0x0E, &dev->dep[2].dep_cfg);
  1921. writel(0x0E, &dev->dep[3].dep_cfg);
  1922. writel(0x0F, &dev->dep[4].dep_cfg);
  1923. writel(0x0C, &dev->dep[5].dep_cfg);
  1924. }
  1925. static void usb_reinit(struct net2280 *dev)
  1926. {
  1927. if (dev->quirks & PLX_LEGACY)
  1928. return usb_reinit_228x(dev);
  1929. return usb_reinit_338x(dev);
  1930. }
  1931. static void ep0_start_228x(struct net2280 *dev)
  1932. {
  1933. writel(BIT(CLEAR_EP_HIDE_STATUS_PHASE) |
  1934. BIT(CLEAR_NAK_OUT_PACKETS) |
  1935. BIT(CLEAR_CONTROL_STATUS_PHASE_HANDSHAKE),
  1936. &dev->epregs[0].ep_rsp);
  1937. /*
  1938. * hardware optionally handles a bunch of standard requests
  1939. * that the API hides from drivers anyway. have it do so.
  1940. * endpoint status/features are handled in software, to
  1941. * help pass tests for some dubious behavior.
  1942. */
  1943. writel(BIT(SET_TEST_MODE) |
  1944. BIT(SET_ADDRESS) |
  1945. BIT(DEVICE_SET_CLEAR_DEVICE_REMOTE_WAKEUP) |
  1946. BIT(GET_DEVICE_STATUS) |
  1947. BIT(GET_INTERFACE_STATUS),
  1948. &dev->usb->stdrsp);
  1949. writel(BIT(USB_ROOT_PORT_WAKEUP_ENABLE) |
  1950. BIT(SELF_POWERED_USB_DEVICE) |
  1951. BIT(REMOTE_WAKEUP_SUPPORT) |
  1952. (dev->softconnect << USB_DETECT_ENABLE) |
  1953. BIT(SELF_POWERED_STATUS),
  1954. &dev->usb->usbctl);
  1955. /* enable irqs so we can see ep0 and general operation */
  1956. writel(BIT(SETUP_PACKET_INTERRUPT_ENABLE) |
  1957. BIT(ENDPOINT_0_INTERRUPT_ENABLE),
  1958. &dev->regs->pciirqenb0);
  1959. writel(BIT(PCI_INTERRUPT_ENABLE) |
  1960. BIT(PCI_MASTER_ABORT_RECEIVED_INTERRUPT_ENABLE) |
  1961. BIT(PCI_TARGET_ABORT_RECEIVED_INTERRUPT_ENABLE) |
  1962. BIT(PCI_RETRY_ABORT_INTERRUPT_ENABLE) |
  1963. BIT(VBUS_INTERRUPT_ENABLE) |
  1964. BIT(ROOT_PORT_RESET_INTERRUPT_ENABLE) |
  1965. BIT(SUSPEND_REQUEST_CHANGE_INTERRUPT_ENABLE),
  1966. &dev->regs->pciirqenb1);
  1967. /* don't leave any writes posted */
  1968. (void) readl(&dev->usb->usbctl);
  1969. }
  1970. static void ep0_start_338x(struct net2280 *dev)
  1971. {
  1972. if (dev->bug7734_patched)
  1973. writel(BIT(CLEAR_NAK_OUT_PACKETS_MODE) |
  1974. BIT(SET_EP_HIDE_STATUS_PHASE),
  1975. &dev->epregs[0].ep_rsp);
  1976. /*
  1977. * hardware optionally handles a bunch of standard requests
  1978. * that the API hides from drivers anyway. have it do so.
  1979. * endpoint status/features are handled in software, to
  1980. * help pass tests for some dubious behavior.
  1981. */
  1982. writel(BIT(SET_ISOCHRONOUS_DELAY) |
  1983. BIT(SET_SEL) |
  1984. BIT(SET_TEST_MODE) |
  1985. BIT(SET_ADDRESS) |
  1986. BIT(GET_INTERFACE_STATUS) |
  1987. BIT(GET_DEVICE_STATUS),
  1988. &dev->usb->stdrsp);
  1989. dev->wakeup_enable = 1;
  1990. writel(BIT(USB_ROOT_PORT_WAKEUP_ENABLE) |
  1991. (dev->softconnect << USB_DETECT_ENABLE) |
  1992. BIT(DEVICE_REMOTE_WAKEUP_ENABLE),
  1993. &dev->usb->usbctl);
  1994. /* enable irqs so we can see ep0 and general operation */
  1995. writel(BIT(SETUP_PACKET_INTERRUPT_ENABLE) |
  1996. BIT(ENDPOINT_0_INTERRUPT_ENABLE),
  1997. &dev->regs->pciirqenb0);
  1998. writel(BIT(PCI_INTERRUPT_ENABLE) |
  1999. BIT(ROOT_PORT_RESET_INTERRUPT_ENABLE) |
  2000. BIT(SUSPEND_REQUEST_CHANGE_INTERRUPT_ENABLE) |
  2001. BIT(VBUS_INTERRUPT_ENABLE),
  2002. &dev->regs->pciirqenb1);
  2003. /* don't leave any writes posted */
  2004. (void)readl(&dev->usb->usbctl);
  2005. }
  2006. static void ep0_start(struct net2280 *dev)
  2007. {
  2008. if (dev->quirks & PLX_LEGACY)
  2009. return ep0_start_228x(dev);
  2010. return ep0_start_338x(dev);
  2011. }
  2012. /* when a driver is successfully registered, it will receive
  2013. * control requests including set_configuration(), which enables
  2014. * non-control requests. then usb traffic follows until a
  2015. * disconnect is reported. then a host may connect again, or
  2016. * the driver might get unbound.
  2017. */
  2018. static int net2280_start(struct usb_gadget *_gadget,
  2019. struct usb_gadget_driver *driver)
  2020. {
  2021. struct net2280 *dev;
  2022. int retval;
  2023. unsigned i;
  2024. /* insist on high speed support from the driver, since
  2025. * (dev->usb->xcvrdiag & FORCE_FULL_SPEED_MODE)
  2026. * "must not be used in normal operation"
  2027. */
  2028. if (!driver || driver->max_speed < USB_SPEED_HIGH ||
  2029. !driver->setup)
  2030. return -EINVAL;
  2031. dev = container_of(_gadget, struct net2280, gadget);
  2032. for (i = 0; i < dev->n_ep; i++)
  2033. dev->ep[i].irqs = 0;
  2034. /* hook up the driver ... */
  2035. driver->driver.bus = NULL;
  2036. dev->driver = driver;
  2037. retval = device_create_file(&dev->pdev->dev, &dev_attr_function);
  2038. if (retval)
  2039. goto err_unbind;
  2040. retval = device_create_file(&dev->pdev->dev, &dev_attr_queues);
  2041. if (retval)
  2042. goto err_func;
  2043. /* enable host detection and ep0; and we're ready
  2044. * for set_configuration as well as eventual disconnect.
  2045. */
  2046. net2280_led_active(dev, 1);
  2047. if ((dev->quirks & PLX_SUPERSPEED) && !dev->bug7734_patched)
  2048. defect7374_enable_data_eps_zero(dev);
  2049. ep0_start(dev);
  2050. /* pci writes may still be posted */
  2051. return 0;
  2052. err_func:
  2053. device_remove_file(&dev->pdev->dev, &dev_attr_function);
  2054. err_unbind:
  2055. dev->driver = NULL;
  2056. return retval;
  2057. }
  2058. static void stop_activity(struct net2280 *dev, struct usb_gadget_driver *driver)
  2059. {
  2060. int i;
  2061. /* don't disconnect if it's not connected */
  2062. if (dev->gadget.speed == USB_SPEED_UNKNOWN)
  2063. driver = NULL;
  2064. /* stop hardware; prevent new request submissions;
  2065. * and kill any outstanding requests.
  2066. */
  2067. usb_reset(dev);
  2068. for (i = 0; i < dev->n_ep; i++)
  2069. nuke(&dev->ep[i]);
  2070. /* report disconnect; the driver is already quiesced */
  2071. if (driver) {
  2072. spin_unlock(&dev->lock);
  2073. driver->disconnect(&dev->gadget);
  2074. spin_lock(&dev->lock);
  2075. }
  2076. usb_reinit(dev);
  2077. }
  2078. static int net2280_stop(struct usb_gadget *_gadget)
  2079. {
  2080. struct net2280 *dev;
  2081. unsigned long flags;
  2082. dev = container_of(_gadget, struct net2280, gadget);
  2083. spin_lock_irqsave(&dev->lock, flags);
  2084. stop_activity(dev, NULL);
  2085. spin_unlock_irqrestore(&dev->lock, flags);
  2086. net2280_led_active(dev, 0);
  2087. device_remove_file(&dev->pdev->dev, &dev_attr_function);
  2088. device_remove_file(&dev->pdev->dev, &dev_attr_queues);
  2089. dev->driver = NULL;
  2090. return 0;
  2091. }
  2092. /*-------------------------------------------------------------------------*/
  2093. /* handle ep0, ep-e, ep-f with 64 byte packets: packet per irq.
  2094. * also works for dma-capable endpoints, in pio mode or just
  2095. * to manually advance the queue after short OUT transfers.
  2096. */
  2097. static void handle_ep_small(struct net2280_ep *ep)
  2098. {
  2099. struct net2280_request *req;
  2100. u32 t;
  2101. /* 0 error, 1 mid-data, 2 done */
  2102. int mode = 1;
  2103. if (!list_empty(&ep->queue))
  2104. req = list_entry(ep->queue.next,
  2105. struct net2280_request, queue);
  2106. else
  2107. req = NULL;
  2108. /* ack all, and handle what we care about */
  2109. t = readl(&ep->regs->ep_stat);
  2110. ep->irqs++;
  2111. ep_vdbg(ep->dev, "%s ack ep_stat %08x, req %p\n",
  2112. ep->ep.name, t, req ? &req->req : NULL);
  2113. if (!ep->is_in || (ep->dev->quirks & PLX_2280))
  2114. writel(t & ~BIT(NAK_OUT_PACKETS), &ep->regs->ep_stat);
  2115. else
  2116. /* Added for 2282 */
  2117. writel(t, &ep->regs->ep_stat);
  2118. /* for ep0, monitor token irqs to catch data stage length errors
  2119. * and to synchronize on status.
  2120. *
  2121. * also, to defer reporting of protocol stalls ... here's where
  2122. * data or status first appears, handling stalls here should never
  2123. * cause trouble on the host side..
  2124. *
  2125. * control requests could be slightly faster without token synch for
  2126. * status, but status can jam up that way.
  2127. */
  2128. if (unlikely(ep->num == 0)) {
  2129. if (ep->is_in) {
  2130. /* status; stop NAKing */
  2131. if (t & BIT(DATA_OUT_PING_TOKEN_INTERRUPT)) {
  2132. if (ep->dev->protocol_stall) {
  2133. ep->stopped = 1;
  2134. set_halt(ep);
  2135. }
  2136. if (!req)
  2137. allow_status(ep);
  2138. mode = 2;
  2139. /* reply to extra IN data tokens with a zlp */
  2140. } else if (t & BIT(DATA_IN_TOKEN_INTERRUPT)) {
  2141. if (ep->dev->protocol_stall) {
  2142. ep->stopped = 1;
  2143. set_halt(ep);
  2144. mode = 2;
  2145. } else if (ep->responded &&
  2146. !req && !ep->stopped)
  2147. write_fifo(ep, NULL);
  2148. }
  2149. } else {
  2150. /* status; stop NAKing */
  2151. if (t & BIT(DATA_IN_TOKEN_INTERRUPT)) {
  2152. if (ep->dev->protocol_stall) {
  2153. ep->stopped = 1;
  2154. set_halt(ep);
  2155. }
  2156. mode = 2;
  2157. /* an extra OUT token is an error */
  2158. } else if (((t & BIT(DATA_OUT_PING_TOKEN_INTERRUPT)) &&
  2159. req &&
  2160. req->req.actual == req->req.length) ||
  2161. (ep->responded && !req)) {
  2162. ep->dev->protocol_stall = 1;
  2163. set_halt(ep);
  2164. ep->stopped = 1;
  2165. if (req)
  2166. done(ep, req, -EOVERFLOW);
  2167. req = NULL;
  2168. }
  2169. }
  2170. }
  2171. if (unlikely(!req))
  2172. return;
  2173. /* manual DMA queue advance after short OUT */
  2174. if (likely(ep->dma)) {
  2175. if (t & BIT(SHORT_PACKET_TRANSFERRED_INTERRUPT)) {
  2176. u32 count;
  2177. int stopped = ep->stopped;
  2178. /* TRANSFERRED works around OUT_DONE erratum 0112.
  2179. * we expect (N <= maxpacket) bytes; host wrote M.
  2180. * iff (M < N) we won't ever see a DMA interrupt.
  2181. */
  2182. ep->stopped = 1;
  2183. for (count = 0; ; t = readl(&ep->regs->ep_stat)) {
  2184. /* any preceding dma transfers must finish.
  2185. * dma handles (M >= N), may empty the queue
  2186. */
  2187. scan_dma_completions(ep);
  2188. if (unlikely(list_empty(&ep->queue) ||
  2189. ep->out_overflow)) {
  2190. req = NULL;
  2191. break;
  2192. }
  2193. req = list_entry(ep->queue.next,
  2194. struct net2280_request, queue);
  2195. /* here either (M < N), a "real" short rx;
  2196. * or (M == N) and the queue didn't empty
  2197. */
  2198. if (likely(t & BIT(FIFO_EMPTY))) {
  2199. count = readl(&ep->dma->dmacount);
  2200. count &= DMA_BYTE_COUNT_MASK;
  2201. if (readl(&ep->dma->dmadesc)
  2202. != req->td_dma)
  2203. req = NULL;
  2204. break;
  2205. }
  2206. udelay(1);
  2207. }
  2208. /* stop DMA, leave ep NAKing */
  2209. writel(BIT(DMA_ABORT), &ep->dma->dmastat);
  2210. spin_stop_dma(ep->dma);
  2211. if (likely(req)) {
  2212. req->td->dmacount = 0;
  2213. t = readl(&ep->regs->ep_avail);
  2214. dma_done(ep, req, count,
  2215. (ep->out_overflow || t)
  2216. ? -EOVERFLOW : 0);
  2217. }
  2218. /* also flush to prevent erratum 0106 trouble */
  2219. if (unlikely(ep->out_overflow ||
  2220. (ep->dev->chiprev == 0x0100 &&
  2221. ep->dev->gadget.speed
  2222. == USB_SPEED_FULL))) {
  2223. out_flush(ep);
  2224. ep->out_overflow = 0;
  2225. }
  2226. /* (re)start dma if needed, stop NAKing */
  2227. ep->stopped = stopped;
  2228. if (!list_empty(&ep->queue))
  2229. restart_dma(ep);
  2230. } else
  2231. ep_dbg(ep->dev, "%s dma ep_stat %08x ??\n",
  2232. ep->ep.name, t);
  2233. return;
  2234. /* data packet(s) received (in the fifo, OUT) */
  2235. } else if (t & BIT(DATA_PACKET_RECEIVED_INTERRUPT)) {
  2236. if (read_fifo(ep, req) && ep->num != 0)
  2237. mode = 2;
  2238. /* data packet(s) transmitted (IN) */
  2239. } else if (t & BIT(DATA_PACKET_TRANSMITTED_INTERRUPT)) {
  2240. unsigned len;
  2241. len = req->req.length - req->req.actual;
  2242. if (len > ep->ep.maxpacket)
  2243. len = ep->ep.maxpacket;
  2244. req->req.actual += len;
  2245. /* if we wrote it all, we're usually done */
  2246. /* send zlps until the status stage */
  2247. if ((req->req.actual == req->req.length) &&
  2248. (!req->req.zero || len != ep->ep.maxpacket) && ep->num)
  2249. mode = 2;
  2250. /* there was nothing to do ... */
  2251. } else if (mode == 1)
  2252. return;
  2253. /* done */
  2254. if (mode == 2) {
  2255. /* stream endpoints often resubmit/unlink in completion */
  2256. done(ep, req, 0);
  2257. /* maybe advance queue to next request */
  2258. if (ep->num == 0) {
  2259. /* NOTE: net2280 could let gadget driver start the
  2260. * status stage later. since not all controllers let
  2261. * them control that, the api doesn't (yet) allow it.
  2262. */
  2263. if (!ep->stopped)
  2264. allow_status(ep);
  2265. req = NULL;
  2266. } else {
  2267. if (!list_empty(&ep->queue) && !ep->stopped)
  2268. req = list_entry(ep->queue.next,
  2269. struct net2280_request, queue);
  2270. else
  2271. req = NULL;
  2272. if (req && !ep->is_in)
  2273. stop_out_naking(ep);
  2274. }
  2275. }
  2276. /* is there a buffer for the next packet?
  2277. * for best streaming performance, make sure there is one.
  2278. */
  2279. if (req && !ep->stopped) {
  2280. /* load IN fifo with next packet (may be zlp) */
  2281. if (t & BIT(DATA_PACKET_TRANSMITTED_INTERRUPT))
  2282. write_fifo(ep, &req->req);
  2283. }
  2284. }
  2285. static struct net2280_ep *get_ep_by_addr(struct net2280 *dev, u16 wIndex)
  2286. {
  2287. struct net2280_ep *ep;
  2288. if ((wIndex & USB_ENDPOINT_NUMBER_MASK) == 0)
  2289. return &dev->ep[0];
  2290. list_for_each_entry(ep, &dev->gadget.ep_list, ep.ep_list) {
  2291. u8 bEndpointAddress;
  2292. if (!ep->desc)
  2293. continue;
  2294. bEndpointAddress = ep->desc->bEndpointAddress;
  2295. if ((wIndex ^ bEndpointAddress) & USB_DIR_IN)
  2296. continue;
  2297. if ((wIndex & 0x0f) == (bEndpointAddress & 0x0f))
  2298. return ep;
  2299. }
  2300. return NULL;
  2301. }
  2302. static void defect7374_workaround(struct net2280 *dev, struct usb_ctrlrequest r)
  2303. {
  2304. u32 scratch, fsmvalue;
  2305. u32 ack_wait_timeout, state;
  2306. /* Workaround for Defect 7374 (U1/U2 erroneously rejected): */
  2307. scratch = get_idx_reg(dev->regs, SCRATCH);
  2308. fsmvalue = scratch & (0xf << DEFECT7374_FSM_FIELD);
  2309. scratch &= ~(0xf << DEFECT7374_FSM_FIELD);
  2310. if (!((fsmvalue == DEFECT7374_FSM_WAITING_FOR_CONTROL_READ) &&
  2311. (r.bRequestType & USB_DIR_IN)))
  2312. return;
  2313. /* This is the first Control Read for this connection: */
  2314. if (!(readl(&dev->usb->usbstat) & BIT(SUPER_SPEED_MODE))) {
  2315. /*
  2316. * Connection is NOT SS:
  2317. * - Connection must be FS or HS.
  2318. * - This FSM state should allow workaround software to
  2319. * run after the next USB connection.
  2320. */
  2321. scratch |= DEFECT7374_FSM_NON_SS_CONTROL_READ;
  2322. dev->bug7734_patched = 1;
  2323. goto restore_data_eps;
  2324. }
  2325. /* Connection is SS: */
  2326. for (ack_wait_timeout = 0;
  2327. ack_wait_timeout < DEFECT_7374_NUMBEROF_MAX_WAIT_LOOPS;
  2328. ack_wait_timeout++) {
  2329. state = readl(&dev->plregs->pl_ep_status_1)
  2330. & (0xff << STATE);
  2331. if ((state >= (ACK_GOOD_NORMAL << STATE)) &&
  2332. (state <= (ACK_GOOD_MORE_ACKS_TO_COME << STATE))) {
  2333. scratch |= DEFECT7374_FSM_SS_CONTROL_READ;
  2334. dev->bug7734_patched = 1;
  2335. break;
  2336. }
  2337. /*
  2338. * We have not yet received host's Data Phase ACK
  2339. * - Wait and try again.
  2340. */
  2341. udelay(DEFECT_7374_PROCESSOR_WAIT_TIME);
  2342. continue;
  2343. }
  2344. if (ack_wait_timeout >= DEFECT_7374_NUMBEROF_MAX_WAIT_LOOPS) {
  2345. ep_err(dev, "FAIL: Defect 7374 workaround waited but failed "
  2346. "to detect SS host's data phase ACK.");
  2347. ep_err(dev, "PL_EP_STATUS_1(23:16):.Expected from 0x11 to 0x16"
  2348. "got 0x%2.2x.\n", state >> STATE);
  2349. } else {
  2350. ep_warn(dev, "INFO: Defect 7374 workaround waited about\n"
  2351. "%duSec for Control Read Data Phase ACK\n",
  2352. DEFECT_7374_PROCESSOR_WAIT_TIME * ack_wait_timeout);
  2353. }
  2354. restore_data_eps:
  2355. /*
  2356. * Restore data EPs to their pre-workaround settings (disabled,
  2357. * initialized, and other details).
  2358. */
  2359. defect7374_disable_data_eps(dev);
  2360. set_idx_reg(dev->regs, SCRATCH, scratch);
  2361. return;
  2362. }
  2363. static void ep_clear_seqnum(struct net2280_ep *ep)
  2364. {
  2365. struct net2280 *dev = ep->dev;
  2366. u32 val;
  2367. static const u32 ep_pl[9] = { 0, 3, 4, 7, 8, 2, 5, 6, 9 };
  2368. val = readl(&dev->plregs->pl_ep_ctrl) & ~0x1f;
  2369. val |= ep_pl[ep->num];
  2370. writel(val, &dev->plregs->pl_ep_ctrl);
  2371. val |= BIT(SEQUENCE_NUMBER_RESET);
  2372. writel(val, &dev->plregs->pl_ep_ctrl);
  2373. return;
  2374. }
  2375. static void handle_stat0_irqs_superspeed(struct net2280 *dev,
  2376. struct net2280_ep *ep, struct usb_ctrlrequest r)
  2377. {
  2378. int tmp = 0;
  2379. #define w_value le16_to_cpu(r.wValue)
  2380. #define w_index le16_to_cpu(r.wIndex)
  2381. #define w_length le16_to_cpu(r.wLength)
  2382. switch (r.bRequest) {
  2383. struct net2280_ep *e;
  2384. u16 status;
  2385. case USB_REQ_SET_CONFIGURATION:
  2386. dev->addressed_state = !w_value;
  2387. goto usb3_delegate;
  2388. case USB_REQ_GET_STATUS:
  2389. switch (r.bRequestType) {
  2390. case (USB_DIR_IN | USB_TYPE_STANDARD | USB_RECIP_DEVICE):
  2391. status = dev->wakeup_enable ? 0x02 : 0x00;
  2392. if (dev->gadget.is_selfpowered)
  2393. status |= BIT(0);
  2394. status |= (dev->u1_enable << 2 | dev->u2_enable << 3 |
  2395. dev->ltm_enable << 4);
  2396. writel(0, &dev->epregs[0].ep_irqenb);
  2397. set_fifo_bytecount(ep, sizeof(status));
  2398. writel((__force u32) status, &dev->epregs[0].ep_data);
  2399. allow_status_338x(ep);
  2400. break;
  2401. case (USB_DIR_IN | USB_TYPE_STANDARD | USB_RECIP_ENDPOINT):
  2402. e = get_ep_by_addr(dev, w_index);
  2403. if (!e)
  2404. goto do_stall3;
  2405. status = readl(&e->regs->ep_rsp) &
  2406. BIT(CLEAR_ENDPOINT_HALT);
  2407. writel(0, &dev->epregs[0].ep_irqenb);
  2408. set_fifo_bytecount(ep, sizeof(status));
  2409. writel((__force u32) status, &dev->epregs[0].ep_data);
  2410. allow_status_338x(ep);
  2411. break;
  2412. default:
  2413. goto usb3_delegate;
  2414. }
  2415. break;
  2416. case USB_REQ_CLEAR_FEATURE:
  2417. switch (r.bRequestType) {
  2418. case (USB_DIR_OUT | USB_TYPE_STANDARD | USB_RECIP_DEVICE):
  2419. if (!dev->addressed_state) {
  2420. switch (w_value) {
  2421. case USB_DEVICE_U1_ENABLE:
  2422. dev->u1_enable = 0;
  2423. writel(readl(&dev->usb_ext->usbctl2) &
  2424. ~BIT(U1_ENABLE),
  2425. &dev->usb_ext->usbctl2);
  2426. allow_status_338x(ep);
  2427. goto next_endpoints3;
  2428. case USB_DEVICE_U2_ENABLE:
  2429. dev->u2_enable = 0;
  2430. writel(readl(&dev->usb_ext->usbctl2) &
  2431. ~BIT(U2_ENABLE),
  2432. &dev->usb_ext->usbctl2);
  2433. allow_status_338x(ep);
  2434. goto next_endpoints3;
  2435. case USB_DEVICE_LTM_ENABLE:
  2436. dev->ltm_enable = 0;
  2437. writel(readl(&dev->usb_ext->usbctl2) &
  2438. ~BIT(LTM_ENABLE),
  2439. &dev->usb_ext->usbctl2);
  2440. allow_status_338x(ep);
  2441. goto next_endpoints3;
  2442. default:
  2443. break;
  2444. }
  2445. }
  2446. if (w_value == USB_DEVICE_REMOTE_WAKEUP) {
  2447. dev->wakeup_enable = 0;
  2448. writel(readl(&dev->usb->usbctl) &
  2449. ~BIT(DEVICE_REMOTE_WAKEUP_ENABLE),
  2450. &dev->usb->usbctl);
  2451. allow_status_338x(ep);
  2452. break;
  2453. }
  2454. goto usb3_delegate;
  2455. case (USB_DIR_OUT | USB_TYPE_STANDARD | USB_RECIP_ENDPOINT):
  2456. e = get_ep_by_addr(dev, w_index);
  2457. if (!e)
  2458. goto do_stall3;
  2459. if (w_value != USB_ENDPOINT_HALT)
  2460. goto do_stall3;
  2461. ep_vdbg(dev, "%s clear halt\n", e->ep.name);
  2462. /*
  2463. * Workaround for SS SeqNum not cleared via
  2464. * Endpoint Halt (Clear) bit. select endpoint
  2465. */
  2466. ep_clear_seqnum(e);
  2467. clear_halt(e);
  2468. if (!list_empty(&e->queue) && e->td_dma)
  2469. restart_dma(e);
  2470. allow_status(ep);
  2471. ep->stopped = 1;
  2472. break;
  2473. default:
  2474. goto usb3_delegate;
  2475. }
  2476. break;
  2477. case USB_REQ_SET_FEATURE:
  2478. switch (r.bRequestType) {
  2479. case (USB_DIR_OUT | USB_TYPE_STANDARD | USB_RECIP_DEVICE):
  2480. if (!dev->addressed_state) {
  2481. switch (w_value) {
  2482. case USB_DEVICE_U1_ENABLE:
  2483. dev->u1_enable = 1;
  2484. writel(readl(&dev->usb_ext->usbctl2) |
  2485. BIT(U1_ENABLE),
  2486. &dev->usb_ext->usbctl2);
  2487. allow_status_338x(ep);
  2488. goto next_endpoints3;
  2489. case USB_DEVICE_U2_ENABLE:
  2490. dev->u2_enable = 1;
  2491. writel(readl(&dev->usb_ext->usbctl2) |
  2492. BIT(U2_ENABLE),
  2493. &dev->usb_ext->usbctl2);
  2494. allow_status_338x(ep);
  2495. goto next_endpoints3;
  2496. case USB_DEVICE_LTM_ENABLE:
  2497. dev->ltm_enable = 1;
  2498. writel(readl(&dev->usb_ext->usbctl2) |
  2499. BIT(LTM_ENABLE),
  2500. &dev->usb_ext->usbctl2);
  2501. allow_status_338x(ep);
  2502. goto next_endpoints3;
  2503. default:
  2504. break;
  2505. }
  2506. }
  2507. if (w_value == USB_DEVICE_REMOTE_WAKEUP) {
  2508. dev->wakeup_enable = 1;
  2509. writel(readl(&dev->usb->usbctl) |
  2510. BIT(DEVICE_REMOTE_WAKEUP_ENABLE),
  2511. &dev->usb->usbctl);
  2512. allow_status_338x(ep);
  2513. break;
  2514. }
  2515. goto usb3_delegate;
  2516. case (USB_DIR_OUT | USB_TYPE_STANDARD | USB_RECIP_ENDPOINT):
  2517. e = get_ep_by_addr(dev, w_index);
  2518. if (!e || (w_value != USB_ENDPOINT_HALT))
  2519. goto do_stall3;
  2520. ep->stopped = 1;
  2521. if (ep->num == 0)
  2522. ep->dev->protocol_stall = 1;
  2523. else {
  2524. if (ep->dma)
  2525. abort_dma(ep);
  2526. set_halt(ep);
  2527. }
  2528. allow_status_338x(ep);
  2529. break;
  2530. default:
  2531. goto usb3_delegate;
  2532. }
  2533. break;
  2534. default:
  2535. usb3_delegate:
  2536. ep_vdbg(dev, "setup %02x.%02x v%04x i%04x l%04x ep_cfg %08x\n",
  2537. r.bRequestType, r.bRequest,
  2538. w_value, w_index, w_length,
  2539. readl(&ep->cfg->ep_cfg));
  2540. ep->responded = 0;
  2541. spin_unlock(&dev->lock);
  2542. tmp = dev->driver->setup(&dev->gadget, &r);
  2543. spin_lock(&dev->lock);
  2544. }
  2545. do_stall3:
  2546. if (tmp < 0) {
  2547. ep_vdbg(dev, "req %02x.%02x protocol STALL; stat %d\n",
  2548. r.bRequestType, r.bRequest, tmp);
  2549. dev->protocol_stall = 1;
  2550. /* TD 9.9 Halt Endpoint test. TD 9.22 Set feature test */
  2551. set_halt(ep);
  2552. }
  2553. next_endpoints3:
  2554. #undef w_value
  2555. #undef w_index
  2556. #undef w_length
  2557. return;
  2558. }
  2559. static void usb338x_handle_ep_intr(struct net2280 *dev, u32 stat0)
  2560. {
  2561. u32 index;
  2562. u32 bit;
  2563. for (index = 0; index < ARRAY_SIZE(ep_bit); index++) {
  2564. bit = BIT(ep_bit[index]);
  2565. if (!stat0)
  2566. break;
  2567. if (!(stat0 & bit))
  2568. continue;
  2569. stat0 &= ~bit;
  2570. handle_ep_small(&dev->ep[index]);
  2571. }
  2572. }
  2573. static void handle_stat0_irqs(struct net2280 *dev, u32 stat)
  2574. {
  2575. struct net2280_ep *ep;
  2576. u32 num, scratch;
  2577. /* most of these don't need individual acks */
  2578. stat &= ~BIT(INTA_ASSERTED);
  2579. if (!stat)
  2580. return;
  2581. /* ep_dbg(dev, "irqstat0 %04x\n", stat); */
  2582. /* starting a control request? */
  2583. if (unlikely(stat & BIT(SETUP_PACKET_INTERRUPT))) {
  2584. union {
  2585. u32 raw[2];
  2586. struct usb_ctrlrequest r;
  2587. } u;
  2588. int tmp;
  2589. struct net2280_request *req;
  2590. if (dev->gadget.speed == USB_SPEED_UNKNOWN) {
  2591. u32 val = readl(&dev->usb->usbstat);
  2592. if (val & BIT(SUPER_SPEED)) {
  2593. dev->gadget.speed = USB_SPEED_SUPER;
  2594. usb_ep_set_maxpacket_limit(&dev->ep[0].ep,
  2595. EP0_SS_MAX_PACKET_SIZE);
  2596. } else if (val & BIT(HIGH_SPEED)) {
  2597. dev->gadget.speed = USB_SPEED_HIGH;
  2598. usb_ep_set_maxpacket_limit(&dev->ep[0].ep,
  2599. EP0_HS_MAX_PACKET_SIZE);
  2600. } else {
  2601. dev->gadget.speed = USB_SPEED_FULL;
  2602. usb_ep_set_maxpacket_limit(&dev->ep[0].ep,
  2603. EP0_HS_MAX_PACKET_SIZE);
  2604. }
  2605. net2280_led_speed(dev, dev->gadget.speed);
  2606. ep_dbg(dev, "%s\n",
  2607. usb_speed_string(dev->gadget.speed));
  2608. }
  2609. ep = &dev->ep[0];
  2610. ep->irqs++;
  2611. /* make sure any leftover request state is cleared */
  2612. stat &= ~BIT(ENDPOINT_0_INTERRUPT);
  2613. while (!list_empty(&ep->queue)) {
  2614. req = list_entry(ep->queue.next,
  2615. struct net2280_request, queue);
  2616. done(ep, req, (req->req.actual == req->req.length)
  2617. ? 0 : -EPROTO);
  2618. }
  2619. ep->stopped = 0;
  2620. dev->protocol_stall = 0;
  2621. if (!(dev->quirks & PLX_SUPERSPEED)) {
  2622. if (ep->dev->quirks & PLX_2280)
  2623. tmp = BIT(FIFO_OVERFLOW) |
  2624. BIT(FIFO_UNDERFLOW);
  2625. else
  2626. tmp = 0;
  2627. writel(tmp | BIT(TIMEOUT) |
  2628. BIT(USB_STALL_SENT) |
  2629. BIT(USB_IN_NAK_SENT) |
  2630. BIT(USB_IN_ACK_RCVD) |
  2631. BIT(USB_OUT_PING_NAK_SENT) |
  2632. BIT(USB_OUT_ACK_SENT) |
  2633. BIT(SHORT_PACKET_OUT_DONE_INTERRUPT) |
  2634. BIT(SHORT_PACKET_TRANSFERRED_INTERRUPT) |
  2635. BIT(DATA_PACKET_RECEIVED_INTERRUPT) |
  2636. BIT(DATA_PACKET_TRANSMITTED_INTERRUPT) |
  2637. BIT(DATA_OUT_PING_TOKEN_INTERRUPT) |
  2638. BIT(DATA_IN_TOKEN_INTERRUPT),
  2639. &ep->regs->ep_stat);
  2640. }
  2641. u.raw[0] = readl(&dev->usb->setup0123);
  2642. u.raw[1] = readl(&dev->usb->setup4567);
  2643. cpu_to_le32s(&u.raw[0]);
  2644. cpu_to_le32s(&u.raw[1]);
  2645. if ((dev->quirks & PLX_SUPERSPEED) && !dev->bug7734_patched)
  2646. defect7374_workaround(dev, u.r);
  2647. tmp = 0;
  2648. #define w_value le16_to_cpu(u.r.wValue)
  2649. #define w_index le16_to_cpu(u.r.wIndex)
  2650. #define w_length le16_to_cpu(u.r.wLength)
  2651. /* ack the irq */
  2652. writel(BIT(SETUP_PACKET_INTERRUPT), &dev->regs->irqstat0);
  2653. stat ^= BIT(SETUP_PACKET_INTERRUPT);
  2654. /* watch control traffic at the token level, and force
  2655. * synchronization before letting the status stage happen.
  2656. * FIXME ignore tokens we'll NAK, until driver responds.
  2657. * that'll mean a lot less irqs for some drivers.
  2658. */
  2659. ep->is_in = (u.r.bRequestType & USB_DIR_IN) != 0;
  2660. if (ep->is_in) {
  2661. scratch = BIT(DATA_PACKET_TRANSMITTED_INTERRUPT) |
  2662. BIT(DATA_OUT_PING_TOKEN_INTERRUPT) |
  2663. BIT(DATA_IN_TOKEN_INTERRUPT);
  2664. stop_out_naking(ep);
  2665. } else
  2666. scratch = BIT(DATA_PACKET_RECEIVED_INTERRUPT) |
  2667. BIT(DATA_OUT_PING_TOKEN_INTERRUPT) |
  2668. BIT(DATA_IN_TOKEN_INTERRUPT);
  2669. writel(scratch, &dev->epregs[0].ep_irqenb);
  2670. /* we made the hardware handle most lowlevel requests;
  2671. * everything else goes uplevel to the gadget code.
  2672. */
  2673. ep->responded = 1;
  2674. if (dev->gadget.speed == USB_SPEED_SUPER) {
  2675. handle_stat0_irqs_superspeed(dev, ep, u.r);
  2676. goto next_endpoints;
  2677. }
  2678. switch (u.r.bRequest) {
  2679. case USB_REQ_GET_STATUS: {
  2680. struct net2280_ep *e;
  2681. __le32 status;
  2682. /* hw handles device and interface status */
  2683. if (u.r.bRequestType != (USB_DIR_IN|USB_RECIP_ENDPOINT))
  2684. goto delegate;
  2685. e = get_ep_by_addr(dev, w_index);
  2686. if (!e || w_length > 2)
  2687. goto do_stall;
  2688. if (readl(&e->regs->ep_rsp) & BIT(SET_ENDPOINT_HALT))
  2689. status = cpu_to_le32(1);
  2690. else
  2691. status = cpu_to_le32(0);
  2692. /* don't bother with a request object! */
  2693. writel(0, &dev->epregs[0].ep_irqenb);
  2694. set_fifo_bytecount(ep, w_length);
  2695. writel((__force u32)status, &dev->epregs[0].ep_data);
  2696. allow_status(ep);
  2697. ep_vdbg(dev, "%s stat %02x\n", ep->ep.name, status);
  2698. goto next_endpoints;
  2699. }
  2700. break;
  2701. case USB_REQ_CLEAR_FEATURE: {
  2702. struct net2280_ep *e;
  2703. /* hw handles device features */
  2704. if (u.r.bRequestType != USB_RECIP_ENDPOINT)
  2705. goto delegate;
  2706. if (w_value != USB_ENDPOINT_HALT || w_length != 0)
  2707. goto do_stall;
  2708. e = get_ep_by_addr(dev, w_index);
  2709. if (!e)
  2710. goto do_stall;
  2711. if (e->wedged) {
  2712. ep_vdbg(dev, "%s wedged, halt not cleared\n",
  2713. ep->ep.name);
  2714. } else {
  2715. ep_vdbg(dev, "%s clear halt\n", e->ep.name);
  2716. clear_halt(e);
  2717. if ((ep->dev->quirks & PLX_SUPERSPEED) &&
  2718. !list_empty(&e->queue) && e->td_dma)
  2719. restart_dma(e);
  2720. }
  2721. allow_status(ep);
  2722. goto next_endpoints;
  2723. }
  2724. break;
  2725. case USB_REQ_SET_FEATURE: {
  2726. struct net2280_ep *e;
  2727. /* hw handles device features */
  2728. if (u.r.bRequestType != USB_RECIP_ENDPOINT)
  2729. goto delegate;
  2730. if (w_value != USB_ENDPOINT_HALT || w_length != 0)
  2731. goto do_stall;
  2732. e = get_ep_by_addr(dev, w_index);
  2733. if (!e)
  2734. goto do_stall;
  2735. if (e->ep.name == ep0name)
  2736. goto do_stall;
  2737. set_halt(e);
  2738. if ((dev->quirks & PLX_SUPERSPEED) && e->dma)
  2739. abort_dma(e);
  2740. allow_status(ep);
  2741. ep_vdbg(dev, "%s set halt\n", ep->ep.name);
  2742. goto next_endpoints;
  2743. }
  2744. break;
  2745. default:
  2746. delegate:
  2747. ep_vdbg(dev, "setup %02x.%02x v%04x i%04x l%04x "
  2748. "ep_cfg %08x\n",
  2749. u.r.bRequestType, u.r.bRequest,
  2750. w_value, w_index, w_length,
  2751. readl(&ep->cfg->ep_cfg));
  2752. ep->responded = 0;
  2753. spin_unlock(&dev->lock);
  2754. tmp = dev->driver->setup(&dev->gadget, &u.r);
  2755. spin_lock(&dev->lock);
  2756. }
  2757. /* stall ep0 on error */
  2758. if (tmp < 0) {
  2759. do_stall:
  2760. ep_vdbg(dev, "req %02x.%02x protocol STALL; stat %d\n",
  2761. u.r.bRequestType, u.r.bRequest, tmp);
  2762. dev->protocol_stall = 1;
  2763. }
  2764. /* some in/out token irq should follow; maybe stall then.
  2765. * driver must queue a request (even zlp) or halt ep0
  2766. * before the host times out.
  2767. */
  2768. }
  2769. #undef w_value
  2770. #undef w_index
  2771. #undef w_length
  2772. next_endpoints:
  2773. if ((dev->quirks & PLX_SUPERSPEED) && dev->enhanced_mode) {
  2774. u32 mask = (BIT(ENDPOINT_0_INTERRUPT) |
  2775. USB3380_IRQSTAT0_EP_INTR_MASK_IN |
  2776. USB3380_IRQSTAT0_EP_INTR_MASK_OUT);
  2777. if (stat & mask) {
  2778. usb338x_handle_ep_intr(dev, stat & mask);
  2779. stat &= ~mask;
  2780. }
  2781. } else {
  2782. /* endpoint data irq ? */
  2783. scratch = stat & 0x7f;
  2784. stat &= ~0x7f;
  2785. for (num = 0; scratch; num++) {
  2786. u32 t;
  2787. /* do this endpoint's FIFO and queue need tending? */
  2788. t = BIT(num);
  2789. if ((scratch & t) == 0)
  2790. continue;
  2791. scratch ^= t;
  2792. ep = &dev->ep[num];
  2793. handle_ep_small(ep);
  2794. }
  2795. }
  2796. if (stat)
  2797. ep_dbg(dev, "unhandled irqstat0 %08x\n", stat);
  2798. }
  2799. #define DMA_INTERRUPTS (BIT(DMA_D_INTERRUPT) | \
  2800. BIT(DMA_C_INTERRUPT) | \
  2801. BIT(DMA_B_INTERRUPT) | \
  2802. BIT(DMA_A_INTERRUPT))
  2803. #define PCI_ERROR_INTERRUPTS ( \
  2804. BIT(PCI_MASTER_ABORT_RECEIVED_INTERRUPT) | \
  2805. BIT(PCI_TARGET_ABORT_RECEIVED_INTERRUPT) | \
  2806. BIT(PCI_RETRY_ABORT_INTERRUPT))
  2807. static void handle_stat1_irqs(struct net2280 *dev, u32 stat)
  2808. __releases(dev->lock)
  2809. __acquires(dev->lock)
  2810. {
  2811. struct net2280_ep *ep;
  2812. u32 tmp, num, mask, scratch;
  2813. /* after disconnect there's nothing else to do! */
  2814. tmp = BIT(VBUS_INTERRUPT) | BIT(ROOT_PORT_RESET_INTERRUPT);
  2815. mask = BIT(SUPER_SPEED) | BIT(HIGH_SPEED) | BIT(FULL_SPEED);
  2816. /* VBUS disconnect is indicated by VBUS_PIN and VBUS_INTERRUPT set.
  2817. * Root Port Reset is indicated by ROOT_PORT_RESET_INTERRUPT set and
  2818. * both HIGH_SPEED and FULL_SPEED clear (as ROOT_PORT_RESET_INTERRUPT
  2819. * only indicates a change in the reset state).
  2820. */
  2821. if (stat & tmp) {
  2822. bool reset = false;
  2823. bool disconnect = false;
  2824. /*
  2825. * Ignore disconnects and resets if the speed hasn't been set.
  2826. * VBUS can bounce and there's always an initial reset.
  2827. */
  2828. writel(tmp, &dev->regs->irqstat1);
  2829. if (dev->gadget.speed != USB_SPEED_UNKNOWN) {
  2830. if ((stat & BIT(VBUS_INTERRUPT)) &&
  2831. (readl(&dev->usb->usbctl) &
  2832. BIT(VBUS_PIN)) == 0) {
  2833. disconnect = true;
  2834. ep_dbg(dev, "disconnect %s\n",
  2835. dev->driver->driver.name);
  2836. } else if ((stat & BIT(ROOT_PORT_RESET_INTERRUPT)) &&
  2837. (readl(&dev->usb->usbstat) & mask)
  2838. == 0) {
  2839. reset = true;
  2840. ep_dbg(dev, "reset %s\n",
  2841. dev->driver->driver.name);
  2842. }
  2843. if (disconnect || reset) {
  2844. stop_activity(dev, dev->driver);
  2845. ep0_start(dev);
  2846. spin_unlock(&dev->lock);
  2847. if (reset)
  2848. usb_gadget_udc_reset
  2849. (&dev->gadget, dev->driver);
  2850. else
  2851. (dev->driver->disconnect)
  2852. (&dev->gadget);
  2853. spin_lock(&dev->lock);
  2854. return;
  2855. }
  2856. }
  2857. stat &= ~tmp;
  2858. /* vBUS can bounce ... one of many reasons to ignore the
  2859. * notion of hotplug events on bus connect/disconnect!
  2860. */
  2861. if (!stat)
  2862. return;
  2863. }
  2864. /* NOTE: chip stays in PCI D0 state for now, but it could
  2865. * enter D1 to save more power
  2866. */
  2867. tmp = BIT(SUSPEND_REQUEST_CHANGE_INTERRUPT);
  2868. if (stat & tmp) {
  2869. writel(tmp, &dev->regs->irqstat1);
  2870. spin_unlock(&dev->lock);
  2871. if (stat & BIT(SUSPEND_REQUEST_INTERRUPT)) {
  2872. if (dev->driver->suspend)
  2873. dev->driver->suspend(&dev->gadget);
  2874. if (!enable_suspend)
  2875. stat &= ~BIT(SUSPEND_REQUEST_INTERRUPT);
  2876. } else {
  2877. if (dev->driver->resume)
  2878. dev->driver->resume(&dev->gadget);
  2879. /* at high speed, note erratum 0133 */
  2880. }
  2881. spin_lock(&dev->lock);
  2882. stat &= ~tmp;
  2883. }
  2884. /* clear any other status/irqs */
  2885. if (stat)
  2886. writel(stat, &dev->regs->irqstat1);
  2887. /* some status we can just ignore */
  2888. if (dev->quirks & PLX_2280)
  2889. stat &= ~(BIT(CONTROL_STATUS_INTERRUPT) |
  2890. BIT(SUSPEND_REQUEST_INTERRUPT) |
  2891. BIT(RESUME_INTERRUPT) |
  2892. BIT(SOF_INTERRUPT));
  2893. else
  2894. stat &= ~(BIT(CONTROL_STATUS_INTERRUPT) |
  2895. BIT(RESUME_INTERRUPT) |
  2896. BIT(SOF_DOWN_INTERRUPT) |
  2897. BIT(SOF_INTERRUPT));
  2898. if (!stat)
  2899. return;
  2900. /* ep_dbg(dev, "irqstat1 %08x\n", stat);*/
  2901. /* DMA status, for ep-{a,b,c,d} */
  2902. scratch = stat & DMA_INTERRUPTS;
  2903. stat &= ~DMA_INTERRUPTS;
  2904. scratch >>= 9;
  2905. for (num = 0; scratch; num++) {
  2906. struct net2280_dma_regs __iomem *dma;
  2907. tmp = BIT(num);
  2908. if ((tmp & scratch) == 0)
  2909. continue;
  2910. scratch ^= tmp;
  2911. ep = &dev->ep[num + 1];
  2912. dma = ep->dma;
  2913. if (!dma)
  2914. continue;
  2915. /* clear ep's dma status */
  2916. tmp = readl(&dma->dmastat);
  2917. writel(tmp, &dma->dmastat);
  2918. /* dma sync*/
  2919. if (dev->quirks & PLX_SUPERSPEED) {
  2920. u32 r_dmacount = readl(&dma->dmacount);
  2921. if (!ep->is_in && (r_dmacount & 0x00FFFFFF) &&
  2922. (tmp & BIT(DMA_TRANSACTION_DONE_INTERRUPT)))
  2923. continue;
  2924. }
  2925. if (!(tmp & BIT(DMA_TRANSACTION_DONE_INTERRUPT))) {
  2926. ep_dbg(ep->dev, "%s no xact done? %08x\n",
  2927. ep->ep.name, tmp);
  2928. continue;
  2929. }
  2930. stop_dma(ep->dma);
  2931. /* OUT transfers terminate when the data from the
  2932. * host is in our memory. Process whatever's done.
  2933. * On this path, we know transfer's last packet wasn't
  2934. * less than req->length. NAK_OUT_PACKETS may be set,
  2935. * or the FIFO may already be holding new packets.
  2936. *
  2937. * IN transfers can linger in the FIFO for a very
  2938. * long time ... we ignore that for now, accounting
  2939. * precisely (like PIO does) needs per-packet irqs
  2940. */
  2941. scan_dma_completions(ep);
  2942. /* disable dma on inactive queues; else maybe restart */
  2943. if (!list_empty(&ep->queue)) {
  2944. tmp = readl(&dma->dmactl);
  2945. restart_dma(ep);
  2946. }
  2947. ep->irqs++;
  2948. }
  2949. /* NOTE: there are other PCI errors we might usefully notice.
  2950. * if they appear very often, here's where to try recovering.
  2951. */
  2952. if (stat & PCI_ERROR_INTERRUPTS) {
  2953. ep_err(dev, "pci dma error; stat %08x\n", stat);
  2954. stat &= ~PCI_ERROR_INTERRUPTS;
  2955. /* these are fatal errors, but "maybe" they won't
  2956. * happen again ...
  2957. */
  2958. stop_activity(dev, dev->driver);
  2959. ep0_start(dev);
  2960. stat = 0;
  2961. }
  2962. if (stat)
  2963. ep_dbg(dev, "unhandled irqstat1 %08x\n", stat);
  2964. }
  2965. static irqreturn_t net2280_irq(int irq, void *_dev)
  2966. {
  2967. struct net2280 *dev = _dev;
  2968. /* shared interrupt, not ours */
  2969. if ((dev->quirks & PLX_LEGACY) &&
  2970. (!(readl(&dev->regs->irqstat0) & BIT(INTA_ASSERTED))))
  2971. return IRQ_NONE;
  2972. spin_lock(&dev->lock);
  2973. /* handle disconnect, dma, and more */
  2974. handle_stat1_irqs(dev, readl(&dev->regs->irqstat1));
  2975. /* control requests and PIO */
  2976. handle_stat0_irqs(dev, readl(&dev->regs->irqstat0));
  2977. if (dev->quirks & PLX_SUPERSPEED) {
  2978. /* re-enable interrupt to trigger any possible new interrupt */
  2979. u32 pciirqenb1 = readl(&dev->regs->pciirqenb1);
  2980. writel(pciirqenb1 & 0x7FFFFFFF, &dev->regs->pciirqenb1);
  2981. writel(pciirqenb1, &dev->regs->pciirqenb1);
  2982. }
  2983. spin_unlock(&dev->lock);
  2984. return IRQ_HANDLED;
  2985. }
  2986. /*-------------------------------------------------------------------------*/
  2987. static void gadget_release(struct device *_dev)
  2988. {
  2989. struct net2280 *dev = dev_get_drvdata(_dev);
  2990. kfree(dev);
  2991. }
  2992. /* tear down the binding between this driver and the pci device */
  2993. static void net2280_remove(struct pci_dev *pdev)
  2994. {
  2995. struct net2280 *dev = pci_get_drvdata(pdev);
  2996. usb_del_gadget_udc(&dev->gadget);
  2997. BUG_ON(dev->driver);
  2998. /* then clean up the resources we allocated during probe() */
  2999. net2280_led_shutdown(dev);
  3000. if (dev->requests) {
  3001. int i;
  3002. for (i = 1; i < 5; i++) {
  3003. if (!dev->ep[i].dummy)
  3004. continue;
  3005. pci_pool_free(dev->requests, dev->ep[i].dummy,
  3006. dev->ep[i].td_dma);
  3007. }
  3008. pci_pool_destroy(dev->requests);
  3009. }
  3010. if (dev->got_irq)
  3011. free_irq(pdev->irq, dev);
  3012. if (dev->quirks & PLX_SUPERSPEED)
  3013. pci_disable_msi(pdev);
  3014. if (dev->regs)
  3015. iounmap(dev->regs);
  3016. if (dev->region)
  3017. release_mem_region(pci_resource_start(pdev, 0),
  3018. pci_resource_len(pdev, 0));
  3019. if (dev->enabled)
  3020. pci_disable_device(pdev);
  3021. device_remove_file(&pdev->dev, &dev_attr_registers);
  3022. ep_info(dev, "unbind\n");
  3023. }
  3024. /* wrap this driver around the specified device, but
  3025. * don't respond over USB until a gadget driver binds to us.
  3026. */
  3027. static int net2280_probe(struct pci_dev *pdev, const struct pci_device_id *id)
  3028. {
  3029. struct net2280 *dev;
  3030. unsigned long resource, len;
  3031. void __iomem *base = NULL;
  3032. int retval, i;
  3033. /* alloc, and start init */
  3034. dev = kzalloc(sizeof(*dev), GFP_KERNEL);
  3035. if (dev == NULL) {
  3036. retval = -ENOMEM;
  3037. goto done;
  3038. }
  3039. pci_set_drvdata(pdev, dev);
  3040. spin_lock_init(&dev->lock);
  3041. dev->quirks = id->driver_data;
  3042. dev->pdev = pdev;
  3043. dev->gadget.ops = &net2280_ops;
  3044. dev->gadget.max_speed = (dev->quirks & PLX_SUPERSPEED) ?
  3045. USB_SPEED_SUPER : USB_SPEED_HIGH;
  3046. /* the "gadget" abstracts/virtualizes the controller */
  3047. dev->gadget.name = driver_name;
  3048. /* now all the pci goodies ... */
  3049. if (pci_enable_device(pdev) < 0) {
  3050. retval = -ENODEV;
  3051. goto done;
  3052. }
  3053. dev->enabled = 1;
  3054. /* BAR 0 holds all the registers
  3055. * BAR 1 is 8051 memory; unused here (note erratum 0103)
  3056. * BAR 2 is fifo memory; unused here
  3057. */
  3058. resource = pci_resource_start(pdev, 0);
  3059. len = pci_resource_len(pdev, 0);
  3060. if (!request_mem_region(resource, len, driver_name)) {
  3061. ep_dbg(dev, "controller already in use\n");
  3062. retval = -EBUSY;
  3063. goto done;
  3064. }
  3065. dev->region = 1;
  3066. /* FIXME provide firmware download interface to put
  3067. * 8051 code into the chip, e.g. to turn on PCI PM.
  3068. */
  3069. base = ioremap_nocache(resource, len);
  3070. if (base == NULL) {
  3071. ep_dbg(dev, "can't map memory\n");
  3072. retval = -EFAULT;
  3073. goto done;
  3074. }
  3075. dev->regs = (struct net2280_regs __iomem *) base;
  3076. dev->usb = (struct net2280_usb_regs __iomem *) (base + 0x0080);
  3077. dev->pci = (struct net2280_pci_regs __iomem *) (base + 0x0100);
  3078. dev->dma = (struct net2280_dma_regs __iomem *) (base + 0x0180);
  3079. dev->dep = (struct net2280_dep_regs __iomem *) (base + 0x0200);
  3080. dev->epregs = (struct net2280_ep_regs __iomem *) (base + 0x0300);
  3081. if (dev->quirks & PLX_SUPERSPEED) {
  3082. u32 fsmvalue;
  3083. u32 usbstat;
  3084. dev->usb_ext = (struct usb338x_usb_ext_regs __iomem *)
  3085. (base + 0x00b4);
  3086. dev->llregs = (struct usb338x_ll_regs __iomem *)
  3087. (base + 0x0700);
  3088. dev->ll_lfps_regs = (struct usb338x_ll_lfps_regs __iomem *)
  3089. (base + 0x0748);
  3090. dev->ll_tsn_regs = (struct usb338x_ll_tsn_regs __iomem *)
  3091. (base + 0x077c);
  3092. dev->ll_chicken_reg = (struct usb338x_ll_chi_regs __iomem *)
  3093. (base + 0x079c);
  3094. dev->plregs = (struct usb338x_pl_regs __iomem *)
  3095. (base + 0x0800);
  3096. usbstat = readl(&dev->usb->usbstat);
  3097. dev->enhanced_mode = !!(usbstat & BIT(11));
  3098. dev->n_ep = (dev->enhanced_mode) ? 9 : 5;
  3099. /* put into initial config, link up all endpoints */
  3100. fsmvalue = get_idx_reg(dev->regs, SCRATCH) &
  3101. (0xf << DEFECT7374_FSM_FIELD);
  3102. /* See if firmware needs to set up for workaround: */
  3103. if (fsmvalue == DEFECT7374_FSM_SS_CONTROL_READ) {
  3104. dev->bug7734_patched = 1;
  3105. writel(0, &dev->usb->usbctl);
  3106. } else
  3107. dev->bug7734_patched = 0;
  3108. } else {
  3109. dev->enhanced_mode = 0;
  3110. dev->n_ep = 7;
  3111. /* put into initial config, link up all endpoints */
  3112. writel(0, &dev->usb->usbctl);
  3113. }
  3114. usb_reset(dev);
  3115. usb_reinit(dev);
  3116. /* irq setup after old hardware is cleaned up */
  3117. if (!pdev->irq) {
  3118. ep_err(dev, "No IRQ. Check PCI setup!\n");
  3119. retval = -ENODEV;
  3120. goto done;
  3121. }
  3122. if (dev->quirks & PLX_SUPERSPEED)
  3123. if (pci_enable_msi(pdev))
  3124. ep_err(dev, "Failed to enable MSI mode\n");
  3125. if (request_irq(pdev->irq, net2280_irq, IRQF_SHARED,
  3126. driver_name, dev)) {
  3127. ep_err(dev, "request interrupt %d failed\n", pdev->irq);
  3128. retval = -EBUSY;
  3129. goto done;
  3130. }
  3131. dev->got_irq = 1;
  3132. /* DMA setup */
  3133. /* NOTE: we know only the 32 LSBs of dma addresses may be nonzero */
  3134. dev->requests = pci_pool_create("requests", pdev,
  3135. sizeof(struct net2280_dma),
  3136. 0 /* no alignment requirements */,
  3137. 0 /* or page-crossing issues */);
  3138. if (!dev->requests) {
  3139. ep_dbg(dev, "can't get request pool\n");
  3140. retval = -ENOMEM;
  3141. goto done;
  3142. }
  3143. for (i = 1; i < 5; i++) {
  3144. struct net2280_dma *td;
  3145. td = pci_pool_alloc(dev->requests, GFP_KERNEL,
  3146. &dev->ep[i].td_dma);
  3147. if (!td) {
  3148. ep_dbg(dev, "can't get dummy %d\n", i);
  3149. retval = -ENOMEM;
  3150. goto done;
  3151. }
  3152. td->dmacount = 0; /* not VALID */
  3153. td->dmadesc = td->dmaaddr;
  3154. dev->ep[i].dummy = td;
  3155. }
  3156. /* enable lower-overhead pci memory bursts during DMA */
  3157. if (dev->quirks & PLX_LEGACY)
  3158. writel(BIT(DMA_MEMORY_WRITE_AND_INVALIDATE_ENABLE) |
  3159. /*
  3160. * 256 write retries may not be enough...
  3161. BIT(PCI_RETRY_ABORT_ENABLE) |
  3162. */
  3163. BIT(DMA_READ_MULTIPLE_ENABLE) |
  3164. BIT(DMA_READ_LINE_ENABLE),
  3165. &dev->pci->pcimstctl);
  3166. /* erratum 0115 shouldn't appear: Linux inits PCI_LATENCY_TIMER */
  3167. pci_set_master(pdev);
  3168. pci_try_set_mwi(pdev);
  3169. /* ... also flushes any posted pci writes */
  3170. dev->chiprev = get_idx_reg(dev->regs, REG_CHIPREV) & 0xffff;
  3171. /* done */
  3172. ep_info(dev, "%s\n", driver_desc);
  3173. ep_info(dev, "irq %d, pci mem %p, chip rev %04x\n",
  3174. pdev->irq, base, dev->chiprev);
  3175. ep_info(dev, "version: " DRIVER_VERSION "; %s\n",
  3176. dev->enhanced_mode ? "enhanced mode" : "legacy mode");
  3177. retval = device_create_file(&pdev->dev, &dev_attr_registers);
  3178. if (retval)
  3179. goto done;
  3180. retval = usb_add_gadget_udc_release(&pdev->dev, &dev->gadget,
  3181. gadget_release);
  3182. if (retval)
  3183. goto done;
  3184. return 0;
  3185. done:
  3186. if (dev)
  3187. net2280_remove(pdev);
  3188. return retval;
  3189. }
  3190. /* make sure the board is quiescent; otherwise it will continue
  3191. * generating IRQs across the upcoming reboot.
  3192. */
  3193. static void net2280_shutdown(struct pci_dev *pdev)
  3194. {
  3195. struct net2280 *dev = pci_get_drvdata(pdev);
  3196. /* disable IRQs */
  3197. writel(0, &dev->regs->pciirqenb0);
  3198. writel(0, &dev->regs->pciirqenb1);
  3199. /* disable the pullup so the host will think we're gone */
  3200. writel(0, &dev->usb->usbctl);
  3201. }
  3202. /*-------------------------------------------------------------------------*/
  3203. static const struct pci_device_id pci_ids[] = { {
  3204. .class = ((PCI_CLASS_SERIAL_USB << 8) | 0xfe),
  3205. .class_mask = ~0,
  3206. .vendor = PCI_VENDOR_ID_PLX_LEGACY,
  3207. .device = 0x2280,
  3208. .subvendor = PCI_ANY_ID,
  3209. .subdevice = PCI_ANY_ID,
  3210. .driver_data = PLX_LEGACY | PLX_2280,
  3211. }, {
  3212. .class = ((PCI_CLASS_SERIAL_USB << 8) | 0xfe),
  3213. .class_mask = ~0,
  3214. .vendor = PCI_VENDOR_ID_PLX_LEGACY,
  3215. .device = 0x2282,
  3216. .subvendor = PCI_ANY_ID,
  3217. .subdevice = PCI_ANY_ID,
  3218. .driver_data = PLX_LEGACY,
  3219. },
  3220. {
  3221. .class = ((PCI_CLASS_SERIAL_USB << 8) | 0xfe),
  3222. .class_mask = ~0,
  3223. .vendor = PCI_VENDOR_ID_PLX,
  3224. .device = 0x3380,
  3225. .subvendor = PCI_ANY_ID,
  3226. .subdevice = PCI_ANY_ID,
  3227. .driver_data = PLX_SUPERSPEED,
  3228. },
  3229. {
  3230. .class = ((PCI_CLASS_SERIAL_USB << 8) | 0xfe),
  3231. .class_mask = ~0,
  3232. .vendor = PCI_VENDOR_ID_PLX,
  3233. .device = 0x3382,
  3234. .subvendor = PCI_ANY_ID,
  3235. .subdevice = PCI_ANY_ID,
  3236. .driver_data = PLX_SUPERSPEED,
  3237. },
  3238. { /* end: all zeroes */ }
  3239. };
  3240. MODULE_DEVICE_TABLE(pci, pci_ids);
  3241. /* pci driver glue; this is a "new style" PCI driver module */
  3242. static struct pci_driver net2280_pci_driver = {
  3243. .name = (char *) driver_name,
  3244. .id_table = pci_ids,
  3245. .probe = net2280_probe,
  3246. .remove = net2280_remove,
  3247. .shutdown = net2280_shutdown,
  3248. /* FIXME add power management support */
  3249. };
  3250. module_pci_driver(net2280_pci_driver);
  3251. MODULE_DESCRIPTION(DRIVER_DESC);
  3252. MODULE_AUTHOR("David Brownell");
  3253. MODULE_LICENSE("GPL");