net2280.h 11 KB

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  1. /*
  2. * NetChip 2280 high/full speed USB device controller.
  3. * Unlike many such controllers, this one talks PCI.
  4. */
  5. /*
  6. * Copyright (C) 2002 NetChip Technology, Inc. (http://www.netchip.com)
  7. * Copyright (C) 2003 David Brownell
  8. * Copyright (C) 2014 Ricardo Ribalda - Qtechnology/AS
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of the GNU General Public License as published by
  12. * the Free Software Foundation; either version 2 of the License, or
  13. * (at your option) any later version.
  14. */
  15. #include <linux/usb/net2280.h>
  16. #include <linux/usb/usb338x.h>
  17. /*-------------------------------------------------------------------------*/
  18. #ifdef __KERNEL__
  19. /* indexed registers [11.10] are accessed indirectly
  20. * caller must own the device lock.
  21. */
  22. static inline u32 get_idx_reg(struct net2280_regs __iomem *regs, u32 index)
  23. {
  24. writel(index, &regs->idxaddr);
  25. /* NOTE: synchs device/cpu memory views */
  26. return readl(&regs->idxdata);
  27. }
  28. static inline void
  29. set_idx_reg(struct net2280_regs __iomem *regs, u32 index, u32 value)
  30. {
  31. writel(index, &regs->idxaddr);
  32. writel(value, &regs->idxdata);
  33. /* posted, may not be visible yet */
  34. }
  35. #endif /* __KERNEL__ */
  36. #define PCI_VENDOR_ID_PLX_LEGACY 0x17cc
  37. #define PLX_LEGACY BIT(0)
  38. #define PLX_2280 BIT(1)
  39. #define PLX_SUPERSPEED BIT(2)
  40. #define REG_DIAG 0x0
  41. #define RETRY_COUNTER 16
  42. #define FORCE_PCI_SERR 11
  43. #define FORCE_PCI_INTERRUPT 10
  44. #define FORCE_USB_INTERRUPT 9
  45. #define FORCE_CPU_INTERRUPT 8
  46. #define ILLEGAL_BYTE_ENABLES 5
  47. #define FAST_TIMES 4
  48. #define FORCE_RECEIVE_ERROR 2
  49. #define FORCE_TRANSMIT_CRC_ERROR 0
  50. #define REG_FRAME 0x02 /* from last sof */
  51. #define REG_CHIPREV 0x03 /* in bcd */
  52. #define REG_HS_NAK_RATE 0x0a /* NAK per N uframes */
  53. #define CHIPREV_1 0x0100
  54. #define CHIPREV_1A 0x0110
  55. /* DEFECT 7374 */
  56. #define DEFECT_7374_NUMBEROF_MAX_WAIT_LOOPS 200
  57. #define DEFECT_7374_PROCESSOR_WAIT_TIME 10
  58. /* ep0 max packet size */
  59. #define EP0_SS_MAX_PACKET_SIZE 0x200
  60. #define EP0_HS_MAX_PACKET_SIZE 0x40
  61. #ifdef __KERNEL__
  62. /*-------------------------------------------------------------------------*/
  63. /* [8.3] for scatter/gather i/o
  64. * use struct net2280_dma_regs bitfields
  65. */
  66. struct net2280_dma {
  67. __le32 dmacount;
  68. __le32 dmaaddr; /* the buffer */
  69. __le32 dmadesc; /* next dma descriptor */
  70. __le32 _reserved;
  71. } __aligned(16);
  72. /*-------------------------------------------------------------------------*/
  73. /* DRIVER DATA STRUCTURES and UTILITIES */
  74. struct net2280_ep {
  75. struct usb_ep ep;
  76. struct net2280_ep_regs __iomem *cfg;
  77. struct net2280_ep_regs __iomem *regs;
  78. struct net2280_dma_regs __iomem *dma;
  79. struct net2280_dma *dummy;
  80. dma_addr_t td_dma; /* of dummy */
  81. struct net2280 *dev;
  82. unsigned long irqs;
  83. /* analogous to a host-side qh */
  84. struct list_head queue;
  85. const struct usb_endpoint_descriptor *desc;
  86. unsigned num : 8,
  87. fifo_size : 12,
  88. in_fifo_validate : 1,
  89. out_overflow : 1,
  90. stopped : 1,
  91. wedged : 1,
  92. is_in : 1,
  93. is_iso : 1,
  94. responded : 1;
  95. };
  96. static inline void allow_status(struct net2280_ep *ep)
  97. {
  98. /* ep0 only */
  99. writel(BIT(CLEAR_CONTROL_STATUS_PHASE_HANDSHAKE) |
  100. BIT(CLEAR_NAK_OUT_PACKETS) |
  101. BIT(CLEAR_NAK_OUT_PACKETS_MODE),
  102. &ep->regs->ep_rsp);
  103. ep->stopped = 1;
  104. }
  105. static inline void allow_status_338x(struct net2280_ep *ep)
  106. {
  107. /*
  108. * Control Status Phase Handshake was set by the chip when the setup
  109. * packet arrived. While set, the chip automatically NAKs the host's
  110. * Status Phase tokens.
  111. */
  112. writel(BIT(CLEAR_CONTROL_STATUS_PHASE_HANDSHAKE), &ep->regs->ep_rsp);
  113. ep->stopped = 1;
  114. /* TD 9.9 Halt Endpoint test. TD 9.22 set feature test. */
  115. ep->responded = 0;
  116. }
  117. struct net2280_request {
  118. struct usb_request req;
  119. struct net2280_dma *td;
  120. dma_addr_t td_dma;
  121. struct list_head queue;
  122. unsigned mapped : 1,
  123. valid : 1;
  124. };
  125. struct net2280 {
  126. /* each pci device provides one gadget, several endpoints */
  127. struct usb_gadget gadget;
  128. spinlock_t lock;
  129. struct net2280_ep ep[9];
  130. struct usb_gadget_driver *driver;
  131. unsigned enabled : 1,
  132. protocol_stall : 1,
  133. softconnect : 1,
  134. got_irq : 1,
  135. region:1,
  136. u1_enable:1,
  137. u2_enable:1,
  138. ltm_enable:1,
  139. wakeup_enable:1,
  140. addressed_state:1,
  141. bug7734_patched:1;
  142. u16 chiprev;
  143. int enhanced_mode;
  144. int n_ep;
  145. kernel_ulong_t quirks;
  146. /* pci state used to access those endpoints */
  147. struct pci_dev *pdev;
  148. struct net2280_regs __iomem *regs;
  149. struct net2280_usb_regs __iomem *usb;
  150. struct usb338x_usb_ext_regs __iomem *usb_ext;
  151. struct net2280_pci_regs __iomem *pci;
  152. struct net2280_dma_regs __iomem *dma;
  153. struct net2280_dep_regs __iomem *dep;
  154. struct net2280_ep_regs __iomem *epregs;
  155. struct usb338x_ll_regs __iomem *llregs;
  156. struct usb338x_ll_lfps_regs __iomem *ll_lfps_regs;
  157. struct usb338x_ll_tsn_regs __iomem *ll_tsn_regs;
  158. struct usb338x_ll_chi_regs __iomem *ll_chicken_reg;
  159. struct usb338x_pl_regs __iomem *plregs;
  160. struct pci_pool *requests;
  161. /* statistics...*/
  162. };
  163. static inline void set_halt(struct net2280_ep *ep)
  164. {
  165. /* ep0 and bulk/intr endpoints */
  166. writel(BIT(CLEAR_CONTROL_STATUS_PHASE_HANDSHAKE) |
  167. /* set NAK_OUT for erratum 0114 */
  168. ((ep->dev->chiprev == CHIPREV_1) << SET_NAK_OUT_PACKETS) |
  169. BIT(SET_ENDPOINT_HALT),
  170. &ep->regs->ep_rsp);
  171. }
  172. static inline void clear_halt(struct net2280_ep *ep)
  173. {
  174. /* ep0 and bulk/intr endpoints */
  175. writel(BIT(CLEAR_ENDPOINT_HALT) |
  176. BIT(CLEAR_ENDPOINT_TOGGLE) |
  177. /*
  178. * unless the gadget driver left a short packet in the
  179. * fifo, this reverses the erratum 0114 workaround.
  180. */
  181. ((ep->dev->chiprev == CHIPREV_1) << CLEAR_NAK_OUT_PACKETS),
  182. &ep->regs->ep_rsp);
  183. }
  184. /*
  185. * FSM value for Defect 7374 (U1U2 Test) is managed in
  186. * chip's SCRATCH register:
  187. */
  188. #define DEFECT7374_FSM_FIELD 28
  189. /* Waiting for Control Read:
  190. * - A transition to this state indicates a fresh USB connection,
  191. * before the first Setup Packet. The connection speed is not
  192. * known. Firmware is waiting for the first Control Read.
  193. * - Starting state: This state can be thought of as the FSM's typical
  194. * starting state.
  195. * - Tip: Upon the first SS Control Read the FSM never
  196. * returns to this state.
  197. */
  198. #define DEFECT7374_FSM_WAITING_FOR_CONTROL_READ BIT(DEFECT7374_FSM_FIELD)
  199. /* Non-SS Control Read:
  200. * - A transition to this state indicates detection of the first HS
  201. * or FS Control Read.
  202. * - Tip: Upon the first SS Control Read the FSM never
  203. * returns to this state.
  204. */
  205. #define DEFECT7374_FSM_NON_SS_CONTROL_READ (2 << DEFECT7374_FSM_FIELD)
  206. /* SS Control Read:
  207. * - A transition to this state indicates detection of the
  208. * first SS Control Read.
  209. * - This state indicates workaround completion. Workarounds no longer
  210. * need to be applied (as long as the chip remains powered up).
  211. * - Tip: Once in this state the FSM state does not change (until
  212. * the chip's power is lost and restored).
  213. * - This can be thought of as the final state of the FSM;
  214. * the FSM 'locks-up' in this state until the chip loses power.
  215. */
  216. #define DEFECT7374_FSM_SS_CONTROL_READ (3 << DEFECT7374_FSM_FIELD)
  217. #ifdef USE_RDK_LEDS
  218. static inline void net2280_led_init(struct net2280 *dev)
  219. {
  220. /* LED3 (green) is on during USB activity. note erratum 0113. */
  221. writel(BIT(GPIO3_LED_SELECT) |
  222. BIT(GPIO3_OUTPUT_ENABLE) |
  223. BIT(GPIO2_OUTPUT_ENABLE) |
  224. BIT(GPIO1_OUTPUT_ENABLE) |
  225. BIT(GPIO0_OUTPUT_ENABLE),
  226. &dev->regs->gpioctl);
  227. }
  228. /* indicate speed with bi-color LED 0/1 */
  229. static inline
  230. void net2280_led_speed(struct net2280 *dev, enum usb_device_speed speed)
  231. {
  232. u32 val = readl(&dev->regs->gpioctl);
  233. switch (speed) {
  234. case USB_SPEED_SUPER: /* green + red */
  235. val |= BIT(GPIO0_DATA) | BIT(GPIO1_DATA);
  236. break;
  237. case USB_SPEED_HIGH: /* green */
  238. val &= ~BIT(GPIO0_DATA);
  239. val |= BIT(GPIO1_DATA);
  240. break;
  241. case USB_SPEED_FULL: /* red */
  242. val &= ~BIT(GPIO1_DATA);
  243. val |= BIT(GPIO0_DATA);
  244. break;
  245. default: /* (off/black) */
  246. val &= ~(BIT(GPIO1_DATA) | BIT(GPIO0_DATA));
  247. break;
  248. }
  249. writel(val, &dev->regs->gpioctl);
  250. }
  251. /* indicate power with LED 2 */
  252. static inline void net2280_led_active(struct net2280 *dev, int is_active)
  253. {
  254. u32 val = readl(&dev->regs->gpioctl);
  255. /* FIXME this LED never seems to turn on.*/
  256. if (is_active)
  257. val |= GPIO2_DATA;
  258. else
  259. val &= ~GPIO2_DATA;
  260. writel(val, &dev->regs->gpioctl);
  261. }
  262. static inline void net2280_led_shutdown(struct net2280 *dev)
  263. {
  264. /* turn off all four GPIO*_DATA bits */
  265. writel(readl(&dev->regs->gpioctl) & ~0x0f,
  266. &dev->regs->gpioctl);
  267. }
  268. #else
  269. #define net2280_led_init(dev) do { } while (0)
  270. #define net2280_led_speed(dev, speed) do { } while (0)
  271. #define net2280_led_shutdown(dev) do { } while (0)
  272. #endif
  273. /*-------------------------------------------------------------------------*/
  274. #define ep_dbg(ndev, fmt, args...) \
  275. dev_dbg((&((ndev)->pdev->dev)), fmt, ##args)
  276. #define ep_vdbg(ndev, fmt, args...) \
  277. dev_vdbg((&((ndev)->pdev->dev)), fmt, ##args)
  278. #define ep_info(ndev, fmt, args...) \
  279. dev_info((&((ndev)->pdev->dev)), fmt, ##args)
  280. #define ep_warn(ndev, fmt, args...) \
  281. dev_warn((&((ndev)->pdev->dev)), fmt, ##args)
  282. #define ep_err(ndev, fmt, args...) \
  283. dev_err((&((ndev)->pdev->dev)), fmt, ##args)
  284. /*-------------------------------------------------------------------------*/
  285. static inline void set_fifo_bytecount(struct net2280_ep *ep, unsigned count)
  286. {
  287. if (ep->dev->pdev->vendor == 0x17cc)
  288. writeb(count, 2 + (u8 __iomem *) &ep->regs->ep_cfg);
  289. else{
  290. u32 tmp = readl(&ep->cfg->ep_cfg) &
  291. (~(0x07 << EP_FIFO_BYTE_COUNT));
  292. writel(tmp | (count << EP_FIFO_BYTE_COUNT), &ep->cfg->ep_cfg);
  293. }
  294. }
  295. static inline void start_out_naking(struct net2280_ep *ep)
  296. {
  297. /* NOTE: hardware races lurk here, and PING protocol issues */
  298. writel(BIT(SET_NAK_OUT_PACKETS), &ep->regs->ep_rsp);
  299. /* synch with device */
  300. readl(&ep->regs->ep_rsp);
  301. }
  302. static inline void stop_out_naking(struct net2280_ep *ep)
  303. {
  304. u32 tmp;
  305. tmp = readl(&ep->regs->ep_stat);
  306. if ((tmp & BIT(NAK_OUT_PACKETS)) != 0)
  307. writel(BIT(CLEAR_NAK_OUT_PACKETS), &ep->regs->ep_rsp);
  308. }
  309. static inline void set_max_speed(struct net2280_ep *ep, u32 max)
  310. {
  311. u32 reg;
  312. static const u32 ep_enhanced[9] = { 0x10, 0x60, 0x30, 0x80,
  313. 0x50, 0x20, 0x70, 0x40, 0x90 };
  314. if (ep->dev->enhanced_mode)
  315. reg = ep_enhanced[ep->num];
  316. else{
  317. reg = (ep->num + 1) * 0x10;
  318. if (ep->dev->gadget.speed != USB_SPEED_HIGH)
  319. reg += 1;
  320. }
  321. set_idx_reg(ep->dev->regs, reg, max);
  322. }
  323. #endif /* __KERNEL__ */