phy-rcar-usb.c 6.2 KB

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  1. /*
  2. * Renesas R-Car USB phy driver
  3. *
  4. * Copyright (C) 2012-2013 Renesas Solutions Corp.
  5. * Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
  6. * Copyright (C) 2013 Cogent Embedded, Inc.
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License version 2 as
  10. * published by the Free Software Foundation.
  11. */
  12. #include <linux/delay.h>
  13. #include <linux/io.h>
  14. #include <linux/usb/otg.h>
  15. #include <linux/platform_device.h>
  16. #include <linux/spinlock.h>
  17. #include <linux/module.h>
  18. #include <linux/platform_data/usb-rcar-phy.h>
  19. /* REGS block */
  20. #define USBPCTRL0 0x00
  21. #define USBPCTRL1 0x04
  22. #define USBST 0x08
  23. #define USBEH0 0x0C
  24. #define USBOH0 0x1C
  25. #define USBCTL0 0x58
  26. /* High-speed signal quality characteristic control registers (R8A7778 only) */
  27. #define HSQCTL1 0x24
  28. #define HSQCTL2 0x28
  29. /* USBPCTRL0 */
  30. #define OVC2 (1 << 10) /* (R8A7779 only) */
  31. /* Switches the OVC input pin for port 2: */
  32. /* 1: USB_OVC2, 0: OVC2 */
  33. #define OVC1_VBUS1 (1 << 9) /* Switches the OVC input pin for port 1: */
  34. /* 1: USB_OVC1, 0: OVC1/VBUS1 */
  35. /* Function mode: set to 0 */
  36. #define OVC0 (1 << 8) /* Switches the OVC input pin for port 0: */
  37. /* 1: USB_OVC0 pin, 0: OVC0 */
  38. #define OVC2_ACT (1 << 6) /* (R8A7779 only) */
  39. /* Host mode: OVC2 polarity: */
  40. /* 1: active-high, 0: active-low */
  41. #define PENC (1 << 4) /* Function mode: output level of PENC1 pin: */
  42. /* 1: high, 0: low */
  43. #define OVC0_ACT (1 << 3) /* Host mode: OVC0 polarity: */
  44. /* 1: active-high, 0: active-low */
  45. #define OVC1_ACT (1 << 1) /* Host mode: OVC1 polarity: */
  46. /* 1: active-high, 0: active-low */
  47. /* Function mode: be sure to set to 1 */
  48. #define PORT1 (1 << 0) /* Selects port 1 mode: */
  49. /* 1: function, 0: host */
  50. /* USBPCTRL1 */
  51. #define PHY_RST (1 << 2)
  52. #define PLL_ENB (1 << 1)
  53. #define PHY_ENB (1 << 0)
  54. /* USBST */
  55. #define ST_ACT (1 << 31)
  56. #define ST_PLL (1 << 30)
  57. struct rcar_usb_phy_priv {
  58. struct usb_phy phy;
  59. spinlock_t lock;
  60. void __iomem *reg0;
  61. void __iomem *reg1;
  62. int counter;
  63. };
  64. #define usb_phy_to_priv(p) container_of(p, struct rcar_usb_phy_priv, phy)
  65. /*
  66. * USB initial/install operation.
  67. *
  68. * This function setup USB phy.
  69. * The used value and setting order came from
  70. * [USB :: Initial setting] on datasheet.
  71. */
  72. static int rcar_usb_phy_init(struct usb_phy *phy)
  73. {
  74. struct rcar_usb_phy_priv *priv = usb_phy_to_priv(phy);
  75. struct device *dev = phy->dev;
  76. struct rcar_phy_platform_data *pdata = dev_get_platdata(dev);
  77. void __iomem *reg0 = priv->reg0;
  78. void __iomem *reg1 = priv->reg1;
  79. static const u8 ovcn_act[] = { OVC0_ACT, OVC1_ACT, OVC2_ACT };
  80. int i;
  81. u32 val;
  82. unsigned long flags;
  83. spin_lock_irqsave(&priv->lock, flags);
  84. if (priv->counter++ == 0) {
  85. /*
  86. * USB phy start-up
  87. */
  88. /* (1) USB-PHY standby release */
  89. iowrite32(PHY_ENB, (reg0 + USBPCTRL1));
  90. /* (2) start USB-PHY internal PLL */
  91. iowrite32(PHY_ENB | PLL_ENB, (reg0 + USBPCTRL1));
  92. /* (3) set USB-PHY in accord with the conditions of usage */
  93. if (reg1) {
  94. u32 hsqctl1 = pdata->ferrite_bead ? 0x41 : 0;
  95. u32 hsqctl2 = pdata->ferrite_bead ? 0x0d : 7;
  96. iowrite32(hsqctl1, reg1 + HSQCTL1);
  97. iowrite32(hsqctl2, reg1 + HSQCTL2);
  98. }
  99. /* (4) USB module status check */
  100. for (i = 0; i < 1024; i++) {
  101. udelay(10);
  102. val = ioread32(reg0 + USBST);
  103. if (val == (ST_ACT | ST_PLL))
  104. break;
  105. }
  106. if (val != (ST_ACT | ST_PLL)) {
  107. dev_err(dev, "USB phy not ready\n");
  108. goto phy_init_end;
  109. }
  110. /* (5) USB-PHY reset clear */
  111. iowrite32(PHY_ENB | PLL_ENB | PHY_RST, (reg0 + USBPCTRL1));
  112. /* Board specific port settings */
  113. val = 0;
  114. if (pdata->port1_func)
  115. val |= PORT1;
  116. if (pdata->penc1)
  117. val |= PENC;
  118. for (i = 0; i < 3; i++) {
  119. /* OVCn bits follow each other in the right order */
  120. if (pdata->ovc_pin[i].select_3_3v)
  121. val |= OVC0 << i;
  122. /* OVCn_ACT bits are spaced by irregular intervals */
  123. if (pdata->ovc_pin[i].active_high)
  124. val |= ovcn_act[i];
  125. }
  126. iowrite32(val, (reg0 + USBPCTRL0));
  127. /*
  128. * Bus alignment settings
  129. */
  130. /* (1) EHCI bus alignment (little endian) */
  131. iowrite32(0x00000000, (reg0 + USBEH0));
  132. /* (1) OHCI bus alignment (little endian) */
  133. iowrite32(0x00000000, (reg0 + USBOH0));
  134. }
  135. phy_init_end:
  136. spin_unlock_irqrestore(&priv->lock, flags);
  137. return 0;
  138. }
  139. static void rcar_usb_phy_shutdown(struct usb_phy *phy)
  140. {
  141. struct rcar_usb_phy_priv *priv = usb_phy_to_priv(phy);
  142. void __iomem *reg0 = priv->reg0;
  143. unsigned long flags;
  144. spin_lock_irqsave(&priv->lock, flags);
  145. if (priv->counter-- == 1) /* last user */
  146. iowrite32(0x00000000, (reg0 + USBPCTRL1));
  147. spin_unlock_irqrestore(&priv->lock, flags);
  148. }
  149. static int rcar_usb_phy_probe(struct platform_device *pdev)
  150. {
  151. struct rcar_usb_phy_priv *priv;
  152. struct resource *res0, *res1;
  153. struct device *dev = &pdev->dev;
  154. void __iomem *reg0, *reg1 = NULL;
  155. int ret;
  156. if (!dev_get_platdata(&pdev->dev)) {
  157. dev_err(dev, "No platform data\n");
  158. return -EINVAL;
  159. }
  160. res0 = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  161. reg0 = devm_ioremap_resource(dev, res0);
  162. if (IS_ERR(reg0))
  163. return PTR_ERR(reg0);
  164. res1 = platform_get_resource(pdev, IORESOURCE_MEM, 1);
  165. reg1 = devm_ioremap_resource(dev, res1);
  166. if (IS_ERR(reg1))
  167. return PTR_ERR(reg1);
  168. priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
  169. if (!priv)
  170. return -ENOMEM;
  171. priv->reg0 = reg0;
  172. priv->reg1 = reg1;
  173. priv->counter = 0;
  174. priv->phy.dev = dev;
  175. priv->phy.label = dev_name(dev);
  176. priv->phy.init = rcar_usb_phy_init;
  177. priv->phy.shutdown = rcar_usb_phy_shutdown;
  178. spin_lock_init(&priv->lock);
  179. ret = usb_add_phy(&priv->phy, USB_PHY_TYPE_USB2);
  180. if (ret < 0) {
  181. dev_err(dev, "usb phy addition error\n");
  182. return ret;
  183. }
  184. platform_set_drvdata(pdev, priv);
  185. return ret;
  186. }
  187. static int rcar_usb_phy_remove(struct platform_device *pdev)
  188. {
  189. struct rcar_usb_phy_priv *priv = platform_get_drvdata(pdev);
  190. usb_remove_phy(&priv->phy);
  191. return 0;
  192. }
  193. static struct platform_driver rcar_usb_phy_driver = {
  194. .driver = {
  195. .name = "rcar_usb_phy",
  196. },
  197. .probe = rcar_usb_phy_probe,
  198. .remove = rcar_usb_phy_remove,
  199. };
  200. module_platform_driver(rcar_usb_phy_driver);
  201. MODULE_LICENSE("GPL v2");
  202. MODULE_DESCRIPTION("Renesas R-Car USB phy");
  203. MODULE_AUTHOR("Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>");