nv_tco.c 12 KB

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  1. /*
  2. * nv_tco 0.01: TCO timer driver for NV chipsets
  3. *
  4. * (c) Copyright 2005 Google Inc., All Rights Reserved.
  5. *
  6. * Based off i8xx_tco.c:
  7. * (c) Copyright 2000 kernel concepts <nils@kernelconcepts.de>, All Rights
  8. * Reserved.
  9. * http://www.kernelconcepts.de
  10. *
  11. * This program is free software; you can redistribute it and/or
  12. * modify it under the terms of the GNU General Public License
  13. * as published by the Free Software Foundation; either version
  14. * 2 of the License, or (at your option) any later version.
  15. *
  16. * TCO timer driver for NV chipsets
  17. * based on softdog.c by Alan Cox <alan@redhat.com>
  18. */
  19. /*
  20. * Includes, defines, variables, module parameters, ...
  21. */
  22. #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  23. #include <linux/module.h>
  24. #include <linux/moduleparam.h>
  25. #include <linux/types.h>
  26. #include <linux/miscdevice.h>
  27. #include <linux/watchdog.h>
  28. #include <linux/init.h>
  29. #include <linux/fs.h>
  30. #include <linux/pci.h>
  31. #include <linux/ioport.h>
  32. #include <linux/jiffies.h>
  33. #include <linux/platform_device.h>
  34. #include <linux/uaccess.h>
  35. #include <linux/io.h>
  36. #include "nv_tco.h"
  37. /* Module and version information */
  38. #define TCO_VERSION "0.01"
  39. #define TCO_MODULE_NAME "NV_TCO"
  40. #define TCO_DRIVER_NAME TCO_MODULE_NAME ", v" TCO_VERSION
  41. /* internal variables */
  42. static unsigned int tcobase;
  43. static DEFINE_SPINLOCK(tco_lock); /* Guards the hardware */
  44. static unsigned long timer_alive;
  45. static char tco_expect_close;
  46. static struct pci_dev *tco_pci;
  47. /* the watchdog platform device */
  48. static struct platform_device *nv_tco_platform_device;
  49. /* module parameters */
  50. #define WATCHDOG_HEARTBEAT 30 /* 30 sec default heartbeat (2<heartbeat<39) */
  51. static int heartbeat = WATCHDOG_HEARTBEAT; /* in seconds */
  52. module_param(heartbeat, int, 0);
  53. MODULE_PARM_DESC(heartbeat, "Watchdog heartbeat in seconds. (2<heartbeat<39, "
  54. "default=" __MODULE_STRING(WATCHDOG_HEARTBEAT) ")");
  55. static bool nowayout = WATCHDOG_NOWAYOUT;
  56. module_param(nowayout, bool, 0);
  57. MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started"
  58. " (default=" __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
  59. /*
  60. * Some TCO specific functions
  61. */
  62. static inline unsigned char seconds_to_ticks(int seconds)
  63. {
  64. /* the internal timer is stored as ticks which decrement
  65. * every 0.6 seconds */
  66. return (seconds * 10) / 6;
  67. }
  68. static void tco_timer_start(void)
  69. {
  70. u32 val;
  71. unsigned long flags;
  72. spin_lock_irqsave(&tco_lock, flags);
  73. val = inl(TCO_CNT(tcobase));
  74. val &= ~TCO_CNT_TCOHALT;
  75. outl(val, TCO_CNT(tcobase));
  76. spin_unlock_irqrestore(&tco_lock, flags);
  77. }
  78. static void tco_timer_stop(void)
  79. {
  80. u32 val;
  81. unsigned long flags;
  82. spin_lock_irqsave(&tco_lock, flags);
  83. val = inl(TCO_CNT(tcobase));
  84. val |= TCO_CNT_TCOHALT;
  85. outl(val, TCO_CNT(tcobase));
  86. spin_unlock_irqrestore(&tco_lock, flags);
  87. }
  88. static void tco_timer_keepalive(void)
  89. {
  90. unsigned long flags;
  91. spin_lock_irqsave(&tco_lock, flags);
  92. outb(0x01, TCO_RLD(tcobase));
  93. spin_unlock_irqrestore(&tco_lock, flags);
  94. }
  95. static int tco_timer_set_heartbeat(int t)
  96. {
  97. int ret = 0;
  98. unsigned char tmrval;
  99. unsigned long flags;
  100. u8 val;
  101. /*
  102. * note seconds_to_ticks(t) > t, so if t > 0x3f, so is
  103. * tmrval=seconds_to_ticks(t). Check that the count in seconds isn't
  104. * out of range on it's own (to avoid overflow in tmrval).
  105. */
  106. if (t < 0 || t > 0x3f)
  107. return -EINVAL;
  108. tmrval = seconds_to_ticks(t);
  109. /* "Values of 0h-3h are ignored and should not be attempted" */
  110. if (tmrval > 0x3f || tmrval < 0x04)
  111. return -EINVAL;
  112. /* Write new heartbeat to watchdog */
  113. spin_lock_irqsave(&tco_lock, flags);
  114. val = inb(TCO_TMR(tcobase));
  115. val &= 0xc0;
  116. val |= tmrval;
  117. outb(val, TCO_TMR(tcobase));
  118. val = inb(TCO_TMR(tcobase));
  119. if ((val & 0x3f) != tmrval)
  120. ret = -EINVAL;
  121. spin_unlock_irqrestore(&tco_lock, flags);
  122. if (ret)
  123. return ret;
  124. heartbeat = t;
  125. return 0;
  126. }
  127. /*
  128. * /dev/watchdog handling
  129. */
  130. static int nv_tco_open(struct inode *inode, struct file *file)
  131. {
  132. /* /dev/watchdog can only be opened once */
  133. if (test_and_set_bit(0, &timer_alive))
  134. return -EBUSY;
  135. /* Reload and activate timer */
  136. tco_timer_keepalive();
  137. tco_timer_start();
  138. return nonseekable_open(inode, file);
  139. }
  140. static int nv_tco_release(struct inode *inode, struct file *file)
  141. {
  142. /* Shut off the timer */
  143. if (tco_expect_close == 42) {
  144. tco_timer_stop();
  145. } else {
  146. pr_crit("Unexpected close, not stopping watchdog!\n");
  147. tco_timer_keepalive();
  148. }
  149. clear_bit(0, &timer_alive);
  150. tco_expect_close = 0;
  151. return 0;
  152. }
  153. static ssize_t nv_tco_write(struct file *file, const char __user *data,
  154. size_t len, loff_t *ppos)
  155. {
  156. /* See if we got the magic character 'V' and reload the timer */
  157. if (len) {
  158. if (!nowayout) {
  159. size_t i;
  160. /*
  161. * note: just in case someone wrote the magic character
  162. * five months ago...
  163. */
  164. tco_expect_close = 0;
  165. /*
  166. * scan to see whether or not we got the magic
  167. * character
  168. */
  169. for (i = 0; i != len; i++) {
  170. char c;
  171. if (get_user(c, data + i))
  172. return -EFAULT;
  173. if (c == 'V')
  174. tco_expect_close = 42;
  175. }
  176. }
  177. /* someone wrote to us, we should reload the timer */
  178. tco_timer_keepalive();
  179. }
  180. return len;
  181. }
  182. static long nv_tco_ioctl(struct file *file, unsigned int cmd,
  183. unsigned long arg)
  184. {
  185. int new_options, retval = -EINVAL;
  186. int new_heartbeat;
  187. void __user *argp = (void __user *)arg;
  188. int __user *p = argp;
  189. static const struct watchdog_info ident = {
  190. .options = WDIOF_SETTIMEOUT |
  191. WDIOF_KEEPALIVEPING |
  192. WDIOF_MAGICCLOSE,
  193. .firmware_version = 0,
  194. .identity = TCO_MODULE_NAME,
  195. };
  196. switch (cmd) {
  197. case WDIOC_GETSUPPORT:
  198. return copy_to_user(argp, &ident, sizeof(ident)) ? -EFAULT : 0;
  199. case WDIOC_GETSTATUS:
  200. case WDIOC_GETBOOTSTATUS:
  201. return put_user(0, p);
  202. case WDIOC_SETOPTIONS:
  203. if (get_user(new_options, p))
  204. return -EFAULT;
  205. if (new_options & WDIOS_DISABLECARD) {
  206. tco_timer_stop();
  207. retval = 0;
  208. }
  209. if (new_options & WDIOS_ENABLECARD) {
  210. tco_timer_keepalive();
  211. tco_timer_start();
  212. retval = 0;
  213. }
  214. return retval;
  215. case WDIOC_KEEPALIVE:
  216. tco_timer_keepalive();
  217. return 0;
  218. case WDIOC_SETTIMEOUT:
  219. if (get_user(new_heartbeat, p))
  220. return -EFAULT;
  221. if (tco_timer_set_heartbeat(new_heartbeat))
  222. return -EINVAL;
  223. tco_timer_keepalive();
  224. /* Fall through */
  225. case WDIOC_GETTIMEOUT:
  226. return put_user(heartbeat, p);
  227. default:
  228. return -ENOTTY;
  229. }
  230. }
  231. /*
  232. * Kernel Interfaces
  233. */
  234. static const struct file_operations nv_tco_fops = {
  235. .owner = THIS_MODULE,
  236. .llseek = no_llseek,
  237. .write = nv_tco_write,
  238. .unlocked_ioctl = nv_tco_ioctl,
  239. .open = nv_tco_open,
  240. .release = nv_tco_release,
  241. };
  242. static struct miscdevice nv_tco_miscdev = {
  243. .minor = WATCHDOG_MINOR,
  244. .name = "watchdog",
  245. .fops = &nv_tco_fops,
  246. };
  247. /*
  248. * Data for PCI driver interface
  249. *
  250. * This data only exists for exporting the supported
  251. * PCI ids via MODULE_DEVICE_TABLE. We do not actually
  252. * register a pci_driver, because someone else might one day
  253. * want to register another driver on the same PCI id.
  254. */
  255. static const struct pci_device_id tco_pci_tbl[] = {
  256. { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP51_SMBUS,
  257. PCI_ANY_ID, PCI_ANY_ID, },
  258. { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP55_SMBUS,
  259. PCI_ANY_ID, PCI_ANY_ID, },
  260. { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP79_SMBUS,
  261. PCI_ANY_ID, PCI_ANY_ID, },
  262. { 0, }, /* End of list */
  263. };
  264. MODULE_DEVICE_TABLE(pci, tco_pci_tbl);
  265. /*
  266. * Init & exit routines
  267. */
  268. static unsigned char nv_tco_getdevice(void)
  269. {
  270. struct pci_dev *dev = NULL;
  271. u32 val;
  272. /* Find the PCI device */
  273. for_each_pci_dev(dev) {
  274. if (pci_match_id(tco_pci_tbl, dev) != NULL) {
  275. tco_pci = dev;
  276. break;
  277. }
  278. }
  279. if (!tco_pci)
  280. return 0;
  281. /* Find the base io port */
  282. pci_read_config_dword(tco_pci, 0x64, &val);
  283. val &= 0xffff;
  284. if (val == 0x0001 || val == 0x0000) {
  285. /* Something is wrong here, bar isn't setup */
  286. pr_err("failed to get tcobase address\n");
  287. return 0;
  288. }
  289. val &= 0xff00;
  290. tcobase = val + 0x40;
  291. if (!request_region(tcobase, 0x10, "NV TCO")) {
  292. pr_err("I/O address 0x%04x already in use\n", tcobase);
  293. return 0;
  294. }
  295. /* Set a reasonable heartbeat before we stop the timer */
  296. tco_timer_set_heartbeat(30);
  297. /*
  298. * Stop the TCO before we change anything so we don't race with
  299. * a zeroed timer.
  300. */
  301. tco_timer_keepalive();
  302. tco_timer_stop();
  303. /* Disable SMI caused by TCO */
  304. if (!request_region(MCP51_SMI_EN(tcobase), 4, "NV TCO")) {
  305. pr_err("I/O address 0x%04x already in use\n",
  306. MCP51_SMI_EN(tcobase));
  307. goto out;
  308. }
  309. val = inl(MCP51_SMI_EN(tcobase));
  310. val &= ~MCP51_SMI_EN_TCO;
  311. outl(val, MCP51_SMI_EN(tcobase));
  312. val = inl(MCP51_SMI_EN(tcobase));
  313. release_region(MCP51_SMI_EN(tcobase), 4);
  314. if (val & MCP51_SMI_EN_TCO) {
  315. pr_err("Could not disable SMI caused by TCO\n");
  316. goto out;
  317. }
  318. /* Check chipset's NO_REBOOT bit */
  319. pci_read_config_dword(tco_pci, MCP51_SMBUS_SETUP_B, &val);
  320. val |= MCP51_SMBUS_SETUP_B_TCO_REBOOT;
  321. pci_write_config_dword(tco_pci, MCP51_SMBUS_SETUP_B, val);
  322. pci_read_config_dword(tco_pci, MCP51_SMBUS_SETUP_B, &val);
  323. if (!(val & MCP51_SMBUS_SETUP_B_TCO_REBOOT)) {
  324. pr_err("failed to reset NO_REBOOT flag, reboot disabled by hardware\n");
  325. goto out;
  326. }
  327. return 1;
  328. out:
  329. release_region(tcobase, 0x10);
  330. return 0;
  331. }
  332. static int nv_tco_init(struct platform_device *dev)
  333. {
  334. int ret;
  335. /* Check whether or not the hardware watchdog is there */
  336. if (!nv_tco_getdevice())
  337. return -ENODEV;
  338. /* Check to see if last reboot was due to watchdog timeout */
  339. pr_info("Watchdog reboot %sdetected\n",
  340. inl(TCO_STS(tcobase)) & TCO_STS_TCO2TO_STS ? "" : "not ");
  341. /* Clear out the old status */
  342. outl(TCO_STS_RESET, TCO_STS(tcobase));
  343. /*
  344. * Check that the heartbeat value is within it's range.
  345. * If not, reset to the default.
  346. */
  347. if (tco_timer_set_heartbeat(heartbeat)) {
  348. heartbeat = WATCHDOG_HEARTBEAT;
  349. tco_timer_set_heartbeat(heartbeat);
  350. pr_info("heartbeat value must be 2<heartbeat<39, using %d\n",
  351. heartbeat);
  352. }
  353. ret = misc_register(&nv_tco_miscdev);
  354. if (ret != 0) {
  355. pr_err("cannot register miscdev on minor=%d (err=%d)\n",
  356. WATCHDOG_MINOR, ret);
  357. goto unreg_region;
  358. }
  359. clear_bit(0, &timer_alive);
  360. tco_timer_stop();
  361. pr_info("initialized (0x%04x). heartbeat=%d sec (nowayout=%d)\n",
  362. tcobase, heartbeat, nowayout);
  363. return 0;
  364. unreg_region:
  365. release_region(tcobase, 0x10);
  366. return ret;
  367. }
  368. static void nv_tco_cleanup(void)
  369. {
  370. u32 val;
  371. /* Stop the timer before we leave */
  372. if (!nowayout)
  373. tco_timer_stop();
  374. /* Set the NO_REBOOT bit to prevent later reboots, just for sure */
  375. pci_read_config_dword(tco_pci, MCP51_SMBUS_SETUP_B, &val);
  376. val &= ~MCP51_SMBUS_SETUP_B_TCO_REBOOT;
  377. pci_write_config_dword(tco_pci, MCP51_SMBUS_SETUP_B, val);
  378. pci_read_config_dword(tco_pci, MCP51_SMBUS_SETUP_B, &val);
  379. if (val & MCP51_SMBUS_SETUP_B_TCO_REBOOT) {
  380. pr_crit("Couldn't unset REBOOT bit. Machine may soon reset\n");
  381. }
  382. /* Deregister */
  383. misc_deregister(&nv_tco_miscdev);
  384. release_region(tcobase, 0x10);
  385. }
  386. static int nv_tco_remove(struct platform_device *dev)
  387. {
  388. if (tcobase)
  389. nv_tco_cleanup();
  390. return 0;
  391. }
  392. static void nv_tco_shutdown(struct platform_device *dev)
  393. {
  394. u32 val;
  395. tco_timer_stop();
  396. /* Some BIOSes fail the POST (once) if the NO_REBOOT flag is not
  397. * unset during shutdown. */
  398. pci_read_config_dword(tco_pci, MCP51_SMBUS_SETUP_B, &val);
  399. val &= ~MCP51_SMBUS_SETUP_B_TCO_REBOOT;
  400. pci_write_config_dword(tco_pci, MCP51_SMBUS_SETUP_B, val);
  401. }
  402. static struct platform_driver nv_tco_driver = {
  403. .probe = nv_tco_init,
  404. .remove = nv_tco_remove,
  405. .shutdown = nv_tco_shutdown,
  406. .driver = {
  407. .name = TCO_MODULE_NAME,
  408. },
  409. };
  410. static int __init nv_tco_init_module(void)
  411. {
  412. int err;
  413. pr_info("NV TCO WatchDog Timer Driver v%s\n", TCO_VERSION);
  414. err = platform_driver_register(&nv_tco_driver);
  415. if (err)
  416. return err;
  417. nv_tco_platform_device = platform_device_register_simple(
  418. TCO_MODULE_NAME, -1, NULL, 0);
  419. if (IS_ERR(nv_tco_platform_device)) {
  420. err = PTR_ERR(nv_tco_platform_device);
  421. goto unreg_platform_driver;
  422. }
  423. return 0;
  424. unreg_platform_driver:
  425. platform_driver_unregister(&nv_tco_driver);
  426. return err;
  427. }
  428. static void __exit nv_tco_cleanup_module(void)
  429. {
  430. platform_device_unregister(nv_tco_platform_device);
  431. platform_driver_unregister(&nv_tco_driver);
  432. pr_info("NV TCO Watchdog Module Unloaded\n");
  433. }
  434. module_init(nv_tco_init_module);
  435. module_exit(nv_tco_cleanup_module);
  436. MODULE_AUTHOR("Mike Waychison");
  437. MODULE_DESCRIPTION("TCO timer driver for NV chipsets");
  438. MODULE_LICENSE("GPL");