sama5d4_wdt.c 6.3 KB

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  1. /*
  2. * Driver for Atmel SAMA5D4 Watchdog Timer
  3. *
  4. * Copyright (C) 2015 Atmel Corporation
  5. *
  6. * Licensed under GPLv2.
  7. */
  8. #include <linux/interrupt.h>
  9. #include <linux/io.h>
  10. #include <linux/kernel.h>
  11. #include <linux/module.h>
  12. #include <linux/of.h>
  13. #include <linux/of_irq.h>
  14. #include <linux/platform_device.h>
  15. #include <linux/reboot.h>
  16. #include <linux/watchdog.h>
  17. #include "at91sam9_wdt.h"
  18. /* minimum and maximum watchdog timeout, in seconds */
  19. #define MIN_WDT_TIMEOUT 1
  20. #define MAX_WDT_TIMEOUT 16
  21. #define WDT_DEFAULT_TIMEOUT MAX_WDT_TIMEOUT
  22. #define WDT_SEC2TICKS(s) ((s) ? (((s) << 8) - 1) : 0)
  23. struct sama5d4_wdt {
  24. struct watchdog_device wdd;
  25. void __iomem *reg_base;
  26. u32 config;
  27. };
  28. static int wdt_timeout = WDT_DEFAULT_TIMEOUT;
  29. static bool nowayout = WATCHDOG_NOWAYOUT;
  30. module_param(wdt_timeout, int, 0);
  31. MODULE_PARM_DESC(wdt_timeout,
  32. "Watchdog timeout in seconds. (default = "
  33. __MODULE_STRING(WDT_DEFAULT_TIMEOUT) ")");
  34. module_param(nowayout, bool, 0);
  35. MODULE_PARM_DESC(nowayout,
  36. "Watchdog cannot be stopped once started (default="
  37. __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
  38. #define wdt_read(wdt, field) \
  39. readl_relaxed((wdt)->reg_base + (field))
  40. #define wdt_write(wtd, field, val) \
  41. writel_relaxed((val), (wdt)->reg_base + (field))
  42. static int sama5d4_wdt_start(struct watchdog_device *wdd)
  43. {
  44. struct sama5d4_wdt *wdt = watchdog_get_drvdata(wdd);
  45. u32 reg;
  46. reg = wdt_read(wdt, AT91_WDT_MR);
  47. reg &= ~AT91_WDT_WDDIS;
  48. wdt_write(wdt, AT91_WDT_MR, reg);
  49. return 0;
  50. }
  51. static int sama5d4_wdt_stop(struct watchdog_device *wdd)
  52. {
  53. struct sama5d4_wdt *wdt = watchdog_get_drvdata(wdd);
  54. u32 reg;
  55. reg = wdt_read(wdt, AT91_WDT_MR);
  56. reg |= AT91_WDT_WDDIS;
  57. wdt_write(wdt, AT91_WDT_MR, reg);
  58. return 0;
  59. }
  60. static int sama5d4_wdt_ping(struct watchdog_device *wdd)
  61. {
  62. struct sama5d4_wdt *wdt = watchdog_get_drvdata(wdd);
  63. wdt_write(wdt, AT91_WDT_CR, AT91_WDT_KEY | AT91_WDT_WDRSTT);
  64. return 0;
  65. }
  66. static int sama5d4_wdt_set_timeout(struct watchdog_device *wdd,
  67. unsigned int timeout)
  68. {
  69. struct sama5d4_wdt *wdt = watchdog_get_drvdata(wdd);
  70. u32 value = WDT_SEC2TICKS(timeout);
  71. u32 reg;
  72. reg = wdt_read(wdt, AT91_WDT_MR);
  73. reg &= ~AT91_WDT_WDV;
  74. reg &= ~AT91_WDT_WDD;
  75. reg |= AT91_WDT_SET_WDV(value);
  76. reg |= AT91_WDT_SET_WDD(value);
  77. wdt_write(wdt, AT91_WDT_MR, reg);
  78. wdd->timeout = timeout;
  79. return 0;
  80. }
  81. static const struct watchdog_info sama5d4_wdt_info = {
  82. .options = WDIOF_SETTIMEOUT | WDIOF_MAGICCLOSE | WDIOF_KEEPALIVEPING,
  83. .identity = "Atmel SAMA5D4 Watchdog",
  84. };
  85. static struct watchdog_ops sama5d4_wdt_ops = {
  86. .owner = THIS_MODULE,
  87. .start = sama5d4_wdt_start,
  88. .stop = sama5d4_wdt_stop,
  89. .ping = sama5d4_wdt_ping,
  90. .set_timeout = sama5d4_wdt_set_timeout,
  91. };
  92. static irqreturn_t sama5d4_wdt_irq_handler(int irq, void *dev_id)
  93. {
  94. struct sama5d4_wdt *wdt = platform_get_drvdata(dev_id);
  95. if (wdt_read(wdt, AT91_WDT_SR)) {
  96. pr_crit("Atmel Watchdog Software Reset\n");
  97. emergency_restart();
  98. pr_crit("Reboot didn't succeed\n");
  99. }
  100. return IRQ_HANDLED;
  101. }
  102. static int of_sama5d4_wdt_init(struct device_node *np, struct sama5d4_wdt *wdt)
  103. {
  104. const char *tmp;
  105. wdt->config = AT91_WDT_WDDIS;
  106. if (!of_property_read_string(np, "atmel,watchdog-type", &tmp) &&
  107. !strcmp(tmp, "software"))
  108. wdt->config |= AT91_WDT_WDFIEN;
  109. else
  110. wdt->config |= AT91_WDT_WDRSTEN;
  111. if (of_property_read_bool(np, "atmel,idle-halt"))
  112. wdt->config |= AT91_WDT_WDIDLEHLT;
  113. if (of_property_read_bool(np, "atmel,dbg-halt"))
  114. wdt->config |= AT91_WDT_WDDBGHLT;
  115. return 0;
  116. }
  117. static int sama5d4_wdt_init(struct sama5d4_wdt *wdt)
  118. {
  119. struct watchdog_device *wdd = &wdt->wdd;
  120. u32 value = WDT_SEC2TICKS(wdd->timeout);
  121. u32 reg;
  122. /*
  123. * Because the fields WDV and WDD must not be modified when the WDDIS
  124. * bit is set, so clear the WDDIS bit before writing the WDT_MR.
  125. */
  126. reg = wdt_read(wdt, AT91_WDT_MR);
  127. reg &= ~AT91_WDT_WDDIS;
  128. wdt_write(wdt, AT91_WDT_MR, reg);
  129. reg = wdt->config;
  130. reg |= AT91_WDT_SET_WDD(value);
  131. reg |= AT91_WDT_SET_WDV(value);
  132. wdt_write(wdt, AT91_WDT_MR, reg);
  133. return 0;
  134. }
  135. static int sama5d4_wdt_probe(struct platform_device *pdev)
  136. {
  137. struct watchdog_device *wdd;
  138. struct sama5d4_wdt *wdt;
  139. struct resource *res;
  140. void __iomem *regs;
  141. u32 irq = 0;
  142. int ret;
  143. wdt = devm_kzalloc(&pdev->dev, sizeof(*wdt), GFP_KERNEL);
  144. if (!wdt)
  145. return -ENOMEM;
  146. wdd = &wdt->wdd;
  147. wdd->timeout = wdt_timeout;
  148. wdd->info = &sama5d4_wdt_info;
  149. wdd->ops = &sama5d4_wdt_ops;
  150. wdd->min_timeout = MIN_WDT_TIMEOUT;
  151. wdd->max_timeout = MAX_WDT_TIMEOUT;
  152. watchdog_set_drvdata(wdd, wdt);
  153. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  154. regs = devm_ioremap_resource(&pdev->dev, res);
  155. if (IS_ERR(regs))
  156. return PTR_ERR(regs);
  157. wdt->reg_base = regs;
  158. if (pdev->dev.of_node) {
  159. irq = irq_of_parse_and_map(pdev->dev.of_node, 0);
  160. if (!irq)
  161. dev_warn(&pdev->dev, "failed to get IRQ from DT\n");
  162. ret = of_sama5d4_wdt_init(pdev->dev.of_node, wdt);
  163. if (ret)
  164. return ret;
  165. }
  166. if ((wdt->config & AT91_WDT_WDFIEN) && irq) {
  167. ret = devm_request_irq(&pdev->dev, irq, sama5d4_wdt_irq_handler,
  168. IRQF_SHARED | IRQF_IRQPOLL |
  169. IRQF_NO_SUSPEND, pdev->name, pdev);
  170. if (ret) {
  171. dev_err(&pdev->dev,
  172. "cannot register interrupt handler\n");
  173. return ret;
  174. }
  175. }
  176. ret = watchdog_init_timeout(wdd, wdt_timeout, &pdev->dev);
  177. if (ret) {
  178. dev_err(&pdev->dev, "unable to set timeout value\n");
  179. return ret;
  180. }
  181. ret = sama5d4_wdt_init(wdt);
  182. if (ret)
  183. return ret;
  184. watchdog_set_nowayout(wdd, nowayout);
  185. ret = watchdog_register_device(wdd);
  186. if (ret) {
  187. dev_err(&pdev->dev, "failed to register watchdog device\n");
  188. return ret;
  189. }
  190. platform_set_drvdata(pdev, wdt);
  191. dev_info(&pdev->dev, "initialized (timeout = %d sec, nowayout = %d)\n",
  192. wdt_timeout, nowayout);
  193. return 0;
  194. }
  195. static int sama5d4_wdt_remove(struct platform_device *pdev)
  196. {
  197. struct sama5d4_wdt *wdt = platform_get_drvdata(pdev);
  198. sama5d4_wdt_stop(&wdt->wdd);
  199. watchdog_unregister_device(&wdt->wdd);
  200. return 0;
  201. }
  202. static const struct of_device_id sama5d4_wdt_of_match[] = {
  203. { .compatible = "atmel,sama5d4-wdt", },
  204. { }
  205. };
  206. MODULE_DEVICE_TABLE(of, sama5d4_wdt_of_match);
  207. static struct platform_driver sama5d4_wdt_driver = {
  208. .probe = sama5d4_wdt_probe,
  209. .remove = sama5d4_wdt_remove,
  210. .driver = {
  211. .name = "sama5d4_wdt",
  212. .of_match_table = sama5d4_wdt_of_match,
  213. }
  214. };
  215. module_platform_driver(sama5d4_wdt_driver);
  216. MODULE_AUTHOR("Atmel Corporation");
  217. MODULE_DESCRIPTION("Atmel SAMA5D4 Watchdog Timer driver");
  218. MODULE_LICENSE("GPL v2");