st_lpc_wdt.c 8.0 KB

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  1. /*
  2. * ST's LPC Watchdog
  3. *
  4. * Copyright (C) 2014 STMicroelectronics -- All Rights Reserved
  5. *
  6. * Author: David Paris <david.paris@st.com> for STMicroelectronics
  7. * Lee Jones <lee.jones@linaro.org> for STMicroelectronics
  8. *
  9. * This program is free software; you can redistribute it and/or
  10. * modify it under the terms of the GNU General Public Licence
  11. * as published by the Free Software Foundation; either version
  12. * 2 of the Licence, or (at your option) any later version.
  13. */
  14. #include <linux/clk.h>
  15. #include <linux/init.h>
  16. #include <linux/io.h>
  17. #include <linux/kernel.h>
  18. #include <linux/mfd/syscon.h>
  19. #include <linux/module.h>
  20. #include <linux/of.h>
  21. #include <linux/of_platform.h>
  22. #include <linux/platform_device.h>
  23. #include <linux/regmap.h>
  24. #include <linux/watchdog.h>
  25. #include <dt-bindings/mfd/st-lpc.h>
  26. /* Low Power Alarm */
  27. #define LPC_LPA_LSB_OFF 0x410
  28. #define LPC_LPA_START_OFF 0x418
  29. /* LPC as WDT */
  30. #define LPC_WDT_OFF 0x510
  31. static struct watchdog_device st_wdog_dev;
  32. struct st_wdog_syscfg {
  33. unsigned int reset_type_reg;
  34. unsigned int reset_type_mask;
  35. unsigned int enable_reg;
  36. unsigned int enable_mask;
  37. };
  38. struct st_wdog {
  39. void __iomem *base;
  40. struct device *dev;
  41. struct regmap *regmap;
  42. struct st_wdog_syscfg *syscfg;
  43. struct clk *clk;
  44. unsigned long clkrate;
  45. bool warm_reset;
  46. };
  47. static struct st_wdog_syscfg stid127_syscfg = {
  48. .reset_type_reg = 0x004,
  49. .reset_type_mask = BIT(2),
  50. .enable_reg = 0x000,
  51. .enable_mask = BIT(2),
  52. };
  53. static struct st_wdog_syscfg stih415_syscfg = {
  54. .reset_type_reg = 0x0B8,
  55. .reset_type_mask = BIT(6),
  56. .enable_reg = 0x0B4,
  57. .enable_mask = BIT(7),
  58. };
  59. static struct st_wdog_syscfg stih416_syscfg = {
  60. .reset_type_reg = 0x88C,
  61. .reset_type_mask = BIT(6),
  62. .enable_reg = 0x888,
  63. .enable_mask = BIT(7),
  64. };
  65. static struct st_wdog_syscfg stih407_syscfg = {
  66. .enable_reg = 0x204,
  67. .enable_mask = BIT(19),
  68. };
  69. static const struct of_device_id st_wdog_match[] = {
  70. {
  71. .compatible = "st,stih407-lpc",
  72. .data = &stih407_syscfg,
  73. },
  74. {
  75. .compatible = "st,stih416-lpc",
  76. .data = &stih416_syscfg,
  77. },
  78. {
  79. .compatible = "st,stih415-lpc",
  80. .data = &stih415_syscfg,
  81. },
  82. {
  83. .compatible = "st,stid127-lpc",
  84. .data = &stid127_syscfg,
  85. },
  86. {},
  87. };
  88. MODULE_DEVICE_TABLE(of, st_wdog_match);
  89. static void st_wdog_setup(struct st_wdog *st_wdog, bool enable)
  90. {
  91. /* Type of watchdog reset - 0: Cold 1: Warm */
  92. if (st_wdog->syscfg->reset_type_reg)
  93. regmap_update_bits(st_wdog->regmap,
  94. st_wdog->syscfg->reset_type_reg,
  95. st_wdog->syscfg->reset_type_mask,
  96. st_wdog->warm_reset);
  97. /* Mask/unmask watchdog reset */
  98. regmap_update_bits(st_wdog->regmap,
  99. st_wdog->syscfg->enable_reg,
  100. st_wdog->syscfg->enable_mask,
  101. enable ? 0 : st_wdog->syscfg->enable_mask);
  102. }
  103. static void st_wdog_load_timer(struct st_wdog *st_wdog, unsigned int timeout)
  104. {
  105. unsigned long clkrate = st_wdog->clkrate;
  106. writel_relaxed(timeout * clkrate, st_wdog->base + LPC_LPA_LSB_OFF);
  107. writel_relaxed(1, st_wdog->base + LPC_LPA_START_OFF);
  108. }
  109. static int st_wdog_start(struct watchdog_device *wdd)
  110. {
  111. struct st_wdog *st_wdog = watchdog_get_drvdata(wdd);
  112. writel_relaxed(1, st_wdog->base + LPC_WDT_OFF);
  113. return 0;
  114. }
  115. static int st_wdog_stop(struct watchdog_device *wdd)
  116. {
  117. struct st_wdog *st_wdog = watchdog_get_drvdata(wdd);
  118. writel_relaxed(0, st_wdog->base + LPC_WDT_OFF);
  119. return 0;
  120. }
  121. static int st_wdog_set_timeout(struct watchdog_device *wdd,
  122. unsigned int timeout)
  123. {
  124. struct st_wdog *st_wdog = watchdog_get_drvdata(wdd);
  125. wdd->timeout = timeout;
  126. st_wdog_load_timer(st_wdog, timeout);
  127. return 0;
  128. }
  129. static int st_wdog_keepalive(struct watchdog_device *wdd)
  130. {
  131. struct st_wdog *st_wdog = watchdog_get_drvdata(wdd);
  132. st_wdog_load_timer(st_wdog, wdd->timeout);
  133. return 0;
  134. }
  135. static const struct watchdog_info st_wdog_info = {
  136. .options = WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING | WDIOF_MAGICCLOSE,
  137. .identity = "ST LPC WDT",
  138. };
  139. static const struct watchdog_ops st_wdog_ops = {
  140. .owner = THIS_MODULE,
  141. .start = st_wdog_start,
  142. .stop = st_wdog_stop,
  143. .ping = st_wdog_keepalive,
  144. .set_timeout = st_wdog_set_timeout,
  145. };
  146. static struct watchdog_device st_wdog_dev = {
  147. .info = &st_wdog_info,
  148. .ops = &st_wdog_ops,
  149. };
  150. static int st_wdog_probe(struct platform_device *pdev)
  151. {
  152. const struct of_device_id *match;
  153. struct device_node *np = pdev->dev.of_node;
  154. struct st_wdog *st_wdog;
  155. struct regmap *regmap;
  156. struct resource *res;
  157. struct clk *clk;
  158. void __iomem *base;
  159. uint32_t mode;
  160. int ret;
  161. ret = of_property_read_u32(np, "st,lpc-mode", &mode);
  162. if (ret) {
  163. dev_err(&pdev->dev, "An LPC mode must be provided\n");
  164. return -EINVAL;
  165. }
  166. /* LPC can either run as a Clocksource or in RTC or WDT mode */
  167. if (mode != ST_LPC_MODE_WDT)
  168. return -ENODEV;
  169. st_wdog = devm_kzalloc(&pdev->dev, sizeof(*st_wdog), GFP_KERNEL);
  170. if (!st_wdog)
  171. return -ENOMEM;
  172. match = of_match_device(st_wdog_match, &pdev->dev);
  173. if (!match) {
  174. dev_err(&pdev->dev, "Couldn't match device\n");
  175. return -ENODEV;
  176. }
  177. st_wdog->syscfg = (struct st_wdog_syscfg *)match->data;
  178. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  179. base = devm_ioremap_resource(&pdev->dev, res);
  180. if (IS_ERR(base))
  181. return PTR_ERR(base);
  182. regmap = syscon_regmap_lookup_by_phandle(np, "st,syscfg");
  183. if (IS_ERR(regmap)) {
  184. dev_err(&pdev->dev, "No syscfg phandle specified\n");
  185. return PTR_ERR(regmap);
  186. }
  187. clk = devm_clk_get(&pdev->dev, NULL);
  188. if (IS_ERR(clk)) {
  189. dev_err(&pdev->dev, "Unable to request clock\n");
  190. return PTR_ERR(clk);
  191. }
  192. st_wdog->dev = &pdev->dev;
  193. st_wdog->base = base;
  194. st_wdog->clk = clk;
  195. st_wdog->regmap = regmap;
  196. st_wdog->warm_reset = of_property_read_bool(np, "st,warm_reset");
  197. st_wdog->clkrate = clk_get_rate(st_wdog->clk);
  198. if (!st_wdog->clkrate) {
  199. dev_err(&pdev->dev, "Unable to fetch clock rate\n");
  200. return -EINVAL;
  201. }
  202. st_wdog_dev.max_timeout = 0xFFFFFFFF / st_wdog->clkrate;
  203. st_wdog_dev.parent = &pdev->dev;
  204. ret = clk_prepare_enable(clk);
  205. if (ret) {
  206. dev_err(&pdev->dev, "Unable to enable clock\n");
  207. return ret;
  208. }
  209. watchdog_set_drvdata(&st_wdog_dev, st_wdog);
  210. watchdog_set_nowayout(&st_wdog_dev, WATCHDOG_NOWAYOUT);
  211. /* Init Watchdog timeout with value in DT */
  212. ret = watchdog_init_timeout(&st_wdog_dev, 0, &pdev->dev);
  213. if (ret) {
  214. dev_err(&pdev->dev, "Unable to initialise watchdog timeout\n");
  215. clk_disable_unprepare(clk);
  216. return ret;
  217. }
  218. ret = watchdog_register_device(&st_wdog_dev);
  219. if (ret) {
  220. dev_err(&pdev->dev, "Unable to register watchdog\n");
  221. clk_disable_unprepare(clk);
  222. return ret;
  223. }
  224. st_wdog_setup(st_wdog, true);
  225. dev_info(&pdev->dev, "LPC Watchdog driver registered, reset type is %s",
  226. st_wdog->warm_reset ? "warm" : "cold");
  227. return ret;
  228. }
  229. static int st_wdog_remove(struct platform_device *pdev)
  230. {
  231. struct st_wdog *st_wdog = watchdog_get_drvdata(&st_wdog_dev);
  232. st_wdog_setup(st_wdog, false);
  233. watchdog_unregister_device(&st_wdog_dev);
  234. clk_disable_unprepare(st_wdog->clk);
  235. return 0;
  236. }
  237. #ifdef CONFIG_PM_SLEEP
  238. static int st_wdog_suspend(struct device *dev)
  239. {
  240. struct st_wdog *st_wdog = watchdog_get_drvdata(&st_wdog_dev);
  241. if (watchdog_active(&st_wdog_dev))
  242. st_wdog_stop(&st_wdog_dev);
  243. st_wdog_setup(st_wdog, false);
  244. clk_disable(st_wdog->clk);
  245. return 0;
  246. }
  247. static int st_wdog_resume(struct device *dev)
  248. {
  249. struct st_wdog *st_wdog = watchdog_get_drvdata(&st_wdog_dev);
  250. int ret;
  251. ret = clk_enable(st_wdog->clk);
  252. if (ret) {
  253. dev_err(dev, "Unable to re-enable clock\n");
  254. watchdog_unregister_device(&st_wdog_dev);
  255. clk_unprepare(st_wdog->clk);
  256. return ret;
  257. }
  258. st_wdog_setup(st_wdog, true);
  259. if (watchdog_active(&st_wdog_dev)) {
  260. st_wdog_load_timer(st_wdog, st_wdog_dev.timeout);
  261. st_wdog_start(&st_wdog_dev);
  262. }
  263. return 0;
  264. }
  265. #endif
  266. static SIMPLE_DEV_PM_OPS(st_wdog_pm_ops,
  267. st_wdog_suspend,
  268. st_wdog_resume);
  269. static struct platform_driver st_wdog_driver = {
  270. .driver = {
  271. .name = "st-lpc-wdt",
  272. .pm = &st_wdog_pm_ops,
  273. .of_match_table = st_wdog_match,
  274. },
  275. .probe = st_wdog_probe,
  276. .remove = st_wdog_remove,
  277. };
  278. module_platform_driver(st_wdog_driver);
  279. MODULE_AUTHOR("David Paris <david.paris@st.com>");
  280. MODULE_DESCRIPTION("ST LPC Watchdog Driver");
  281. MODULE_LICENSE("GPL");