Boot.S 2.8 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109
  1. /*
  2. Boot.S: boot loader for Siemens DVB-S card
  3. Copyright (C) 2001 Convergence integrated media GmbH
  4. Written by Ralph Metzler
  5. <rjkm@convergence.de>
  6. Copyright (C) 2006 Matthieu CASTET <castet.mattheiu@free.fr>
  7. This program is free software; you can redistribute it and/or
  8. modify it under the terms of the GNU General Public License
  9. as published by the Free Software Foundation; either version 2
  10. of the License, or (at your option) any later version.
  11. This program is distributed in the hope that it will be useful,
  12. but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. GNU General Public License for more details.
  15. You should have received a copy of the GNU General Public License
  16. along with this program; if not, write to the Free Software
  17. Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
  18. */
  19. /*
  20. check AV711x_3_1.pdf for some hardware infos
  21. build it with :
  22. $ cc -mbig-endian -c Boot.S
  23. $ ld -Ttext 0x2c000000 -EB -o Boot Boot.o
  24. $ objcopy -Obinary Boot
  25. */
  26. .text
  27. .align
  28. .globl _start
  29. _start:
  30. b reset // reset vector
  31. movs pc, r14 // undefined
  32. subs pc, r14, #4 // SWI
  33. subs pc, r14, #4 // prefetch abort
  34. subs pc, r14, #8 // data abort
  35. subs pc, r14, #4 // reserved
  36. subs pc, r14, #4 // IRQ
  37. subs pc, r14, #4 // FIQ
  38. .word tbl // table needed by firmware ROM
  39. tbl: .word (endtbl - tbl)
  40. .word 0
  41. .word conf
  42. endtbl: .word 0
  43. conf: .word 0xa5a55a5a
  44. .word 0x001f1555
  45. .word 0x00000009
  46. reset: ldr r13, buffer
  47. ldr r4, flag
  48. mov r0, #0
  49. str r0, [r4]
  50. str r0, [r4, #4]
  51. ldr r1, wait_address
  52. ldr r2, flag_address
  53. ldr r3, sram
  54. copycode: // copy the code HW Sram
  55. ldmia r1!, {r5-r12}
  56. stmia r3!, {r5-r12}
  57. cmp r1, r2
  58. ble copycode
  59. ldr pc, sram // jump to the copied code
  60. wait: ldrh r1, [r4] // wait for flag!=0
  61. cmp r1, #0
  62. beq wait
  63. mov r1, r13 // buffer address
  64. ldr r3, [r4,#4] // destaddr
  65. ldrh r2, [r4,#2] // get segment length
  66. add r2, r2, #63 // round length to next 64 bytes
  67. movs r2, r2, lsr #6 // and divide by 64
  68. moveq r0, #2 // if 0, set flag to 2, else signal
  69. strh r0, [r4] // that buffer is accepted by setting to 0
  70. beq wait
  71. copyloop:
  72. ldmia r1!, {r5-r12}
  73. stmia r3!, {r5-r12}
  74. ldmia r1!, {r5-r12}
  75. stmia r3!, {r5-r12}
  76. subs r2, r2, #1
  77. bne copyloop
  78. eor r13, r13, #0x1400 // switch to other buffer
  79. b wait
  80. // flag is stored at 0x2c0003f8, length at 0x2c0003fa,
  81. // destaddr at 0x2c0003fc
  82. flag: .word 0x2c0003f8
  83. // buffer 1 is at 0x2c000400, buffer 2 at 0x2c001000
  84. buffer: .word 0x2c000400
  85. sram: .word 0x9e000800
  86. wait_address: .word wait
  87. flag_address: .word flag