ttm_placement.h 3.5 KB

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  1. /**************************************************************************
  2. *
  3. * Copyright (c) 2006-2009 VMware, Inc., Palo Alto, CA., USA
  4. * All Rights Reserved.
  5. *
  6. * Permission is hereby granted, free of charge, to any person obtaining a
  7. * copy of this software and associated documentation files (the
  8. * "Software"), to deal in the Software without restriction, including
  9. * without limitation the rights to use, copy, modify, merge, publish,
  10. * distribute, sub license, and/or sell copies of the Software, and to
  11. * permit persons to whom the Software is furnished to do so, subject to
  12. * the following conditions:
  13. *
  14. * The above copyright notice and this permission notice (including the
  15. * next paragraph) shall be included in all copies or substantial portions
  16. * of the Software.
  17. *
  18. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  19. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  20. * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  21. * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
  22. * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  23. * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  24. * USE OR OTHER DEALINGS IN THE SOFTWARE.
  25. *
  26. **************************************************************************/
  27. /*
  28. * Authors: Thomas Hellstrom <thellstrom-at-vmware-dot-com>
  29. */
  30. #ifndef _TTM_PLACEMENT_H_
  31. #define _TTM_PLACEMENT_H_
  32. /*
  33. * Memory regions for data placement.
  34. */
  35. #define TTM_PL_SYSTEM 0
  36. #define TTM_PL_TT 1
  37. #define TTM_PL_VRAM 2
  38. #define TTM_PL_PRIV0 3
  39. #define TTM_PL_PRIV1 4
  40. #define TTM_PL_PRIV2 5
  41. #define TTM_PL_PRIV3 6
  42. #define TTM_PL_PRIV4 7
  43. #define TTM_PL_PRIV5 8
  44. #define TTM_PL_SWAPPED 15
  45. #define TTM_PL_FLAG_SYSTEM (1 << TTM_PL_SYSTEM)
  46. #define TTM_PL_FLAG_TT (1 << TTM_PL_TT)
  47. #define TTM_PL_FLAG_VRAM (1 << TTM_PL_VRAM)
  48. #define TTM_PL_FLAG_PRIV0 (1 << TTM_PL_PRIV0)
  49. #define TTM_PL_FLAG_PRIV1 (1 << TTM_PL_PRIV1)
  50. #define TTM_PL_FLAG_PRIV2 (1 << TTM_PL_PRIV2)
  51. #define TTM_PL_FLAG_PRIV3 (1 << TTM_PL_PRIV3)
  52. #define TTM_PL_FLAG_PRIV4 (1 << TTM_PL_PRIV4)
  53. #define TTM_PL_FLAG_PRIV5 (1 << TTM_PL_PRIV5)
  54. #define TTM_PL_FLAG_SWAPPED (1 << TTM_PL_SWAPPED)
  55. #define TTM_PL_MASK_MEM 0x0000FFFF
  56. /*
  57. * Other flags that affects data placement.
  58. * TTM_PL_FLAG_CACHED indicates cache-coherent mappings
  59. * if available.
  60. * TTM_PL_FLAG_SHARED means that another application may
  61. * reference the buffer.
  62. * TTM_PL_FLAG_NO_EVICT means that the buffer may never
  63. * be evicted to make room for other buffers.
  64. * TTM_PL_FLAG_TOPDOWN requests to be placed from the
  65. * top of the memory area, instead of the bottom.
  66. */
  67. #define TTM_PL_FLAG_CACHED (1 << 16)
  68. #define TTM_PL_FLAG_UNCACHED (1 << 17)
  69. #define TTM_PL_FLAG_WC (1 << 18)
  70. #define TTM_PL_FLAG_SHARED (1 << 20)
  71. #define TTM_PL_FLAG_NO_EVICT (1 << 21)
  72. #define TTM_PL_FLAG_TOPDOWN (1 << 22)
  73. #define TTM_PL_MASK_CACHING (TTM_PL_FLAG_CACHED | \
  74. TTM_PL_FLAG_UNCACHED | \
  75. TTM_PL_FLAG_WC)
  76. #define TTM_PL_MASK_MEMTYPE (TTM_PL_MASK_MEM | TTM_PL_MASK_CACHING)
  77. /*
  78. * Access flags to be used for CPU- and GPU- mappings.
  79. * The idea is that the TTM synchronization mechanism will
  80. * allow concurrent READ access and exclusive write access.
  81. * Currently GPU- and CPU accesses are exclusive.
  82. */
  83. #define TTM_ACCESS_READ (1 << 0)
  84. #define TTM_ACCESS_WRITE (1 << 1)
  85. #endif