qcom,spmi-vadc.h 4.0 KB

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  1. /*
  2. * Copyright (c) 2012-2014, The Linux Foundation. All rights reserved.
  3. *
  4. * This program is free software; you can redistribute it and/or modify
  5. * it under the terms of the GNU General Public License version 2 and
  6. * only version 2 as published by the Free Software Foundation.
  7. *
  8. * This program is distributed in the hope that it will be useful
  9. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11. * GNU General Public License for more details.
  12. */
  13. #ifndef _DT_BINDINGS_QCOM_SPMI_VADC_H
  14. #define _DT_BINDINGS_QCOM_SPMI_VADC_H
  15. /* Voltage ADC channels */
  16. #define VADC_USBIN 0x00
  17. #define VADC_DCIN 0x01
  18. #define VADC_VCHG_SNS 0x02
  19. #define VADC_SPARE1_03 0x03
  20. #define VADC_USB_ID_MV 0x04
  21. #define VADC_VCOIN 0x05
  22. #define VADC_VBAT_SNS 0x06
  23. #define VADC_VSYS 0x07
  24. #define VADC_DIE_TEMP 0x08
  25. #define VADC_REF_625MV 0x09
  26. #define VADC_REF_1250MV 0x0a
  27. #define VADC_CHG_TEMP 0x0b
  28. #define VADC_SPARE1 0x0c
  29. #define VADC_SPARE2 0x0d
  30. #define VADC_GND_REF 0x0e
  31. #define VADC_VDD_VADC 0x0f
  32. #define VADC_P_MUX1_1_1 0x10
  33. #define VADC_P_MUX2_1_1 0x11
  34. #define VADC_P_MUX3_1_1 0x12
  35. #define VADC_P_MUX4_1_1 0x13
  36. #define VADC_P_MUX5_1_1 0x14
  37. #define VADC_P_MUX6_1_1 0x15
  38. #define VADC_P_MUX7_1_1 0x16
  39. #define VADC_P_MUX8_1_1 0x17
  40. #define VADC_P_MUX9_1_1 0x18
  41. #define VADC_P_MUX10_1_1 0x19
  42. #define VADC_P_MUX11_1_1 0x1a
  43. #define VADC_P_MUX12_1_1 0x1b
  44. #define VADC_P_MUX13_1_1 0x1c
  45. #define VADC_P_MUX14_1_1 0x1d
  46. #define VADC_P_MUX15_1_1 0x1e
  47. #define VADC_P_MUX16_1_1 0x1f
  48. #define VADC_P_MUX1_1_3 0x20
  49. #define VADC_P_MUX2_1_3 0x21
  50. #define VADC_P_MUX3_1_3 0x22
  51. #define VADC_P_MUX4_1_3 0x23
  52. #define VADC_P_MUX5_1_3 0x24
  53. #define VADC_P_MUX6_1_3 0x25
  54. #define VADC_P_MUX7_1_3 0x26
  55. #define VADC_P_MUX8_1_3 0x27
  56. #define VADC_P_MUX9_1_3 0x28
  57. #define VADC_P_MUX10_1_3 0x29
  58. #define VADC_P_MUX11_1_3 0x2a
  59. #define VADC_P_MUX12_1_3 0x2b
  60. #define VADC_P_MUX13_1_3 0x2c
  61. #define VADC_P_MUX14_1_3 0x2d
  62. #define VADC_P_MUX15_1_3 0x2e
  63. #define VADC_P_MUX16_1_3 0x2f
  64. #define VADC_LR_MUX1_BAT_THERM 0x30
  65. #define VADC_LR_MUX2_BAT_ID 0x31
  66. #define VADC_LR_MUX3_XO_THERM 0x32
  67. #define VADC_LR_MUX4_AMUX_THM1 0x33
  68. #define VADC_LR_MUX5_AMUX_THM2 0x34
  69. #define VADC_LR_MUX6_AMUX_THM3 0x35
  70. #define VADC_LR_MUX7_HW_ID 0x36
  71. #define VADC_LR_MUX8_AMUX_THM4 0x37
  72. #define VADC_LR_MUX9_AMUX_THM5 0x38
  73. #define VADC_LR_MUX10_USB_ID 0x39
  74. #define VADC_AMUX_PU1 0x3a
  75. #define VADC_AMUX_PU2 0x3b
  76. #define VADC_LR_MUX3_BUF_XO_THERM 0x3c
  77. #define VADC_LR_MUX1_PU1_BAT_THERM 0x70
  78. #define VADC_LR_MUX2_PU1_BAT_ID 0x71
  79. #define VADC_LR_MUX3_PU1_XO_THERM 0x72
  80. #define VADC_LR_MUX4_PU1_AMUX_THM1 0x73
  81. #define VADC_LR_MUX5_PU1_AMUX_THM2 0x74
  82. #define VADC_LR_MUX6_PU1_AMUX_THM3 0x75
  83. #define VADC_LR_MUX7_PU1_AMUX_HW_ID 0x76
  84. #define VADC_LR_MUX8_PU1_AMUX_THM4 0x77
  85. #define VADC_LR_MUX9_PU1_AMUX_THM5 0x78
  86. #define VADC_LR_MUX10_PU1_AMUX_USB_ID 0x79
  87. #define VADC_LR_MUX3_BUF_PU1_XO_THERM 0x7c
  88. #define VADC_LR_MUX1_PU2_BAT_THERM 0xb0
  89. #define VADC_LR_MUX2_PU2_BAT_ID 0xb1
  90. #define VADC_LR_MUX3_PU2_XO_THERM 0xb2
  91. #define VADC_LR_MUX4_PU2_AMUX_THM1 0xb3
  92. #define VADC_LR_MUX5_PU2_AMUX_THM2 0xb4
  93. #define VADC_LR_MUX6_PU2_AMUX_THM3 0xb5
  94. #define VADC_LR_MUX7_PU2_AMUX_HW_ID 0xb6
  95. #define VADC_LR_MUX8_PU2_AMUX_THM4 0xb7
  96. #define VADC_LR_MUX9_PU2_AMUX_THM5 0xb8
  97. #define VADC_LR_MUX10_PU2_AMUX_USB_ID 0xb9
  98. #define VADC_LR_MUX3_BUF_PU2_XO_THERM 0xbc
  99. #define VADC_LR_MUX1_PU1_PU2_BAT_THERM 0xf0
  100. #define VADC_LR_MUX2_PU1_PU2_BAT_ID 0xf1
  101. #define VADC_LR_MUX3_PU1_PU2_XO_THERM 0xf2
  102. #define VADC_LR_MUX4_PU1_PU2_AMUX_THM1 0xf3
  103. #define VADC_LR_MUX5_PU1_PU2_AMUX_THM2 0xf4
  104. #define VADC_LR_MUX6_PU1_PU2_AMUX_THM3 0xf5
  105. #define VADC_LR_MUX7_PU1_PU2_AMUX_HW_ID 0xf6
  106. #define VADC_LR_MUX8_PU1_PU2_AMUX_THM4 0xf7
  107. #define VADC_LR_MUX9_PU1_PU2_AMUX_THM5 0xf8
  108. #define VADC_LR_MUX10_PU1_PU2_AMUX_USB_ID 0xf9
  109. #define VADC_LR_MUX3_BUF_PU1_PU2_XO_THERM 0xfc
  110. #endif /* _DT_BINDINGS_QCOM_SPMI_VADC_H */