pxa-i2c.h 2.8 KB

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  1. /*
  2. * i2c_pxa.h
  3. *
  4. * Copyright (C) 2002 Intrinsyc Software Inc.
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License version 2 as
  8. * published by the Free Software Foundation.
  9. *
  10. */
  11. #ifndef _I2C_PXA_H_
  12. #define _I2C_PXA_H_
  13. #if 0
  14. #define DEF_TIMEOUT 3
  15. #else
  16. /* need a longer timeout if we're dealing with the fact we may well be
  17. * looking at a multi-master environment
  18. */
  19. #define DEF_TIMEOUT 32
  20. #endif
  21. #define BUS_ERROR (-EREMOTEIO)
  22. #define XFER_NAKED (-ECONNREFUSED)
  23. #define I2C_RETRY (-2000) /* an error has occurred retry transmit */
  24. /* ICR initialize bit values
  25. *
  26. * 15. FM 0 (100 Khz operation)
  27. * 14. UR 0 (No unit reset)
  28. * 13. SADIE 0 (Disables the unit from interrupting on slave addresses
  29. * matching its slave address)
  30. * 12. ALDIE 0 (Disables the unit from interrupt when it loses arbitration
  31. * in master mode)
  32. * 11. SSDIE 0 (Disables interrupts from a slave stop detected, in slave mode)
  33. * 10. BEIE 1 (Enable interrupts from detected bus errors, no ACK sent)
  34. * 9. IRFIE 1 (Enable interrupts from full buffer received)
  35. * 8. ITEIE 1 (Enables the I2C unit to interrupt when transmit buffer empty)
  36. * 7. GCD 1 (Disables i2c unit response to general call messages as a slave)
  37. * 6. IUE 0 (Disable unit until we change settings)
  38. * 5. SCLE 1 (Enables the i2c clock output for master mode (drives SCL)
  39. * 4. MA 0 (Only send stop with the ICR stop bit)
  40. * 3. TB 0 (We are not transmitting a byte initially)
  41. * 2. ACKNAK 0 (Send an ACK after the unit receives a byte)
  42. * 1. STOP 0 (Do not send a STOP)
  43. * 0. START 0 (Do not send a START)
  44. *
  45. */
  46. #define I2C_ICR_INIT (ICR_BEIE | ICR_IRFIE | ICR_ITEIE | ICR_GCD | ICR_SCLE)
  47. /* I2C status register init values
  48. *
  49. * 10. BED 1 (Clear bus error detected)
  50. * 9. SAD 1 (Clear slave address detected)
  51. * 7. IRF 1 (Clear IDBR Receive Full)
  52. * 6. ITE 1 (Clear IDBR Transmit Empty)
  53. * 5. ALD 1 (Clear Arbitration Loss Detected)
  54. * 4. SSD 1 (Clear Slave Stop Detected)
  55. */
  56. #define I2C_ISR_INIT 0x7FF /* status register init */
  57. struct i2c_slave_client;
  58. struct i2c_pxa_platform_data {
  59. unsigned int slave_addr;
  60. struct i2c_slave_client *slave;
  61. unsigned int class;
  62. unsigned int use_pio :1;
  63. unsigned int fast_mode :1;
  64. unsigned int high_mode:1;
  65. unsigned char master_code;
  66. unsigned long rate;
  67. };
  68. extern void pxa_set_i2c_info(struct i2c_pxa_platform_data *info);
  69. #ifdef CONFIG_PXA27x
  70. extern void pxa27x_set_i2c_power_info(struct i2c_pxa_platform_data *info);
  71. #endif
  72. #ifdef CONFIG_PXA3xx
  73. extern void pxa3xx_set_i2c_power_info(struct i2c_pxa_platform_data *info);
  74. #endif
  75. #endif