mbus.h 2.3 KB

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  1. /*
  2. * Marvell MBUS common definitions.
  3. *
  4. * Copyright (C) 2008 Marvell Semiconductor
  5. *
  6. * This file is licensed under the terms of the GNU General Public
  7. * License version 2. This program is licensed "as is" without any
  8. * warranty of any kind, whether express or implied.
  9. */
  10. #ifndef __LINUX_MBUS_H
  11. #define __LINUX_MBUS_H
  12. struct resource;
  13. struct mbus_dram_target_info
  14. {
  15. /*
  16. * The 4-bit MBUS target ID of the DRAM controller.
  17. */
  18. u8 mbus_dram_target_id;
  19. /*
  20. * The base address, size, and MBUS attribute ID for each
  21. * of the possible DRAM chip selects. Peripherals are
  22. * required to support at least 4 decode windows.
  23. */
  24. int num_cs;
  25. struct mbus_dram_window {
  26. u8 cs_index;
  27. u8 mbus_attr;
  28. u64 base;
  29. u64 size;
  30. } cs[4];
  31. };
  32. /* Flags for PCI/PCIe address decoding regions */
  33. #define MVEBU_MBUS_PCI_IO 0x1
  34. #define MVEBU_MBUS_PCI_MEM 0x2
  35. #define MVEBU_MBUS_PCI_WA 0x3
  36. /*
  37. * Magic value that explicits that we don't need a remapping-capable
  38. * address decoding window.
  39. */
  40. #define MVEBU_MBUS_NO_REMAP (0xffffffff)
  41. /* Maximum size of a mbus window name */
  42. #define MVEBU_MBUS_MAX_WINNAME_SZ 32
  43. /*
  44. * The Marvell mbus is to be found only on SOCs from the Orion family
  45. * at the moment. Provide a dummy stub for other architectures.
  46. */
  47. #ifdef CONFIG_PLAT_ORION
  48. extern const struct mbus_dram_target_info *mv_mbus_dram_info(void);
  49. extern const struct mbus_dram_target_info *mv_mbus_dram_info_nooverlap(void);
  50. #else
  51. static inline const struct mbus_dram_target_info *mv_mbus_dram_info(void)
  52. {
  53. return NULL;
  54. }
  55. static inline const struct mbus_dram_target_info *mv_mbus_dram_info_nooverlap(void)
  56. {
  57. return NULL;
  58. }
  59. #endif
  60. int mvebu_mbus_save_cpu_target(u32 *store_addr);
  61. void mvebu_mbus_get_pcie_mem_aperture(struct resource *res);
  62. void mvebu_mbus_get_pcie_io_aperture(struct resource *res);
  63. int mvebu_mbus_add_window_remap_by_id(unsigned int target,
  64. unsigned int attribute,
  65. phys_addr_t base, size_t size,
  66. phys_addr_t remap);
  67. int mvebu_mbus_add_window_by_id(unsigned int target, unsigned int attribute,
  68. phys_addr_t base, size_t size);
  69. int mvebu_mbus_del_window(phys_addr_t base, size_t size);
  70. int mvebu_mbus_init(const char *soc, phys_addr_t mbus_phys_base,
  71. size_t mbus_size, phys_addr_t sdram_phys_base,
  72. size_t sdram_size);
  73. int mvebu_mbus_dt_init(bool is_coherent);
  74. #endif /* __LINUX_MBUS_H */