s5m8767.h 4.6 KB

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  1. /* s5m8767.h
  2. *
  3. * Copyright (c) 2011 Samsung Electronics Co., Ltd
  4. * http://www.samsung.com
  5. *
  6. * This program is free software; you can redistribute it and/or modify it
  7. * under the terms of the GNU General Public License as published by the
  8. * Free Software Foundation; either version 2 of the License, or (at your
  9. * option) any later version.
  10. *
  11. */
  12. #ifndef __LINUX_MFD_S5M8767_H
  13. #define __LINUX_MFD_S5M8767_H
  14. /* S5M8767 registers */
  15. enum s5m8767_reg {
  16. S5M8767_REG_ID,
  17. S5M8767_REG_INT1,
  18. S5M8767_REG_INT2,
  19. S5M8767_REG_INT3,
  20. S5M8767_REG_INT1M,
  21. S5M8767_REG_INT2M,
  22. S5M8767_REG_INT3M,
  23. S5M8767_REG_STATUS1,
  24. S5M8767_REG_STATUS2,
  25. S5M8767_REG_STATUS3,
  26. S5M8767_REG_CTRL1,
  27. S5M8767_REG_CTRL2,
  28. S5M8767_REG_LOWBAT1,
  29. S5M8767_REG_LOWBAT2,
  30. S5M8767_REG_BUCHG,
  31. S5M8767_REG_DVSRAMP,
  32. S5M8767_REG_DVSTIMER2 = 0x10,
  33. S5M8767_REG_DVSTIMER3,
  34. S5M8767_REG_DVSTIMER4,
  35. S5M8767_REG_LDO1,
  36. S5M8767_REG_LDO2,
  37. S5M8767_REG_LDO3,
  38. S5M8767_REG_LDO4,
  39. S5M8767_REG_LDO5,
  40. S5M8767_REG_LDO6,
  41. S5M8767_REG_LDO7,
  42. S5M8767_REG_LDO8,
  43. S5M8767_REG_LDO9,
  44. S5M8767_REG_LDO10,
  45. S5M8767_REG_LDO11,
  46. S5M8767_REG_LDO12,
  47. S5M8767_REG_LDO13,
  48. S5M8767_REG_LDO14 = 0x20,
  49. S5M8767_REG_LDO15,
  50. S5M8767_REG_LDO16,
  51. S5M8767_REG_LDO17,
  52. S5M8767_REG_LDO18,
  53. S5M8767_REG_LDO19,
  54. S5M8767_REG_LDO20,
  55. S5M8767_REG_LDO21,
  56. S5M8767_REG_LDO22,
  57. S5M8767_REG_LDO23,
  58. S5M8767_REG_LDO24,
  59. S5M8767_REG_LDO25,
  60. S5M8767_REG_LDO26,
  61. S5M8767_REG_LDO27,
  62. S5M8767_REG_LDO28,
  63. S5M8767_REG_UVLO = 0x31,
  64. S5M8767_REG_BUCK1CTRL1,
  65. S5M8767_REG_BUCK1CTRL2,
  66. S5M8767_REG_BUCK2CTRL,
  67. S5M8767_REG_BUCK2DVS1,
  68. S5M8767_REG_BUCK2DVS2,
  69. S5M8767_REG_BUCK2DVS3,
  70. S5M8767_REG_BUCK2DVS4,
  71. S5M8767_REG_BUCK2DVS5,
  72. S5M8767_REG_BUCK2DVS6,
  73. S5M8767_REG_BUCK2DVS7,
  74. S5M8767_REG_BUCK2DVS8,
  75. S5M8767_REG_BUCK3CTRL,
  76. S5M8767_REG_BUCK3DVS1,
  77. S5M8767_REG_BUCK3DVS2,
  78. S5M8767_REG_BUCK3DVS3,
  79. S5M8767_REG_BUCK3DVS4,
  80. S5M8767_REG_BUCK3DVS5,
  81. S5M8767_REG_BUCK3DVS6,
  82. S5M8767_REG_BUCK3DVS7,
  83. S5M8767_REG_BUCK3DVS8,
  84. S5M8767_REG_BUCK4CTRL,
  85. S5M8767_REG_BUCK4DVS1,
  86. S5M8767_REG_BUCK4DVS2,
  87. S5M8767_REG_BUCK4DVS3,
  88. S5M8767_REG_BUCK4DVS4,
  89. S5M8767_REG_BUCK4DVS5,
  90. S5M8767_REG_BUCK4DVS6,
  91. S5M8767_REG_BUCK4DVS7,
  92. S5M8767_REG_BUCK4DVS8,
  93. S5M8767_REG_BUCK5CTRL1,
  94. S5M8767_REG_BUCK5CTRL2,
  95. S5M8767_REG_BUCK5CTRL3,
  96. S5M8767_REG_BUCK5CTRL4,
  97. S5M8767_REG_BUCK5CTRL5,
  98. S5M8767_REG_BUCK6CTRL1,
  99. S5M8767_REG_BUCK6CTRL2,
  100. S5M8767_REG_BUCK7CTRL1,
  101. S5M8767_REG_BUCK7CTRL2,
  102. S5M8767_REG_BUCK8CTRL1,
  103. S5M8767_REG_BUCK8CTRL2,
  104. S5M8767_REG_BUCK9CTRL1,
  105. S5M8767_REG_BUCK9CTRL2,
  106. S5M8767_REG_LDO1CTRL,
  107. S5M8767_REG_LDO2_1CTRL,
  108. S5M8767_REG_LDO2_2CTRL,
  109. S5M8767_REG_LDO2_3CTRL,
  110. S5M8767_REG_LDO2_4CTRL,
  111. S5M8767_REG_LDO3CTRL,
  112. S5M8767_REG_LDO4CTRL,
  113. S5M8767_REG_LDO5CTRL,
  114. S5M8767_REG_LDO6CTRL,
  115. S5M8767_REG_LDO7CTRL,
  116. S5M8767_REG_LDO8CTRL,
  117. S5M8767_REG_LDO9CTRL,
  118. S5M8767_REG_LDO10CTRL,
  119. S5M8767_REG_LDO11CTRL,
  120. S5M8767_REG_LDO12CTRL,
  121. S5M8767_REG_LDO13CTRL,
  122. S5M8767_REG_LDO14CTRL,
  123. S5M8767_REG_LDO15CTRL,
  124. S5M8767_REG_LDO16CTRL,
  125. S5M8767_REG_LDO17CTRL,
  126. S5M8767_REG_LDO18CTRL,
  127. S5M8767_REG_LDO19CTRL,
  128. S5M8767_REG_LDO20CTRL,
  129. S5M8767_REG_LDO21CTRL,
  130. S5M8767_REG_LDO22CTRL,
  131. S5M8767_REG_LDO23CTRL,
  132. S5M8767_REG_LDO24CTRL,
  133. S5M8767_REG_LDO25CTRL,
  134. S5M8767_REG_LDO26CTRL,
  135. S5M8767_REG_LDO27CTRL,
  136. S5M8767_REG_LDO28CTRL,
  137. };
  138. /* S5M8767 regulator ids */
  139. enum s5m8767_regulators {
  140. S5M8767_LDO1,
  141. S5M8767_LDO2,
  142. S5M8767_LDO3,
  143. S5M8767_LDO4,
  144. S5M8767_LDO5,
  145. S5M8767_LDO6,
  146. S5M8767_LDO7,
  147. S5M8767_LDO8,
  148. S5M8767_LDO9,
  149. S5M8767_LDO10,
  150. S5M8767_LDO11,
  151. S5M8767_LDO12,
  152. S5M8767_LDO13,
  153. S5M8767_LDO14,
  154. S5M8767_LDO15,
  155. S5M8767_LDO16,
  156. S5M8767_LDO17,
  157. S5M8767_LDO18,
  158. S5M8767_LDO19,
  159. S5M8767_LDO20,
  160. S5M8767_LDO21,
  161. S5M8767_LDO22,
  162. S5M8767_LDO23,
  163. S5M8767_LDO24,
  164. S5M8767_LDO25,
  165. S5M8767_LDO26,
  166. S5M8767_LDO27,
  167. S5M8767_LDO28,
  168. S5M8767_BUCK1,
  169. S5M8767_BUCK2,
  170. S5M8767_BUCK3,
  171. S5M8767_BUCK4,
  172. S5M8767_BUCK5,
  173. S5M8767_BUCK6,
  174. S5M8767_BUCK7,
  175. S5M8767_BUCK8,
  176. S5M8767_BUCK9,
  177. S5M8767_AP_EN32KHZ,
  178. S5M8767_CP_EN32KHZ,
  179. S5M8767_REG_MAX,
  180. };
  181. /* LDO_EN/BUCK_EN field in registers */
  182. #define S5M8767_ENCTRL_SHIFT 6
  183. #define S5M8767_ENCTRL_MASK (0x3 << S5M8767_ENCTRL_SHIFT)
  184. /*
  185. * LDO_EN/BUCK_EN register value for controlling this Buck or LDO
  186. * by GPIO (PWREN, BUCKEN).
  187. */
  188. #define S5M8767_ENCTRL_USE_GPIO 0x1
  189. /*
  190. * Values for BUCK_RAMP field in DVS_RAMP register, matching raw values
  191. * in mV/us.
  192. */
  193. enum s5m8767_dvs_buck_ramp_values {
  194. S5M8767_DVS_BUCK_RAMP_5 = 0x4,
  195. S5M8767_DVS_BUCK_RAMP_10 = 0x9,
  196. S5M8767_DVS_BUCK_RAMP_12_5 = 0xb,
  197. S5M8767_DVS_BUCK_RAMP_25 = 0xd,
  198. S5M8767_DVS_BUCK_RAMP_50 = 0xe,
  199. S5M8767_DVS_BUCK_RAMP_100 = 0xf,
  200. };
  201. #define S5M8767_DVS_BUCK_RAMP_SHIFT 4
  202. #define S5M8767_DVS_BUCK_RAMP_MASK (0xf << S5M8767_DVS_BUCK_RAMP_SHIFT)
  203. #endif /* __LINUX_MFD_S5M8767_H */