msi.h 10 KB

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  1. #ifndef LINUX_MSI_H
  2. #define LINUX_MSI_H
  3. #include <linux/kobject.h>
  4. #include <linux/list.h>
  5. struct msi_msg {
  6. u32 address_lo; /* low 32 bits of msi message address */
  7. u32 address_hi; /* high 32 bits of msi message address */
  8. u32 data; /* 16 bits of msi message data */
  9. };
  10. extern int pci_msi_ignore_mask;
  11. /* Helper functions */
  12. struct irq_data;
  13. struct msi_desc;
  14. struct pci_dev;
  15. struct platform_msi_priv_data;
  16. void __get_cached_msi_msg(struct msi_desc *entry, struct msi_msg *msg);
  17. #ifdef CONFIG_GENERIC_MSI_IRQ
  18. void get_cached_msi_msg(unsigned int irq, struct msi_msg *msg);
  19. #else
  20. static inline void get_cached_msi_msg(unsigned int irq, struct msi_msg *msg)
  21. {
  22. }
  23. #endif
  24. typedef void (*irq_write_msi_msg_t)(struct msi_desc *desc,
  25. struct msi_msg *msg);
  26. /**
  27. * platform_msi_desc - Platform device specific msi descriptor data
  28. * @msi_priv_data: Pointer to platform private data
  29. * @msi_index: The index of the MSI descriptor for multi MSI
  30. */
  31. struct platform_msi_desc {
  32. struct platform_msi_priv_data *msi_priv_data;
  33. u16 msi_index;
  34. };
  35. /**
  36. * struct msi_desc - Descriptor structure for MSI based interrupts
  37. * @list: List head for management
  38. * @irq: The base interrupt number
  39. * @nvec_used: The number of vectors used
  40. * @dev: Pointer to the device which uses this descriptor
  41. * @msg: The last set MSI message cached for reuse
  42. *
  43. * @masked: [PCI MSI/X] Mask bits
  44. * @is_msix: [PCI MSI/X] True if MSI-X
  45. * @multiple: [PCI MSI/X] log2 num of messages allocated
  46. * @multi_cap: [PCI MSI/X] log2 num of messages supported
  47. * @maskbit: [PCI MSI/X] Mask-Pending bit supported?
  48. * @is_64: [PCI MSI/X] Address size: 0=32bit 1=64bit
  49. * @entry_nr: [PCI MSI/X] Entry which is described by this descriptor
  50. * @default_irq:[PCI MSI/X] The default pre-assigned non-MSI irq
  51. * @mask_pos: [PCI MSI] Mask register position
  52. * @mask_base: [PCI MSI-X] Mask register base address
  53. * @platform: [platform] Platform device specific msi descriptor data
  54. */
  55. struct msi_desc {
  56. /* Shared device/bus type independent data */
  57. struct list_head list;
  58. unsigned int irq;
  59. unsigned int nvec_used;
  60. struct device *dev;
  61. struct msi_msg msg;
  62. union {
  63. /* PCI MSI/X specific data */
  64. struct {
  65. u32 masked;
  66. struct {
  67. __u8 is_msix : 1;
  68. __u8 multiple : 3;
  69. __u8 multi_cap : 3;
  70. __u8 maskbit : 1;
  71. __u8 is_64 : 1;
  72. __u16 entry_nr;
  73. unsigned default_irq;
  74. } msi_attrib;
  75. union {
  76. u8 mask_pos;
  77. void __iomem *mask_base;
  78. };
  79. };
  80. /*
  81. * Non PCI variants add their data structure here. New
  82. * entries need to use a named structure. We want
  83. * proper name spaces for this. The PCI part is
  84. * anonymous for now as it would require an immediate
  85. * tree wide cleanup.
  86. */
  87. struct platform_msi_desc platform;
  88. };
  89. };
  90. /* Helpers to hide struct msi_desc implementation details */
  91. #define msi_desc_to_dev(desc) ((desc)->dev)
  92. #define dev_to_msi_list(dev) (&(dev)->msi_list)
  93. #define first_msi_entry(dev) \
  94. list_first_entry(dev_to_msi_list((dev)), struct msi_desc, list)
  95. #define for_each_msi_entry(desc, dev) \
  96. list_for_each_entry((desc), dev_to_msi_list((dev)), list)
  97. #ifdef CONFIG_PCI_MSI
  98. #define first_pci_msi_entry(pdev) first_msi_entry(&(pdev)->dev)
  99. #define for_each_pci_msi_entry(desc, pdev) \
  100. for_each_msi_entry((desc), &(pdev)->dev)
  101. struct pci_dev *msi_desc_to_pci_dev(struct msi_desc *desc);
  102. void *msi_desc_to_pci_sysdata(struct msi_desc *desc);
  103. void pci_write_msi_msg(unsigned int irq, struct msi_msg *msg);
  104. #else /* CONFIG_PCI_MSI */
  105. static inline void *msi_desc_to_pci_sysdata(struct msi_desc *desc)
  106. {
  107. return NULL;
  108. }
  109. static inline void pci_write_msi_msg(unsigned int irq, struct msi_msg *msg)
  110. {
  111. }
  112. #endif /* CONFIG_PCI_MSI */
  113. struct msi_desc *alloc_msi_entry(struct device *dev);
  114. void free_msi_entry(struct msi_desc *entry);
  115. void __pci_read_msi_msg(struct msi_desc *entry, struct msi_msg *msg);
  116. void __pci_write_msi_msg(struct msi_desc *entry, struct msi_msg *msg);
  117. u32 __pci_msix_desc_mask_irq(struct msi_desc *desc, u32 flag);
  118. u32 __pci_msi_desc_mask_irq(struct msi_desc *desc, u32 mask, u32 flag);
  119. void pci_msi_mask_irq(struct irq_data *data);
  120. void pci_msi_unmask_irq(struct irq_data *data);
  121. /* Conversion helpers. Should be removed after merging */
  122. static inline void __write_msi_msg(struct msi_desc *entry, struct msi_msg *msg)
  123. {
  124. __pci_write_msi_msg(entry, msg);
  125. }
  126. static inline void write_msi_msg(int irq, struct msi_msg *msg)
  127. {
  128. pci_write_msi_msg(irq, msg);
  129. }
  130. static inline void mask_msi_irq(struct irq_data *data)
  131. {
  132. pci_msi_mask_irq(data);
  133. }
  134. static inline void unmask_msi_irq(struct irq_data *data)
  135. {
  136. pci_msi_unmask_irq(data);
  137. }
  138. /*
  139. * The arch hooks to setup up msi irqs. Those functions are
  140. * implemented as weak symbols so that they /can/ be overriden by
  141. * architecture specific code if needed.
  142. */
  143. int arch_setup_msi_irq(struct pci_dev *dev, struct msi_desc *desc);
  144. void arch_teardown_msi_irq(unsigned int irq);
  145. int arch_setup_msi_irqs(struct pci_dev *dev, int nvec, int type);
  146. void arch_teardown_msi_irqs(struct pci_dev *dev);
  147. void arch_restore_msi_irqs(struct pci_dev *dev);
  148. void default_teardown_msi_irqs(struct pci_dev *dev);
  149. void default_restore_msi_irqs(struct pci_dev *dev);
  150. struct msi_controller {
  151. struct module *owner;
  152. struct device *dev;
  153. struct device_node *of_node;
  154. struct list_head list;
  155. int (*setup_irq)(struct msi_controller *chip, struct pci_dev *dev,
  156. struct msi_desc *desc);
  157. int (*setup_irqs)(struct msi_controller *chip, struct pci_dev *dev,
  158. int nvec, int type);
  159. void (*teardown_irq)(struct msi_controller *chip, unsigned int irq);
  160. };
  161. #ifdef CONFIG_GENERIC_MSI_IRQ_DOMAIN
  162. #include <linux/irqhandler.h>
  163. #include <asm/msi.h>
  164. struct irq_domain;
  165. struct irq_chip;
  166. struct device_node;
  167. struct fwnode_handle;
  168. struct msi_domain_info;
  169. /**
  170. * struct msi_domain_ops - MSI interrupt domain callbacks
  171. * @get_hwirq: Retrieve the resulting hw irq number
  172. * @msi_init: Domain specific init function for MSI interrupts
  173. * @msi_free: Domain specific function to free a MSI interrupts
  174. * @msi_check: Callback for verification of the domain/info/dev data
  175. * @msi_prepare: Prepare the allocation of the interrupts in the domain
  176. * @msi_finish: Optional callbacl to finalize the allocation
  177. * @set_desc: Set the msi descriptor for an interrupt
  178. * @handle_error: Optional error handler if the allocation fails
  179. *
  180. * @get_hwirq, @msi_init and @msi_free are callbacks used by
  181. * msi_create_irq_domain() and related interfaces
  182. *
  183. * @msi_check, @msi_prepare, @msi_finish, @set_desc and @handle_error
  184. * are callbacks used by msi_irq_domain_alloc_irqs() and related
  185. * interfaces which are based on msi_desc.
  186. */
  187. struct msi_domain_ops {
  188. irq_hw_number_t (*get_hwirq)(struct msi_domain_info *info,
  189. msi_alloc_info_t *arg);
  190. int (*msi_init)(struct irq_domain *domain,
  191. struct msi_domain_info *info,
  192. unsigned int virq, irq_hw_number_t hwirq,
  193. msi_alloc_info_t *arg);
  194. void (*msi_free)(struct irq_domain *domain,
  195. struct msi_domain_info *info,
  196. unsigned int virq);
  197. int (*msi_check)(struct irq_domain *domain,
  198. struct msi_domain_info *info,
  199. struct device *dev);
  200. int (*msi_prepare)(struct irq_domain *domain,
  201. struct device *dev, int nvec,
  202. msi_alloc_info_t *arg);
  203. void (*msi_finish)(msi_alloc_info_t *arg, int retval);
  204. void (*set_desc)(msi_alloc_info_t *arg,
  205. struct msi_desc *desc);
  206. int (*handle_error)(struct irq_domain *domain,
  207. struct msi_desc *desc, int error);
  208. };
  209. /**
  210. * struct msi_domain_info - MSI interrupt domain data
  211. * @flags: Flags to decribe features and capabilities
  212. * @ops: The callback data structure
  213. * @chip: Optional: associated interrupt chip
  214. * @chip_data: Optional: associated interrupt chip data
  215. * @handler: Optional: associated interrupt flow handler
  216. * @handler_data: Optional: associated interrupt flow handler data
  217. * @handler_name: Optional: associated interrupt flow handler name
  218. * @data: Optional: domain specific data
  219. */
  220. struct msi_domain_info {
  221. u32 flags;
  222. struct msi_domain_ops *ops;
  223. struct irq_chip *chip;
  224. void *chip_data;
  225. irq_flow_handler_t handler;
  226. void *handler_data;
  227. const char *handler_name;
  228. void *data;
  229. };
  230. /* Flags for msi_domain_info */
  231. enum {
  232. /*
  233. * Init non implemented ops callbacks with default MSI domain
  234. * callbacks.
  235. */
  236. MSI_FLAG_USE_DEF_DOM_OPS = (1 << 0),
  237. /*
  238. * Init non implemented chip callbacks with default MSI chip
  239. * callbacks.
  240. */
  241. MSI_FLAG_USE_DEF_CHIP_OPS = (1 << 1),
  242. /* Support multiple PCI MSI interrupts */
  243. MSI_FLAG_MULTI_PCI_MSI = (1 << 2),
  244. /* Support PCI MSIX interrupts */
  245. MSI_FLAG_PCI_MSIX = (1 << 3),
  246. /* Needs early activate, required for PCI */
  247. MSI_FLAG_ACTIVATE_EARLY = (1 << 4),
  248. };
  249. int msi_domain_set_affinity(struct irq_data *data, const struct cpumask *mask,
  250. bool force);
  251. struct irq_domain *msi_create_irq_domain(struct fwnode_handle *fwnode,
  252. struct msi_domain_info *info,
  253. struct irq_domain *parent);
  254. int msi_domain_alloc_irqs(struct irq_domain *domain, struct device *dev,
  255. int nvec);
  256. void msi_domain_free_irqs(struct irq_domain *domain, struct device *dev);
  257. struct msi_domain_info *msi_get_domain_info(struct irq_domain *domain);
  258. struct irq_domain *platform_msi_create_irq_domain(struct fwnode_handle *fwnode,
  259. struct msi_domain_info *info,
  260. struct irq_domain *parent);
  261. int platform_msi_domain_alloc_irqs(struct device *dev, unsigned int nvec,
  262. irq_write_msi_msg_t write_msi_msg);
  263. void platform_msi_domain_free_irqs(struct device *dev);
  264. #endif /* CONFIG_GENERIC_MSI_IRQ_DOMAIN */
  265. #ifdef CONFIG_PCI_MSI_IRQ_DOMAIN
  266. void pci_msi_domain_write_msg(struct irq_data *irq_data, struct msi_msg *msg);
  267. struct irq_domain *pci_msi_create_irq_domain(struct fwnode_handle *fwnode,
  268. struct msi_domain_info *info,
  269. struct irq_domain *parent);
  270. int pci_msi_domain_alloc_irqs(struct irq_domain *domain, struct pci_dev *dev,
  271. int nvec, int type);
  272. void pci_msi_domain_free_irqs(struct irq_domain *domain, struct pci_dev *dev);
  273. struct irq_domain *pci_msi_create_default_irq_domain(struct fwnode_handle *fwnode,
  274. struct msi_domain_info *info, struct irq_domain *parent);
  275. irq_hw_number_t pci_msi_domain_calc_hwirq(struct pci_dev *dev,
  276. struct msi_desc *desc);
  277. int pci_msi_domain_check_cap(struct irq_domain *domain,
  278. struct msi_domain_info *info, struct device *dev);
  279. u32 pci_msi_domain_get_msi_rid(struct irq_domain *domain, struct pci_dev *pdev);
  280. struct irq_domain *pci_msi_get_device_domain(struct pci_dev *pdev);
  281. #else
  282. static inline struct irq_domain *pci_msi_get_device_domain(struct pci_dev *pdev)
  283. {
  284. return NULL;
  285. }
  286. #endif /* CONFIG_PCI_MSI_IRQ_DOMAIN */
  287. #endif /* LINUX_MSI_H */