caif_spi.h 4.1 KB

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  1. /*
  2. * Copyright (C) ST-Ericsson AB 2010
  3. * Author: Daniel Martensson / Daniel.Martensson@stericsson.com
  4. * License terms: GNU General Public License (GPL) version 2
  5. */
  6. #ifndef CAIF_SPI_H_
  7. #define CAIF_SPI_H_
  8. #include <net/caif/caif_device.h>
  9. #define SPI_CMD_WR 0x00
  10. #define SPI_CMD_RD 0x01
  11. #define SPI_CMD_EOT 0x02
  12. #define SPI_CMD_IND 0x04
  13. #define SPI_DMA_BUF_LEN 8192
  14. #define WL_SZ 2 /* 16 bits. */
  15. #define SPI_CMD_SZ 4 /* 32 bits. */
  16. #define SPI_IND_SZ 4 /* 32 bits. */
  17. #define SPI_XFER 0
  18. #define SPI_SS_ON 1
  19. #define SPI_SS_OFF 2
  20. #define SPI_TERMINATE 3
  21. /* Minimum time between different levels is 50 microseconds. */
  22. #define MIN_TRANSITION_TIME_USEC 50
  23. /* Defines for calculating duration of SPI transfers for a particular
  24. * number of bytes.
  25. */
  26. #define SPI_MASTER_CLK_MHZ 13
  27. #define SPI_XFER_TIME_USEC(bytes, clk) (((bytes) * 8) / clk)
  28. /* Normally this should be aligned on the modem in order to benefit from full
  29. * duplex transfers. However a size of 8188 provokes errors when running with
  30. * the modem. These errors occur when packet sizes approaches 4 kB of data.
  31. */
  32. #define CAIF_MAX_SPI_FRAME 4092
  33. /* Maximum number of uplink CAIF frames that can reside in the same SPI frame.
  34. * This number should correspond with the modem setting. The application side
  35. * CAIF accepts any number of embedded downlink CAIF frames.
  36. */
  37. #define CAIF_MAX_SPI_PKTS 9
  38. /* Decides if SPI buffers should be prefilled with 0xFF pattern for easier
  39. * debugging. Both TX and RX buffers will be filled before the transfer.
  40. */
  41. #define CFSPI_DBG_PREFILL 0
  42. /* Structure describing a SPI transfer. */
  43. struct cfspi_xfer {
  44. u16 tx_dma_len;
  45. u16 rx_dma_len;
  46. void *va_tx[2];
  47. dma_addr_t pa_tx[2];
  48. void *va_rx;
  49. dma_addr_t pa_rx;
  50. };
  51. /* Structure implemented by the SPI interface. */
  52. struct cfspi_ifc {
  53. void (*ss_cb) (bool assert, struct cfspi_ifc *ifc);
  54. void (*xfer_done_cb) (struct cfspi_ifc *ifc);
  55. void *priv;
  56. };
  57. /* Structure implemented by SPI clients. */
  58. struct cfspi_dev {
  59. int (*init_xfer) (struct cfspi_xfer *xfer, struct cfspi_dev *dev);
  60. void (*sig_xfer) (bool xfer, struct cfspi_dev *dev);
  61. struct cfspi_ifc *ifc;
  62. char *name;
  63. u32 clk_mhz;
  64. void *priv;
  65. };
  66. /* Enumeration describing the CAIF SPI state. */
  67. enum cfspi_state {
  68. CFSPI_STATE_WAITING = 0,
  69. CFSPI_STATE_AWAKE,
  70. CFSPI_STATE_FETCH_PKT,
  71. CFSPI_STATE_GET_NEXT,
  72. CFSPI_STATE_INIT_XFER,
  73. CFSPI_STATE_WAIT_ACTIVE,
  74. CFSPI_STATE_SIG_ACTIVE,
  75. CFSPI_STATE_WAIT_XFER_DONE,
  76. CFSPI_STATE_XFER_DONE,
  77. CFSPI_STATE_WAIT_INACTIVE,
  78. CFSPI_STATE_SIG_INACTIVE,
  79. CFSPI_STATE_DELIVER_PKT,
  80. CFSPI_STATE_MAX,
  81. };
  82. /* Structure implemented by SPI physical interfaces. */
  83. struct cfspi {
  84. struct caif_dev_common cfdev;
  85. struct net_device *ndev;
  86. struct platform_device *pdev;
  87. struct sk_buff_head qhead;
  88. struct sk_buff_head chead;
  89. u16 cmd;
  90. u16 tx_cpck_len;
  91. u16 tx_npck_len;
  92. u16 rx_cpck_len;
  93. u16 rx_npck_len;
  94. struct cfspi_ifc ifc;
  95. struct cfspi_xfer xfer;
  96. struct cfspi_dev *dev;
  97. unsigned long state;
  98. struct work_struct work;
  99. struct workqueue_struct *wq;
  100. struct list_head list;
  101. int flow_off_sent;
  102. u32 qd_low_mark;
  103. u32 qd_high_mark;
  104. struct completion comp;
  105. wait_queue_head_t wait;
  106. spinlock_t lock;
  107. bool flow_stop;
  108. bool slave;
  109. bool slave_talked;
  110. #ifdef CONFIG_DEBUG_FS
  111. enum cfspi_state dbg_state;
  112. u16 pcmd;
  113. u16 tx_ppck_len;
  114. u16 rx_ppck_len;
  115. struct dentry *dbgfs_dir;
  116. struct dentry *dbgfs_state;
  117. struct dentry *dbgfs_frame;
  118. #endif /* CONFIG_DEBUG_FS */
  119. };
  120. extern int spi_frm_align;
  121. extern int spi_up_head_align;
  122. extern int spi_up_tail_align;
  123. extern int spi_down_head_align;
  124. extern int spi_down_tail_align;
  125. extern struct platform_driver cfspi_spi_driver;
  126. void cfspi_dbg_state(struct cfspi *cfspi, int state);
  127. int cfspi_xmitfrm(struct cfspi *cfspi, u8 *buf, size_t len);
  128. int cfspi_xmitlen(struct cfspi *cfspi);
  129. int cfspi_rxfrm(struct cfspi *cfspi, u8 *buf, size_t len);
  130. int cfspi_spi_remove(struct platform_device *pdev);
  131. int cfspi_spi_probe(struct platform_device *pdev);
  132. int cfspi_xmitfrm(struct cfspi *cfspi, u8 *buf, size_t len);
  133. int cfspi_xmitlen(struct cfspi *cfspi);
  134. int cfspi_rxfrm(struct cfspi *cfspi, u8 *buf, size_t len);
  135. void cfspi_xfer(struct work_struct *work);
  136. #endif /* CAIF_SPI_H_ */