Home Explore Help
Register Sign In
dingyu
/
CooCenter-System-kernel
1
0
Fork 0
Files Issues 0 Pull Requests 0 Wiki
Branch: master
Branches Tags
CooCenter-Sy...
/
include
/
video
/
pmagb-b-fb.h

pmagb-b-fb.h 2.3 KB
Permalink History Raw

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758 
  1. /*
    2. 

  2.  *	linux/include/video/pmagb-b-fb.h
    3. 

  3.  *
    4. 

  4.  *	TURBOchannel PMAGB-B Smart Frame Buffer (SFB) card support,
    5. 

  5.  *	Copyright (C) 1999, 2000, 2001 by
    6. 

  6.  *	Michael Engel <engel@unix-ag.org> and
    7. 

  7.  *	Karsten Merker <merker@linuxtag.org>
    8. 

  8.  *	Copyright (c) 2005  Maciej W. Rozycki
    9. 

  9.  *
    10. 

  10.  *	This file is subject to the terms and conditions of the GNU General
    11. 

  11.  *	Public License.  See the file COPYING in the main directory of this
    12. 

  12.  *	archive for more details.
    13. 

  13.  */
    14. 

  14. 

  15. /* IOmem resource offsets.  */
    16. 

  16. #define PMAGB_B_ROM		0x000000	/* REX option ROM */
    17. 

  17. #define PMAGB_B_SFB		0x100000	/* SFB ASIC */
    18. 

  18. #define PMAGB_B_GP0		0x140000	/* general purpose output 0 */
    19. 

  19. #define PMAGB_B_GP1		0x180000	/* general purpose output 1 */
    20. 

  20. #define PMAGB_B_BT459		0x1c0000	/* Bt459 RAMDAC */
    21. 

  21. #define PMAGB_B_FBMEM		0x200000	/* frame buffer */
    22. 

  22. #define PMAGB_B_SIZE		0x400000	/* address space size */
    23. 

  23. 

  24. /* IOmem register offsets.  */
    25. 

  25. #define SFB_REG_VID_HOR		0x64		/* video horizontal setup */
    26. 

  26. #define SFB_REG_VID_VER		0x68		/* video vertical setup */
    27. 

  27. #define SFB_REG_VID_BASE	0x6c		/* video base address */
    28. 

  28. #define SFB_REG_TCCLK_COUNT	0x78		/* TURBOchannel clock count */
    29. 

  29. #define SFB_REG_VIDCLK_COUNT	0x7c		/* video clock count */
    30. 

  30. 

  31. /* Video horizontal setup register constants.  All bits are r/w.  */
    32. 

  32. #define SFB_VID_HOR_BP_SHIFT	0x15		/* back porch */
    33. 

  33. #define SFB_VID_HOR_BP_MASK	0x7f
    34. 

  34. #define SFB_VID_HOR_SYN_SHIFT	0x0e		/* sync pulse */
    35. 

  35. #define SFB_VID_HOR_SYN_MASK	0x7f
    36. 

  36. #define SFB_VID_HOR_FP_SHIFT	0x09		/* front porch */
    37. 

  37. #define SFB_VID_HOR_FP_MASK	0x1f
    38. 

  38. #define SFB_VID_HOR_PIX_SHIFT	0x00		/* active video */
    39. 

  39. #define SFB_VID_HOR_PIX_MASK	0x1ff
    40. 

  40. 

  41. /* Video vertical setup register constants.  All bits are r/w.  */
    42. 

  42. #define SFB_VID_VER_BP_SHIFT	0x16		/* back porch */
    43. 

  43. #define SFB_VID_VER_BP_MASK	0x3f
    44. 

  44. #define SFB_VID_VER_SYN_SHIFT	0x10		/* sync pulse */
    45. 

  45. #define SFB_VID_VER_SYN_MASK	0x3f
    46. 

  46. #define SFB_VID_VER_FP_SHIFT	0x0b		/* front porch */
    47. 

  47. #define SFB_VID_VER_FP_MASK	0x1f
    48. 

  48. #define SFB_VID_VER_SL_SHIFT	0x00		/* active scan lines */
    49. 

  49. #define SFB_VID_VER_SL_MASK	0x7ff
    50. 

  50. 

  51. /* Video base address register constants.  All bits are r/w.  */
    52. 

  52. #define SFB_VID_BASE_MASK	0x1ff		/* video base row address */
    53. 

  53. 

  54. /* Bt459 register offsets, byte-wide registers.  */
    55. 

  55. #define BT459_ADDR_LO		0x0		/* address low */
    56. 

  56. #define BT459_ADDR_HI		0x4		/* address high */
    57. 

  57. #define BT459_DATA		0x8		/* data window register */
    58. 

  58. #define BT459_CMAP		0xc		/* color map window register */
    59.