msi.c 9.1 KB

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  1. /*
  2. * linux/kernel/irq/msi.c
  3. *
  4. * Copyright (C) 2014 Intel Corp.
  5. * Author: Jiang Liu <jiang.liu@linux.intel.com>
  6. *
  7. * This file is licensed under GPLv2.
  8. *
  9. * This file contains common code to support Message Signalled Interrupt for
  10. * PCI compatible and non PCI compatible devices.
  11. */
  12. #include <linux/types.h>
  13. #include <linux/device.h>
  14. #include <linux/irq.h>
  15. #include <linux/irqdomain.h>
  16. #include <linux/msi.h>
  17. /* Temparory solution for building, will be removed later */
  18. #include <linux/pci.h>
  19. struct msi_desc *alloc_msi_entry(struct device *dev)
  20. {
  21. struct msi_desc *desc = kzalloc(sizeof(*desc), GFP_KERNEL);
  22. if (!desc)
  23. return NULL;
  24. INIT_LIST_HEAD(&desc->list);
  25. desc->dev = dev;
  26. return desc;
  27. }
  28. void free_msi_entry(struct msi_desc *entry)
  29. {
  30. kfree(entry);
  31. }
  32. void __get_cached_msi_msg(struct msi_desc *entry, struct msi_msg *msg)
  33. {
  34. *msg = entry->msg;
  35. }
  36. void get_cached_msi_msg(unsigned int irq, struct msi_msg *msg)
  37. {
  38. struct msi_desc *entry = irq_get_msi_desc(irq);
  39. __get_cached_msi_msg(entry, msg);
  40. }
  41. EXPORT_SYMBOL_GPL(get_cached_msi_msg);
  42. #ifdef CONFIG_GENERIC_MSI_IRQ_DOMAIN
  43. static inline void irq_chip_write_msi_msg(struct irq_data *data,
  44. struct msi_msg *msg)
  45. {
  46. data->chip->irq_write_msi_msg(data, msg);
  47. }
  48. /**
  49. * msi_domain_set_affinity - Generic affinity setter function for MSI domains
  50. * @irq_data: The irq data associated to the interrupt
  51. * @mask: The affinity mask to set
  52. * @force: Flag to enforce setting (disable online checks)
  53. *
  54. * Intended to be used by MSI interrupt controllers which are
  55. * implemented with hierarchical domains.
  56. */
  57. int msi_domain_set_affinity(struct irq_data *irq_data,
  58. const struct cpumask *mask, bool force)
  59. {
  60. struct irq_data *parent = irq_data->parent_data;
  61. struct msi_msg msg;
  62. int ret;
  63. ret = parent->chip->irq_set_affinity(parent, mask, force);
  64. if (ret >= 0 && ret != IRQ_SET_MASK_OK_DONE) {
  65. BUG_ON(irq_chip_compose_msi_msg(irq_data, &msg));
  66. irq_chip_write_msi_msg(irq_data, &msg);
  67. }
  68. return ret;
  69. }
  70. static void msi_domain_activate(struct irq_domain *domain,
  71. struct irq_data *irq_data)
  72. {
  73. struct msi_msg msg;
  74. BUG_ON(irq_chip_compose_msi_msg(irq_data, &msg));
  75. irq_chip_write_msi_msg(irq_data, &msg);
  76. }
  77. static void msi_domain_deactivate(struct irq_domain *domain,
  78. struct irq_data *irq_data)
  79. {
  80. struct msi_msg msg;
  81. memset(&msg, 0, sizeof(msg));
  82. irq_chip_write_msi_msg(irq_data, &msg);
  83. }
  84. static int msi_domain_alloc(struct irq_domain *domain, unsigned int virq,
  85. unsigned int nr_irqs, void *arg)
  86. {
  87. struct msi_domain_info *info = domain->host_data;
  88. struct msi_domain_ops *ops = info->ops;
  89. irq_hw_number_t hwirq = ops->get_hwirq(info, arg);
  90. int i, ret;
  91. if (irq_find_mapping(domain, hwirq) > 0)
  92. return -EEXIST;
  93. ret = irq_domain_alloc_irqs_parent(domain, virq, nr_irqs, arg);
  94. if (ret < 0)
  95. return ret;
  96. for (i = 0; i < nr_irqs; i++) {
  97. ret = ops->msi_init(domain, info, virq + i, hwirq + i, arg);
  98. if (ret < 0) {
  99. if (ops->msi_free) {
  100. for (i--; i > 0; i--)
  101. ops->msi_free(domain, info, virq + i);
  102. }
  103. irq_domain_free_irqs_top(domain, virq, nr_irqs);
  104. return ret;
  105. }
  106. }
  107. return 0;
  108. }
  109. static void msi_domain_free(struct irq_domain *domain, unsigned int virq,
  110. unsigned int nr_irqs)
  111. {
  112. struct msi_domain_info *info = domain->host_data;
  113. int i;
  114. if (info->ops->msi_free) {
  115. for (i = 0; i < nr_irqs; i++)
  116. info->ops->msi_free(domain, info, virq + i);
  117. }
  118. irq_domain_free_irqs_top(domain, virq, nr_irqs);
  119. }
  120. static const struct irq_domain_ops msi_domain_ops = {
  121. .alloc = msi_domain_alloc,
  122. .free = msi_domain_free,
  123. .activate = msi_domain_activate,
  124. .deactivate = msi_domain_deactivate,
  125. };
  126. #ifdef GENERIC_MSI_DOMAIN_OPS
  127. static irq_hw_number_t msi_domain_ops_get_hwirq(struct msi_domain_info *info,
  128. msi_alloc_info_t *arg)
  129. {
  130. return arg->hwirq;
  131. }
  132. static int msi_domain_ops_prepare(struct irq_domain *domain, struct device *dev,
  133. int nvec, msi_alloc_info_t *arg)
  134. {
  135. memset(arg, 0, sizeof(*arg));
  136. return 0;
  137. }
  138. static void msi_domain_ops_set_desc(msi_alloc_info_t *arg,
  139. struct msi_desc *desc)
  140. {
  141. arg->desc = desc;
  142. }
  143. #else
  144. #define msi_domain_ops_get_hwirq NULL
  145. #define msi_domain_ops_prepare NULL
  146. #define msi_domain_ops_set_desc NULL
  147. #endif /* !GENERIC_MSI_DOMAIN_OPS */
  148. static int msi_domain_ops_init(struct irq_domain *domain,
  149. struct msi_domain_info *info,
  150. unsigned int virq, irq_hw_number_t hwirq,
  151. msi_alloc_info_t *arg)
  152. {
  153. irq_domain_set_hwirq_and_chip(domain, virq, hwirq, info->chip,
  154. info->chip_data);
  155. if (info->handler && info->handler_name) {
  156. __irq_set_handler(virq, info->handler, 0, info->handler_name);
  157. if (info->handler_data)
  158. irq_set_handler_data(virq, info->handler_data);
  159. }
  160. return 0;
  161. }
  162. static int msi_domain_ops_check(struct irq_domain *domain,
  163. struct msi_domain_info *info,
  164. struct device *dev)
  165. {
  166. return 0;
  167. }
  168. static struct msi_domain_ops msi_domain_ops_default = {
  169. .get_hwirq = msi_domain_ops_get_hwirq,
  170. .msi_init = msi_domain_ops_init,
  171. .msi_check = msi_domain_ops_check,
  172. .msi_prepare = msi_domain_ops_prepare,
  173. .set_desc = msi_domain_ops_set_desc,
  174. };
  175. static void msi_domain_update_dom_ops(struct msi_domain_info *info)
  176. {
  177. struct msi_domain_ops *ops = info->ops;
  178. if (ops == NULL) {
  179. info->ops = &msi_domain_ops_default;
  180. return;
  181. }
  182. if (ops->get_hwirq == NULL)
  183. ops->get_hwirq = msi_domain_ops_default.get_hwirq;
  184. if (ops->msi_init == NULL)
  185. ops->msi_init = msi_domain_ops_default.msi_init;
  186. if (ops->msi_check == NULL)
  187. ops->msi_check = msi_domain_ops_default.msi_check;
  188. if (ops->msi_prepare == NULL)
  189. ops->msi_prepare = msi_domain_ops_default.msi_prepare;
  190. if (ops->set_desc == NULL)
  191. ops->set_desc = msi_domain_ops_default.set_desc;
  192. }
  193. static void msi_domain_update_chip_ops(struct msi_domain_info *info)
  194. {
  195. struct irq_chip *chip = info->chip;
  196. BUG_ON(!chip || !chip->irq_mask || !chip->irq_unmask);
  197. if (!chip->irq_set_affinity)
  198. chip->irq_set_affinity = msi_domain_set_affinity;
  199. }
  200. /**
  201. * msi_create_irq_domain - Create a MSI interrupt domain
  202. * @fwnode: Optional fwnode of the interrupt controller
  203. * @info: MSI domain info
  204. * @parent: Parent irq domain
  205. */
  206. struct irq_domain *msi_create_irq_domain(struct fwnode_handle *fwnode,
  207. struct msi_domain_info *info,
  208. struct irq_domain *parent)
  209. {
  210. if (info->flags & MSI_FLAG_USE_DEF_DOM_OPS)
  211. msi_domain_update_dom_ops(info);
  212. if (info->flags & MSI_FLAG_USE_DEF_CHIP_OPS)
  213. msi_domain_update_chip_ops(info);
  214. return irq_domain_create_hierarchy(parent, 0, 0, fwnode,
  215. &msi_domain_ops, info);
  216. }
  217. /**
  218. * msi_domain_alloc_irqs - Allocate interrupts from a MSI interrupt domain
  219. * @domain: The domain to allocate from
  220. * @dev: Pointer to device struct of the device for which the interrupts
  221. * are allocated
  222. * @nvec: The number of interrupts to allocate
  223. *
  224. * Returns 0 on success or an error code.
  225. */
  226. int msi_domain_alloc_irqs(struct irq_domain *domain, struct device *dev,
  227. int nvec)
  228. {
  229. struct msi_domain_info *info = domain->host_data;
  230. struct msi_domain_ops *ops = info->ops;
  231. msi_alloc_info_t arg;
  232. struct msi_desc *desc;
  233. int i, ret, virq;
  234. ret = ops->msi_check(domain, info, dev);
  235. if (ret == 0)
  236. ret = ops->msi_prepare(domain, dev, nvec, &arg);
  237. if (ret)
  238. return ret;
  239. for_each_msi_entry(desc, dev) {
  240. ops->set_desc(&arg, desc);
  241. virq = __irq_domain_alloc_irqs(domain, -1, desc->nvec_used,
  242. dev_to_node(dev), &arg, false);
  243. if (virq < 0) {
  244. ret = -ENOSPC;
  245. if (ops->handle_error)
  246. ret = ops->handle_error(domain, desc, ret);
  247. if (ops->msi_finish)
  248. ops->msi_finish(&arg, ret);
  249. return ret;
  250. }
  251. for (i = 0; i < desc->nvec_used; i++)
  252. irq_set_msi_desc_off(virq, i, desc);
  253. }
  254. if (ops->msi_finish)
  255. ops->msi_finish(&arg, 0);
  256. for_each_msi_entry(desc, dev) {
  257. virq = desc->irq;
  258. if (desc->nvec_used == 1)
  259. dev_dbg(dev, "irq %d for MSI\n", virq);
  260. else
  261. dev_dbg(dev, "irq [%d-%d] for MSI\n",
  262. virq, virq + desc->nvec_used - 1);
  263. /*
  264. * This flag is set by the PCI layer as we need to activate
  265. * the MSI entries before the PCI layer enables MSI in the
  266. * card. Otherwise the card latches a random msi message.
  267. */
  268. if (info->flags & MSI_FLAG_ACTIVATE_EARLY) {
  269. struct irq_data *irq_data;
  270. irq_data = irq_domain_get_irq_data(domain, desc->irq);
  271. irq_domain_activate_irq(irq_data);
  272. }
  273. }
  274. return 0;
  275. }
  276. /**
  277. * msi_domain_free_irqs - Free interrupts from a MSI interrupt @domain associated tp @dev
  278. * @domain: The domain to managing the interrupts
  279. * @dev: Pointer to device struct of the device for which the interrupts
  280. * are free
  281. */
  282. void msi_domain_free_irqs(struct irq_domain *domain, struct device *dev)
  283. {
  284. struct msi_desc *desc;
  285. for_each_msi_entry(desc, dev) {
  286. /*
  287. * We might have failed to allocate an MSI early
  288. * enough that there is no IRQ associated to this
  289. * entry. If that's the case, don't do anything.
  290. */
  291. if (desc->irq) {
  292. irq_domain_free_irqs(desc->irq, desc->nvec_used);
  293. desc->irq = 0;
  294. }
  295. }
  296. }
  297. /**
  298. * msi_get_domain_info - Get the MSI interrupt domain info for @domain
  299. * @domain: The interrupt domain to retrieve data from
  300. *
  301. * Returns the pointer to the msi_domain_info stored in
  302. * @domain->host_data.
  303. */
  304. struct msi_domain_info *msi_get_domain_info(struct irq_domain *domain)
  305. {
  306. return (struct msi_domain_info *)domain->host_data;
  307. }
  308. #endif /* CONFIG_GENERIC_MSI_IRQ_DOMAIN */