opl3_lib.c 14 KB

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  1. /*
  2. * Copyright (c) by Jaroslav Kysela <perex@perex.cz>,
  3. * Hannu Savolainen 1993-1996,
  4. * Rob Hooft
  5. *
  6. * Routines for control of AdLib FM cards (OPL2/OPL3/OPL4 chips)
  7. *
  8. * Most if code is ported from OSS/Lite.
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of the GNU General Public License as published by
  12. * the Free Software Foundation; either version 2 of the License, or
  13. * (at your option) any later version.
  14. *
  15. * This program is distributed in the hope that it will be useful,
  16. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  17. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  18. * GNU General Public License for more details.
  19. *
  20. * You should have received a copy of the GNU General Public License
  21. * along with this program; if not, write to the Free Software
  22. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  23. *
  24. */
  25. #include <sound/opl3.h>
  26. #include <linux/io.h>
  27. #include <linux/delay.h>
  28. #include <linux/module.h>
  29. #include <linux/init.h>
  30. #include <linux/slab.h>
  31. #include <linux/ioport.h>
  32. #include <sound/minors.h>
  33. MODULE_AUTHOR("Jaroslav Kysela <perex@perex.cz>, Hannu Savolainen 1993-1996, Rob Hooft");
  34. MODULE_DESCRIPTION("Routines for control of AdLib FM cards (OPL2/OPL3/OPL4 chips)");
  35. MODULE_LICENSE("GPL");
  36. extern char snd_opl3_regmap[MAX_OPL2_VOICES][4];
  37. static void snd_opl2_command(struct snd_opl3 * opl3, unsigned short cmd, unsigned char val)
  38. {
  39. unsigned long flags;
  40. unsigned long port;
  41. /*
  42. * The original 2-OP synth requires a quite long delay
  43. * after writing to a register.
  44. */
  45. port = (cmd & OPL3_RIGHT) ? opl3->r_port : opl3->l_port;
  46. spin_lock_irqsave(&opl3->reg_lock, flags);
  47. outb((unsigned char) cmd, port);
  48. udelay(10);
  49. outb((unsigned char) val, port + 1);
  50. udelay(30);
  51. spin_unlock_irqrestore(&opl3->reg_lock, flags);
  52. }
  53. static void snd_opl3_command(struct snd_opl3 * opl3, unsigned short cmd, unsigned char val)
  54. {
  55. unsigned long flags;
  56. unsigned long port;
  57. /*
  58. * The OPL-3 survives with just two INBs
  59. * after writing to a register.
  60. */
  61. port = (cmd & OPL3_RIGHT) ? opl3->r_port : opl3->l_port;
  62. spin_lock_irqsave(&opl3->reg_lock, flags);
  63. outb((unsigned char) cmd, port);
  64. inb(opl3->l_port);
  65. inb(opl3->l_port);
  66. outb((unsigned char) val, port + 1);
  67. inb(opl3->l_port);
  68. inb(opl3->l_port);
  69. spin_unlock_irqrestore(&opl3->reg_lock, flags);
  70. }
  71. static int snd_opl3_detect(struct snd_opl3 * opl3)
  72. {
  73. /*
  74. * This function returns 1 if the FM chip is present at the given I/O port
  75. * The detection algorithm plays with the timer built in the FM chip and
  76. * looks for a change in the status register.
  77. *
  78. * Note! The timers of the FM chip are not connected to AdLib (and compatible)
  79. * boards.
  80. *
  81. * Note2! The chip is initialized if detected.
  82. */
  83. unsigned char stat1, stat2, signature;
  84. /* Reset timers 1 and 2 */
  85. opl3->command(opl3, OPL3_LEFT | OPL3_REG_TIMER_CONTROL, OPL3_TIMER1_MASK | OPL3_TIMER2_MASK);
  86. /* Reset the IRQ of the FM chip */
  87. opl3->command(opl3, OPL3_LEFT | OPL3_REG_TIMER_CONTROL, OPL3_IRQ_RESET);
  88. signature = stat1 = inb(opl3->l_port); /* Status register */
  89. if ((stat1 & 0xe0) != 0x00) { /* Should be 0x00 */
  90. snd_printd("OPL3: stat1 = 0x%x\n", stat1);
  91. return -ENODEV;
  92. }
  93. /* Set timer1 to 0xff */
  94. opl3->command(opl3, OPL3_LEFT | OPL3_REG_TIMER1, 0xff);
  95. /* Unmask and start timer 1 */
  96. opl3->command(opl3, OPL3_LEFT | OPL3_REG_TIMER_CONTROL, OPL3_TIMER2_MASK | OPL3_TIMER1_START);
  97. /* Now we have to delay at least 80us */
  98. udelay(200);
  99. /* Read status after timers have expired */
  100. stat2 = inb(opl3->l_port);
  101. /* Stop the timers */
  102. opl3->command(opl3, OPL3_LEFT | OPL3_REG_TIMER_CONTROL, OPL3_TIMER1_MASK | OPL3_TIMER2_MASK);
  103. /* Reset the IRQ of the FM chip */
  104. opl3->command(opl3, OPL3_LEFT | OPL3_REG_TIMER_CONTROL, OPL3_IRQ_RESET);
  105. if ((stat2 & 0xe0) != 0xc0) { /* There is no YM3812 */
  106. snd_printd("OPL3: stat2 = 0x%x\n", stat2);
  107. return -ENODEV;
  108. }
  109. /* If the toplevel code knows exactly the type of chip, don't try
  110. to detect it. */
  111. if (opl3->hardware != OPL3_HW_AUTO)
  112. return 0;
  113. /* There is a FM chip on this address. Detect the type (OPL2 to OPL4) */
  114. if (signature == 0x06) { /* OPL2 */
  115. opl3->hardware = OPL3_HW_OPL2;
  116. } else {
  117. /*
  118. * If we had an OPL4 chip, opl3->hardware would have been set
  119. * by the OPL4 driver; so we can assume OPL3 here.
  120. */
  121. if (snd_BUG_ON(!opl3->r_port))
  122. return -ENODEV;
  123. opl3->hardware = OPL3_HW_OPL3;
  124. }
  125. return 0;
  126. }
  127. /*
  128. * AdLib timers
  129. */
  130. /*
  131. * Timer 1 - 80us
  132. */
  133. static int snd_opl3_timer1_start(struct snd_timer * timer)
  134. {
  135. unsigned long flags;
  136. unsigned char tmp;
  137. unsigned int ticks;
  138. struct snd_opl3 *opl3;
  139. opl3 = snd_timer_chip(timer);
  140. spin_lock_irqsave(&opl3->timer_lock, flags);
  141. ticks = timer->sticks;
  142. tmp = (opl3->timer_enable | OPL3_TIMER1_START) & ~OPL3_TIMER1_MASK;
  143. opl3->timer_enable = tmp;
  144. opl3->command(opl3, OPL3_LEFT | OPL3_REG_TIMER1, 256 - ticks); /* timer 1 count */
  145. opl3->command(opl3, OPL3_LEFT | OPL3_REG_TIMER_CONTROL, tmp); /* enable timer 1 IRQ */
  146. spin_unlock_irqrestore(&opl3->timer_lock, flags);
  147. return 0;
  148. }
  149. static int snd_opl3_timer1_stop(struct snd_timer * timer)
  150. {
  151. unsigned long flags;
  152. unsigned char tmp;
  153. struct snd_opl3 *opl3;
  154. opl3 = snd_timer_chip(timer);
  155. spin_lock_irqsave(&opl3->timer_lock, flags);
  156. tmp = (opl3->timer_enable | OPL3_TIMER1_MASK) & ~OPL3_TIMER1_START;
  157. opl3->timer_enable = tmp;
  158. opl3->command(opl3, OPL3_LEFT | OPL3_REG_TIMER_CONTROL, tmp); /* disable timer #1 */
  159. spin_unlock_irqrestore(&opl3->timer_lock, flags);
  160. return 0;
  161. }
  162. /*
  163. * Timer 2 - 320us
  164. */
  165. static int snd_opl3_timer2_start(struct snd_timer * timer)
  166. {
  167. unsigned long flags;
  168. unsigned char tmp;
  169. unsigned int ticks;
  170. struct snd_opl3 *opl3;
  171. opl3 = snd_timer_chip(timer);
  172. spin_lock_irqsave(&opl3->timer_lock, flags);
  173. ticks = timer->sticks;
  174. tmp = (opl3->timer_enable | OPL3_TIMER2_START) & ~OPL3_TIMER2_MASK;
  175. opl3->timer_enable = tmp;
  176. opl3->command(opl3, OPL3_LEFT | OPL3_REG_TIMER2, 256 - ticks); /* timer 1 count */
  177. opl3->command(opl3, OPL3_LEFT | OPL3_REG_TIMER_CONTROL, tmp); /* enable timer 1 IRQ */
  178. spin_unlock_irqrestore(&opl3->timer_lock, flags);
  179. return 0;
  180. }
  181. static int snd_opl3_timer2_stop(struct snd_timer * timer)
  182. {
  183. unsigned long flags;
  184. unsigned char tmp;
  185. struct snd_opl3 *opl3;
  186. opl3 = snd_timer_chip(timer);
  187. spin_lock_irqsave(&opl3->timer_lock, flags);
  188. tmp = (opl3->timer_enable | OPL3_TIMER2_MASK) & ~OPL3_TIMER2_START;
  189. opl3->timer_enable = tmp;
  190. opl3->command(opl3, OPL3_LEFT | OPL3_REG_TIMER_CONTROL, tmp); /* disable timer #1 */
  191. spin_unlock_irqrestore(&opl3->timer_lock, flags);
  192. return 0;
  193. }
  194. /*
  195. */
  196. static struct snd_timer_hardware snd_opl3_timer1 =
  197. {
  198. .flags = SNDRV_TIMER_HW_STOP,
  199. .resolution = 80000,
  200. .ticks = 256,
  201. .start = snd_opl3_timer1_start,
  202. .stop = snd_opl3_timer1_stop,
  203. };
  204. static struct snd_timer_hardware snd_opl3_timer2 =
  205. {
  206. .flags = SNDRV_TIMER_HW_STOP,
  207. .resolution = 320000,
  208. .ticks = 256,
  209. .start = snd_opl3_timer2_start,
  210. .stop = snd_opl3_timer2_stop,
  211. };
  212. static int snd_opl3_timer1_init(struct snd_opl3 * opl3, int timer_no)
  213. {
  214. struct snd_timer *timer = NULL;
  215. struct snd_timer_id tid;
  216. int err;
  217. tid.dev_class = SNDRV_TIMER_CLASS_CARD;
  218. tid.dev_sclass = SNDRV_TIMER_SCLASS_NONE;
  219. tid.card = opl3->card->number;
  220. tid.device = timer_no;
  221. tid.subdevice = 0;
  222. if ((err = snd_timer_new(opl3->card, "AdLib timer #1", &tid, &timer)) >= 0) {
  223. strcpy(timer->name, "AdLib timer #1");
  224. timer->private_data = opl3;
  225. timer->hw = snd_opl3_timer1;
  226. }
  227. opl3->timer1 = timer;
  228. return err;
  229. }
  230. static int snd_opl3_timer2_init(struct snd_opl3 * opl3, int timer_no)
  231. {
  232. struct snd_timer *timer = NULL;
  233. struct snd_timer_id tid;
  234. int err;
  235. tid.dev_class = SNDRV_TIMER_CLASS_CARD;
  236. tid.dev_sclass = SNDRV_TIMER_SCLASS_NONE;
  237. tid.card = opl3->card->number;
  238. tid.device = timer_no;
  239. tid.subdevice = 0;
  240. if ((err = snd_timer_new(opl3->card, "AdLib timer #2", &tid, &timer)) >= 0) {
  241. strcpy(timer->name, "AdLib timer #2");
  242. timer->private_data = opl3;
  243. timer->hw = snd_opl3_timer2;
  244. }
  245. opl3->timer2 = timer;
  246. return err;
  247. }
  248. /*
  249. */
  250. void snd_opl3_interrupt(struct snd_hwdep * hw)
  251. {
  252. unsigned char status;
  253. struct snd_opl3 *opl3;
  254. struct snd_timer *timer;
  255. if (hw == NULL)
  256. return;
  257. opl3 = hw->private_data;
  258. status = inb(opl3->l_port);
  259. #if 0
  260. snd_printk(KERN_DEBUG "AdLib IRQ status = 0x%x\n", status);
  261. #endif
  262. if (!(status & 0x80))
  263. return;
  264. if (status & 0x40) {
  265. timer = opl3->timer1;
  266. snd_timer_interrupt(timer, timer->sticks);
  267. }
  268. if (status & 0x20) {
  269. timer = opl3->timer2;
  270. snd_timer_interrupt(timer, timer->sticks);
  271. }
  272. }
  273. EXPORT_SYMBOL(snd_opl3_interrupt);
  274. /*
  275. */
  276. static int snd_opl3_free(struct snd_opl3 *opl3)
  277. {
  278. if (snd_BUG_ON(!opl3))
  279. return -ENXIO;
  280. if (opl3->private_free)
  281. opl3->private_free(opl3);
  282. snd_opl3_clear_patches(opl3);
  283. release_and_free_resource(opl3->res_l_port);
  284. release_and_free_resource(opl3->res_r_port);
  285. kfree(opl3);
  286. return 0;
  287. }
  288. static int snd_opl3_dev_free(struct snd_device *device)
  289. {
  290. struct snd_opl3 *opl3 = device->device_data;
  291. return snd_opl3_free(opl3);
  292. }
  293. int snd_opl3_new(struct snd_card *card,
  294. unsigned short hardware,
  295. struct snd_opl3 **ropl3)
  296. {
  297. static struct snd_device_ops ops = {
  298. .dev_free = snd_opl3_dev_free,
  299. };
  300. struct snd_opl3 *opl3;
  301. int err;
  302. *ropl3 = NULL;
  303. opl3 = kzalloc(sizeof(*opl3), GFP_KERNEL);
  304. if (opl3 == NULL) {
  305. snd_printk(KERN_ERR "opl3: cannot allocate\n");
  306. return -ENOMEM;
  307. }
  308. opl3->card = card;
  309. opl3->hardware = hardware;
  310. spin_lock_init(&opl3->reg_lock);
  311. spin_lock_init(&opl3->timer_lock);
  312. if ((err = snd_device_new(card, SNDRV_DEV_CODEC, opl3, &ops)) < 0) {
  313. snd_opl3_free(opl3);
  314. return err;
  315. }
  316. *ropl3 = opl3;
  317. return 0;
  318. }
  319. EXPORT_SYMBOL(snd_opl3_new);
  320. int snd_opl3_init(struct snd_opl3 *opl3)
  321. {
  322. if (! opl3->command) {
  323. printk(KERN_ERR "snd_opl3_init: command not defined!\n");
  324. return -EINVAL;
  325. }
  326. opl3->command(opl3, OPL3_LEFT | OPL3_REG_TEST, OPL3_ENABLE_WAVE_SELECT);
  327. /* Melodic mode */
  328. opl3->command(opl3, OPL3_LEFT | OPL3_REG_PERCUSSION, 0x00);
  329. switch (opl3->hardware & OPL3_HW_MASK) {
  330. case OPL3_HW_OPL2:
  331. opl3->max_voices = MAX_OPL2_VOICES;
  332. break;
  333. case OPL3_HW_OPL3:
  334. case OPL3_HW_OPL4:
  335. opl3->max_voices = MAX_OPL3_VOICES;
  336. /* Enter OPL3 mode */
  337. opl3->command(opl3, OPL3_RIGHT | OPL3_REG_MODE, OPL3_OPL3_ENABLE);
  338. }
  339. return 0;
  340. }
  341. EXPORT_SYMBOL(snd_opl3_init);
  342. int snd_opl3_create(struct snd_card *card,
  343. unsigned long l_port,
  344. unsigned long r_port,
  345. unsigned short hardware,
  346. int integrated,
  347. struct snd_opl3 ** ropl3)
  348. {
  349. struct snd_opl3 *opl3;
  350. int err;
  351. *ropl3 = NULL;
  352. if ((err = snd_opl3_new(card, hardware, &opl3)) < 0)
  353. return err;
  354. if (! integrated) {
  355. if ((opl3->res_l_port = request_region(l_port, 2, "OPL2/3 (left)")) == NULL) {
  356. snd_printk(KERN_ERR "opl3: can't grab left port 0x%lx\n", l_port);
  357. snd_device_free(card, opl3);
  358. return -EBUSY;
  359. }
  360. if (r_port != 0 &&
  361. (opl3->res_r_port = request_region(r_port, 2, "OPL2/3 (right)")) == NULL) {
  362. snd_printk(KERN_ERR "opl3: can't grab right port 0x%lx\n", r_port);
  363. snd_device_free(card, opl3);
  364. return -EBUSY;
  365. }
  366. }
  367. opl3->l_port = l_port;
  368. opl3->r_port = r_port;
  369. switch (opl3->hardware) {
  370. /* some hardware doesn't support timers */
  371. case OPL3_HW_OPL3_SV:
  372. case OPL3_HW_OPL3_CS:
  373. case OPL3_HW_OPL3_FM801:
  374. opl3->command = &snd_opl3_command;
  375. break;
  376. default:
  377. opl3->command = &snd_opl2_command;
  378. if ((err = snd_opl3_detect(opl3)) < 0) {
  379. snd_printd("OPL2/3 chip not detected at 0x%lx/0x%lx\n",
  380. opl3->l_port, opl3->r_port);
  381. snd_device_free(card, opl3);
  382. return err;
  383. }
  384. /* detect routine returns correct hardware type */
  385. switch (opl3->hardware & OPL3_HW_MASK) {
  386. case OPL3_HW_OPL3:
  387. case OPL3_HW_OPL4:
  388. opl3->command = &snd_opl3_command;
  389. }
  390. }
  391. snd_opl3_init(opl3);
  392. *ropl3 = opl3;
  393. return 0;
  394. }
  395. EXPORT_SYMBOL(snd_opl3_create);
  396. int snd_opl3_timer_new(struct snd_opl3 * opl3, int timer1_dev, int timer2_dev)
  397. {
  398. int err;
  399. if (timer1_dev >= 0)
  400. if ((err = snd_opl3_timer1_init(opl3, timer1_dev)) < 0)
  401. return err;
  402. if (timer2_dev >= 0) {
  403. if ((err = snd_opl3_timer2_init(opl3, timer2_dev)) < 0) {
  404. snd_device_free(opl3->card, opl3->timer1);
  405. opl3->timer1 = NULL;
  406. return err;
  407. }
  408. }
  409. return 0;
  410. }
  411. EXPORT_SYMBOL(snd_opl3_timer_new);
  412. int snd_opl3_hwdep_new(struct snd_opl3 * opl3,
  413. int device, int seq_device,
  414. struct snd_hwdep ** rhwdep)
  415. {
  416. struct snd_hwdep *hw;
  417. struct snd_card *card = opl3->card;
  418. int err;
  419. if (rhwdep)
  420. *rhwdep = NULL;
  421. /* create hardware dependent device (direct FM) */
  422. if ((err = snd_hwdep_new(card, "OPL2/OPL3", device, &hw)) < 0) {
  423. snd_device_free(card, opl3);
  424. return err;
  425. }
  426. hw->private_data = opl3;
  427. hw->exclusive = 1;
  428. #ifdef CONFIG_SND_OSSEMUL
  429. if (device == 0)
  430. hw->oss_type = SNDRV_OSS_DEVICE_TYPE_DMFM;
  431. #endif
  432. strcpy(hw->name, hw->id);
  433. switch (opl3->hardware & OPL3_HW_MASK) {
  434. case OPL3_HW_OPL2:
  435. strcpy(hw->name, "OPL2 FM");
  436. hw->iface = SNDRV_HWDEP_IFACE_OPL2;
  437. break;
  438. case OPL3_HW_OPL3:
  439. strcpy(hw->name, "OPL3 FM");
  440. hw->iface = SNDRV_HWDEP_IFACE_OPL3;
  441. break;
  442. case OPL3_HW_OPL4:
  443. strcpy(hw->name, "OPL4 FM");
  444. hw->iface = SNDRV_HWDEP_IFACE_OPL4;
  445. break;
  446. }
  447. /* operators - only ioctl */
  448. hw->ops.open = snd_opl3_open;
  449. hw->ops.ioctl = snd_opl3_ioctl;
  450. hw->ops.write = snd_opl3_write;
  451. hw->ops.release = snd_opl3_release;
  452. opl3->hwdep = hw;
  453. opl3->seq_dev_num = seq_device;
  454. #if defined(CONFIG_SND_SEQUENCER) || (defined(MODULE) && defined(CONFIG_SND_SEQUENCER_MODULE))
  455. if (snd_seq_device_new(card, seq_device, SNDRV_SEQ_DEV_ID_OPL3,
  456. sizeof(struct snd_opl3 *), &opl3->seq_dev) >= 0) {
  457. strcpy(opl3->seq_dev->name, hw->name);
  458. *(struct snd_opl3 **)SNDRV_SEQ_DEVICE_ARGPTR(opl3->seq_dev) = opl3;
  459. }
  460. #endif
  461. if (rhwdep)
  462. *rhwdep = hw;
  463. return 0;
  464. }
  465. EXPORT_SYMBOL(snd_opl3_hwdep_new);
  466. /*
  467. * INIT part
  468. */
  469. static int __init alsa_opl3_init(void)
  470. {
  471. return 0;
  472. }
  473. static void __exit alsa_opl3_exit(void)
  474. {
  475. }
  476. module_init(alsa_opl3_init)
  477. module_exit(alsa_opl3_exit)