cs8427.c 18 KB

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  1. /*
  2. * Routines for control of the CS8427 via i2c bus
  3. * IEC958 (S/PDIF) receiver & transmitter by Cirrus Logic
  4. * Copyright (c) by Jaroslav Kysela <perex@perex.cz>
  5. *
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License as published by
  9. * the Free Software Foundation; either version 2 of the License, or
  10. * (at your option) any later version.
  11. *
  12. * This program is distributed in the hope that it will be useful,
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. * GNU General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License
  18. * along with this program; if not, write to the Free Software
  19. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  20. *
  21. */
  22. #include <linux/slab.h>
  23. #include <linux/delay.h>
  24. #include <linux/init.h>
  25. #include <linux/bitrev.h>
  26. #include <linux/module.h>
  27. #include <asm/unaligned.h>
  28. #include <sound/core.h>
  29. #include <sound/control.h>
  30. #include <sound/pcm.h>
  31. #include <sound/cs8427.h>
  32. #include <sound/asoundef.h>
  33. static void snd_cs8427_reset(struct snd_i2c_device *cs8427);
  34. MODULE_AUTHOR("Jaroslav Kysela <perex@perex.cz>");
  35. MODULE_DESCRIPTION("IEC958 (S/PDIF) receiver & transmitter by Cirrus Logic");
  36. MODULE_LICENSE("GPL");
  37. #define CS8427_ADDR (0x20>>1) /* fixed address */
  38. struct cs8427_stream {
  39. struct snd_pcm_substream *substream;
  40. char hw_status[24]; /* hardware status */
  41. char def_status[24]; /* default status */
  42. char pcm_status[24]; /* PCM private status */
  43. char hw_udata[32];
  44. struct snd_kcontrol *pcm_ctl;
  45. };
  46. struct cs8427 {
  47. unsigned char regmap[0x14]; /* map of first 1 + 13 registers */
  48. unsigned int rate;
  49. unsigned int reset_timeout;
  50. struct cs8427_stream playback;
  51. struct cs8427_stream capture;
  52. };
  53. int snd_cs8427_reg_write(struct snd_i2c_device *device, unsigned char reg,
  54. unsigned char val)
  55. {
  56. int err;
  57. unsigned char buf[2];
  58. buf[0] = reg & 0x7f;
  59. buf[1] = val;
  60. if ((err = snd_i2c_sendbytes(device, buf, 2)) != 2) {
  61. snd_printk(KERN_ERR "unable to send bytes 0x%02x:0x%02x "
  62. "to CS8427 (%i)\n", buf[0], buf[1], err);
  63. return err < 0 ? err : -EIO;
  64. }
  65. return 0;
  66. }
  67. EXPORT_SYMBOL(snd_cs8427_reg_write);
  68. static int snd_cs8427_reg_read(struct snd_i2c_device *device, unsigned char reg)
  69. {
  70. int err;
  71. unsigned char buf;
  72. if ((err = snd_i2c_sendbytes(device, &reg, 1)) != 1) {
  73. snd_printk(KERN_ERR "unable to send register 0x%x byte "
  74. "to CS8427\n", reg);
  75. return err < 0 ? err : -EIO;
  76. }
  77. if ((err = snd_i2c_readbytes(device, &buf, 1)) != 1) {
  78. snd_printk(KERN_ERR "unable to read register 0x%x byte "
  79. "from CS8427\n", reg);
  80. return err < 0 ? err : -EIO;
  81. }
  82. return buf;
  83. }
  84. static int snd_cs8427_select_corudata(struct snd_i2c_device *device, int udata)
  85. {
  86. struct cs8427 *chip = device->private_data;
  87. int err;
  88. udata = udata ? CS8427_BSEL : 0;
  89. if (udata != (chip->regmap[CS8427_REG_CSDATABUF] & udata)) {
  90. chip->regmap[CS8427_REG_CSDATABUF] &= ~CS8427_BSEL;
  91. chip->regmap[CS8427_REG_CSDATABUF] |= udata;
  92. err = snd_cs8427_reg_write(device, CS8427_REG_CSDATABUF,
  93. chip->regmap[CS8427_REG_CSDATABUF]);
  94. if (err < 0)
  95. return err;
  96. }
  97. return 0;
  98. }
  99. static int snd_cs8427_send_corudata(struct snd_i2c_device *device,
  100. int udata,
  101. unsigned char *ndata,
  102. int count)
  103. {
  104. struct cs8427 *chip = device->private_data;
  105. char *hw_data = udata ?
  106. chip->playback.hw_udata : chip->playback.hw_status;
  107. char data[32];
  108. int err, idx;
  109. if (!memcmp(hw_data, ndata, count))
  110. return 0;
  111. if ((err = snd_cs8427_select_corudata(device, udata)) < 0)
  112. return err;
  113. memcpy(hw_data, ndata, count);
  114. if (udata) {
  115. memset(data, 0, sizeof(data));
  116. if (memcmp(hw_data, data, count) == 0) {
  117. chip->regmap[CS8427_REG_UDATABUF] &= ~CS8427_UBMMASK;
  118. chip->regmap[CS8427_REG_UDATABUF] |= CS8427_UBMZEROS |
  119. CS8427_EFTUI;
  120. err = snd_cs8427_reg_write(device, CS8427_REG_UDATABUF,
  121. chip->regmap[CS8427_REG_UDATABUF]);
  122. return err < 0 ? err : 0;
  123. }
  124. }
  125. data[0] = CS8427_REG_AUTOINC | CS8427_REG_CORU_DATABUF;
  126. for (idx = 0; idx < count; idx++)
  127. data[idx + 1] = bitrev8(ndata[idx]);
  128. if (snd_i2c_sendbytes(device, data, count + 1) != count + 1)
  129. return -EIO;
  130. return 1;
  131. }
  132. static void snd_cs8427_free(struct snd_i2c_device *device)
  133. {
  134. kfree(device->private_data);
  135. }
  136. int snd_cs8427_init(struct snd_i2c_bus *bus,
  137. struct snd_i2c_device *device)
  138. {
  139. static unsigned char initvals1[] = {
  140. CS8427_REG_CONTROL1 | CS8427_REG_AUTOINC,
  141. /* CS8427_REG_CONTROL1: RMCK to OMCK, valid PCM audio, disable mutes,
  142. TCBL=output */
  143. CS8427_SWCLK | CS8427_TCBLDIR,
  144. /* CS8427_REG_CONTROL2: hold last valid audio sample, RMCK=256*Fs,
  145. normal stereo operation */
  146. 0x00,
  147. /* CS8427_REG_DATAFLOW: output drivers normal operation, Tx<=serial,
  148. Rx=>serial */
  149. CS8427_TXDSERIAL | CS8427_SPDAES3RECEIVER,
  150. /* CS8427_REG_CLOCKSOURCE: Run off, CMCK=256*Fs,
  151. output time base = OMCK, input time base = recovered input clock,
  152. recovered input clock source is ILRCK changed to AES3INPUT
  153. (workaround, see snd_cs8427_reset) */
  154. CS8427_RXDILRCK,
  155. /* CS8427_REG_SERIALINPUT: Serial audio input port data format = I2S,
  156. 24-bit, 64*Fsi */
  157. CS8427_SIDEL | CS8427_SILRPOL,
  158. /* CS8427_REG_SERIALOUTPUT: Serial audio output port data format
  159. = I2S, 24-bit, 64*Fsi */
  160. CS8427_SODEL | CS8427_SOLRPOL,
  161. };
  162. static unsigned char initvals2[] = {
  163. CS8427_REG_RECVERRMASK | CS8427_REG_AUTOINC,
  164. /* CS8427_REG_RECVERRMASK: unmask the input PLL clock, V, confidence,
  165. biphase, parity status bits */
  166. /* CS8427_UNLOCK | CS8427_V | CS8427_CONF | CS8427_BIP | CS8427_PAR,*/
  167. 0xff, /* set everything */
  168. /* CS8427_REG_CSDATABUF:
  169. Registers 32-55 window to CS buffer
  170. Inhibit D->E transfers from overwriting first 5 bytes of CS data.
  171. Inhibit D->E transfers (all) of CS data.
  172. Allow E->F transfer of CS data.
  173. One byte mode; both A/B channels get same written CB data.
  174. A channel info is output to chip's EMPH* pin. */
  175. CS8427_CBMR | CS8427_DETCI,
  176. /* CS8427_REG_UDATABUF:
  177. Use internal buffer to transmit User (U) data.
  178. Chip's U pin is an output.
  179. Transmit all O's for user data.
  180. Inhibit D->E transfers.
  181. Inhibit E->F transfers. */
  182. CS8427_UD | CS8427_EFTUI | CS8427_DETUI,
  183. };
  184. struct cs8427 *chip = device->private_data;
  185. int err;
  186. unsigned char buf[24];
  187. snd_i2c_lock(bus);
  188. err = snd_cs8427_reg_read(device, CS8427_REG_ID_AND_VER);
  189. if (err != CS8427_VER8427A) {
  190. /* give second chance */
  191. snd_printk(KERN_WARNING "invalid CS8427 signature 0x%x: "
  192. "let me try again...\n", err);
  193. err = snd_cs8427_reg_read(device, CS8427_REG_ID_AND_VER);
  194. }
  195. if (err != CS8427_VER8427A) {
  196. snd_i2c_unlock(bus);
  197. snd_printk(KERN_ERR "unable to find CS8427 signature "
  198. "(expected 0x%x, read 0x%x),\n",
  199. CS8427_VER8427A, err);
  200. snd_printk(KERN_ERR " initialization is not completed\n");
  201. return -EFAULT;
  202. }
  203. /* turn off run bit while making changes to configuration */
  204. err = snd_cs8427_reg_write(device, CS8427_REG_CLOCKSOURCE, 0x00);
  205. if (err < 0)
  206. goto __fail;
  207. /* send initial values */
  208. memcpy(chip->regmap + (initvals1[0] & 0x7f), initvals1 + 1, 6);
  209. if ((err = snd_i2c_sendbytes(device, initvals1, 7)) != 7) {
  210. err = err < 0 ? err : -EIO;
  211. goto __fail;
  212. }
  213. /* Turn off CS8427 interrupt stuff that is not used in hardware */
  214. memset(buf, 0, 7);
  215. /* from address 9 to 15 */
  216. buf[0] = 9; /* register */
  217. if ((err = snd_i2c_sendbytes(device, buf, 7)) != 7)
  218. goto __fail;
  219. /* send transfer initialization sequence */
  220. memcpy(chip->regmap + (initvals2[0] & 0x7f), initvals2 + 1, 3);
  221. if ((err = snd_i2c_sendbytes(device, initvals2, 4)) != 4) {
  222. err = err < 0 ? err : -EIO;
  223. goto __fail;
  224. }
  225. /* write default channel status bytes */
  226. put_unaligned_le32(SNDRV_PCM_DEFAULT_CON_SPDIF, buf);
  227. memset(buf + 4, 0, 24 - 4);
  228. if (snd_cs8427_send_corudata(device, 0, buf, 24) < 0)
  229. goto __fail;
  230. memcpy(chip->playback.def_status, buf, 24);
  231. memcpy(chip->playback.pcm_status, buf, 24);
  232. snd_i2c_unlock(bus);
  233. /* turn on run bit and rock'n'roll */
  234. snd_cs8427_reset(device);
  235. return 0;
  236. __fail:
  237. snd_i2c_unlock(bus);
  238. return err;
  239. }
  240. EXPORT_SYMBOL(snd_cs8427_init);
  241. int snd_cs8427_create(struct snd_i2c_bus *bus,
  242. unsigned char addr,
  243. unsigned int reset_timeout,
  244. struct snd_i2c_device **r_cs8427)
  245. {
  246. int err;
  247. struct cs8427 *chip;
  248. struct snd_i2c_device *device;
  249. err = snd_i2c_device_create(bus, "CS8427", CS8427_ADDR | (addr & 7),
  250. &device);
  251. if (err < 0)
  252. return err;
  253. chip = device->private_data = kzalloc(sizeof(*chip), GFP_KERNEL);
  254. if (chip == NULL) {
  255. snd_i2c_device_free(device);
  256. return -ENOMEM;
  257. }
  258. device->private_free = snd_cs8427_free;
  259. if (reset_timeout < 1)
  260. reset_timeout = 1;
  261. chip->reset_timeout = reset_timeout;
  262. err = snd_cs8427_init(bus, device);
  263. if (err)
  264. goto __fail;
  265. #if 0 // it's nice for read tests
  266. {
  267. char buf[128];
  268. int xx;
  269. buf[0] = 0x81;
  270. snd_i2c_sendbytes(device, buf, 1);
  271. snd_i2c_readbytes(device, buf, 127);
  272. for (xx = 0; xx < 127; xx++)
  273. printk(KERN_DEBUG "reg[0x%x] = 0x%x\n", xx+1, buf[xx]);
  274. }
  275. #endif
  276. if (r_cs8427)
  277. *r_cs8427 = device;
  278. return 0;
  279. __fail:
  280. snd_i2c_device_free(device);
  281. return err < 0 ? err : -EIO;
  282. }
  283. EXPORT_SYMBOL(snd_cs8427_create);
  284. /*
  285. * Reset the chip using run bit, also lock PLL using ILRCK and
  286. * put back AES3INPUT. This workaround is described in latest
  287. * CS8427 datasheet, otherwise TXDSERIAL will not work.
  288. */
  289. static void snd_cs8427_reset(struct snd_i2c_device *cs8427)
  290. {
  291. struct cs8427 *chip;
  292. unsigned long end_time;
  293. int data, aes3input = 0;
  294. if (snd_BUG_ON(!cs8427))
  295. return;
  296. chip = cs8427->private_data;
  297. snd_i2c_lock(cs8427->bus);
  298. if ((chip->regmap[CS8427_REG_CLOCKSOURCE] & CS8427_RXDAES3INPUT) ==
  299. CS8427_RXDAES3INPUT) /* AES3 bit is set */
  300. aes3input = 1;
  301. chip->regmap[CS8427_REG_CLOCKSOURCE] &= ~(CS8427_RUN | CS8427_RXDMASK);
  302. snd_cs8427_reg_write(cs8427, CS8427_REG_CLOCKSOURCE,
  303. chip->regmap[CS8427_REG_CLOCKSOURCE]);
  304. udelay(200);
  305. chip->regmap[CS8427_REG_CLOCKSOURCE] |= CS8427_RUN | CS8427_RXDILRCK;
  306. snd_cs8427_reg_write(cs8427, CS8427_REG_CLOCKSOURCE,
  307. chip->regmap[CS8427_REG_CLOCKSOURCE]);
  308. udelay(200);
  309. snd_i2c_unlock(cs8427->bus);
  310. end_time = jiffies + chip->reset_timeout;
  311. while (time_after_eq(end_time, jiffies)) {
  312. snd_i2c_lock(cs8427->bus);
  313. data = snd_cs8427_reg_read(cs8427, CS8427_REG_RECVERRORS);
  314. snd_i2c_unlock(cs8427->bus);
  315. if (!(data & CS8427_UNLOCK))
  316. break;
  317. schedule_timeout_uninterruptible(1);
  318. }
  319. snd_i2c_lock(cs8427->bus);
  320. chip->regmap[CS8427_REG_CLOCKSOURCE] &= ~CS8427_RXDMASK;
  321. if (aes3input)
  322. chip->regmap[CS8427_REG_CLOCKSOURCE] |= CS8427_RXDAES3INPUT;
  323. snd_cs8427_reg_write(cs8427, CS8427_REG_CLOCKSOURCE,
  324. chip->regmap[CS8427_REG_CLOCKSOURCE]);
  325. snd_i2c_unlock(cs8427->bus);
  326. }
  327. static int snd_cs8427_in_status_info(struct snd_kcontrol *kcontrol,
  328. struct snd_ctl_elem_info *uinfo)
  329. {
  330. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  331. uinfo->count = 1;
  332. uinfo->value.integer.min = 0;
  333. uinfo->value.integer.max = 255;
  334. return 0;
  335. }
  336. static int snd_cs8427_in_status_get(struct snd_kcontrol *kcontrol,
  337. struct snd_ctl_elem_value *ucontrol)
  338. {
  339. struct snd_i2c_device *device = snd_kcontrol_chip(kcontrol);
  340. int data;
  341. snd_i2c_lock(device->bus);
  342. data = snd_cs8427_reg_read(device, kcontrol->private_value);
  343. snd_i2c_unlock(device->bus);
  344. if (data < 0)
  345. return data;
  346. ucontrol->value.integer.value[0] = data;
  347. return 0;
  348. }
  349. static int snd_cs8427_qsubcode_info(struct snd_kcontrol *kcontrol,
  350. struct snd_ctl_elem_info *uinfo)
  351. {
  352. uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
  353. uinfo->count = 10;
  354. return 0;
  355. }
  356. static int snd_cs8427_qsubcode_get(struct snd_kcontrol *kcontrol,
  357. struct snd_ctl_elem_value *ucontrol)
  358. {
  359. struct snd_i2c_device *device = snd_kcontrol_chip(kcontrol);
  360. unsigned char reg = CS8427_REG_QSUBCODE;
  361. int err;
  362. snd_i2c_lock(device->bus);
  363. if ((err = snd_i2c_sendbytes(device, &reg, 1)) != 1) {
  364. snd_printk(KERN_ERR "unable to send register 0x%x byte "
  365. "to CS8427\n", reg);
  366. snd_i2c_unlock(device->bus);
  367. return err < 0 ? err : -EIO;
  368. }
  369. err = snd_i2c_readbytes(device, ucontrol->value.bytes.data, 10);
  370. if (err != 10) {
  371. snd_printk(KERN_ERR "unable to read Q-subcode bytes "
  372. "from CS8427\n");
  373. snd_i2c_unlock(device->bus);
  374. return err < 0 ? err : -EIO;
  375. }
  376. snd_i2c_unlock(device->bus);
  377. return 0;
  378. }
  379. static int snd_cs8427_spdif_info(struct snd_kcontrol *kcontrol,
  380. struct snd_ctl_elem_info *uinfo)
  381. {
  382. uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
  383. uinfo->count = 1;
  384. return 0;
  385. }
  386. static int snd_cs8427_spdif_get(struct snd_kcontrol *kcontrol,
  387. struct snd_ctl_elem_value *ucontrol)
  388. {
  389. struct snd_i2c_device *device = snd_kcontrol_chip(kcontrol);
  390. struct cs8427 *chip = device->private_data;
  391. snd_i2c_lock(device->bus);
  392. memcpy(ucontrol->value.iec958.status, chip->playback.def_status, 24);
  393. snd_i2c_unlock(device->bus);
  394. return 0;
  395. }
  396. static int snd_cs8427_spdif_put(struct snd_kcontrol *kcontrol,
  397. struct snd_ctl_elem_value *ucontrol)
  398. {
  399. struct snd_i2c_device *device = snd_kcontrol_chip(kcontrol);
  400. struct cs8427 *chip = device->private_data;
  401. unsigned char *status = kcontrol->private_value ?
  402. chip->playback.pcm_status : chip->playback.def_status;
  403. struct snd_pcm_runtime *runtime = chip->playback.substream ?
  404. chip->playback.substream->runtime : NULL;
  405. int err, change;
  406. snd_i2c_lock(device->bus);
  407. change = memcmp(ucontrol->value.iec958.status, status, 24) != 0;
  408. memcpy(status, ucontrol->value.iec958.status, 24);
  409. if (change && (kcontrol->private_value ?
  410. runtime != NULL : runtime == NULL)) {
  411. err = snd_cs8427_send_corudata(device, 0, status, 24);
  412. if (err < 0)
  413. change = err;
  414. }
  415. snd_i2c_unlock(device->bus);
  416. return change;
  417. }
  418. static int snd_cs8427_spdif_mask_info(struct snd_kcontrol *kcontrol,
  419. struct snd_ctl_elem_info *uinfo)
  420. {
  421. uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
  422. uinfo->count = 1;
  423. return 0;
  424. }
  425. static int snd_cs8427_spdif_mask_get(struct snd_kcontrol *kcontrol,
  426. struct snd_ctl_elem_value *ucontrol)
  427. {
  428. memset(ucontrol->value.iec958.status, 0xff, 24);
  429. return 0;
  430. }
  431. static struct snd_kcontrol_new snd_cs8427_iec958_controls[] = {
  432. {
  433. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  434. .info = snd_cs8427_in_status_info,
  435. .name = "IEC958 CS8427 Input Status",
  436. .access = (SNDRV_CTL_ELEM_ACCESS_READ |
  437. SNDRV_CTL_ELEM_ACCESS_VOLATILE),
  438. .get = snd_cs8427_in_status_get,
  439. .private_value = 15,
  440. },
  441. {
  442. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  443. .info = snd_cs8427_in_status_info,
  444. .name = "IEC958 CS8427 Error Status",
  445. .access = (SNDRV_CTL_ELEM_ACCESS_READ |
  446. SNDRV_CTL_ELEM_ACCESS_VOLATILE),
  447. .get = snd_cs8427_in_status_get,
  448. .private_value = 16,
  449. },
  450. {
  451. .access = SNDRV_CTL_ELEM_ACCESS_READ,
  452. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  453. .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,MASK),
  454. .info = snd_cs8427_spdif_mask_info,
  455. .get = snd_cs8427_spdif_mask_get,
  456. },
  457. {
  458. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  459. .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,DEFAULT),
  460. .info = snd_cs8427_spdif_info,
  461. .get = snd_cs8427_spdif_get,
  462. .put = snd_cs8427_spdif_put,
  463. .private_value = 0
  464. },
  465. {
  466. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  467. SNDRV_CTL_ELEM_ACCESS_INACTIVE),
  468. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  469. .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,PCM_STREAM),
  470. .info = snd_cs8427_spdif_info,
  471. .get = snd_cs8427_spdif_get,
  472. .put = snd_cs8427_spdif_put,
  473. .private_value = 1
  474. },
  475. {
  476. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  477. .info = snd_cs8427_qsubcode_info,
  478. .name = "IEC958 Q-subcode Capture Default",
  479. .access = (SNDRV_CTL_ELEM_ACCESS_READ |
  480. SNDRV_CTL_ELEM_ACCESS_VOLATILE),
  481. .get = snd_cs8427_qsubcode_get
  482. }};
  483. int snd_cs8427_iec958_build(struct snd_i2c_device *cs8427,
  484. struct snd_pcm_substream *play_substream,
  485. struct snd_pcm_substream *cap_substream)
  486. {
  487. struct cs8427 *chip = cs8427->private_data;
  488. struct snd_kcontrol *kctl;
  489. unsigned int idx;
  490. int err;
  491. if (snd_BUG_ON(!play_substream || !cap_substream))
  492. return -EINVAL;
  493. for (idx = 0; idx < ARRAY_SIZE(snd_cs8427_iec958_controls); idx++) {
  494. kctl = snd_ctl_new1(&snd_cs8427_iec958_controls[idx], cs8427);
  495. if (kctl == NULL)
  496. return -ENOMEM;
  497. kctl->id.device = play_substream->pcm->device;
  498. kctl->id.subdevice = play_substream->number;
  499. err = snd_ctl_add(cs8427->bus->card, kctl);
  500. if (err < 0)
  501. return err;
  502. if (! strcmp(kctl->id.name,
  503. SNDRV_CTL_NAME_IEC958("",PLAYBACK,PCM_STREAM)))
  504. chip->playback.pcm_ctl = kctl;
  505. }
  506. chip->playback.substream = play_substream;
  507. chip->capture.substream = cap_substream;
  508. if (snd_BUG_ON(!chip->playback.pcm_ctl))
  509. return -EIO;
  510. return 0;
  511. }
  512. EXPORT_SYMBOL(snd_cs8427_iec958_build);
  513. int snd_cs8427_iec958_active(struct snd_i2c_device *cs8427, int active)
  514. {
  515. struct cs8427 *chip;
  516. if (snd_BUG_ON(!cs8427))
  517. return -ENXIO;
  518. chip = cs8427->private_data;
  519. if (active)
  520. memcpy(chip->playback.pcm_status,
  521. chip->playback.def_status, 24);
  522. chip->playback.pcm_ctl->vd[0].access &= ~SNDRV_CTL_ELEM_ACCESS_INACTIVE;
  523. snd_ctl_notify(cs8427->bus->card,
  524. SNDRV_CTL_EVENT_MASK_VALUE | SNDRV_CTL_EVENT_MASK_INFO,
  525. &chip->playback.pcm_ctl->id);
  526. return 0;
  527. }
  528. EXPORT_SYMBOL(snd_cs8427_iec958_active);
  529. int snd_cs8427_iec958_pcm(struct snd_i2c_device *cs8427, unsigned int rate)
  530. {
  531. struct cs8427 *chip;
  532. char *status;
  533. int err, reset;
  534. if (snd_BUG_ON(!cs8427))
  535. return -ENXIO;
  536. chip = cs8427->private_data;
  537. status = chip->playback.pcm_status;
  538. snd_i2c_lock(cs8427->bus);
  539. if (status[0] & IEC958_AES0_PROFESSIONAL) {
  540. status[0] &= ~IEC958_AES0_PRO_FS;
  541. switch (rate) {
  542. case 32000: status[0] |= IEC958_AES0_PRO_FS_32000; break;
  543. case 44100: status[0] |= IEC958_AES0_PRO_FS_44100; break;
  544. case 48000: status[0] |= IEC958_AES0_PRO_FS_48000; break;
  545. default: status[0] |= IEC958_AES0_PRO_FS_NOTID; break;
  546. }
  547. } else {
  548. status[3] &= ~IEC958_AES3_CON_FS;
  549. switch (rate) {
  550. case 32000: status[3] |= IEC958_AES3_CON_FS_32000; break;
  551. case 44100: status[3] |= IEC958_AES3_CON_FS_44100; break;
  552. case 48000: status[3] |= IEC958_AES3_CON_FS_48000; break;
  553. }
  554. }
  555. err = snd_cs8427_send_corudata(cs8427, 0, status, 24);
  556. if (err > 0)
  557. snd_ctl_notify(cs8427->bus->card,
  558. SNDRV_CTL_EVENT_MASK_VALUE,
  559. &chip->playback.pcm_ctl->id);
  560. reset = chip->rate != rate;
  561. chip->rate = rate;
  562. snd_i2c_unlock(cs8427->bus);
  563. if (reset)
  564. snd_cs8427_reset(cs8427);
  565. return err < 0 ? err : 0;
  566. }
  567. EXPORT_SYMBOL(snd_cs8427_iec958_pcm);
  568. static int __init alsa_cs8427_module_init(void)
  569. {
  570. return 0;
  571. }
  572. static void __exit alsa_cs8427_module_exit(void)
  573. {
  574. }
  575. module_init(alsa_cs8427_module_init)
  576. module_exit(alsa_cs8427_module_exit)