ak4113.c 18 KB

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  1. /*
  2. * Routines for control of the AK4113 via I2C/4-wire serial interface
  3. * IEC958 (S/PDIF) receiver by Asahi Kasei
  4. * Copyright (c) by Jaroslav Kysela <perex@perex.cz>
  5. * Copyright (c) by Pavel Hofman <pavel.hofman@ivitera.com>
  6. *
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License as published by
  10. * the Free Software Foundation; either version 2 of the License, or
  11. * (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  21. *
  22. */
  23. #include <linux/slab.h>
  24. #include <linux/delay.h>
  25. #include <linux/module.h>
  26. #include <sound/core.h>
  27. #include <sound/control.h>
  28. #include <sound/pcm.h>
  29. #include <sound/ak4113.h>
  30. #include <sound/asoundef.h>
  31. #include <sound/info.h>
  32. MODULE_AUTHOR("Pavel Hofman <pavel.hofman@ivitera.com>");
  33. MODULE_DESCRIPTION("AK4113 IEC958 (S/PDIF) receiver by Asahi Kasei");
  34. MODULE_LICENSE("GPL");
  35. #define AK4113_ADDR 0x00 /* fixed address */
  36. static void ak4113_stats(struct work_struct *work);
  37. static void ak4113_init_regs(struct ak4113 *chip);
  38. static void reg_write(struct ak4113 *ak4113, unsigned char reg,
  39. unsigned char val)
  40. {
  41. ak4113->write(ak4113->private_data, reg, val);
  42. if (reg < sizeof(ak4113->regmap))
  43. ak4113->regmap[reg] = val;
  44. }
  45. static inline unsigned char reg_read(struct ak4113 *ak4113, unsigned char reg)
  46. {
  47. return ak4113->read(ak4113->private_data, reg);
  48. }
  49. static void snd_ak4113_free(struct ak4113 *chip)
  50. {
  51. atomic_inc(&chip->wq_processing); /* don't schedule new work */
  52. cancel_delayed_work_sync(&chip->work);
  53. kfree(chip);
  54. }
  55. static int snd_ak4113_dev_free(struct snd_device *device)
  56. {
  57. struct ak4113 *chip = device->device_data;
  58. snd_ak4113_free(chip);
  59. return 0;
  60. }
  61. int snd_ak4113_create(struct snd_card *card, ak4113_read_t *read,
  62. ak4113_write_t *write, const unsigned char *pgm,
  63. void *private_data, struct ak4113 **r_ak4113)
  64. {
  65. struct ak4113 *chip;
  66. int err;
  67. unsigned char reg;
  68. static struct snd_device_ops ops = {
  69. .dev_free = snd_ak4113_dev_free,
  70. };
  71. chip = kzalloc(sizeof(*chip), GFP_KERNEL);
  72. if (chip == NULL)
  73. return -ENOMEM;
  74. spin_lock_init(&chip->lock);
  75. chip->card = card;
  76. chip->read = read;
  77. chip->write = write;
  78. chip->private_data = private_data;
  79. INIT_DELAYED_WORK(&chip->work, ak4113_stats);
  80. atomic_set(&chip->wq_processing, 0);
  81. mutex_init(&chip->reinit_mutex);
  82. for (reg = 0; reg < AK4113_WRITABLE_REGS ; reg++)
  83. chip->regmap[reg] = pgm[reg];
  84. ak4113_init_regs(chip);
  85. chip->rcs0 = reg_read(chip, AK4113_REG_RCS0) & ~(AK4113_QINT |
  86. AK4113_CINT | AK4113_STC);
  87. chip->rcs1 = reg_read(chip, AK4113_REG_RCS1);
  88. chip->rcs2 = reg_read(chip, AK4113_REG_RCS2);
  89. err = snd_device_new(card, SNDRV_DEV_CODEC, chip, &ops);
  90. if (err < 0)
  91. goto __fail;
  92. if (r_ak4113)
  93. *r_ak4113 = chip;
  94. return 0;
  95. __fail:
  96. snd_ak4113_free(chip);
  97. return err;
  98. }
  99. EXPORT_SYMBOL_GPL(snd_ak4113_create);
  100. void snd_ak4113_reg_write(struct ak4113 *chip, unsigned char reg,
  101. unsigned char mask, unsigned char val)
  102. {
  103. if (reg >= AK4113_WRITABLE_REGS)
  104. return;
  105. reg_write(chip, reg, (chip->regmap[reg] & ~mask) | val);
  106. }
  107. EXPORT_SYMBOL_GPL(snd_ak4113_reg_write);
  108. static void ak4113_init_regs(struct ak4113 *chip)
  109. {
  110. unsigned char old = chip->regmap[AK4113_REG_PWRDN], reg;
  111. /* bring the chip to reset state and powerdown state */
  112. reg_write(chip, AK4113_REG_PWRDN, old & ~(AK4113_RST|AK4113_PWN));
  113. udelay(200);
  114. /* release reset, but leave powerdown */
  115. reg_write(chip, AK4113_REG_PWRDN, (old | AK4113_RST) & ~AK4113_PWN);
  116. udelay(200);
  117. for (reg = 1; reg < AK4113_WRITABLE_REGS; reg++)
  118. reg_write(chip, reg, chip->regmap[reg]);
  119. /* release powerdown, everything is initialized now */
  120. reg_write(chip, AK4113_REG_PWRDN, old | AK4113_RST | AK4113_PWN);
  121. }
  122. void snd_ak4113_reinit(struct ak4113 *chip)
  123. {
  124. if (atomic_inc_return(&chip->wq_processing) == 1)
  125. cancel_delayed_work_sync(&chip->work);
  126. mutex_lock(&chip->reinit_mutex);
  127. ak4113_init_regs(chip);
  128. mutex_unlock(&chip->reinit_mutex);
  129. /* bring up statistics / event queing */
  130. if (atomic_dec_and_test(&chip->wq_processing))
  131. schedule_delayed_work(&chip->work, HZ / 10);
  132. }
  133. EXPORT_SYMBOL_GPL(snd_ak4113_reinit);
  134. static unsigned int external_rate(unsigned char rcs1)
  135. {
  136. switch (rcs1 & (AK4113_FS0|AK4113_FS1|AK4113_FS2|AK4113_FS3)) {
  137. case AK4113_FS_8000HZ:
  138. return 8000;
  139. case AK4113_FS_11025HZ:
  140. return 11025;
  141. case AK4113_FS_16000HZ:
  142. return 16000;
  143. case AK4113_FS_22050HZ:
  144. return 22050;
  145. case AK4113_FS_24000HZ:
  146. return 24000;
  147. case AK4113_FS_32000HZ:
  148. return 32000;
  149. case AK4113_FS_44100HZ:
  150. return 44100;
  151. case AK4113_FS_48000HZ:
  152. return 48000;
  153. case AK4113_FS_64000HZ:
  154. return 64000;
  155. case AK4113_FS_88200HZ:
  156. return 88200;
  157. case AK4113_FS_96000HZ:
  158. return 96000;
  159. case AK4113_FS_176400HZ:
  160. return 176400;
  161. case AK4113_FS_192000HZ:
  162. return 192000;
  163. default:
  164. return 0;
  165. }
  166. }
  167. static int snd_ak4113_in_error_info(struct snd_kcontrol *kcontrol,
  168. struct snd_ctl_elem_info *uinfo)
  169. {
  170. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  171. uinfo->count = 1;
  172. uinfo->value.integer.min = 0;
  173. uinfo->value.integer.max = LONG_MAX;
  174. return 0;
  175. }
  176. static int snd_ak4113_in_error_get(struct snd_kcontrol *kcontrol,
  177. struct snd_ctl_elem_value *ucontrol)
  178. {
  179. struct ak4113 *chip = snd_kcontrol_chip(kcontrol);
  180. long *ptr;
  181. spin_lock_irq(&chip->lock);
  182. ptr = (long *)(((char *)chip) + kcontrol->private_value);
  183. ucontrol->value.integer.value[0] = *ptr;
  184. *ptr = 0;
  185. spin_unlock_irq(&chip->lock);
  186. return 0;
  187. }
  188. #define snd_ak4113_in_bit_info snd_ctl_boolean_mono_info
  189. static int snd_ak4113_in_bit_get(struct snd_kcontrol *kcontrol,
  190. struct snd_ctl_elem_value *ucontrol)
  191. {
  192. struct ak4113 *chip = snd_kcontrol_chip(kcontrol);
  193. unsigned char reg = kcontrol->private_value & 0xff;
  194. unsigned char bit = (kcontrol->private_value >> 8) & 0xff;
  195. unsigned char inv = (kcontrol->private_value >> 31) & 1;
  196. ucontrol->value.integer.value[0] =
  197. ((reg_read(chip, reg) & (1 << bit)) ? 1 : 0) ^ inv;
  198. return 0;
  199. }
  200. static int snd_ak4113_rx_info(struct snd_kcontrol *kcontrol,
  201. struct snd_ctl_elem_info *uinfo)
  202. {
  203. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  204. uinfo->count = 1;
  205. uinfo->value.integer.min = 0;
  206. uinfo->value.integer.max = 5;
  207. return 0;
  208. }
  209. static int snd_ak4113_rx_get(struct snd_kcontrol *kcontrol,
  210. struct snd_ctl_elem_value *ucontrol)
  211. {
  212. struct ak4113 *chip = snd_kcontrol_chip(kcontrol);
  213. ucontrol->value.integer.value[0] =
  214. (AK4113_IPS(chip->regmap[AK4113_REG_IO1]));
  215. return 0;
  216. }
  217. static int snd_ak4113_rx_put(struct snd_kcontrol *kcontrol,
  218. struct snd_ctl_elem_value *ucontrol)
  219. {
  220. struct ak4113 *chip = snd_kcontrol_chip(kcontrol);
  221. int change;
  222. u8 old_val;
  223. spin_lock_irq(&chip->lock);
  224. old_val = chip->regmap[AK4113_REG_IO1];
  225. change = ucontrol->value.integer.value[0] != AK4113_IPS(old_val);
  226. if (change)
  227. reg_write(chip, AK4113_REG_IO1,
  228. (old_val & (~AK4113_IPS(0xff))) |
  229. (AK4113_IPS(ucontrol->value.integer.value[0])));
  230. spin_unlock_irq(&chip->lock);
  231. return change;
  232. }
  233. static int snd_ak4113_rate_info(struct snd_kcontrol *kcontrol,
  234. struct snd_ctl_elem_info *uinfo)
  235. {
  236. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  237. uinfo->count = 1;
  238. uinfo->value.integer.min = 0;
  239. uinfo->value.integer.max = 192000;
  240. return 0;
  241. }
  242. static int snd_ak4113_rate_get(struct snd_kcontrol *kcontrol,
  243. struct snd_ctl_elem_value *ucontrol)
  244. {
  245. struct ak4113 *chip = snd_kcontrol_chip(kcontrol);
  246. ucontrol->value.integer.value[0] = external_rate(reg_read(chip,
  247. AK4113_REG_RCS1));
  248. return 0;
  249. }
  250. static int snd_ak4113_spdif_info(struct snd_kcontrol *kcontrol,
  251. struct snd_ctl_elem_info *uinfo)
  252. {
  253. uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
  254. uinfo->count = 1;
  255. return 0;
  256. }
  257. static int snd_ak4113_spdif_get(struct snd_kcontrol *kcontrol,
  258. struct snd_ctl_elem_value *ucontrol)
  259. {
  260. struct ak4113 *chip = snd_kcontrol_chip(kcontrol);
  261. unsigned i;
  262. for (i = 0; i < AK4113_REG_RXCSB_SIZE; i++)
  263. ucontrol->value.iec958.status[i] = reg_read(chip,
  264. AK4113_REG_RXCSB0 + i);
  265. return 0;
  266. }
  267. static int snd_ak4113_spdif_mask_info(struct snd_kcontrol *kcontrol,
  268. struct snd_ctl_elem_info *uinfo)
  269. {
  270. uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
  271. uinfo->count = 1;
  272. return 0;
  273. }
  274. static int snd_ak4113_spdif_mask_get(struct snd_kcontrol *kcontrol,
  275. struct snd_ctl_elem_value *ucontrol)
  276. {
  277. memset(ucontrol->value.iec958.status, 0xff, AK4113_REG_RXCSB_SIZE);
  278. return 0;
  279. }
  280. static int snd_ak4113_spdif_pinfo(struct snd_kcontrol *kcontrol,
  281. struct snd_ctl_elem_info *uinfo)
  282. {
  283. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  284. uinfo->value.integer.min = 0;
  285. uinfo->value.integer.max = 0xffff;
  286. uinfo->count = 4;
  287. return 0;
  288. }
  289. static int snd_ak4113_spdif_pget(struct snd_kcontrol *kcontrol,
  290. struct snd_ctl_elem_value *ucontrol)
  291. {
  292. struct ak4113 *chip = snd_kcontrol_chip(kcontrol);
  293. unsigned short tmp;
  294. ucontrol->value.integer.value[0] = 0xf8f2;
  295. ucontrol->value.integer.value[1] = 0x4e1f;
  296. tmp = reg_read(chip, AK4113_REG_Pc0) |
  297. (reg_read(chip, AK4113_REG_Pc1) << 8);
  298. ucontrol->value.integer.value[2] = tmp;
  299. tmp = reg_read(chip, AK4113_REG_Pd0) |
  300. (reg_read(chip, AK4113_REG_Pd1) << 8);
  301. ucontrol->value.integer.value[3] = tmp;
  302. return 0;
  303. }
  304. static int snd_ak4113_spdif_qinfo(struct snd_kcontrol *kcontrol,
  305. struct snd_ctl_elem_info *uinfo)
  306. {
  307. uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
  308. uinfo->count = AK4113_REG_QSUB_SIZE;
  309. return 0;
  310. }
  311. static int snd_ak4113_spdif_qget(struct snd_kcontrol *kcontrol,
  312. struct snd_ctl_elem_value *ucontrol)
  313. {
  314. struct ak4113 *chip = snd_kcontrol_chip(kcontrol);
  315. unsigned i;
  316. for (i = 0; i < AK4113_REG_QSUB_SIZE; i++)
  317. ucontrol->value.bytes.data[i] = reg_read(chip,
  318. AK4113_REG_QSUB_ADDR + i);
  319. return 0;
  320. }
  321. /* Don't forget to change AK4113_CONTROLS define!!! */
  322. static struct snd_kcontrol_new snd_ak4113_iec958_controls[] = {
  323. {
  324. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  325. .name = "IEC958 Parity Errors",
  326. .access = SNDRV_CTL_ELEM_ACCESS_READ |
  327. SNDRV_CTL_ELEM_ACCESS_VOLATILE,
  328. .info = snd_ak4113_in_error_info,
  329. .get = snd_ak4113_in_error_get,
  330. .private_value = offsetof(struct ak4113, parity_errors),
  331. },
  332. {
  333. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  334. .name = "IEC958 V-Bit Errors",
  335. .access = SNDRV_CTL_ELEM_ACCESS_READ |
  336. SNDRV_CTL_ELEM_ACCESS_VOLATILE,
  337. .info = snd_ak4113_in_error_info,
  338. .get = snd_ak4113_in_error_get,
  339. .private_value = offsetof(struct ak4113, v_bit_errors),
  340. },
  341. {
  342. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  343. .name = "IEC958 C-CRC Errors",
  344. .access = SNDRV_CTL_ELEM_ACCESS_READ |
  345. SNDRV_CTL_ELEM_ACCESS_VOLATILE,
  346. .info = snd_ak4113_in_error_info,
  347. .get = snd_ak4113_in_error_get,
  348. .private_value = offsetof(struct ak4113, ccrc_errors),
  349. },
  350. {
  351. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  352. .name = "IEC958 Q-CRC Errors",
  353. .access = SNDRV_CTL_ELEM_ACCESS_READ |
  354. SNDRV_CTL_ELEM_ACCESS_VOLATILE,
  355. .info = snd_ak4113_in_error_info,
  356. .get = snd_ak4113_in_error_get,
  357. .private_value = offsetof(struct ak4113, qcrc_errors),
  358. },
  359. {
  360. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  361. .name = "IEC958 External Rate",
  362. .access = SNDRV_CTL_ELEM_ACCESS_READ |
  363. SNDRV_CTL_ELEM_ACCESS_VOLATILE,
  364. .info = snd_ak4113_rate_info,
  365. .get = snd_ak4113_rate_get,
  366. },
  367. {
  368. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  369. .name = SNDRV_CTL_NAME_IEC958("", CAPTURE, MASK),
  370. .access = SNDRV_CTL_ELEM_ACCESS_READ,
  371. .info = snd_ak4113_spdif_mask_info,
  372. .get = snd_ak4113_spdif_mask_get,
  373. },
  374. {
  375. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  376. .name = SNDRV_CTL_NAME_IEC958("", CAPTURE, DEFAULT),
  377. .access = SNDRV_CTL_ELEM_ACCESS_READ |
  378. SNDRV_CTL_ELEM_ACCESS_VOLATILE,
  379. .info = snd_ak4113_spdif_info,
  380. .get = snd_ak4113_spdif_get,
  381. },
  382. {
  383. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  384. .name = "IEC958 Preamble Capture Default",
  385. .access = SNDRV_CTL_ELEM_ACCESS_READ |
  386. SNDRV_CTL_ELEM_ACCESS_VOLATILE,
  387. .info = snd_ak4113_spdif_pinfo,
  388. .get = snd_ak4113_spdif_pget,
  389. },
  390. {
  391. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  392. .name = "IEC958 Q-subcode Capture Default",
  393. .access = SNDRV_CTL_ELEM_ACCESS_READ |
  394. SNDRV_CTL_ELEM_ACCESS_VOLATILE,
  395. .info = snd_ak4113_spdif_qinfo,
  396. .get = snd_ak4113_spdif_qget,
  397. },
  398. {
  399. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  400. .name = "IEC958 Audio",
  401. .access = SNDRV_CTL_ELEM_ACCESS_READ |
  402. SNDRV_CTL_ELEM_ACCESS_VOLATILE,
  403. .info = snd_ak4113_in_bit_info,
  404. .get = snd_ak4113_in_bit_get,
  405. .private_value = (1<<31) | (1<<8) | AK4113_REG_RCS0,
  406. },
  407. {
  408. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  409. .name = "IEC958 Non-PCM Bitstream",
  410. .access = SNDRV_CTL_ELEM_ACCESS_READ |
  411. SNDRV_CTL_ELEM_ACCESS_VOLATILE,
  412. .info = snd_ak4113_in_bit_info,
  413. .get = snd_ak4113_in_bit_get,
  414. .private_value = (0<<8) | AK4113_REG_RCS1,
  415. },
  416. {
  417. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  418. .name = "IEC958 DTS Bitstream",
  419. .access = SNDRV_CTL_ELEM_ACCESS_READ |
  420. SNDRV_CTL_ELEM_ACCESS_VOLATILE,
  421. .info = snd_ak4113_in_bit_info,
  422. .get = snd_ak4113_in_bit_get,
  423. .private_value = (1<<8) | AK4113_REG_RCS1,
  424. },
  425. {
  426. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  427. .name = "AK4113 Input Select",
  428. .access = SNDRV_CTL_ELEM_ACCESS_READ |
  429. SNDRV_CTL_ELEM_ACCESS_WRITE,
  430. .info = snd_ak4113_rx_info,
  431. .get = snd_ak4113_rx_get,
  432. .put = snd_ak4113_rx_put,
  433. }
  434. };
  435. static void snd_ak4113_proc_regs_read(struct snd_info_entry *entry,
  436. struct snd_info_buffer *buffer)
  437. {
  438. struct ak4113 *ak4113 = entry->private_data;
  439. int reg, val;
  440. /* all ak4113 registers 0x00 - 0x1c */
  441. for (reg = 0; reg < 0x1d; reg++) {
  442. val = reg_read(ak4113, reg);
  443. snd_iprintf(buffer, "0x%02x = 0x%02x\n", reg, val);
  444. }
  445. }
  446. static void snd_ak4113_proc_init(struct ak4113 *ak4113)
  447. {
  448. struct snd_info_entry *entry;
  449. if (!snd_card_proc_new(ak4113->card, "ak4113", &entry))
  450. snd_info_set_text_ops(entry, ak4113, snd_ak4113_proc_regs_read);
  451. }
  452. int snd_ak4113_build(struct ak4113 *ak4113,
  453. struct snd_pcm_substream *cap_substream)
  454. {
  455. struct snd_kcontrol *kctl;
  456. unsigned int idx;
  457. int err;
  458. if (snd_BUG_ON(!cap_substream))
  459. return -EINVAL;
  460. ak4113->substream = cap_substream;
  461. for (idx = 0; idx < AK4113_CONTROLS; idx++) {
  462. kctl = snd_ctl_new1(&snd_ak4113_iec958_controls[idx], ak4113);
  463. if (kctl == NULL)
  464. return -ENOMEM;
  465. kctl->id.device = cap_substream->pcm->device;
  466. kctl->id.subdevice = cap_substream->number;
  467. err = snd_ctl_add(ak4113->card, kctl);
  468. if (err < 0)
  469. return err;
  470. ak4113->kctls[idx] = kctl;
  471. }
  472. snd_ak4113_proc_init(ak4113);
  473. /* trigger workq */
  474. schedule_delayed_work(&ak4113->work, HZ / 10);
  475. return 0;
  476. }
  477. EXPORT_SYMBOL_GPL(snd_ak4113_build);
  478. int snd_ak4113_external_rate(struct ak4113 *ak4113)
  479. {
  480. unsigned char rcs1;
  481. rcs1 = reg_read(ak4113, AK4113_REG_RCS1);
  482. return external_rate(rcs1);
  483. }
  484. EXPORT_SYMBOL_GPL(snd_ak4113_external_rate);
  485. int snd_ak4113_check_rate_and_errors(struct ak4113 *ak4113, unsigned int flags)
  486. {
  487. struct snd_pcm_runtime *runtime =
  488. ak4113->substream ? ak4113->substream->runtime : NULL;
  489. unsigned long _flags;
  490. int res = 0;
  491. unsigned char rcs0, rcs1, rcs2;
  492. unsigned char c0, c1;
  493. rcs1 = reg_read(ak4113, AK4113_REG_RCS1);
  494. if (flags & AK4113_CHECK_NO_STAT)
  495. goto __rate;
  496. rcs0 = reg_read(ak4113, AK4113_REG_RCS0);
  497. rcs2 = reg_read(ak4113, AK4113_REG_RCS2);
  498. spin_lock_irqsave(&ak4113->lock, _flags);
  499. if (rcs0 & AK4113_PAR)
  500. ak4113->parity_errors++;
  501. if (rcs0 & AK4113_V)
  502. ak4113->v_bit_errors++;
  503. if (rcs2 & AK4113_CCRC)
  504. ak4113->ccrc_errors++;
  505. if (rcs2 & AK4113_QCRC)
  506. ak4113->qcrc_errors++;
  507. c0 = (ak4113->rcs0 & (AK4113_QINT | AK4113_CINT | AK4113_STC |
  508. AK4113_AUDION | AK4113_AUTO | AK4113_UNLCK)) ^
  509. (rcs0 & (AK4113_QINT | AK4113_CINT | AK4113_STC |
  510. AK4113_AUDION | AK4113_AUTO | AK4113_UNLCK));
  511. c1 = (ak4113->rcs1 & (AK4113_DTSCD | AK4113_NPCM | AK4113_PEM |
  512. AK4113_DAT | 0xf0)) ^
  513. (rcs1 & (AK4113_DTSCD | AK4113_NPCM | AK4113_PEM |
  514. AK4113_DAT | 0xf0));
  515. ak4113->rcs0 = rcs0 & ~(AK4113_QINT | AK4113_CINT | AK4113_STC);
  516. ak4113->rcs1 = rcs1;
  517. ak4113->rcs2 = rcs2;
  518. spin_unlock_irqrestore(&ak4113->lock, _flags);
  519. if (rcs0 & AK4113_PAR)
  520. snd_ctl_notify(ak4113->card, SNDRV_CTL_EVENT_MASK_VALUE,
  521. &ak4113->kctls[0]->id);
  522. if (rcs0 & AK4113_V)
  523. snd_ctl_notify(ak4113->card, SNDRV_CTL_EVENT_MASK_VALUE,
  524. &ak4113->kctls[1]->id);
  525. if (rcs2 & AK4113_CCRC)
  526. snd_ctl_notify(ak4113->card, SNDRV_CTL_EVENT_MASK_VALUE,
  527. &ak4113->kctls[2]->id);
  528. if (rcs2 & AK4113_QCRC)
  529. snd_ctl_notify(ak4113->card, SNDRV_CTL_EVENT_MASK_VALUE,
  530. &ak4113->kctls[3]->id);
  531. /* rate change */
  532. if (c1 & 0xf0)
  533. snd_ctl_notify(ak4113->card, SNDRV_CTL_EVENT_MASK_VALUE,
  534. &ak4113->kctls[4]->id);
  535. if ((c1 & AK4113_PEM) | (c0 & AK4113_CINT))
  536. snd_ctl_notify(ak4113->card, SNDRV_CTL_EVENT_MASK_VALUE,
  537. &ak4113->kctls[6]->id);
  538. if (c0 & AK4113_QINT)
  539. snd_ctl_notify(ak4113->card, SNDRV_CTL_EVENT_MASK_VALUE,
  540. &ak4113->kctls[8]->id);
  541. if (c0 & AK4113_AUDION)
  542. snd_ctl_notify(ak4113->card, SNDRV_CTL_EVENT_MASK_VALUE,
  543. &ak4113->kctls[9]->id);
  544. if (c1 & AK4113_NPCM)
  545. snd_ctl_notify(ak4113->card, SNDRV_CTL_EVENT_MASK_VALUE,
  546. &ak4113->kctls[10]->id);
  547. if (c1 & AK4113_DTSCD)
  548. snd_ctl_notify(ak4113->card, SNDRV_CTL_EVENT_MASK_VALUE,
  549. &ak4113->kctls[11]->id);
  550. if (ak4113->change_callback && (c0 | c1) != 0)
  551. ak4113->change_callback(ak4113, c0, c1);
  552. __rate:
  553. /* compare rate */
  554. res = external_rate(rcs1);
  555. if (!(flags & AK4113_CHECK_NO_RATE) && runtime &&
  556. (runtime->rate != res)) {
  557. snd_pcm_stream_lock_irqsave(ak4113->substream, _flags);
  558. if (snd_pcm_running(ak4113->substream)) {
  559. /*printk(KERN_DEBUG "rate changed (%i <- %i)\n",
  560. * runtime->rate, res); */
  561. snd_pcm_stop(ak4113->substream,
  562. SNDRV_PCM_STATE_DRAINING);
  563. wake_up(&runtime->sleep);
  564. res = 1;
  565. }
  566. snd_pcm_stream_unlock_irqrestore(ak4113->substream, _flags);
  567. }
  568. return res;
  569. }
  570. EXPORT_SYMBOL_GPL(snd_ak4113_check_rate_and_errors);
  571. static void ak4113_stats(struct work_struct *work)
  572. {
  573. struct ak4113 *chip = container_of(work, struct ak4113, work.work);
  574. if (atomic_inc_return(&chip->wq_processing) == 1)
  575. snd_ak4113_check_rate_and_errors(chip, chip->check_flags);
  576. if (atomic_dec_and_test(&chip->wq_processing))
  577. schedule_delayed_work(&chip->work, HZ / 10);
  578. }
  579. #ifdef CONFIG_PM
  580. void snd_ak4113_suspend(struct ak4113 *chip)
  581. {
  582. atomic_inc(&chip->wq_processing); /* don't schedule new work */
  583. cancel_delayed_work_sync(&chip->work);
  584. }
  585. EXPORT_SYMBOL(snd_ak4113_suspend);
  586. void snd_ak4113_resume(struct ak4113 *chip)
  587. {
  588. atomic_dec(&chip->wq_processing);
  589. snd_ak4113_reinit(chip);
  590. }
  591. EXPORT_SYMBOL(snd_ak4113_resume);
  592. #endif