ak4117.c 16 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548
  1. /*
  2. * Routines for control of the AK4117 via 4-wire serial interface
  3. * IEC958 (S/PDIF) receiver by Asahi Kasei
  4. * Copyright (c) by Jaroslav Kysela <perex@perex.cz>
  5. *
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License as published by
  9. * the Free Software Foundation; either version 2 of the License, or
  10. * (at your option) any later version.
  11. *
  12. * This program is distributed in the hope that it will be useful,
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. * GNU General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License
  18. * along with this program; if not, write to the Free Software
  19. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  20. *
  21. */
  22. #include <linux/slab.h>
  23. #include <linux/delay.h>
  24. #include <linux/module.h>
  25. #include <sound/core.h>
  26. #include <sound/control.h>
  27. #include <sound/pcm.h>
  28. #include <sound/ak4117.h>
  29. #include <sound/asoundef.h>
  30. MODULE_AUTHOR("Jaroslav Kysela <perex@perex.cz>");
  31. MODULE_DESCRIPTION("AK4117 IEC958 (S/PDIF) receiver by Asahi Kasei");
  32. MODULE_LICENSE("GPL");
  33. #define AK4117_ADDR 0x00 /* fixed address */
  34. static void snd_ak4117_timer(unsigned long data);
  35. static void reg_write(struct ak4117 *ak4117, unsigned char reg, unsigned char val)
  36. {
  37. ak4117->write(ak4117->private_data, reg, val);
  38. if (reg < sizeof(ak4117->regmap))
  39. ak4117->regmap[reg] = val;
  40. }
  41. static inline unsigned char reg_read(struct ak4117 *ak4117, unsigned char reg)
  42. {
  43. return ak4117->read(ak4117->private_data, reg);
  44. }
  45. #if 0
  46. static void reg_dump(struct ak4117 *ak4117)
  47. {
  48. int i;
  49. printk(KERN_DEBUG "AK4117 REG DUMP:\n");
  50. for (i = 0; i < 0x1b; i++)
  51. printk(KERN_DEBUG "reg[%02x] = %02x (%02x)\n", i, reg_read(ak4117, i), i < sizeof(ak4117->regmap) ? ak4117->regmap[i] : 0);
  52. }
  53. #endif
  54. static void snd_ak4117_free(struct ak4117 *chip)
  55. {
  56. del_timer_sync(&chip->timer);
  57. kfree(chip);
  58. }
  59. static int snd_ak4117_dev_free(struct snd_device *device)
  60. {
  61. struct ak4117 *chip = device->device_data;
  62. snd_ak4117_free(chip);
  63. return 0;
  64. }
  65. int snd_ak4117_create(struct snd_card *card, ak4117_read_t *read, ak4117_write_t *write,
  66. const unsigned char pgm[5], void *private_data, struct ak4117 **r_ak4117)
  67. {
  68. struct ak4117 *chip;
  69. int err = 0;
  70. unsigned char reg;
  71. static struct snd_device_ops ops = {
  72. .dev_free = snd_ak4117_dev_free,
  73. };
  74. chip = kzalloc(sizeof(*chip), GFP_KERNEL);
  75. if (chip == NULL)
  76. return -ENOMEM;
  77. spin_lock_init(&chip->lock);
  78. chip->card = card;
  79. chip->read = read;
  80. chip->write = write;
  81. chip->private_data = private_data;
  82. setup_timer(&chip->timer, snd_ak4117_timer, (unsigned long)chip);
  83. for (reg = 0; reg < 5; reg++)
  84. chip->regmap[reg] = pgm[reg];
  85. snd_ak4117_reinit(chip);
  86. chip->rcs0 = reg_read(chip, AK4117_REG_RCS0) & ~(AK4117_QINT | AK4117_CINT | AK4117_STC);
  87. chip->rcs1 = reg_read(chip, AK4117_REG_RCS1);
  88. chip->rcs2 = reg_read(chip, AK4117_REG_RCS2);
  89. if ((err = snd_device_new(card, SNDRV_DEV_CODEC, chip, &ops)) < 0)
  90. goto __fail;
  91. if (r_ak4117)
  92. *r_ak4117 = chip;
  93. return 0;
  94. __fail:
  95. snd_ak4117_free(chip);
  96. return err < 0 ? err : -EIO;
  97. }
  98. void snd_ak4117_reg_write(struct ak4117 *chip, unsigned char reg, unsigned char mask, unsigned char val)
  99. {
  100. if (reg >= 5)
  101. return;
  102. reg_write(chip, reg, (chip->regmap[reg] & ~mask) | val);
  103. }
  104. void snd_ak4117_reinit(struct ak4117 *chip)
  105. {
  106. unsigned char old = chip->regmap[AK4117_REG_PWRDN], reg;
  107. del_timer(&chip->timer);
  108. chip->init = 1;
  109. /* bring the chip to reset state and powerdown state */
  110. reg_write(chip, AK4117_REG_PWRDN, 0);
  111. udelay(200);
  112. /* release reset, but leave powerdown */
  113. reg_write(chip, AK4117_REG_PWRDN, (old | AK4117_RST) & ~AK4117_PWN);
  114. udelay(200);
  115. for (reg = 1; reg < 5; reg++)
  116. reg_write(chip, reg, chip->regmap[reg]);
  117. /* release powerdown, everything is initialized now */
  118. reg_write(chip, AK4117_REG_PWRDN, old | AK4117_RST | AK4117_PWN);
  119. chip->init = 0;
  120. mod_timer(&chip->timer, 1 + jiffies);
  121. }
  122. static unsigned int external_rate(unsigned char rcs1)
  123. {
  124. switch (rcs1 & (AK4117_FS0|AK4117_FS1|AK4117_FS2|AK4117_FS3)) {
  125. case AK4117_FS_32000HZ: return 32000;
  126. case AK4117_FS_44100HZ: return 44100;
  127. case AK4117_FS_48000HZ: return 48000;
  128. case AK4117_FS_88200HZ: return 88200;
  129. case AK4117_FS_96000HZ: return 96000;
  130. case AK4117_FS_176400HZ: return 176400;
  131. case AK4117_FS_192000HZ: return 192000;
  132. default: return 0;
  133. }
  134. }
  135. static int snd_ak4117_in_error_info(struct snd_kcontrol *kcontrol,
  136. struct snd_ctl_elem_info *uinfo)
  137. {
  138. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  139. uinfo->count = 1;
  140. uinfo->value.integer.min = 0;
  141. uinfo->value.integer.max = LONG_MAX;
  142. return 0;
  143. }
  144. static int snd_ak4117_in_error_get(struct snd_kcontrol *kcontrol,
  145. struct snd_ctl_elem_value *ucontrol)
  146. {
  147. struct ak4117 *chip = snd_kcontrol_chip(kcontrol);
  148. long *ptr;
  149. spin_lock_irq(&chip->lock);
  150. ptr = (long *)(((char *)chip) + kcontrol->private_value);
  151. ucontrol->value.integer.value[0] = *ptr;
  152. *ptr = 0;
  153. spin_unlock_irq(&chip->lock);
  154. return 0;
  155. }
  156. #define snd_ak4117_in_bit_info snd_ctl_boolean_mono_info
  157. static int snd_ak4117_in_bit_get(struct snd_kcontrol *kcontrol,
  158. struct snd_ctl_elem_value *ucontrol)
  159. {
  160. struct ak4117 *chip = snd_kcontrol_chip(kcontrol);
  161. unsigned char reg = kcontrol->private_value & 0xff;
  162. unsigned char bit = (kcontrol->private_value >> 8) & 0xff;
  163. unsigned char inv = (kcontrol->private_value >> 31) & 1;
  164. ucontrol->value.integer.value[0] = ((reg_read(chip, reg) & (1 << bit)) ? 1 : 0) ^ inv;
  165. return 0;
  166. }
  167. static int snd_ak4117_rx_info(struct snd_kcontrol *kcontrol,
  168. struct snd_ctl_elem_info *uinfo)
  169. {
  170. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  171. uinfo->count = 1;
  172. uinfo->value.integer.min = 0;
  173. uinfo->value.integer.max = 1;
  174. return 0;
  175. }
  176. static int snd_ak4117_rx_get(struct snd_kcontrol *kcontrol,
  177. struct snd_ctl_elem_value *ucontrol)
  178. {
  179. struct ak4117 *chip = snd_kcontrol_chip(kcontrol);
  180. ucontrol->value.integer.value[0] = (chip->regmap[AK4117_REG_IO] & AK4117_IPS) ? 1 : 0;
  181. return 0;
  182. }
  183. static int snd_ak4117_rx_put(struct snd_kcontrol *kcontrol,
  184. struct snd_ctl_elem_value *ucontrol)
  185. {
  186. struct ak4117 *chip = snd_kcontrol_chip(kcontrol);
  187. int change;
  188. u8 old_val;
  189. spin_lock_irq(&chip->lock);
  190. old_val = chip->regmap[AK4117_REG_IO];
  191. change = !!ucontrol->value.integer.value[0] != ((old_val & AK4117_IPS) ? 1 : 0);
  192. if (change)
  193. reg_write(chip, AK4117_REG_IO, (old_val & ~AK4117_IPS) | (ucontrol->value.integer.value[0] ? AK4117_IPS : 0));
  194. spin_unlock_irq(&chip->lock);
  195. return change;
  196. }
  197. static int snd_ak4117_rate_info(struct snd_kcontrol *kcontrol,
  198. struct snd_ctl_elem_info *uinfo)
  199. {
  200. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  201. uinfo->count = 1;
  202. uinfo->value.integer.min = 0;
  203. uinfo->value.integer.max = 192000;
  204. return 0;
  205. }
  206. static int snd_ak4117_rate_get(struct snd_kcontrol *kcontrol,
  207. struct snd_ctl_elem_value *ucontrol)
  208. {
  209. struct ak4117 *chip = snd_kcontrol_chip(kcontrol);
  210. ucontrol->value.integer.value[0] = external_rate(reg_read(chip, AK4117_REG_RCS1));
  211. return 0;
  212. }
  213. static int snd_ak4117_spdif_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  214. {
  215. uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
  216. uinfo->count = 1;
  217. return 0;
  218. }
  219. static int snd_ak4117_spdif_get(struct snd_kcontrol *kcontrol,
  220. struct snd_ctl_elem_value *ucontrol)
  221. {
  222. struct ak4117 *chip = snd_kcontrol_chip(kcontrol);
  223. unsigned i;
  224. for (i = 0; i < AK4117_REG_RXCSB_SIZE; i++)
  225. ucontrol->value.iec958.status[i] = reg_read(chip, AK4117_REG_RXCSB0 + i);
  226. return 0;
  227. }
  228. static int snd_ak4117_spdif_mask_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  229. {
  230. uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
  231. uinfo->count = 1;
  232. return 0;
  233. }
  234. static int snd_ak4117_spdif_mask_get(struct snd_kcontrol *kcontrol,
  235. struct snd_ctl_elem_value *ucontrol)
  236. {
  237. memset(ucontrol->value.iec958.status, 0xff, AK4117_REG_RXCSB_SIZE);
  238. return 0;
  239. }
  240. static int snd_ak4117_spdif_pinfo(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  241. {
  242. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  243. uinfo->value.integer.min = 0;
  244. uinfo->value.integer.max = 0xffff;
  245. uinfo->count = 4;
  246. return 0;
  247. }
  248. static int snd_ak4117_spdif_pget(struct snd_kcontrol *kcontrol,
  249. struct snd_ctl_elem_value *ucontrol)
  250. {
  251. struct ak4117 *chip = snd_kcontrol_chip(kcontrol);
  252. unsigned short tmp;
  253. ucontrol->value.integer.value[0] = 0xf8f2;
  254. ucontrol->value.integer.value[1] = 0x4e1f;
  255. tmp = reg_read(chip, AK4117_REG_Pc0) | (reg_read(chip, AK4117_REG_Pc1) << 8);
  256. ucontrol->value.integer.value[2] = tmp;
  257. tmp = reg_read(chip, AK4117_REG_Pd0) | (reg_read(chip, AK4117_REG_Pd1) << 8);
  258. ucontrol->value.integer.value[3] = tmp;
  259. return 0;
  260. }
  261. static int snd_ak4117_spdif_qinfo(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  262. {
  263. uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
  264. uinfo->count = AK4117_REG_QSUB_SIZE;
  265. return 0;
  266. }
  267. static int snd_ak4117_spdif_qget(struct snd_kcontrol *kcontrol,
  268. struct snd_ctl_elem_value *ucontrol)
  269. {
  270. struct ak4117 *chip = snd_kcontrol_chip(kcontrol);
  271. unsigned i;
  272. for (i = 0; i < AK4117_REG_QSUB_SIZE; i++)
  273. ucontrol->value.bytes.data[i] = reg_read(chip, AK4117_REG_QSUB_ADDR + i);
  274. return 0;
  275. }
  276. /* Don't forget to change AK4117_CONTROLS define!!! */
  277. static struct snd_kcontrol_new snd_ak4117_iec958_controls[] = {
  278. {
  279. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  280. .name = "IEC958 Parity Errors",
  281. .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
  282. .info = snd_ak4117_in_error_info,
  283. .get = snd_ak4117_in_error_get,
  284. .private_value = offsetof(struct ak4117, parity_errors),
  285. },
  286. {
  287. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  288. .name = "IEC958 V-Bit Errors",
  289. .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
  290. .info = snd_ak4117_in_error_info,
  291. .get = snd_ak4117_in_error_get,
  292. .private_value = offsetof(struct ak4117, v_bit_errors),
  293. },
  294. {
  295. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  296. .name = "IEC958 C-CRC Errors",
  297. .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
  298. .info = snd_ak4117_in_error_info,
  299. .get = snd_ak4117_in_error_get,
  300. .private_value = offsetof(struct ak4117, ccrc_errors),
  301. },
  302. {
  303. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  304. .name = "IEC958 Q-CRC Errors",
  305. .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
  306. .info = snd_ak4117_in_error_info,
  307. .get = snd_ak4117_in_error_get,
  308. .private_value = offsetof(struct ak4117, qcrc_errors),
  309. },
  310. {
  311. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  312. .name = "IEC958 External Rate",
  313. .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
  314. .info = snd_ak4117_rate_info,
  315. .get = snd_ak4117_rate_get,
  316. },
  317. {
  318. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  319. .name = SNDRV_CTL_NAME_IEC958("",CAPTURE,MASK),
  320. .access = SNDRV_CTL_ELEM_ACCESS_READ,
  321. .info = snd_ak4117_spdif_mask_info,
  322. .get = snd_ak4117_spdif_mask_get,
  323. },
  324. {
  325. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  326. .name = SNDRV_CTL_NAME_IEC958("",CAPTURE,DEFAULT),
  327. .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
  328. .info = snd_ak4117_spdif_info,
  329. .get = snd_ak4117_spdif_get,
  330. },
  331. {
  332. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  333. .name = "IEC958 Preamble Capture Default",
  334. .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
  335. .info = snd_ak4117_spdif_pinfo,
  336. .get = snd_ak4117_spdif_pget,
  337. },
  338. {
  339. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  340. .name = "IEC958 Q-subcode Capture Default",
  341. .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
  342. .info = snd_ak4117_spdif_qinfo,
  343. .get = snd_ak4117_spdif_qget,
  344. },
  345. {
  346. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  347. .name = "IEC958 Audio",
  348. .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
  349. .info = snd_ak4117_in_bit_info,
  350. .get = snd_ak4117_in_bit_get,
  351. .private_value = (1<<31) | (3<<8) | AK4117_REG_RCS0,
  352. },
  353. {
  354. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  355. .name = "IEC958 Non-PCM Bitstream",
  356. .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
  357. .info = snd_ak4117_in_bit_info,
  358. .get = snd_ak4117_in_bit_get,
  359. .private_value = (5<<8) | AK4117_REG_RCS1,
  360. },
  361. {
  362. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  363. .name = "IEC958 DTS Bitstream",
  364. .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
  365. .info = snd_ak4117_in_bit_info,
  366. .get = snd_ak4117_in_bit_get,
  367. .private_value = (6<<8) | AK4117_REG_RCS1,
  368. },
  369. {
  370. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  371. .name = "AK4117 Input Select",
  372. .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_WRITE,
  373. .info = snd_ak4117_rx_info,
  374. .get = snd_ak4117_rx_get,
  375. .put = snd_ak4117_rx_put,
  376. }
  377. };
  378. int snd_ak4117_build(struct ak4117 *ak4117, struct snd_pcm_substream *cap_substream)
  379. {
  380. struct snd_kcontrol *kctl;
  381. unsigned int idx;
  382. int err;
  383. if (snd_BUG_ON(!cap_substream))
  384. return -EINVAL;
  385. ak4117->substream = cap_substream;
  386. for (idx = 0; idx < AK4117_CONTROLS; idx++) {
  387. kctl = snd_ctl_new1(&snd_ak4117_iec958_controls[idx], ak4117);
  388. if (kctl == NULL)
  389. return -ENOMEM;
  390. kctl->id.device = cap_substream->pcm->device;
  391. kctl->id.subdevice = cap_substream->number;
  392. err = snd_ctl_add(ak4117->card, kctl);
  393. if (err < 0)
  394. return err;
  395. ak4117->kctls[idx] = kctl;
  396. }
  397. return 0;
  398. }
  399. int snd_ak4117_external_rate(struct ak4117 *ak4117)
  400. {
  401. unsigned char rcs1;
  402. rcs1 = reg_read(ak4117, AK4117_REG_RCS1);
  403. return external_rate(rcs1);
  404. }
  405. int snd_ak4117_check_rate_and_errors(struct ak4117 *ak4117, unsigned int flags)
  406. {
  407. struct snd_pcm_runtime *runtime = ak4117->substream ? ak4117->substream->runtime : NULL;
  408. unsigned long _flags;
  409. int res = 0;
  410. unsigned char rcs0, rcs1, rcs2;
  411. unsigned char c0, c1;
  412. rcs1 = reg_read(ak4117, AK4117_REG_RCS1);
  413. if (flags & AK4117_CHECK_NO_STAT)
  414. goto __rate;
  415. rcs0 = reg_read(ak4117, AK4117_REG_RCS0);
  416. rcs2 = reg_read(ak4117, AK4117_REG_RCS2);
  417. // printk(KERN_DEBUG "AK IRQ: rcs0 = 0x%x, rcs1 = 0x%x, rcs2 = 0x%x\n", rcs0, rcs1, rcs2);
  418. spin_lock_irqsave(&ak4117->lock, _flags);
  419. if (rcs0 & AK4117_PAR)
  420. ak4117->parity_errors++;
  421. if (rcs0 & AK4117_V)
  422. ak4117->v_bit_errors++;
  423. if (rcs2 & AK4117_CCRC)
  424. ak4117->ccrc_errors++;
  425. if (rcs2 & AK4117_QCRC)
  426. ak4117->qcrc_errors++;
  427. c0 = (ak4117->rcs0 & (AK4117_QINT | AK4117_CINT | AK4117_STC | AK4117_AUDION | AK4117_AUTO | AK4117_UNLCK)) ^
  428. (rcs0 & (AK4117_QINT | AK4117_CINT | AK4117_STC | AK4117_AUDION | AK4117_AUTO | AK4117_UNLCK));
  429. c1 = (ak4117->rcs1 & (AK4117_DTSCD | AK4117_NPCM | AK4117_PEM | 0x0f)) ^
  430. (rcs1 & (AK4117_DTSCD | AK4117_NPCM | AK4117_PEM | 0x0f));
  431. ak4117->rcs0 = rcs0 & ~(AK4117_QINT | AK4117_CINT | AK4117_STC);
  432. ak4117->rcs1 = rcs1;
  433. ak4117->rcs2 = rcs2;
  434. spin_unlock_irqrestore(&ak4117->lock, _flags);
  435. if (rcs0 & AK4117_PAR)
  436. snd_ctl_notify(ak4117->card, SNDRV_CTL_EVENT_MASK_VALUE, &ak4117->kctls[0]->id);
  437. if (rcs0 & AK4117_V)
  438. snd_ctl_notify(ak4117->card, SNDRV_CTL_EVENT_MASK_VALUE, &ak4117->kctls[1]->id);
  439. if (rcs2 & AK4117_CCRC)
  440. snd_ctl_notify(ak4117->card, SNDRV_CTL_EVENT_MASK_VALUE, &ak4117->kctls[2]->id);
  441. if (rcs2 & AK4117_QCRC)
  442. snd_ctl_notify(ak4117->card, SNDRV_CTL_EVENT_MASK_VALUE, &ak4117->kctls[3]->id);
  443. /* rate change */
  444. if (c1 & 0x0f)
  445. snd_ctl_notify(ak4117->card, SNDRV_CTL_EVENT_MASK_VALUE, &ak4117->kctls[4]->id);
  446. if ((c1 & AK4117_PEM) | (c0 & AK4117_CINT))
  447. snd_ctl_notify(ak4117->card, SNDRV_CTL_EVENT_MASK_VALUE, &ak4117->kctls[6]->id);
  448. if (c0 & AK4117_QINT)
  449. snd_ctl_notify(ak4117->card, SNDRV_CTL_EVENT_MASK_VALUE, &ak4117->kctls[8]->id);
  450. if (c0 & AK4117_AUDION)
  451. snd_ctl_notify(ak4117->card, SNDRV_CTL_EVENT_MASK_VALUE, &ak4117->kctls[9]->id);
  452. if (c1 & AK4117_NPCM)
  453. snd_ctl_notify(ak4117->card, SNDRV_CTL_EVENT_MASK_VALUE, &ak4117->kctls[10]->id);
  454. if (c1 & AK4117_DTSCD)
  455. snd_ctl_notify(ak4117->card, SNDRV_CTL_EVENT_MASK_VALUE, &ak4117->kctls[11]->id);
  456. if (ak4117->change_callback && (c0 | c1) != 0)
  457. ak4117->change_callback(ak4117, c0, c1);
  458. __rate:
  459. /* compare rate */
  460. res = external_rate(rcs1);
  461. if (!(flags & AK4117_CHECK_NO_RATE) && runtime && runtime->rate != res) {
  462. snd_pcm_stream_lock_irqsave(ak4117->substream, _flags);
  463. if (snd_pcm_running(ak4117->substream)) {
  464. // printk(KERN_DEBUG "rate changed (%i <- %i)\n", runtime->rate, res);
  465. snd_pcm_stop(ak4117->substream, SNDRV_PCM_STATE_DRAINING);
  466. wake_up(&runtime->sleep);
  467. res = 1;
  468. }
  469. snd_pcm_stream_unlock_irqrestore(ak4117->substream, _flags);
  470. }
  471. return res;
  472. }
  473. static void snd_ak4117_timer(unsigned long data)
  474. {
  475. struct ak4117 *chip = (struct ak4117 *)data;
  476. if (chip->init)
  477. return;
  478. snd_ak4117_check_rate_and_errors(chip, 0);
  479. mod_timer(&chip->timer, 1 + jiffies);
  480. }
  481. EXPORT_SYMBOL(snd_ak4117_create);
  482. EXPORT_SYMBOL(snd_ak4117_reg_write);
  483. EXPORT_SYMBOL(snd_ak4117_reinit);
  484. EXPORT_SYMBOL(snd_ak4117_build);
  485. EXPORT_SYMBOL(snd_ak4117_external_rate);
  486. EXPORT_SYMBOL(snd_ak4117_check_rate_and_errors);