gus_io.c 17 KB

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  1. /*
  2. * Copyright (c) by Jaroslav Kysela <perex@perex.cz>
  3. * I/O routines for GF1/InterWave synthesizer chips
  4. *
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or
  9. * (at your option) any later version.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program; if not, write to the Free Software
  18. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  19. *
  20. */
  21. #include <linux/delay.h>
  22. #include <linux/time.h>
  23. #include <sound/core.h>
  24. #include <sound/gus.h>
  25. void snd_gf1_delay(struct snd_gus_card * gus)
  26. {
  27. int i;
  28. for (i = 0; i < 6; i++) {
  29. mb();
  30. inb(GUSP(gus, DRAM));
  31. }
  32. }
  33. /*
  34. * =======================================================================
  35. */
  36. /*
  37. * ok.. stop of control registers (wave & ramp) need some special things..
  38. * big UltraClick (tm) elimination...
  39. */
  40. static inline void __snd_gf1_ctrl_stop(struct snd_gus_card * gus, unsigned char reg)
  41. {
  42. unsigned char value;
  43. outb(reg | 0x80, gus->gf1.reg_regsel);
  44. mb();
  45. value = inb(gus->gf1.reg_data8);
  46. mb();
  47. outb(reg, gus->gf1.reg_regsel);
  48. mb();
  49. outb((value | 0x03) & ~(0x80 | 0x20), gus->gf1.reg_data8);
  50. mb();
  51. }
  52. static inline void __snd_gf1_write8(struct snd_gus_card * gus,
  53. unsigned char reg,
  54. unsigned char data)
  55. {
  56. outb(reg, gus->gf1.reg_regsel);
  57. mb();
  58. outb(data, gus->gf1.reg_data8);
  59. mb();
  60. }
  61. static inline unsigned char __snd_gf1_look8(struct snd_gus_card * gus,
  62. unsigned char reg)
  63. {
  64. outb(reg, gus->gf1.reg_regsel);
  65. mb();
  66. return inb(gus->gf1.reg_data8);
  67. }
  68. static inline void __snd_gf1_write16(struct snd_gus_card * gus,
  69. unsigned char reg, unsigned int data)
  70. {
  71. outb(reg, gus->gf1.reg_regsel);
  72. mb();
  73. outw((unsigned short) data, gus->gf1.reg_data16);
  74. mb();
  75. }
  76. static inline unsigned short __snd_gf1_look16(struct snd_gus_card * gus,
  77. unsigned char reg)
  78. {
  79. outb(reg, gus->gf1.reg_regsel);
  80. mb();
  81. return inw(gus->gf1.reg_data16);
  82. }
  83. static inline void __snd_gf1_adlib_write(struct snd_gus_card * gus,
  84. unsigned char reg, unsigned char data)
  85. {
  86. outb(reg, gus->gf1.reg_timerctrl);
  87. inb(gus->gf1.reg_timerctrl);
  88. inb(gus->gf1.reg_timerctrl);
  89. outb(data, gus->gf1.reg_timerdata);
  90. inb(gus->gf1.reg_timerctrl);
  91. inb(gus->gf1.reg_timerctrl);
  92. }
  93. static inline void __snd_gf1_write_addr(struct snd_gus_card * gus, unsigned char reg,
  94. unsigned int addr, int w_16bit)
  95. {
  96. if (gus->gf1.enh_mode) {
  97. if (w_16bit)
  98. addr = ((addr >> 1) & ~0x0000000f) | (addr & 0x0000000f);
  99. __snd_gf1_write8(gus, SNDRV_GF1_VB_UPPER_ADDRESS, (unsigned char) ((addr >> 26) & 0x03));
  100. } else if (w_16bit)
  101. addr = (addr & 0x00c0000f) | ((addr & 0x003ffff0) >> 1);
  102. __snd_gf1_write16(gus, reg, (unsigned short) (addr >> 11));
  103. __snd_gf1_write16(gus, reg + 1, (unsigned short) (addr << 5));
  104. }
  105. static inline unsigned int __snd_gf1_read_addr(struct snd_gus_card * gus,
  106. unsigned char reg, short w_16bit)
  107. {
  108. unsigned int res;
  109. res = ((unsigned int) __snd_gf1_look16(gus, reg | 0x80) << 11) & 0xfff800;
  110. res |= ((unsigned int) __snd_gf1_look16(gus, (reg + 1) | 0x80) >> 5) & 0x0007ff;
  111. if (gus->gf1.enh_mode) {
  112. res |= (unsigned int) __snd_gf1_look8(gus, SNDRV_GF1_VB_UPPER_ADDRESS | 0x80) << 26;
  113. if (w_16bit)
  114. res = ((res << 1) & 0xffffffe0) | (res & 0x0000000f);
  115. } else if (w_16bit)
  116. res = ((res & 0x001ffff0) << 1) | (res & 0x00c0000f);
  117. return res;
  118. }
  119. /*
  120. * =======================================================================
  121. */
  122. void snd_gf1_ctrl_stop(struct snd_gus_card * gus, unsigned char reg)
  123. {
  124. __snd_gf1_ctrl_stop(gus, reg);
  125. }
  126. void snd_gf1_write8(struct snd_gus_card * gus,
  127. unsigned char reg,
  128. unsigned char data)
  129. {
  130. __snd_gf1_write8(gus, reg, data);
  131. }
  132. unsigned char snd_gf1_look8(struct snd_gus_card * gus, unsigned char reg)
  133. {
  134. return __snd_gf1_look8(gus, reg);
  135. }
  136. void snd_gf1_write16(struct snd_gus_card * gus,
  137. unsigned char reg,
  138. unsigned int data)
  139. {
  140. __snd_gf1_write16(gus, reg, data);
  141. }
  142. unsigned short snd_gf1_look16(struct snd_gus_card * gus, unsigned char reg)
  143. {
  144. return __snd_gf1_look16(gus, reg);
  145. }
  146. void snd_gf1_adlib_write(struct snd_gus_card * gus,
  147. unsigned char reg,
  148. unsigned char data)
  149. {
  150. __snd_gf1_adlib_write(gus, reg, data);
  151. }
  152. void snd_gf1_write_addr(struct snd_gus_card * gus, unsigned char reg,
  153. unsigned int addr, short w_16bit)
  154. {
  155. __snd_gf1_write_addr(gus, reg, addr, w_16bit);
  156. }
  157. unsigned int snd_gf1_read_addr(struct snd_gus_card * gus,
  158. unsigned char reg,
  159. short w_16bit)
  160. {
  161. return __snd_gf1_read_addr(gus, reg, w_16bit);
  162. }
  163. /*
  164. */
  165. void snd_gf1_i_ctrl_stop(struct snd_gus_card * gus, unsigned char reg)
  166. {
  167. unsigned long flags;
  168. spin_lock_irqsave(&gus->reg_lock, flags);
  169. __snd_gf1_ctrl_stop(gus, reg);
  170. spin_unlock_irqrestore(&gus->reg_lock, flags);
  171. }
  172. void snd_gf1_i_write8(struct snd_gus_card * gus,
  173. unsigned char reg,
  174. unsigned char data)
  175. {
  176. unsigned long flags;
  177. spin_lock_irqsave(&gus->reg_lock, flags);
  178. __snd_gf1_write8(gus, reg, data);
  179. spin_unlock_irqrestore(&gus->reg_lock, flags);
  180. }
  181. unsigned char snd_gf1_i_look8(struct snd_gus_card * gus, unsigned char reg)
  182. {
  183. unsigned long flags;
  184. unsigned char res;
  185. spin_lock_irqsave(&gus->reg_lock, flags);
  186. res = __snd_gf1_look8(gus, reg);
  187. spin_unlock_irqrestore(&gus->reg_lock, flags);
  188. return res;
  189. }
  190. void snd_gf1_i_write16(struct snd_gus_card * gus,
  191. unsigned char reg,
  192. unsigned int data)
  193. {
  194. unsigned long flags;
  195. spin_lock_irqsave(&gus->reg_lock, flags);
  196. __snd_gf1_write16(gus, reg, data);
  197. spin_unlock_irqrestore(&gus->reg_lock, flags);
  198. }
  199. unsigned short snd_gf1_i_look16(struct snd_gus_card * gus, unsigned char reg)
  200. {
  201. unsigned long flags;
  202. unsigned short res;
  203. spin_lock_irqsave(&gus->reg_lock, flags);
  204. res = __snd_gf1_look16(gus, reg);
  205. spin_unlock_irqrestore(&gus->reg_lock, flags);
  206. return res;
  207. }
  208. #if 0
  209. void snd_gf1_i_adlib_write(struct snd_gus_card * gus,
  210. unsigned char reg,
  211. unsigned char data)
  212. {
  213. unsigned long flags;
  214. spin_lock_irqsave(&gus->reg_lock, flags);
  215. __snd_gf1_adlib_write(gus, reg, data);
  216. spin_unlock_irqrestore(&gus->reg_lock, flags);
  217. }
  218. void snd_gf1_i_write_addr(struct snd_gus_card * gus, unsigned char reg,
  219. unsigned int addr, short w_16bit)
  220. {
  221. unsigned long flags;
  222. spin_lock_irqsave(&gus->reg_lock, flags);
  223. __snd_gf1_write_addr(gus, reg, addr, w_16bit);
  224. spin_unlock_irqrestore(&gus->reg_lock, flags);
  225. }
  226. #endif /* 0 */
  227. #ifdef CONFIG_SND_DEBUG
  228. static unsigned int snd_gf1_i_read_addr(struct snd_gus_card * gus,
  229. unsigned char reg, short w_16bit)
  230. {
  231. unsigned int res;
  232. unsigned long flags;
  233. spin_lock_irqsave(&gus->reg_lock, flags);
  234. res = __snd_gf1_read_addr(gus, reg, w_16bit);
  235. spin_unlock_irqrestore(&gus->reg_lock, flags);
  236. return res;
  237. }
  238. #endif
  239. /*
  240. */
  241. void snd_gf1_dram_addr(struct snd_gus_card * gus, unsigned int addr)
  242. {
  243. outb(0x43, gus->gf1.reg_regsel);
  244. mb();
  245. outw((unsigned short) addr, gus->gf1.reg_data16);
  246. mb();
  247. outb(0x44, gus->gf1.reg_regsel);
  248. mb();
  249. outb((unsigned char) (addr >> 16), gus->gf1.reg_data8);
  250. mb();
  251. }
  252. void snd_gf1_poke(struct snd_gus_card * gus, unsigned int addr, unsigned char data)
  253. {
  254. unsigned long flags;
  255. spin_lock_irqsave(&gus->reg_lock, flags);
  256. outb(SNDRV_GF1_GW_DRAM_IO_LOW, gus->gf1.reg_regsel);
  257. mb();
  258. outw((unsigned short) addr, gus->gf1.reg_data16);
  259. mb();
  260. outb(SNDRV_GF1_GB_DRAM_IO_HIGH, gus->gf1.reg_regsel);
  261. mb();
  262. outb((unsigned char) (addr >> 16), gus->gf1.reg_data8);
  263. mb();
  264. outb(data, gus->gf1.reg_dram);
  265. spin_unlock_irqrestore(&gus->reg_lock, flags);
  266. }
  267. unsigned char snd_gf1_peek(struct snd_gus_card * gus, unsigned int addr)
  268. {
  269. unsigned long flags;
  270. unsigned char res;
  271. spin_lock_irqsave(&gus->reg_lock, flags);
  272. outb(SNDRV_GF1_GW_DRAM_IO_LOW, gus->gf1.reg_regsel);
  273. mb();
  274. outw((unsigned short) addr, gus->gf1.reg_data16);
  275. mb();
  276. outb(SNDRV_GF1_GB_DRAM_IO_HIGH, gus->gf1.reg_regsel);
  277. mb();
  278. outb((unsigned char) (addr >> 16), gus->gf1.reg_data8);
  279. mb();
  280. res = inb(gus->gf1.reg_dram);
  281. spin_unlock_irqrestore(&gus->reg_lock, flags);
  282. return res;
  283. }
  284. #if 0
  285. void snd_gf1_pokew(struct snd_gus_card * gus, unsigned int addr, unsigned short data)
  286. {
  287. unsigned long flags;
  288. #ifdef CONFIG_SND_DEBUG
  289. if (!gus->interwave)
  290. snd_printk(KERN_DEBUG "snd_gf1_pokew - GF1!!!\n");
  291. #endif
  292. spin_lock_irqsave(&gus->reg_lock, flags);
  293. outb(SNDRV_GF1_GW_DRAM_IO_LOW, gus->gf1.reg_regsel);
  294. mb();
  295. outw((unsigned short) addr, gus->gf1.reg_data16);
  296. mb();
  297. outb(SNDRV_GF1_GB_DRAM_IO_HIGH, gus->gf1.reg_regsel);
  298. mb();
  299. outb((unsigned char) (addr >> 16), gus->gf1.reg_data8);
  300. mb();
  301. outb(SNDRV_GF1_GW_DRAM_IO16, gus->gf1.reg_regsel);
  302. mb();
  303. outw(data, gus->gf1.reg_data16);
  304. spin_unlock_irqrestore(&gus->reg_lock, flags);
  305. }
  306. unsigned short snd_gf1_peekw(struct snd_gus_card * gus, unsigned int addr)
  307. {
  308. unsigned long flags;
  309. unsigned short res;
  310. #ifdef CONFIG_SND_DEBUG
  311. if (!gus->interwave)
  312. snd_printk(KERN_DEBUG "snd_gf1_peekw - GF1!!!\n");
  313. #endif
  314. spin_lock_irqsave(&gus->reg_lock, flags);
  315. outb(SNDRV_GF1_GW_DRAM_IO_LOW, gus->gf1.reg_regsel);
  316. mb();
  317. outw((unsigned short) addr, gus->gf1.reg_data16);
  318. mb();
  319. outb(SNDRV_GF1_GB_DRAM_IO_HIGH, gus->gf1.reg_regsel);
  320. mb();
  321. outb((unsigned char) (addr >> 16), gus->gf1.reg_data8);
  322. mb();
  323. outb(SNDRV_GF1_GW_DRAM_IO16, gus->gf1.reg_regsel);
  324. mb();
  325. res = inw(gus->gf1.reg_data16);
  326. spin_unlock_irqrestore(&gus->reg_lock, flags);
  327. return res;
  328. }
  329. void snd_gf1_dram_setmem(struct snd_gus_card * gus, unsigned int addr,
  330. unsigned short value, unsigned int count)
  331. {
  332. unsigned long port;
  333. unsigned long flags;
  334. #ifdef CONFIG_SND_DEBUG
  335. if (!gus->interwave)
  336. snd_printk(KERN_DEBUG "snd_gf1_dram_setmem - GF1!!!\n");
  337. #endif
  338. addr &= ~1;
  339. count >>= 1;
  340. port = GUSP(gus, GF1DATALOW);
  341. spin_lock_irqsave(&gus->reg_lock, flags);
  342. outb(SNDRV_GF1_GW_DRAM_IO_LOW, gus->gf1.reg_regsel);
  343. mb();
  344. outw((unsigned short) addr, gus->gf1.reg_data16);
  345. mb();
  346. outb(SNDRV_GF1_GB_DRAM_IO_HIGH, gus->gf1.reg_regsel);
  347. mb();
  348. outb((unsigned char) (addr >> 16), gus->gf1.reg_data8);
  349. mb();
  350. outb(SNDRV_GF1_GW_DRAM_IO16, gus->gf1.reg_regsel);
  351. while (count--)
  352. outw(value, port);
  353. spin_unlock_irqrestore(&gus->reg_lock, flags);
  354. }
  355. #endif /* 0 */
  356. void snd_gf1_select_active_voices(struct snd_gus_card * gus)
  357. {
  358. unsigned short voices;
  359. static unsigned short voices_tbl[32 - 14 + 1] =
  360. {
  361. 44100, 41160, 38587, 36317, 34300, 32494, 30870, 29400, 28063, 26843,
  362. 25725, 24696, 23746, 22866, 22050, 21289, 20580, 19916, 19293
  363. };
  364. voices = gus->gf1.active_voices;
  365. if (voices > 32)
  366. voices = 32;
  367. if (voices < 14)
  368. voices = 14;
  369. if (gus->gf1.enh_mode)
  370. voices = 32;
  371. gus->gf1.active_voices = voices;
  372. gus->gf1.playback_freq =
  373. gus->gf1.enh_mode ? 44100 : voices_tbl[voices - 14];
  374. if (!gus->gf1.enh_mode) {
  375. snd_gf1_i_write8(gus, SNDRV_GF1_GB_ACTIVE_VOICES, 0xc0 | (voices - 1));
  376. udelay(100);
  377. }
  378. }
  379. #ifdef CONFIG_SND_DEBUG
  380. void snd_gf1_print_voice_registers(struct snd_gus_card * gus)
  381. {
  382. unsigned char mode;
  383. int voice, ctrl;
  384. voice = gus->gf1.active_voice;
  385. printk(KERN_INFO " -%i- GF1 voice ctrl, ramp ctrl = 0x%x, 0x%x\n", voice, ctrl = snd_gf1_i_read8(gus, 0), snd_gf1_i_read8(gus, 0x0d));
  386. printk(KERN_INFO " -%i- GF1 frequency = 0x%x\n", voice, snd_gf1_i_read16(gus, 1));
  387. printk(KERN_INFO " -%i- GF1 loop start, end = 0x%x (0x%x), 0x%x (0x%x)\n", voice, snd_gf1_i_read_addr(gus, 2, ctrl & 4), snd_gf1_i_read_addr(gus, 2, (ctrl & 4) ^ 4), snd_gf1_i_read_addr(gus, 4, ctrl & 4), snd_gf1_i_read_addr(gus, 4, (ctrl & 4) ^ 4));
  388. printk(KERN_INFO " -%i- GF1 ramp start, end, rate = 0x%x, 0x%x, 0x%x\n", voice, snd_gf1_i_read8(gus, 7), snd_gf1_i_read8(gus, 8), snd_gf1_i_read8(gus, 6));
  389. printk(KERN_INFO" -%i- GF1 volume = 0x%x\n", voice, snd_gf1_i_read16(gus, 9));
  390. printk(KERN_INFO " -%i- GF1 position = 0x%x (0x%x)\n", voice, snd_gf1_i_read_addr(gus, 0x0a, ctrl & 4), snd_gf1_i_read_addr(gus, 0x0a, (ctrl & 4) ^ 4));
  391. if (gus->interwave && snd_gf1_i_read8(gus, 0x19) & 0x01) { /* enhanced mode */
  392. mode = snd_gf1_i_read8(gus, 0x15);
  393. printk(KERN_INFO " -%i- GFA1 mode = 0x%x\n", voice, mode);
  394. if (mode & 0x01) { /* Effect processor */
  395. printk(KERN_INFO " -%i- GFA1 effect address = 0x%x\n", voice, snd_gf1_i_read_addr(gus, 0x11, ctrl & 4));
  396. printk(KERN_INFO " -%i- GFA1 effect volume = 0x%x\n", voice, snd_gf1_i_read16(gus, 0x16));
  397. printk(KERN_INFO " -%i- GFA1 effect volume final = 0x%x\n", voice, snd_gf1_i_read16(gus, 0x1d));
  398. printk(KERN_INFO " -%i- GFA1 effect acumulator = 0x%x\n", voice, snd_gf1_i_read8(gus, 0x14));
  399. }
  400. if (mode & 0x20) {
  401. printk(KERN_INFO " -%i- GFA1 left offset = 0x%x (%i)\n", voice, snd_gf1_i_read16(gus, 0x13), snd_gf1_i_read16(gus, 0x13) >> 4);
  402. printk(KERN_INFO " -%i- GFA1 left offset final = 0x%x (%i)\n", voice, snd_gf1_i_read16(gus, 0x1c), snd_gf1_i_read16(gus, 0x1c) >> 4);
  403. printk(KERN_INFO " -%i- GFA1 right offset = 0x%x (%i)\n", voice, snd_gf1_i_read16(gus, 0x0c), snd_gf1_i_read16(gus, 0x0c) >> 4);
  404. printk(KERN_INFO " -%i- GFA1 right offset final = 0x%x (%i)\n", voice, snd_gf1_i_read16(gus, 0x1b), snd_gf1_i_read16(gus, 0x1b) >> 4);
  405. } else
  406. printk(KERN_INFO " -%i- GF1 pan = 0x%x\n", voice, snd_gf1_i_read8(gus, 0x0c));
  407. } else
  408. printk(KERN_INFO " -%i- GF1 pan = 0x%x\n", voice, snd_gf1_i_read8(gus, 0x0c));
  409. }
  410. #if 0
  411. void snd_gf1_print_global_registers(struct snd_gus_card * gus)
  412. {
  413. unsigned char global_mode = 0x00;
  414. printk(KERN_INFO " -G- GF1 active voices = 0x%x\n", snd_gf1_i_look8(gus, SNDRV_GF1_GB_ACTIVE_VOICES));
  415. if (gus->interwave) {
  416. global_mode = snd_gf1_i_read8(gus, SNDRV_GF1_GB_GLOBAL_MODE);
  417. printk(KERN_INFO " -G- GF1 global mode = 0x%x\n", global_mode);
  418. }
  419. if (global_mode & 0x02) /* LFO enabled? */
  420. printk(KERN_INFO " -G- GF1 LFO base = 0x%x\n", snd_gf1_i_look16(gus, SNDRV_GF1_GW_LFO_BASE));
  421. printk(KERN_INFO " -G- GF1 voices IRQ read = 0x%x\n", snd_gf1_i_look8(gus, SNDRV_GF1_GB_VOICES_IRQ_READ));
  422. printk(KERN_INFO " -G- GF1 DRAM DMA control = 0x%x\n", snd_gf1_i_look8(gus, SNDRV_GF1_GB_DRAM_DMA_CONTROL));
  423. printk(KERN_INFO " -G- GF1 DRAM DMA high/low = 0x%x/0x%x\n", snd_gf1_i_look8(gus, SNDRV_GF1_GB_DRAM_DMA_HIGH), snd_gf1_i_read16(gus, SNDRV_GF1_GW_DRAM_DMA_LOW));
  424. printk(KERN_INFO " -G- GF1 DRAM IO high/low = 0x%x/0x%x\n", snd_gf1_i_look8(gus, SNDRV_GF1_GB_DRAM_IO_HIGH), snd_gf1_i_read16(gus, SNDRV_GF1_GW_DRAM_IO_LOW));
  425. if (!gus->interwave)
  426. printk(KERN_INFO " -G- GF1 record DMA control = 0x%x\n", snd_gf1_i_look8(gus, SNDRV_GF1_GB_REC_DMA_CONTROL));
  427. printk(KERN_INFO " -G- GF1 DRAM IO 16 = 0x%x\n", snd_gf1_i_look16(gus, SNDRV_GF1_GW_DRAM_IO16));
  428. if (gus->gf1.enh_mode) {
  429. printk(KERN_INFO " -G- GFA1 memory config = 0x%x\n", snd_gf1_i_look16(gus, SNDRV_GF1_GW_MEMORY_CONFIG));
  430. printk(KERN_INFO " -G- GFA1 memory control = 0x%x\n", snd_gf1_i_look8(gus, SNDRV_GF1_GB_MEMORY_CONTROL));
  431. printk(KERN_INFO " -G- GFA1 FIFO record base = 0x%x\n", snd_gf1_i_look16(gus, SNDRV_GF1_GW_FIFO_RECORD_BASE_ADDR));
  432. printk(KERN_INFO " -G- GFA1 FIFO playback base = 0x%x\n", snd_gf1_i_look16(gus, SNDRV_GF1_GW_FIFO_PLAY_BASE_ADDR));
  433. printk(KERN_INFO " -G- GFA1 interleave control = 0x%x\n", snd_gf1_i_look16(gus, SNDRV_GF1_GW_INTERLEAVE));
  434. }
  435. }
  436. void snd_gf1_print_setup_registers(struct snd_gus_card * gus)
  437. {
  438. printk(KERN_INFO " -S- mix control = 0x%x\n", inb(GUSP(gus, MIXCNTRLREG)));
  439. printk(KERN_INFO " -S- IRQ status = 0x%x\n", inb(GUSP(gus, IRQSTAT)));
  440. printk(KERN_INFO " -S- timer control = 0x%x\n", inb(GUSP(gus, TIMERCNTRL)));
  441. printk(KERN_INFO " -S- timer data = 0x%x\n", inb(GUSP(gus, TIMERDATA)));
  442. printk(KERN_INFO " -S- status read = 0x%x\n", inb(GUSP(gus, REGCNTRLS)));
  443. printk(KERN_INFO " -S- Sound Blaster control = 0x%x\n", snd_gf1_i_look8(gus, SNDRV_GF1_GB_SOUND_BLASTER_CONTROL));
  444. printk(KERN_INFO " -S- AdLib timer 1/2 = 0x%x/0x%x\n", snd_gf1_i_look8(gus, SNDRV_GF1_GB_ADLIB_TIMER_1), snd_gf1_i_look8(gus, SNDRV_GF1_GB_ADLIB_TIMER_2));
  445. printk(KERN_INFO " -S- reset = 0x%x\n", snd_gf1_i_look8(gus, SNDRV_GF1_GB_RESET));
  446. if (gus->interwave) {
  447. printk(KERN_INFO " -S- compatibility = 0x%x\n", snd_gf1_i_look8(gus, SNDRV_GF1_GB_COMPATIBILITY));
  448. printk(KERN_INFO " -S- decode control = 0x%x\n", snd_gf1_i_look8(gus, SNDRV_GF1_GB_DECODE_CONTROL));
  449. printk(KERN_INFO " -S- version number = 0x%x\n", snd_gf1_i_look8(gus, SNDRV_GF1_GB_VERSION_NUMBER));
  450. printk(KERN_INFO " -S- MPU-401 emul. control A/B = 0x%x/0x%x\n", snd_gf1_i_look8(gus, SNDRV_GF1_GB_MPU401_CONTROL_A), snd_gf1_i_look8(gus, SNDRV_GF1_GB_MPU401_CONTROL_B));
  451. printk(KERN_INFO " -S- emulation IRQ = 0x%x\n", snd_gf1_i_look8(gus, SNDRV_GF1_GB_EMULATION_IRQ));
  452. }
  453. }
  454. void snd_gf1_peek_print_block(struct snd_gus_card * gus, unsigned int addr, int count, int w_16bit)
  455. {
  456. if (!w_16bit) {
  457. while (count-- > 0)
  458. printk(count > 0 ? "%02x:" : "%02x", snd_gf1_peek(gus, addr++));
  459. } else {
  460. while (count-- > 0) {
  461. printk(count > 0 ? "%04x:" : "%04x", snd_gf1_peek(gus, addr) | (snd_gf1_peek(gus, addr + 1) << 8));
  462. addr += 2;
  463. }
  464. }
  465. }
  466. #endif /* 0 */
  467. #endif