sb16_main.c 27 KB

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  1. /*
  2. * Copyright (c) by Jaroslav Kysela <perex@perex.cz>
  3. * Routines for control of 16-bit SoundBlaster cards and clones
  4. * Note: This is very ugly hardware which uses one 8-bit DMA channel and
  5. * second 16-bit DMA channel. Unfortunately 8-bit DMA channel can't
  6. * transfer 16-bit samples and 16-bit DMA channels can't transfer
  7. * 8-bit samples. This make full duplex more complicated than
  8. * can be... People, don't buy these soundcards for full 16-bit
  9. * duplex!!!
  10. * Note: 16-bit wide is assigned to first direction which made request.
  11. * With full duplex - playback is preferred with abstract layer.
  12. *
  13. * Note: Some chip revisions have hardware bug. Changing capture
  14. * channel from full-duplex 8bit DMA to 16bit DMA will block
  15. * 16bit DMA transfers from DSP chip (capture) until 8bit transfer
  16. * to DSP chip (playback) starts. This bug can be avoided with
  17. * "16bit DMA Allocation" setting set to Playback or Capture.
  18. *
  19. *
  20. * This program is free software; you can redistribute it and/or modify
  21. * it under the terms of the GNU General Public License as published by
  22. * the Free Software Foundation; either version 2 of the License, or
  23. * (at your option) any later version.
  24. *
  25. * This program is distributed in the hope that it will be useful,
  26. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  27. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  28. * GNU General Public License for more details.
  29. *
  30. * You should have received a copy of the GNU General Public License
  31. * along with this program; if not, write to the Free Software
  32. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  33. *
  34. */
  35. #include <linux/io.h>
  36. #include <asm/dma.h>
  37. #include <linux/init.h>
  38. #include <linux/time.h>
  39. #include <linux/module.h>
  40. #include <sound/core.h>
  41. #include <sound/sb.h>
  42. #include <sound/sb16_csp.h>
  43. #include <sound/mpu401.h>
  44. #include <sound/control.h>
  45. #include <sound/info.h>
  46. MODULE_AUTHOR("Jaroslav Kysela <perex@perex.cz>");
  47. MODULE_DESCRIPTION("Routines for control of 16-bit SoundBlaster cards and clones");
  48. MODULE_LICENSE("GPL");
  49. #ifdef CONFIG_SND_SB16_CSP
  50. static void snd_sb16_csp_playback_prepare(struct snd_sb *chip, struct snd_pcm_runtime *runtime)
  51. {
  52. if (chip->hardware == SB_HW_16CSP) {
  53. struct snd_sb_csp *csp = chip->csp;
  54. if (csp->running & SNDRV_SB_CSP_ST_LOADED) {
  55. /* manually loaded codec */
  56. if ((csp->mode & SNDRV_SB_CSP_MODE_DSP_WRITE) &&
  57. ((1U << runtime->format) == csp->acc_format)) {
  58. /* Supported runtime PCM format for playback */
  59. if (csp->ops.csp_use(csp) == 0) {
  60. /* If CSP was successfully acquired */
  61. goto __start_CSP;
  62. }
  63. } else if ((csp->mode & SNDRV_SB_CSP_MODE_QSOUND) && (csp->q_enabled)) {
  64. /* QSound decoder is loaded and enabled */
  65. if ((1 << runtime->format) & (SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_U8 |
  66. SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_U16_LE)) {
  67. /* Only for simple PCM formats */
  68. if (csp->ops.csp_use(csp) == 0) {
  69. /* If CSP was successfully acquired */
  70. goto __start_CSP;
  71. }
  72. }
  73. }
  74. } else if (csp->ops.csp_use(csp) == 0) {
  75. /* Acquire CSP and try to autoload hardware codec */
  76. if (csp->ops.csp_autoload(csp, runtime->format, SNDRV_SB_CSP_MODE_DSP_WRITE)) {
  77. /* Unsupported format, release CSP */
  78. csp->ops.csp_unuse(csp);
  79. } else {
  80. __start_CSP:
  81. /* Try to start CSP */
  82. if (csp->ops.csp_start(csp, (chip->mode & SB_MODE_PLAYBACK_16) ?
  83. SNDRV_SB_CSP_SAMPLE_16BIT : SNDRV_SB_CSP_SAMPLE_8BIT,
  84. (runtime->channels > 1) ?
  85. SNDRV_SB_CSP_STEREO : SNDRV_SB_CSP_MONO)) {
  86. /* Failed, release CSP */
  87. csp->ops.csp_unuse(csp);
  88. } else {
  89. /* Success, CSP acquired and running */
  90. chip->open = SNDRV_SB_CSP_MODE_DSP_WRITE;
  91. }
  92. }
  93. }
  94. }
  95. }
  96. static void snd_sb16_csp_capture_prepare(struct snd_sb *chip, struct snd_pcm_runtime *runtime)
  97. {
  98. if (chip->hardware == SB_HW_16CSP) {
  99. struct snd_sb_csp *csp = chip->csp;
  100. if (csp->running & SNDRV_SB_CSP_ST_LOADED) {
  101. /* manually loaded codec */
  102. if ((csp->mode & SNDRV_SB_CSP_MODE_DSP_READ) &&
  103. ((1U << runtime->format) == csp->acc_format)) {
  104. /* Supported runtime PCM format for capture */
  105. if (csp->ops.csp_use(csp) == 0) {
  106. /* If CSP was successfully acquired */
  107. goto __start_CSP;
  108. }
  109. }
  110. } else if (csp->ops.csp_use(csp) == 0) {
  111. /* Acquire CSP and try to autoload hardware codec */
  112. if (csp->ops.csp_autoload(csp, runtime->format, SNDRV_SB_CSP_MODE_DSP_READ)) {
  113. /* Unsupported format, release CSP */
  114. csp->ops.csp_unuse(csp);
  115. } else {
  116. __start_CSP:
  117. /* Try to start CSP */
  118. if (csp->ops.csp_start(csp, (chip->mode & SB_MODE_CAPTURE_16) ?
  119. SNDRV_SB_CSP_SAMPLE_16BIT : SNDRV_SB_CSP_SAMPLE_8BIT,
  120. (runtime->channels > 1) ?
  121. SNDRV_SB_CSP_STEREO : SNDRV_SB_CSP_MONO)) {
  122. /* Failed, release CSP */
  123. csp->ops.csp_unuse(csp);
  124. } else {
  125. /* Success, CSP acquired and running */
  126. chip->open = SNDRV_SB_CSP_MODE_DSP_READ;
  127. }
  128. }
  129. }
  130. }
  131. }
  132. static void snd_sb16_csp_update(struct snd_sb *chip)
  133. {
  134. if (chip->hardware == SB_HW_16CSP) {
  135. struct snd_sb_csp *csp = chip->csp;
  136. if (csp->qpos_changed) {
  137. spin_lock(&chip->reg_lock);
  138. csp->ops.csp_qsound_transfer (csp);
  139. spin_unlock(&chip->reg_lock);
  140. }
  141. }
  142. }
  143. static void snd_sb16_csp_playback_open(struct snd_sb *chip, struct snd_pcm_runtime *runtime)
  144. {
  145. /* CSP decoders (QSound excluded) support only 16bit transfers */
  146. if (chip->hardware == SB_HW_16CSP) {
  147. struct snd_sb_csp *csp = chip->csp;
  148. if (csp->running & SNDRV_SB_CSP_ST_LOADED) {
  149. /* manually loaded codec */
  150. if (csp->mode & SNDRV_SB_CSP_MODE_DSP_WRITE) {
  151. runtime->hw.formats |= csp->acc_format;
  152. }
  153. } else {
  154. /* autoloaded codecs */
  155. runtime->hw.formats |= SNDRV_PCM_FMTBIT_MU_LAW | SNDRV_PCM_FMTBIT_A_LAW |
  156. SNDRV_PCM_FMTBIT_IMA_ADPCM;
  157. }
  158. }
  159. }
  160. static void snd_sb16_csp_playback_close(struct snd_sb *chip)
  161. {
  162. if ((chip->hardware == SB_HW_16CSP) && (chip->open == SNDRV_SB_CSP_MODE_DSP_WRITE)) {
  163. struct snd_sb_csp *csp = chip->csp;
  164. if (csp->ops.csp_stop(csp) == 0) {
  165. csp->ops.csp_unuse(csp);
  166. chip->open = 0;
  167. }
  168. }
  169. }
  170. static void snd_sb16_csp_capture_open(struct snd_sb *chip, struct snd_pcm_runtime *runtime)
  171. {
  172. /* CSP coders support only 16bit transfers */
  173. if (chip->hardware == SB_HW_16CSP) {
  174. struct snd_sb_csp *csp = chip->csp;
  175. if (csp->running & SNDRV_SB_CSP_ST_LOADED) {
  176. /* manually loaded codec */
  177. if (csp->mode & SNDRV_SB_CSP_MODE_DSP_READ) {
  178. runtime->hw.formats |= csp->acc_format;
  179. }
  180. } else {
  181. /* autoloaded codecs */
  182. runtime->hw.formats |= SNDRV_PCM_FMTBIT_MU_LAW | SNDRV_PCM_FMTBIT_A_LAW |
  183. SNDRV_PCM_FMTBIT_IMA_ADPCM;
  184. }
  185. }
  186. }
  187. static void snd_sb16_csp_capture_close(struct snd_sb *chip)
  188. {
  189. if ((chip->hardware == SB_HW_16CSP) && (chip->open == SNDRV_SB_CSP_MODE_DSP_READ)) {
  190. struct snd_sb_csp *csp = chip->csp;
  191. if (csp->ops.csp_stop(csp) == 0) {
  192. csp->ops.csp_unuse(csp);
  193. chip->open = 0;
  194. }
  195. }
  196. }
  197. #else
  198. #define snd_sb16_csp_playback_prepare(chip, runtime) /*nop*/
  199. #define snd_sb16_csp_capture_prepare(chip, runtime) /*nop*/
  200. #define snd_sb16_csp_update(chip) /*nop*/
  201. #define snd_sb16_csp_playback_open(chip, runtime) /*nop*/
  202. #define snd_sb16_csp_playback_close(chip) /*nop*/
  203. #define snd_sb16_csp_capture_open(chip, runtime) /*nop*/
  204. #define snd_sb16_csp_capture_close(chip) /*nop*/
  205. #endif
  206. static void snd_sb16_setup_rate(struct snd_sb *chip,
  207. unsigned short rate,
  208. int channel)
  209. {
  210. unsigned long flags;
  211. spin_lock_irqsave(&chip->reg_lock, flags);
  212. if (chip->mode & (channel == SNDRV_PCM_STREAM_PLAYBACK ? SB_MODE_PLAYBACK_16 : SB_MODE_CAPTURE_16))
  213. snd_sb_ack_16bit(chip);
  214. else
  215. snd_sb_ack_8bit(chip);
  216. if (!(chip->mode & SB_RATE_LOCK)) {
  217. chip->locked_rate = rate;
  218. snd_sbdsp_command(chip, SB_DSP_SAMPLE_RATE_IN);
  219. snd_sbdsp_command(chip, rate >> 8);
  220. snd_sbdsp_command(chip, rate & 0xff);
  221. snd_sbdsp_command(chip, SB_DSP_SAMPLE_RATE_OUT);
  222. snd_sbdsp_command(chip, rate >> 8);
  223. snd_sbdsp_command(chip, rate & 0xff);
  224. }
  225. spin_unlock_irqrestore(&chip->reg_lock, flags);
  226. }
  227. static int snd_sb16_hw_params(struct snd_pcm_substream *substream,
  228. struct snd_pcm_hw_params *hw_params)
  229. {
  230. return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
  231. }
  232. static int snd_sb16_hw_free(struct snd_pcm_substream *substream)
  233. {
  234. snd_pcm_lib_free_pages(substream);
  235. return 0;
  236. }
  237. static int snd_sb16_playback_prepare(struct snd_pcm_substream *substream)
  238. {
  239. unsigned long flags;
  240. struct snd_sb *chip = snd_pcm_substream_chip(substream);
  241. struct snd_pcm_runtime *runtime = substream->runtime;
  242. unsigned char format;
  243. unsigned int size, count, dma;
  244. snd_sb16_csp_playback_prepare(chip, runtime);
  245. if (snd_pcm_format_unsigned(runtime->format) > 0) {
  246. format = runtime->channels > 1 ? SB_DSP4_MODE_UNS_STEREO : SB_DSP4_MODE_UNS_MONO;
  247. } else {
  248. format = runtime->channels > 1 ? SB_DSP4_MODE_SIGN_STEREO : SB_DSP4_MODE_SIGN_MONO;
  249. }
  250. snd_sb16_setup_rate(chip, runtime->rate, SNDRV_PCM_STREAM_PLAYBACK);
  251. size = chip->p_dma_size = snd_pcm_lib_buffer_bytes(substream);
  252. dma = (chip->mode & SB_MODE_PLAYBACK_8) ? chip->dma8 : chip->dma16;
  253. snd_dma_program(dma, runtime->dma_addr, size, DMA_MODE_WRITE | DMA_AUTOINIT);
  254. count = snd_pcm_lib_period_bytes(substream);
  255. spin_lock_irqsave(&chip->reg_lock, flags);
  256. if (chip->mode & SB_MODE_PLAYBACK_16) {
  257. count >>= 1;
  258. count--;
  259. snd_sbdsp_command(chip, SB_DSP4_OUT16_AI);
  260. snd_sbdsp_command(chip, format);
  261. snd_sbdsp_command(chip, count & 0xff);
  262. snd_sbdsp_command(chip, count >> 8);
  263. snd_sbdsp_command(chip, SB_DSP_DMA16_OFF);
  264. } else {
  265. count--;
  266. snd_sbdsp_command(chip, SB_DSP4_OUT8_AI);
  267. snd_sbdsp_command(chip, format);
  268. snd_sbdsp_command(chip, count & 0xff);
  269. snd_sbdsp_command(chip, count >> 8);
  270. snd_sbdsp_command(chip, SB_DSP_DMA8_OFF);
  271. }
  272. spin_unlock_irqrestore(&chip->reg_lock, flags);
  273. return 0;
  274. }
  275. static int snd_sb16_playback_trigger(struct snd_pcm_substream *substream,
  276. int cmd)
  277. {
  278. struct snd_sb *chip = snd_pcm_substream_chip(substream);
  279. int result = 0;
  280. spin_lock(&chip->reg_lock);
  281. switch (cmd) {
  282. case SNDRV_PCM_TRIGGER_START:
  283. case SNDRV_PCM_TRIGGER_RESUME:
  284. chip->mode |= SB_RATE_LOCK_PLAYBACK;
  285. snd_sbdsp_command(chip, chip->mode & SB_MODE_PLAYBACK_16 ? SB_DSP_DMA16_ON : SB_DSP_DMA8_ON);
  286. break;
  287. case SNDRV_PCM_TRIGGER_STOP:
  288. case SNDRV_PCM_TRIGGER_SUSPEND:
  289. snd_sbdsp_command(chip, chip->mode & SB_MODE_PLAYBACK_16 ? SB_DSP_DMA16_OFF : SB_DSP_DMA8_OFF);
  290. /* next two lines are needed for some types of DSP4 (SB AWE 32 - 4.13) */
  291. if (chip->mode & SB_RATE_LOCK_CAPTURE)
  292. snd_sbdsp_command(chip, chip->mode & SB_MODE_CAPTURE_16 ? SB_DSP_DMA16_ON : SB_DSP_DMA8_ON);
  293. chip->mode &= ~SB_RATE_LOCK_PLAYBACK;
  294. break;
  295. default:
  296. result = -EINVAL;
  297. }
  298. spin_unlock(&chip->reg_lock);
  299. return result;
  300. }
  301. static int snd_sb16_capture_prepare(struct snd_pcm_substream *substream)
  302. {
  303. unsigned long flags;
  304. struct snd_sb *chip = snd_pcm_substream_chip(substream);
  305. struct snd_pcm_runtime *runtime = substream->runtime;
  306. unsigned char format;
  307. unsigned int size, count, dma;
  308. snd_sb16_csp_capture_prepare(chip, runtime);
  309. if (snd_pcm_format_unsigned(runtime->format) > 0) {
  310. format = runtime->channels > 1 ? SB_DSP4_MODE_UNS_STEREO : SB_DSP4_MODE_UNS_MONO;
  311. } else {
  312. format = runtime->channels > 1 ? SB_DSP4_MODE_SIGN_STEREO : SB_DSP4_MODE_SIGN_MONO;
  313. }
  314. snd_sb16_setup_rate(chip, runtime->rate, SNDRV_PCM_STREAM_CAPTURE);
  315. size = chip->c_dma_size = snd_pcm_lib_buffer_bytes(substream);
  316. dma = (chip->mode & SB_MODE_CAPTURE_8) ? chip->dma8 : chip->dma16;
  317. snd_dma_program(dma, runtime->dma_addr, size, DMA_MODE_READ | DMA_AUTOINIT);
  318. count = snd_pcm_lib_period_bytes(substream);
  319. spin_lock_irqsave(&chip->reg_lock, flags);
  320. if (chip->mode & SB_MODE_CAPTURE_16) {
  321. count >>= 1;
  322. count--;
  323. snd_sbdsp_command(chip, SB_DSP4_IN16_AI);
  324. snd_sbdsp_command(chip, format);
  325. snd_sbdsp_command(chip, count & 0xff);
  326. snd_sbdsp_command(chip, count >> 8);
  327. snd_sbdsp_command(chip, SB_DSP_DMA16_OFF);
  328. } else {
  329. count--;
  330. snd_sbdsp_command(chip, SB_DSP4_IN8_AI);
  331. snd_sbdsp_command(chip, format);
  332. snd_sbdsp_command(chip, count & 0xff);
  333. snd_sbdsp_command(chip, count >> 8);
  334. snd_sbdsp_command(chip, SB_DSP_DMA8_OFF);
  335. }
  336. spin_unlock_irqrestore(&chip->reg_lock, flags);
  337. return 0;
  338. }
  339. static int snd_sb16_capture_trigger(struct snd_pcm_substream *substream,
  340. int cmd)
  341. {
  342. struct snd_sb *chip = snd_pcm_substream_chip(substream);
  343. int result = 0;
  344. spin_lock(&chip->reg_lock);
  345. switch (cmd) {
  346. case SNDRV_PCM_TRIGGER_START:
  347. case SNDRV_PCM_TRIGGER_RESUME:
  348. chip->mode |= SB_RATE_LOCK_CAPTURE;
  349. snd_sbdsp_command(chip, chip->mode & SB_MODE_CAPTURE_16 ? SB_DSP_DMA16_ON : SB_DSP_DMA8_ON);
  350. break;
  351. case SNDRV_PCM_TRIGGER_STOP:
  352. case SNDRV_PCM_TRIGGER_SUSPEND:
  353. snd_sbdsp_command(chip, chip->mode & SB_MODE_CAPTURE_16 ? SB_DSP_DMA16_OFF : SB_DSP_DMA8_OFF);
  354. /* next two lines are needed for some types of DSP4 (SB AWE 32 - 4.13) */
  355. if (chip->mode & SB_RATE_LOCK_PLAYBACK)
  356. snd_sbdsp_command(chip, chip->mode & SB_MODE_PLAYBACK_16 ? SB_DSP_DMA16_ON : SB_DSP_DMA8_ON);
  357. chip->mode &= ~SB_RATE_LOCK_CAPTURE;
  358. break;
  359. default:
  360. result = -EINVAL;
  361. }
  362. spin_unlock(&chip->reg_lock);
  363. return result;
  364. }
  365. irqreturn_t snd_sb16dsp_interrupt(int irq, void *dev_id)
  366. {
  367. struct snd_sb *chip = dev_id;
  368. unsigned char status;
  369. int ok;
  370. spin_lock(&chip->mixer_lock);
  371. status = snd_sbmixer_read(chip, SB_DSP4_IRQSTATUS);
  372. spin_unlock(&chip->mixer_lock);
  373. if ((status & SB_IRQTYPE_MPUIN) && chip->rmidi_callback)
  374. chip->rmidi_callback(irq, chip->rmidi->private_data);
  375. if (status & SB_IRQTYPE_8BIT) {
  376. ok = 0;
  377. if (chip->mode & SB_MODE_PLAYBACK_8) {
  378. snd_pcm_period_elapsed(chip->playback_substream);
  379. snd_sb16_csp_update(chip);
  380. ok++;
  381. }
  382. if (chip->mode & SB_MODE_CAPTURE_8) {
  383. snd_pcm_period_elapsed(chip->capture_substream);
  384. ok++;
  385. }
  386. spin_lock(&chip->reg_lock);
  387. if (!ok)
  388. snd_sbdsp_command(chip, SB_DSP_DMA8_OFF);
  389. snd_sb_ack_8bit(chip);
  390. spin_unlock(&chip->reg_lock);
  391. }
  392. if (status & SB_IRQTYPE_16BIT) {
  393. ok = 0;
  394. if (chip->mode & SB_MODE_PLAYBACK_16) {
  395. snd_pcm_period_elapsed(chip->playback_substream);
  396. snd_sb16_csp_update(chip);
  397. ok++;
  398. }
  399. if (chip->mode & SB_MODE_CAPTURE_16) {
  400. snd_pcm_period_elapsed(chip->capture_substream);
  401. ok++;
  402. }
  403. spin_lock(&chip->reg_lock);
  404. if (!ok)
  405. snd_sbdsp_command(chip, SB_DSP_DMA16_OFF);
  406. snd_sb_ack_16bit(chip);
  407. spin_unlock(&chip->reg_lock);
  408. }
  409. return IRQ_HANDLED;
  410. }
  411. /*
  412. */
  413. static snd_pcm_uframes_t snd_sb16_playback_pointer(struct snd_pcm_substream *substream)
  414. {
  415. struct snd_sb *chip = snd_pcm_substream_chip(substream);
  416. unsigned int dma;
  417. size_t ptr;
  418. dma = (chip->mode & SB_MODE_PLAYBACK_8) ? chip->dma8 : chip->dma16;
  419. ptr = snd_dma_pointer(dma, chip->p_dma_size);
  420. return bytes_to_frames(substream->runtime, ptr);
  421. }
  422. static snd_pcm_uframes_t snd_sb16_capture_pointer(struct snd_pcm_substream *substream)
  423. {
  424. struct snd_sb *chip = snd_pcm_substream_chip(substream);
  425. unsigned int dma;
  426. size_t ptr;
  427. dma = (chip->mode & SB_MODE_CAPTURE_8) ? chip->dma8 : chip->dma16;
  428. ptr = snd_dma_pointer(dma, chip->c_dma_size);
  429. return bytes_to_frames(substream->runtime, ptr);
  430. }
  431. /*
  432. */
  433. static struct snd_pcm_hardware snd_sb16_playback =
  434. {
  435. .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
  436. SNDRV_PCM_INFO_MMAP_VALID),
  437. .formats = 0,
  438. .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_44100,
  439. .rate_min = 4000,
  440. .rate_max = 44100,
  441. .channels_min = 1,
  442. .channels_max = 2,
  443. .buffer_bytes_max = (128*1024),
  444. .period_bytes_min = 64,
  445. .period_bytes_max = (128*1024),
  446. .periods_min = 1,
  447. .periods_max = 1024,
  448. .fifo_size = 0,
  449. };
  450. static struct snd_pcm_hardware snd_sb16_capture =
  451. {
  452. .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
  453. SNDRV_PCM_INFO_MMAP_VALID),
  454. .formats = 0,
  455. .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_44100,
  456. .rate_min = 4000,
  457. .rate_max = 44100,
  458. .channels_min = 1,
  459. .channels_max = 2,
  460. .buffer_bytes_max = (128*1024),
  461. .period_bytes_min = 64,
  462. .period_bytes_max = (128*1024),
  463. .periods_min = 1,
  464. .periods_max = 1024,
  465. .fifo_size = 0,
  466. };
  467. /*
  468. * open/close
  469. */
  470. static int snd_sb16_playback_open(struct snd_pcm_substream *substream)
  471. {
  472. unsigned long flags;
  473. struct snd_sb *chip = snd_pcm_substream_chip(substream);
  474. struct snd_pcm_runtime *runtime = substream->runtime;
  475. spin_lock_irqsave(&chip->open_lock, flags);
  476. if (chip->mode & SB_MODE_PLAYBACK) {
  477. spin_unlock_irqrestore(&chip->open_lock, flags);
  478. return -EAGAIN;
  479. }
  480. runtime->hw = snd_sb16_playback;
  481. /* skip if 16 bit DMA was reserved for capture */
  482. if (chip->force_mode16 & SB_MODE_CAPTURE_16)
  483. goto __skip_16bit;
  484. if (chip->dma16 >= 0 && !(chip->mode & SB_MODE_CAPTURE_16)) {
  485. chip->mode |= SB_MODE_PLAYBACK_16;
  486. runtime->hw.formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_U16_LE;
  487. /* Vibra16X hack */
  488. if (chip->dma16 <= 3) {
  489. runtime->hw.buffer_bytes_max =
  490. runtime->hw.period_bytes_max = 64 * 1024;
  491. } else {
  492. snd_sb16_csp_playback_open(chip, runtime);
  493. }
  494. goto __open_ok;
  495. }
  496. __skip_16bit:
  497. if (chip->dma8 >= 0 && !(chip->mode & SB_MODE_CAPTURE_8)) {
  498. chip->mode |= SB_MODE_PLAYBACK_8;
  499. /* DSP v 4.xx can transfer 16bit data through 8bit DMA channel, SBHWPG 2-7 */
  500. if (chip->dma16 < 0) {
  501. runtime->hw.formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_U16_LE;
  502. chip->mode |= SB_MODE_PLAYBACK_16;
  503. } else {
  504. runtime->hw.formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S8;
  505. }
  506. runtime->hw.buffer_bytes_max =
  507. runtime->hw.period_bytes_max = 64 * 1024;
  508. goto __open_ok;
  509. }
  510. spin_unlock_irqrestore(&chip->open_lock, flags);
  511. return -EAGAIN;
  512. __open_ok:
  513. if (chip->hardware == SB_HW_ALS100)
  514. runtime->hw.rate_max = 48000;
  515. if (chip->hardware == SB_HW_CS5530) {
  516. runtime->hw.buffer_bytes_max = 32 * 1024;
  517. runtime->hw.periods_min = 2;
  518. runtime->hw.rate_min = 44100;
  519. }
  520. if (chip->mode & SB_RATE_LOCK)
  521. runtime->hw.rate_min = runtime->hw.rate_max = chip->locked_rate;
  522. chip->playback_substream = substream;
  523. spin_unlock_irqrestore(&chip->open_lock, flags);
  524. return 0;
  525. }
  526. static int snd_sb16_playback_close(struct snd_pcm_substream *substream)
  527. {
  528. unsigned long flags;
  529. struct snd_sb *chip = snd_pcm_substream_chip(substream);
  530. snd_sb16_csp_playback_close(chip);
  531. spin_lock_irqsave(&chip->open_lock, flags);
  532. chip->playback_substream = NULL;
  533. chip->mode &= ~SB_MODE_PLAYBACK;
  534. spin_unlock_irqrestore(&chip->open_lock, flags);
  535. return 0;
  536. }
  537. static int snd_sb16_capture_open(struct snd_pcm_substream *substream)
  538. {
  539. unsigned long flags;
  540. struct snd_sb *chip = snd_pcm_substream_chip(substream);
  541. struct snd_pcm_runtime *runtime = substream->runtime;
  542. spin_lock_irqsave(&chip->open_lock, flags);
  543. if (chip->mode & SB_MODE_CAPTURE) {
  544. spin_unlock_irqrestore(&chip->open_lock, flags);
  545. return -EAGAIN;
  546. }
  547. runtime->hw = snd_sb16_capture;
  548. /* skip if 16 bit DMA was reserved for playback */
  549. if (chip->force_mode16 & SB_MODE_PLAYBACK_16)
  550. goto __skip_16bit;
  551. if (chip->dma16 >= 0 && !(chip->mode & SB_MODE_PLAYBACK_16)) {
  552. chip->mode |= SB_MODE_CAPTURE_16;
  553. runtime->hw.formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_U16_LE;
  554. /* Vibra16X hack */
  555. if (chip->dma16 <= 3) {
  556. runtime->hw.buffer_bytes_max =
  557. runtime->hw.period_bytes_max = 64 * 1024;
  558. } else {
  559. snd_sb16_csp_capture_open(chip, runtime);
  560. }
  561. goto __open_ok;
  562. }
  563. __skip_16bit:
  564. if (chip->dma8 >= 0 && !(chip->mode & SB_MODE_PLAYBACK_8)) {
  565. chip->mode |= SB_MODE_CAPTURE_8;
  566. /* DSP v 4.xx can transfer 16bit data through 8bit DMA channel, SBHWPG 2-7 */
  567. if (chip->dma16 < 0) {
  568. runtime->hw.formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_U16_LE;
  569. chip->mode |= SB_MODE_CAPTURE_16;
  570. } else {
  571. runtime->hw.formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S8;
  572. }
  573. runtime->hw.buffer_bytes_max =
  574. runtime->hw.period_bytes_max = 64 * 1024;
  575. goto __open_ok;
  576. }
  577. spin_unlock_irqrestore(&chip->open_lock, flags);
  578. return -EAGAIN;
  579. __open_ok:
  580. if (chip->hardware == SB_HW_ALS100)
  581. runtime->hw.rate_max = 48000;
  582. if (chip->hardware == SB_HW_CS5530) {
  583. runtime->hw.buffer_bytes_max = 32 * 1024;
  584. runtime->hw.periods_min = 2;
  585. runtime->hw.rate_min = 44100;
  586. }
  587. if (chip->mode & SB_RATE_LOCK)
  588. runtime->hw.rate_min = runtime->hw.rate_max = chip->locked_rate;
  589. chip->capture_substream = substream;
  590. spin_unlock_irqrestore(&chip->open_lock, flags);
  591. return 0;
  592. }
  593. static int snd_sb16_capture_close(struct snd_pcm_substream *substream)
  594. {
  595. unsigned long flags;
  596. struct snd_sb *chip = snd_pcm_substream_chip(substream);
  597. snd_sb16_csp_capture_close(chip);
  598. spin_lock_irqsave(&chip->open_lock, flags);
  599. chip->capture_substream = NULL;
  600. chip->mode &= ~SB_MODE_CAPTURE;
  601. spin_unlock_irqrestore(&chip->open_lock, flags);
  602. return 0;
  603. }
  604. /*
  605. * DMA control interface
  606. */
  607. static int snd_sb16_set_dma_mode(struct snd_sb *chip, int what)
  608. {
  609. if (chip->dma8 < 0 || chip->dma16 < 0) {
  610. if (snd_BUG_ON(what))
  611. return -EINVAL;
  612. return 0;
  613. }
  614. if (what == 0) {
  615. chip->force_mode16 = 0;
  616. } else if (what == 1) {
  617. chip->force_mode16 = SB_MODE_PLAYBACK_16;
  618. } else if (what == 2) {
  619. chip->force_mode16 = SB_MODE_CAPTURE_16;
  620. } else {
  621. return -EINVAL;
  622. }
  623. return 0;
  624. }
  625. static int snd_sb16_get_dma_mode(struct snd_sb *chip)
  626. {
  627. if (chip->dma8 < 0 || chip->dma16 < 0)
  628. return 0;
  629. switch (chip->force_mode16) {
  630. case SB_MODE_PLAYBACK_16:
  631. return 1;
  632. case SB_MODE_CAPTURE_16:
  633. return 2;
  634. default:
  635. return 0;
  636. }
  637. }
  638. static int snd_sb16_dma_control_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  639. {
  640. static const char * const texts[3] = {
  641. "Auto", "Playback", "Capture"
  642. };
  643. return snd_ctl_enum_info(uinfo, 1, 3, texts);
  644. }
  645. static int snd_sb16_dma_control_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  646. {
  647. struct snd_sb *chip = snd_kcontrol_chip(kcontrol);
  648. unsigned long flags;
  649. spin_lock_irqsave(&chip->reg_lock, flags);
  650. ucontrol->value.enumerated.item[0] = snd_sb16_get_dma_mode(chip);
  651. spin_unlock_irqrestore(&chip->reg_lock, flags);
  652. return 0;
  653. }
  654. static int snd_sb16_dma_control_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  655. {
  656. struct snd_sb *chip = snd_kcontrol_chip(kcontrol);
  657. unsigned long flags;
  658. unsigned char nval, oval;
  659. int change;
  660. if ((nval = ucontrol->value.enumerated.item[0]) > 2)
  661. return -EINVAL;
  662. spin_lock_irqsave(&chip->reg_lock, flags);
  663. oval = snd_sb16_get_dma_mode(chip);
  664. change = nval != oval;
  665. snd_sb16_set_dma_mode(chip, nval);
  666. spin_unlock_irqrestore(&chip->reg_lock, flags);
  667. return change;
  668. }
  669. static struct snd_kcontrol_new snd_sb16_dma_control = {
  670. .iface = SNDRV_CTL_ELEM_IFACE_CARD,
  671. .name = "16-bit DMA Allocation",
  672. .info = snd_sb16_dma_control_info,
  673. .get = snd_sb16_dma_control_get,
  674. .put = snd_sb16_dma_control_put
  675. };
  676. /*
  677. * Initialization part
  678. */
  679. int snd_sb16dsp_configure(struct snd_sb * chip)
  680. {
  681. unsigned long flags;
  682. unsigned char irqreg = 0, dmareg = 0, mpureg;
  683. unsigned char realirq, realdma, realmpureg;
  684. /* note: mpu register should be present only on SB16 Vibra soundcards */
  685. // printk(KERN_DEBUG "codec->irq=%i, codec->dma8=%i, codec->dma16=%i\n", chip->irq, chip->dma8, chip->dma16);
  686. spin_lock_irqsave(&chip->mixer_lock, flags);
  687. mpureg = snd_sbmixer_read(chip, SB_DSP4_MPUSETUP) & ~0x06;
  688. spin_unlock_irqrestore(&chip->mixer_lock, flags);
  689. switch (chip->irq) {
  690. case 2:
  691. case 9:
  692. irqreg |= SB_IRQSETUP_IRQ9;
  693. break;
  694. case 5:
  695. irqreg |= SB_IRQSETUP_IRQ5;
  696. break;
  697. case 7:
  698. irqreg |= SB_IRQSETUP_IRQ7;
  699. break;
  700. case 10:
  701. irqreg |= SB_IRQSETUP_IRQ10;
  702. break;
  703. default:
  704. return -EINVAL;
  705. }
  706. if (chip->dma8 >= 0) {
  707. switch (chip->dma8) {
  708. case 0:
  709. dmareg |= SB_DMASETUP_DMA0;
  710. break;
  711. case 1:
  712. dmareg |= SB_DMASETUP_DMA1;
  713. break;
  714. case 3:
  715. dmareg |= SB_DMASETUP_DMA3;
  716. break;
  717. default:
  718. return -EINVAL;
  719. }
  720. }
  721. if (chip->dma16 >= 0 && chip->dma16 != chip->dma8) {
  722. switch (chip->dma16) {
  723. case 5:
  724. dmareg |= SB_DMASETUP_DMA5;
  725. break;
  726. case 6:
  727. dmareg |= SB_DMASETUP_DMA6;
  728. break;
  729. case 7:
  730. dmareg |= SB_DMASETUP_DMA7;
  731. break;
  732. default:
  733. return -EINVAL;
  734. }
  735. }
  736. switch (chip->mpu_port) {
  737. case 0x300:
  738. mpureg |= 0x04;
  739. break;
  740. case 0x330:
  741. mpureg |= 0x00;
  742. break;
  743. default:
  744. mpureg |= 0x02; /* disable MPU */
  745. }
  746. spin_lock_irqsave(&chip->mixer_lock, flags);
  747. snd_sbmixer_write(chip, SB_DSP4_IRQSETUP, irqreg);
  748. realirq = snd_sbmixer_read(chip, SB_DSP4_IRQSETUP);
  749. snd_sbmixer_write(chip, SB_DSP4_DMASETUP, dmareg);
  750. realdma = snd_sbmixer_read(chip, SB_DSP4_DMASETUP);
  751. snd_sbmixer_write(chip, SB_DSP4_MPUSETUP, mpureg);
  752. realmpureg = snd_sbmixer_read(chip, SB_DSP4_MPUSETUP);
  753. spin_unlock_irqrestore(&chip->mixer_lock, flags);
  754. if ((~realirq) & irqreg || (~realdma) & dmareg) {
  755. snd_printk(KERN_ERR "SB16 [0x%lx]: unable to set DMA & IRQ (PnP device?)\n", chip->port);
  756. snd_printk(KERN_ERR "SB16 [0x%lx]: wanted: irqreg=0x%x, dmareg=0x%x, mpureg = 0x%x\n", chip->port, realirq, realdma, realmpureg);
  757. snd_printk(KERN_ERR "SB16 [0x%lx]: got: irqreg=0x%x, dmareg=0x%x, mpureg = 0x%x\n", chip->port, irqreg, dmareg, mpureg);
  758. return -ENODEV;
  759. }
  760. return 0;
  761. }
  762. static struct snd_pcm_ops snd_sb16_playback_ops = {
  763. .open = snd_sb16_playback_open,
  764. .close = snd_sb16_playback_close,
  765. .ioctl = snd_pcm_lib_ioctl,
  766. .hw_params = snd_sb16_hw_params,
  767. .hw_free = snd_sb16_hw_free,
  768. .prepare = snd_sb16_playback_prepare,
  769. .trigger = snd_sb16_playback_trigger,
  770. .pointer = snd_sb16_playback_pointer,
  771. };
  772. static struct snd_pcm_ops snd_sb16_capture_ops = {
  773. .open = snd_sb16_capture_open,
  774. .close = snd_sb16_capture_close,
  775. .ioctl = snd_pcm_lib_ioctl,
  776. .hw_params = snd_sb16_hw_params,
  777. .hw_free = snd_sb16_hw_free,
  778. .prepare = snd_sb16_capture_prepare,
  779. .trigger = snd_sb16_capture_trigger,
  780. .pointer = snd_sb16_capture_pointer,
  781. };
  782. int snd_sb16dsp_pcm(struct snd_sb *chip, int device)
  783. {
  784. struct snd_card *card = chip->card;
  785. struct snd_pcm *pcm;
  786. int err;
  787. if ((err = snd_pcm_new(card, "SB16 DSP", device, 1, 1, &pcm)) < 0)
  788. return err;
  789. sprintf(pcm->name, "DSP v%i.%i", chip->version >> 8, chip->version & 0xff);
  790. pcm->info_flags = SNDRV_PCM_INFO_JOINT_DUPLEX;
  791. pcm->private_data = chip;
  792. chip->pcm = pcm;
  793. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_sb16_playback_ops);
  794. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_sb16_capture_ops);
  795. if (chip->dma16 >= 0 && chip->dma8 != chip->dma16)
  796. snd_ctl_add(card, snd_ctl_new1(&snd_sb16_dma_control, chip));
  797. else
  798. pcm->info_flags = SNDRV_PCM_INFO_HALF_DUPLEX;
  799. snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
  800. snd_dma_isa_data(),
  801. 64*1024, 128*1024);
  802. return 0;
  803. }
  804. const struct snd_pcm_ops *snd_sb16dsp_get_pcm_ops(int direction)
  805. {
  806. return direction == SNDRV_PCM_STREAM_PLAYBACK ?
  807. &snd_sb16_playback_ops : &snd_sb16_capture_ops;
  808. }
  809. EXPORT_SYMBOL(snd_sb16dsp_pcm);
  810. EXPORT_SYMBOL(snd_sb16dsp_get_pcm_ops);
  811. EXPORT_SYMBOL(snd_sb16dsp_configure);
  812. EXPORT_SYMBOL(snd_sb16dsp_interrupt);
  813. /*
  814. * INIT part
  815. */
  816. static int __init alsa_sb16_init(void)
  817. {
  818. return 0;
  819. }
  820. static void __exit alsa_sb16_exit(void)
  821. {
  822. }
  823. module_init(alsa_sb16_init)
  824. module_exit(alsa_sb16_exit)