irq.c 6.6 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213
  1. /*
  2. * Copyright (c) by Jaroslav Kysela <perex@perex.cz>
  3. * Creative Labs, Inc.
  4. * Routines for IRQ control of EMU10K1 chips
  5. *
  6. * BUGS:
  7. * --
  8. *
  9. * TODO:
  10. * --
  11. *
  12. * This program is free software; you can redistribute it and/or modify
  13. * it under the terms of the GNU General Public License as published by
  14. * the Free Software Foundation; either version 2 of the License, or
  15. * (at your option) any later version.
  16. *
  17. * This program is distributed in the hope that it will be useful,
  18. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  19. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  20. * GNU General Public License for more details.
  21. *
  22. * You should have received a copy of the GNU General Public License
  23. * along with this program; if not, write to the Free Software
  24. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  25. *
  26. */
  27. #include <linux/time.h>
  28. #include <sound/core.h>
  29. #include <sound/emu10k1.h>
  30. irqreturn_t snd_emu10k1_interrupt(int irq, void *dev_id)
  31. {
  32. struct snd_emu10k1 *emu = dev_id;
  33. unsigned int status, status2, orig_status, orig_status2;
  34. int handled = 0;
  35. int timeout = 0;
  36. while (((status = inl(emu->port + IPR)) != 0) && (timeout < 1000)) {
  37. timeout++;
  38. orig_status = status;
  39. handled = 1;
  40. if ((status & 0xffffffff) == 0xffffffff) {
  41. dev_info(emu->card->dev,
  42. "Suspected sound card removal\n");
  43. break;
  44. }
  45. if (status & IPR_PCIERROR) {
  46. dev_err(emu->card->dev, "interrupt: PCI error\n");
  47. snd_emu10k1_intr_disable(emu, INTE_PCIERRORENABLE);
  48. status &= ~IPR_PCIERROR;
  49. }
  50. if (status & (IPR_VOLINCR|IPR_VOLDECR|IPR_MUTE)) {
  51. if (emu->hwvol_interrupt)
  52. emu->hwvol_interrupt(emu, status);
  53. else
  54. snd_emu10k1_intr_disable(emu, INTE_VOLINCRENABLE|INTE_VOLDECRENABLE|INTE_MUTEENABLE);
  55. status &= ~(IPR_VOLINCR|IPR_VOLDECR|IPR_MUTE);
  56. }
  57. if (status & IPR_CHANNELLOOP) {
  58. int voice;
  59. int voice_max = status & IPR_CHANNELNUMBERMASK;
  60. u32 val;
  61. struct snd_emu10k1_voice *pvoice = emu->voices;
  62. val = snd_emu10k1_ptr_read(emu, CLIPL, 0);
  63. for (voice = 0; voice <= voice_max; voice++) {
  64. if (voice == 0x20)
  65. val = snd_emu10k1_ptr_read(emu, CLIPH, 0);
  66. if (val & 1) {
  67. if (pvoice->use && pvoice->interrupt != NULL) {
  68. pvoice->interrupt(emu, pvoice);
  69. snd_emu10k1_voice_intr_ack(emu, voice);
  70. } else {
  71. snd_emu10k1_voice_intr_disable(emu, voice);
  72. }
  73. }
  74. val >>= 1;
  75. pvoice++;
  76. }
  77. val = snd_emu10k1_ptr_read(emu, HLIPL, 0);
  78. for (voice = 0; voice <= voice_max; voice++) {
  79. if (voice == 0x20)
  80. val = snd_emu10k1_ptr_read(emu, HLIPH, 0);
  81. if (val & 1) {
  82. if (pvoice->use && pvoice->interrupt != NULL) {
  83. pvoice->interrupt(emu, pvoice);
  84. snd_emu10k1_voice_half_loop_intr_ack(emu, voice);
  85. } else {
  86. snd_emu10k1_voice_half_loop_intr_disable(emu, voice);
  87. }
  88. }
  89. val >>= 1;
  90. pvoice++;
  91. }
  92. status &= ~IPR_CHANNELLOOP;
  93. }
  94. status &= ~IPR_CHANNELNUMBERMASK;
  95. if (status & (IPR_ADCBUFFULL|IPR_ADCBUFHALFFULL)) {
  96. if (emu->capture_interrupt)
  97. emu->capture_interrupt(emu, status);
  98. else
  99. snd_emu10k1_intr_disable(emu, INTE_ADCBUFENABLE);
  100. status &= ~(IPR_ADCBUFFULL|IPR_ADCBUFHALFFULL);
  101. }
  102. if (status & (IPR_MICBUFFULL|IPR_MICBUFHALFFULL)) {
  103. if (emu->capture_mic_interrupt)
  104. emu->capture_mic_interrupt(emu, status);
  105. else
  106. snd_emu10k1_intr_disable(emu, INTE_MICBUFENABLE);
  107. status &= ~(IPR_MICBUFFULL|IPR_MICBUFHALFFULL);
  108. }
  109. if (status & (IPR_EFXBUFFULL|IPR_EFXBUFHALFFULL)) {
  110. if (emu->capture_efx_interrupt)
  111. emu->capture_efx_interrupt(emu, status);
  112. else
  113. snd_emu10k1_intr_disable(emu, INTE_EFXBUFENABLE);
  114. status &= ~(IPR_EFXBUFFULL|IPR_EFXBUFHALFFULL);
  115. }
  116. if (status & (IPR_MIDITRANSBUFEMPTY|IPR_MIDIRECVBUFEMPTY)) {
  117. if (emu->midi.interrupt)
  118. emu->midi.interrupt(emu, status);
  119. else
  120. snd_emu10k1_intr_disable(emu, INTE_MIDITXENABLE|INTE_MIDIRXENABLE);
  121. status &= ~(IPR_MIDITRANSBUFEMPTY|IPR_MIDIRECVBUFEMPTY);
  122. }
  123. if (status & (IPR_A_MIDITRANSBUFEMPTY2|IPR_A_MIDIRECVBUFEMPTY2)) {
  124. if (emu->midi2.interrupt)
  125. emu->midi2.interrupt(emu, status);
  126. else
  127. snd_emu10k1_intr_disable(emu, INTE_A_MIDITXENABLE2|INTE_A_MIDIRXENABLE2);
  128. status &= ~(IPR_A_MIDITRANSBUFEMPTY2|IPR_A_MIDIRECVBUFEMPTY2);
  129. }
  130. if (status & IPR_INTERVALTIMER) {
  131. if (emu->timer)
  132. snd_timer_interrupt(emu->timer, emu->timer->sticks);
  133. else
  134. snd_emu10k1_intr_disable(emu, INTE_INTERVALTIMERENB);
  135. status &= ~IPR_INTERVALTIMER;
  136. }
  137. if (status & (IPR_GPSPDIFSTATUSCHANGE|IPR_CDROMSTATUSCHANGE)) {
  138. if (emu->spdif_interrupt)
  139. emu->spdif_interrupt(emu, status);
  140. else
  141. snd_emu10k1_intr_disable(emu, INTE_GPSPDIFENABLE|INTE_CDSPDIFENABLE);
  142. status &= ~(IPR_GPSPDIFSTATUSCHANGE|IPR_CDROMSTATUSCHANGE);
  143. }
  144. if (status & IPR_FXDSP) {
  145. if (emu->dsp_interrupt)
  146. emu->dsp_interrupt(emu);
  147. else
  148. snd_emu10k1_intr_disable(emu, INTE_FXDSPENABLE);
  149. status &= ~IPR_FXDSP;
  150. }
  151. if (status & IPR_P16V) {
  152. while ((status2 = inl(emu->port + IPR2)) != 0) {
  153. u32 mask = INTE2_PLAYBACK_CH_0_LOOP; /* Full Loop */
  154. struct snd_emu10k1_voice *pvoice = &(emu->p16v_voices[0]);
  155. struct snd_emu10k1_voice *cvoice = &(emu->p16v_capture_voice);
  156. /* dev_dbg(emu->card->dev, "status2=0x%x\n", status2); */
  157. orig_status2 = status2;
  158. if(status2 & mask) {
  159. if(pvoice->use) {
  160. snd_pcm_period_elapsed(pvoice->epcm->substream);
  161. } else {
  162. dev_err(emu->card->dev,
  163. "p16v: status: 0x%08x, mask=0x%08x, pvoice=%p, use=%d\n",
  164. status2, mask, pvoice,
  165. pvoice->use);
  166. }
  167. }
  168. if(status2 & 0x110000) {
  169. /* dev_info(emu->card->dev, "capture int found\n"); */
  170. if(cvoice->use) {
  171. /* dev_info(emu->card->dev, "capture period_elapsed\n"); */
  172. snd_pcm_period_elapsed(cvoice->epcm->substream);
  173. }
  174. }
  175. outl(orig_status2, emu->port + IPR2); /* ack all */
  176. }
  177. status &= ~IPR_P16V;
  178. }
  179. if (status) {
  180. unsigned int bits;
  181. dev_err(emu->card->dev,
  182. "unhandled interrupt: 0x%08x\n", status);
  183. //make sure any interrupts we don't handle are disabled:
  184. bits = INTE_FXDSPENABLE |
  185. INTE_PCIERRORENABLE |
  186. INTE_VOLINCRENABLE |
  187. INTE_VOLDECRENABLE |
  188. INTE_MUTEENABLE |
  189. INTE_MICBUFENABLE |
  190. INTE_ADCBUFENABLE |
  191. INTE_EFXBUFENABLE |
  192. INTE_GPSPDIFENABLE |
  193. INTE_CDSPDIFENABLE |
  194. INTE_INTERVALTIMERENB |
  195. INTE_MIDITXENABLE |
  196. INTE_MIDIRXENABLE;
  197. if (emu->audigy)
  198. bits |= INTE_A_MIDITXENABLE2 | INTE_A_MIDIRXENABLE2;
  199. snd_emu10k1_intr_disable(emu, bits);
  200. }
  201. outl(orig_status, emu->port + IPR); /* ack all */
  202. }
  203. if (timeout == 1000)
  204. dev_info(emu->card->dev, "emu10k1 irq routine failure\n");
  205. return IRQ_RETVAL(handled);
  206. }