patch_cirrus.c 33 KB

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  1. /*
  2. * HD audio interface patch for Cirrus Logic CS420x chip
  3. *
  4. * Copyright (c) 2009 Takashi Iwai <tiwai@suse.de>
  5. *
  6. * This driver is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or
  9. * (at your option) any later version.
  10. *
  11. * This driver is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program; if not, write to the Free Software
  18. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  19. */
  20. #include <linux/init.h>
  21. #include <linux/slab.h>
  22. #include <linux/module.h>
  23. #include <sound/core.h>
  24. #include <sound/tlv.h>
  25. #include "hda_codec.h"
  26. #include "hda_local.h"
  27. #include "hda_auto_parser.h"
  28. #include "hda_jack.h"
  29. #include "hda_generic.h"
  30. /*
  31. */
  32. struct cs_spec {
  33. struct hda_gen_spec gen;
  34. unsigned int gpio_mask;
  35. unsigned int gpio_dir;
  36. unsigned int gpio_data;
  37. unsigned int gpio_eapd_hp; /* EAPD GPIO bit for headphones */
  38. unsigned int gpio_eapd_speaker; /* EAPD GPIO bit for speakers */
  39. /* CS421x */
  40. unsigned int spdif_detect:1;
  41. unsigned int spdif_present:1;
  42. unsigned int sense_b:1;
  43. hda_nid_t vendor_nid;
  44. /* for MBP SPDIF control */
  45. int (*spdif_sw_put)(struct snd_kcontrol *kcontrol,
  46. struct snd_ctl_elem_value *ucontrol);
  47. };
  48. /* available models with CS420x */
  49. enum {
  50. CS420X_MBP53,
  51. CS420X_MBP55,
  52. CS420X_IMAC27,
  53. CS420X_GPIO_13,
  54. CS420X_GPIO_23,
  55. CS420X_MBP101,
  56. CS420X_MBP81,
  57. CS420X_MBA42,
  58. CS420X_AUTO,
  59. /* aliases */
  60. CS420X_IMAC27_122 = CS420X_GPIO_23,
  61. CS420X_APPLE = CS420X_GPIO_13,
  62. };
  63. /* CS421x boards */
  64. enum {
  65. CS421X_CDB4210,
  66. CS421X_SENSE_B,
  67. CS421X_STUMPY,
  68. };
  69. /* Vendor-specific processing widget */
  70. #define CS420X_VENDOR_NID 0x11
  71. #define CS_DIG_OUT1_PIN_NID 0x10
  72. #define CS_DIG_OUT2_PIN_NID 0x15
  73. #define CS_DMIC1_PIN_NID 0x0e
  74. #define CS_DMIC2_PIN_NID 0x12
  75. /* coef indices */
  76. #define IDX_SPDIF_STAT 0x0000
  77. #define IDX_SPDIF_CTL 0x0001
  78. #define IDX_ADC_CFG 0x0002
  79. /* SZC bitmask, 4 modes below:
  80. * 0 = immediate,
  81. * 1 = digital immediate, analog zero-cross
  82. * 2 = digtail & analog soft-ramp
  83. * 3 = digital soft-ramp, analog zero-cross
  84. */
  85. #define CS_COEF_ADC_SZC_MASK (3 << 0)
  86. #define CS_COEF_ADC_MIC_SZC_MODE (3 << 0) /* SZC setup for mic */
  87. #define CS_COEF_ADC_LI_SZC_MODE (3 << 0) /* SZC setup for line-in */
  88. /* PGA mode: 0 = differential, 1 = signle-ended */
  89. #define CS_COEF_ADC_MIC_PGA_MODE (1 << 5) /* PGA setup for mic */
  90. #define CS_COEF_ADC_LI_PGA_MODE (1 << 6) /* PGA setup for line-in */
  91. #define IDX_DAC_CFG 0x0003
  92. /* SZC bitmask, 4 modes below:
  93. * 0 = Immediate
  94. * 1 = zero-cross
  95. * 2 = soft-ramp
  96. * 3 = soft-ramp on zero-cross
  97. */
  98. #define CS_COEF_DAC_HP_SZC_MODE (3 << 0) /* nid 0x02 */
  99. #define CS_COEF_DAC_LO_SZC_MODE (3 << 2) /* nid 0x03 */
  100. #define CS_COEF_DAC_SPK_SZC_MODE (3 << 4) /* nid 0x04 */
  101. #define IDX_BEEP_CFG 0x0004
  102. /* 0x0008 - test reg key */
  103. /* 0x0009 - 0x0014 -> 12 test regs */
  104. /* 0x0015 - visibility reg */
  105. /* Cirrus Logic CS4208 */
  106. #define CS4208_VENDOR_NID 0x24
  107. /*
  108. * Cirrus Logic CS4210
  109. *
  110. * 1 DAC => HP(sense) / Speakers,
  111. * 1 ADC <= LineIn(sense) / MicIn / DMicIn,
  112. * 1 SPDIF OUT => SPDIF Trasmitter(sense)
  113. */
  114. #define CS4210_DAC_NID 0x02
  115. #define CS4210_ADC_NID 0x03
  116. #define CS4210_VENDOR_NID 0x0B
  117. #define CS421X_DMIC_PIN_NID 0x09 /* Port E */
  118. #define CS421X_SPDIF_PIN_NID 0x0A /* Port H */
  119. #define CS421X_IDX_DEV_CFG 0x01
  120. #define CS421X_IDX_ADC_CFG 0x02
  121. #define CS421X_IDX_DAC_CFG 0x03
  122. #define CS421X_IDX_SPK_CTL 0x04
  123. /* Cirrus Logic CS4213 is like CS4210 but does not have SPDIF input/output */
  124. #define CS4213_VENDOR_NID 0x09
  125. static inline int cs_vendor_coef_get(struct hda_codec *codec, unsigned int idx)
  126. {
  127. struct cs_spec *spec = codec->spec;
  128. snd_hda_codec_write(codec, spec->vendor_nid, 0,
  129. AC_VERB_SET_COEF_INDEX, idx);
  130. return snd_hda_codec_read(codec, spec->vendor_nid, 0,
  131. AC_VERB_GET_PROC_COEF, 0);
  132. }
  133. static inline void cs_vendor_coef_set(struct hda_codec *codec, unsigned int idx,
  134. unsigned int coef)
  135. {
  136. struct cs_spec *spec = codec->spec;
  137. snd_hda_codec_write(codec, spec->vendor_nid, 0,
  138. AC_VERB_SET_COEF_INDEX, idx);
  139. snd_hda_codec_write(codec, spec->vendor_nid, 0,
  140. AC_VERB_SET_PROC_COEF, coef);
  141. }
  142. /*
  143. * auto-mute and auto-mic switching
  144. * CS421x auto-output redirecting
  145. * HP/SPK/SPDIF
  146. */
  147. static void cs_automute(struct hda_codec *codec)
  148. {
  149. struct cs_spec *spec = codec->spec;
  150. /* mute HPs if spdif jack (SENSE_B) is present */
  151. spec->gen.master_mute = !!(spec->spdif_present && spec->sense_b);
  152. snd_hda_gen_update_outputs(codec);
  153. if (spec->gpio_eapd_hp || spec->gpio_eapd_speaker) {
  154. if (spec->gen.automute_speaker)
  155. spec->gpio_data = spec->gen.hp_jack_present ?
  156. spec->gpio_eapd_hp : spec->gpio_eapd_speaker;
  157. else
  158. spec->gpio_data =
  159. spec->gpio_eapd_hp | spec->gpio_eapd_speaker;
  160. snd_hda_codec_write(codec, 0x01, 0,
  161. AC_VERB_SET_GPIO_DATA, spec->gpio_data);
  162. }
  163. }
  164. static bool is_active_pin(struct hda_codec *codec, hda_nid_t nid)
  165. {
  166. unsigned int val;
  167. val = snd_hda_codec_get_pincfg(codec, nid);
  168. return (get_defcfg_connect(val) != AC_JACK_PORT_NONE);
  169. }
  170. static void init_input_coef(struct hda_codec *codec)
  171. {
  172. struct cs_spec *spec = codec->spec;
  173. unsigned int coef;
  174. /* CS420x has multiple ADC, CS421x has single ADC */
  175. if (spec->vendor_nid == CS420X_VENDOR_NID) {
  176. coef = cs_vendor_coef_get(codec, IDX_BEEP_CFG);
  177. if (is_active_pin(codec, CS_DMIC2_PIN_NID))
  178. coef |= 1 << 4; /* DMIC2 2 chan on, GPIO1 off */
  179. if (is_active_pin(codec, CS_DMIC1_PIN_NID))
  180. coef |= 1 << 3; /* DMIC1 2 chan on, GPIO0 off
  181. * No effect if SPDIF_OUT2 is
  182. * selected in IDX_SPDIF_CTL.
  183. */
  184. cs_vendor_coef_set(codec, IDX_BEEP_CFG, coef);
  185. }
  186. }
  187. static const struct hda_verb cs_coef_init_verbs[] = {
  188. {0x11, AC_VERB_SET_PROC_STATE, 1},
  189. {0x11, AC_VERB_SET_COEF_INDEX, IDX_DAC_CFG},
  190. {0x11, AC_VERB_SET_PROC_COEF,
  191. (0x002a /* DAC1/2/3 SZCMode Soft Ramp */
  192. | 0x0040 /* Mute DACs on FIFO error */
  193. | 0x1000 /* Enable DACs High Pass Filter */
  194. | 0x0400 /* Disable Coefficient Auto increment */
  195. )},
  196. /* ADC1/2 - Digital and Analog Soft Ramp */
  197. {0x11, AC_VERB_SET_COEF_INDEX, IDX_ADC_CFG},
  198. {0x11, AC_VERB_SET_PROC_COEF, 0x000a},
  199. /* Beep */
  200. {0x11, AC_VERB_SET_COEF_INDEX, IDX_BEEP_CFG},
  201. {0x11, AC_VERB_SET_PROC_COEF, 0x0007}, /* Enable Beep thru DAC1/2/3 */
  202. {} /* terminator */
  203. };
  204. static const struct hda_verb cs4208_coef_init_verbs[] = {
  205. {0x01, AC_VERB_SET_POWER_STATE, 0x00}, /* AFG: D0 */
  206. {0x24, AC_VERB_SET_PROC_STATE, 0x01}, /* VPW: processing on */
  207. {0x24, AC_VERB_SET_COEF_INDEX, 0x0033},
  208. {0x24, AC_VERB_SET_PROC_COEF, 0x0001}, /* A1 ICS */
  209. {0x24, AC_VERB_SET_COEF_INDEX, 0x0034},
  210. {0x24, AC_VERB_SET_PROC_COEF, 0x1C01}, /* A1 Enable, A Thresh = 300mV */
  211. {} /* terminator */
  212. };
  213. /* Errata: CS4207 rev C0/C1/C2 Silicon
  214. *
  215. * http://www.cirrus.com/en/pubs/errata/ER880C3.pdf
  216. *
  217. * 6. At high temperature (TA > +85°C), the digital supply current (IVD)
  218. * may be excessive (up to an additional 200 μA), which is most easily
  219. * observed while the part is being held in reset (RESET# active low).
  220. *
  221. * Root Cause: At initial powerup of the device, the logic that drives
  222. * the clock and write enable to the S/PDIF SRC RAMs is not properly
  223. * initialized.
  224. * Certain random patterns will cause a steady leakage current in those
  225. * RAM cells. The issue will resolve once the SRCs are used (turned on).
  226. *
  227. * Workaround: The following verb sequence briefly turns on the S/PDIF SRC
  228. * blocks, which will alleviate the issue.
  229. */
  230. static const struct hda_verb cs_errata_init_verbs[] = {
  231. {0x01, AC_VERB_SET_POWER_STATE, 0x00}, /* AFG: D0 */
  232. {0x11, AC_VERB_SET_PROC_STATE, 0x01}, /* VPW: processing on */
  233. {0x11, AC_VERB_SET_COEF_INDEX, 0x0008},
  234. {0x11, AC_VERB_SET_PROC_COEF, 0x9999},
  235. {0x11, AC_VERB_SET_COEF_INDEX, 0x0017},
  236. {0x11, AC_VERB_SET_PROC_COEF, 0xa412},
  237. {0x11, AC_VERB_SET_COEF_INDEX, 0x0001},
  238. {0x11, AC_VERB_SET_PROC_COEF, 0x0009},
  239. {0x07, AC_VERB_SET_POWER_STATE, 0x00}, /* S/PDIF Rx: D0 */
  240. {0x08, AC_VERB_SET_POWER_STATE, 0x00}, /* S/PDIF Tx: D0 */
  241. {0x11, AC_VERB_SET_COEF_INDEX, 0x0017},
  242. {0x11, AC_VERB_SET_PROC_COEF, 0x2412},
  243. {0x11, AC_VERB_SET_COEF_INDEX, 0x0008},
  244. {0x11, AC_VERB_SET_PROC_COEF, 0x0000},
  245. {0x11, AC_VERB_SET_COEF_INDEX, 0x0001},
  246. {0x11, AC_VERB_SET_PROC_COEF, 0x0008},
  247. {0x11, AC_VERB_SET_PROC_STATE, 0x00},
  248. #if 0 /* Don't to set to D3 as we are in power-up sequence */
  249. {0x07, AC_VERB_SET_POWER_STATE, 0x03}, /* S/PDIF Rx: D3 */
  250. {0x08, AC_VERB_SET_POWER_STATE, 0x03}, /* S/PDIF Tx: D3 */
  251. /*{0x01, AC_VERB_SET_POWER_STATE, 0x03},*/ /* AFG: D3 This is already handled */
  252. #endif
  253. {} /* terminator */
  254. };
  255. /* SPDIF setup */
  256. static void init_digital_coef(struct hda_codec *codec)
  257. {
  258. unsigned int coef;
  259. coef = 0x0002; /* SRC_MUTE soft-mute on SPDIF (if no lock) */
  260. coef |= 0x0008; /* Replace with mute on error */
  261. if (is_active_pin(codec, CS_DIG_OUT2_PIN_NID))
  262. coef |= 0x4000; /* RX to TX1 or TX2 Loopthru / SPDIF2
  263. * SPDIF_OUT2 is shared with GPIO1 and
  264. * DMIC_SDA2.
  265. */
  266. cs_vendor_coef_set(codec, IDX_SPDIF_CTL, coef);
  267. }
  268. static int cs_init(struct hda_codec *codec)
  269. {
  270. struct cs_spec *spec = codec->spec;
  271. if (spec->vendor_nid == CS420X_VENDOR_NID) {
  272. /* init_verb sequence for C0/C1/C2 errata*/
  273. snd_hda_sequence_write(codec, cs_errata_init_verbs);
  274. snd_hda_sequence_write(codec, cs_coef_init_verbs);
  275. } else if (spec->vendor_nid == CS4208_VENDOR_NID) {
  276. snd_hda_sequence_write(codec, cs4208_coef_init_verbs);
  277. }
  278. snd_hda_gen_init(codec);
  279. if (spec->gpio_mask) {
  280. snd_hda_codec_write(codec, 0x01, 0, AC_VERB_SET_GPIO_MASK,
  281. spec->gpio_mask);
  282. snd_hda_codec_write(codec, 0x01, 0, AC_VERB_SET_GPIO_DIRECTION,
  283. spec->gpio_dir);
  284. snd_hda_codec_write(codec, 0x01, 0, AC_VERB_SET_GPIO_DATA,
  285. spec->gpio_data);
  286. }
  287. if (spec->vendor_nid == CS420X_VENDOR_NID) {
  288. init_input_coef(codec);
  289. init_digital_coef(codec);
  290. }
  291. return 0;
  292. }
  293. static int cs_build_controls(struct hda_codec *codec)
  294. {
  295. int err;
  296. err = snd_hda_gen_build_controls(codec);
  297. if (err < 0)
  298. return err;
  299. snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_BUILD);
  300. return 0;
  301. }
  302. #define cs_free snd_hda_gen_free
  303. static const struct hda_codec_ops cs_patch_ops = {
  304. .build_controls = cs_build_controls,
  305. .build_pcms = snd_hda_gen_build_pcms,
  306. .init = cs_init,
  307. .free = cs_free,
  308. .unsol_event = snd_hda_jack_unsol_event,
  309. };
  310. static int cs_parse_auto_config(struct hda_codec *codec)
  311. {
  312. struct cs_spec *spec = codec->spec;
  313. int err;
  314. int i;
  315. err = snd_hda_parse_pin_defcfg(codec, &spec->gen.autocfg, NULL, 0);
  316. if (err < 0)
  317. return err;
  318. err = snd_hda_gen_parse_auto_config(codec, &spec->gen.autocfg);
  319. if (err < 0)
  320. return err;
  321. /* keep the ADCs powered up when it's dynamically switchable */
  322. if (spec->gen.dyn_adc_switch) {
  323. unsigned int done = 0;
  324. for (i = 0; i < spec->gen.input_mux.num_items; i++) {
  325. int idx = spec->gen.dyn_adc_idx[i];
  326. if (done & (1 << idx))
  327. continue;
  328. snd_hda_gen_fix_pin_power(codec,
  329. spec->gen.adc_nids[idx]);
  330. done |= 1 << idx;
  331. }
  332. }
  333. return 0;
  334. }
  335. static const struct hda_model_fixup cs420x_models[] = {
  336. { .id = CS420X_MBP53, .name = "mbp53" },
  337. { .id = CS420X_MBP55, .name = "mbp55" },
  338. { .id = CS420X_IMAC27, .name = "imac27" },
  339. { .id = CS420X_IMAC27_122, .name = "imac27_122" },
  340. { .id = CS420X_APPLE, .name = "apple" },
  341. { .id = CS420X_MBP101, .name = "mbp101" },
  342. { .id = CS420X_MBP81, .name = "mbp81" },
  343. { .id = CS420X_MBA42, .name = "mba42" },
  344. {}
  345. };
  346. static const struct snd_pci_quirk cs420x_fixup_tbl[] = {
  347. SND_PCI_QUIRK(0x10de, 0x0ac0, "MacBookPro 5,3", CS420X_MBP53),
  348. SND_PCI_QUIRK(0x10de, 0x0d94, "MacBookAir 3,1(2)", CS420X_MBP55),
  349. SND_PCI_QUIRK(0x10de, 0xcb79, "MacBookPro 5,5", CS420X_MBP55),
  350. SND_PCI_QUIRK(0x10de, 0xcb89, "MacBookPro 7,1", CS420X_MBP55),
  351. /* this conflicts with too many other models */
  352. /*SND_PCI_QUIRK(0x8086, 0x7270, "IMac 27 Inch", CS420X_IMAC27),*/
  353. /* codec SSID */
  354. SND_PCI_QUIRK(0x106b, 0x0600, "iMac 14,1", CS420X_IMAC27_122),
  355. SND_PCI_QUIRK(0x106b, 0x1c00, "MacBookPro 8,1", CS420X_MBP81),
  356. SND_PCI_QUIRK(0x106b, 0x2000, "iMac 12,2", CS420X_IMAC27_122),
  357. SND_PCI_QUIRK(0x106b, 0x2800, "MacBookPro 10,1", CS420X_MBP101),
  358. SND_PCI_QUIRK(0x106b, 0x5600, "MacBookAir 5,2", CS420X_MBP81),
  359. SND_PCI_QUIRK(0x106b, 0x5b00, "MacBookAir 4,2", CS420X_MBA42),
  360. SND_PCI_QUIRK_VENDOR(0x106b, "Apple", CS420X_APPLE),
  361. {} /* terminator */
  362. };
  363. static const struct hda_pintbl mbp53_pincfgs[] = {
  364. { 0x09, 0x012b4050 },
  365. { 0x0a, 0x90100141 },
  366. { 0x0b, 0x90100140 },
  367. { 0x0c, 0x018b3020 },
  368. { 0x0d, 0x90a00110 },
  369. { 0x0e, 0x400000f0 },
  370. { 0x0f, 0x01cbe030 },
  371. { 0x10, 0x014be060 },
  372. { 0x12, 0x400000f0 },
  373. { 0x15, 0x400000f0 },
  374. {} /* terminator */
  375. };
  376. static const struct hda_pintbl mbp55_pincfgs[] = {
  377. { 0x09, 0x012b4030 },
  378. { 0x0a, 0x90100121 },
  379. { 0x0b, 0x90100120 },
  380. { 0x0c, 0x400000f0 },
  381. { 0x0d, 0x90a00110 },
  382. { 0x0e, 0x400000f0 },
  383. { 0x0f, 0x400000f0 },
  384. { 0x10, 0x014be040 },
  385. { 0x12, 0x400000f0 },
  386. { 0x15, 0x400000f0 },
  387. {} /* terminator */
  388. };
  389. static const struct hda_pintbl imac27_pincfgs[] = {
  390. { 0x09, 0x012b4050 },
  391. { 0x0a, 0x90100140 },
  392. { 0x0b, 0x90100142 },
  393. { 0x0c, 0x018b3020 },
  394. { 0x0d, 0x90a00110 },
  395. { 0x0e, 0x400000f0 },
  396. { 0x0f, 0x01cbe030 },
  397. { 0x10, 0x014be060 },
  398. { 0x12, 0x01ab9070 },
  399. { 0x15, 0x400000f0 },
  400. {} /* terminator */
  401. };
  402. static const struct hda_pintbl mbp101_pincfgs[] = {
  403. { 0x0d, 0x40ab90f0 },
  404. { 0x0e, 0x90a600f0 },
  405. { 0x12, 0x50a600f0 },
  406. {} /* terminator */
  407. };
  408. static const struct hda_pintbl mba42_pincfgs[] = {
  409. { 0x09, 0x012b4030 }, /* HP */
  410. { 0x0a, 0x400000f0 },
  411. { 0x0b, 0x90100120 }, /* speaker */
  412. { 0x0c, 0x400000f0 },
  413. { 0x0d, 0x90a00110 }, /* mic */
  414. { 0x0e, 0x400000f0 },
  415. { 0x0f, 0x400000f0 },
  416. { 0x10, 0x400000f0 },
  417. { 0x12, 0x400000f0 },
  418. { 0x15, 0x400000f0 },
  419. {} /* terminator */
  420. };
  421. static const struct hda_pintbl mba6_pincfgs[] = {
  422. { 0x10, 0x032120f0 }, /* HP */
  423. { 0x11, 0x500000f0 },
  424. { 0x12, 0x90100010 }, /* Speaker */
  425. { 0x13, 0x500000f0 },
  426. { 0x14, 0x500000f0 },
  427. { 0x15, 0x770000f0 },
  428. { 0x16, 0x770000f0 },
  429. { 0x17, 0x430000f0 },
  430. { 0x18, 0x43ab9030 }, /* Mic */
  431. { 0x19, 0x770000f0 },
  432. { 0x1a, 0x770000f0 },
  433. { 0x1b, 0x770000f0 },
  434. { 0x1c, 0x90a00090 },
  435. { 0x1d, 0x500000f0 },
  436. { 0x1e, 0x500000f0 },
  437. { 0x1f, 0x500000f0 },
  438. { 0x20, 0x500000f0 },
  439. { 0x21, 0x430000f0 },
  440. { 0x22, 0x430000f0 },
  441. {} /* terminator */
  442. };
  443. static void cs420x_fixup_gpio_13(struct hda_codec *codec,
  444. const struct hda_fixup *fix, int action)
  445. {
  446. if (action == HDA_FIXUP_ACT_PRE_PROBE) {
  447. struct cs_spec *spec = codec->spec;
  448. spec->gpio_eapd_hp = 2; /* GPIO1 = headphones */
  449. spec->gpio_eapd_speaker = 8; /* GPIO3 = speakers */
  450. spec->gpio_mask = spec->gpio_dir =
  451. spec->gpio_eapd_hp | spec->gpio_eapd_speaker;
  452. }
  453. }
  454. static void cs420x_fixup_gpio_23(struct hda_codec *codec,
  455. const struct hda_fixup *fix, int action)
  456. {
  457. if (action == HDA_FIXUP_ACT_PRE_PROBE) {
  458. struct cs_spec *spec = codec->spec;
  459. spec->gpio_eapd_hp = 4; /* GPIO2 = headphones */
  460. spec->gpio_eapd_speaker = 8; /* GPIO3 = speakers */
  461. spec->gpio_mask = spec->gpio_dir =
  462. spec->gpio_eapd_hp | spec->gpio_eapd_speaker;
  463. }
  464. }
  465. static const struct hda_fixup cs420x_fixups[] = {
  466. [CS420X_MBP53] = {
  467. .type = HDA_FIXUP_PINS,
  468. .v.pins = mbp53_pincfgs,
  469. .chained = true,
  470. .chain_id = CS420X_APPLE,
  471. },
  472. [CS420X_MBP55] = {
  473. .type = HDA_FIXUP_PINS,
  474. .v.pins = mbp55_pincfgs,
  475. .chained = true,
  476. .chain_id = CS420X_GPIO_13,
  477. },
  478. [CS420X_IMAC27] = {
  479. .type = HDA_FIXUP_PINS,
  480. .v.pins = imac27_pincfgs,
  481. .chained = true,
  482. .chain_id = CS420X_GPIO_13,
  483. },
  484. [CS420X_GPIO_13] = {
  485. .type = HDA_FIXUP_FUNC,
  486. .v.func = cs420x_fixup_gpio_13,
  487. },
  488. [CS420X_GPIO_23] = {
  489. .type = HDA_FIXUP_FUNC,
  490. .v.func = cs420x_fixup_gpio_23,
  491. },
  492. [CS420X_MBP101] = {
  493. .type = HDA_FIXUP_PINS,
  494. .v.pins = mbp101_pincfgs,
  495. .chained = true,
  496. .chain_id = CS420X_GPIO_13,
  497. },
  498. [CS420X_MBP81] = {
  499. .type = HDA_FIXUP_VERBS,
  500. .v.verbs = (const struct hda_verb[]) {
  501. /* internal mic ADC2: right only, single ended */
  502. {0x11, AC_VERB_SET_COEF_INDEX, IDX_ADC_CFG},
  503. {0x11, AC_VERB_SET_PROC_COEF, 0x102a},
  504. {}
  505. },
  506. .chained = true,
  507. .chain_id = CS420X_GPIO_13,
  508. },
  509. [CS420X_MBA42] = {
  510. .type = HDA_FIXUP_PINS,
  511. .v.pins = mba42_pincfgs,
  512. .chained = true,
  513. .chain_id = CS420X_GPIO_13,
  514. },
  515. };
  516. static struct cs_spec *cs_alloc_spec(struct hda_codec *codec, int vendor_nid)
  517. {
  518. struct cs_spec *spec;
  519. spec = kzalloc(sizeof(*spec), GFP_KERNEL);
  520. if (!spec)
  521. return NULL;
  522. codec->spec = spec;
  523. spec->vendor_nid = vendor_nid;
  524. codec->power_save_node = 1;
  525. snd_hda_gen_spec_init(&spec->gen);
  526. return spec;
  527. }
  528. static int patch_cs420x(struct hda_codec *codec)
  529. {
  530. struct cs_spec *spec;
  531. int err;
  532. spec = cs_alloc_spec(codec, CS420X_VENDOR_NID);
  533. if (!spec)
  534. return -ENOMEM;
  535. codec->patch_ops = cs_patch_ops;
  536. spec->gen.automute_hook = cs_automute;
  537. codec->single_adc_amp = 1;
  538. snd_hda_pick_fixup(codec, cs420x_models, cs420x_fixup_tbl,
  539. cs420x_fixups);
  540. snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
  541. err = cs_parse_auto_config(codec);
  542. if (err < 0)
  543. goto error;
  544. snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
  545. return 0;
  546. error:
  547. cs_free(codec);
  548. return err;
  549. }
  550. /*
  551. * CS4208 support:
  552. * Its layout is no longer compatible with CS4206/CS4207
  553. */
  554. enum {
  555. CS4208_MAC_AUTO,
  556. CS4208_MBA6,
  557. CS4208_MBP11,
  558. CS4208_MACMINI,
  559. CS4208_GPIO0,
  560. };
  561. static const struct hda_model_fixup cs4208_models[] = {
  562. { .id = CS4208_GPIO0, .name = "gpio0" },
  563. { .id = CS4208_MBA6, .name = "mba6" },
  564. { .id = CS4208_MBP11, .name = "mbp11" },
  565. { .id = CS4208_MACMINI, .name = "macmini" },
  566. {}
  567. };
  568. static const struct snd_pci_quirk cs4208_fixup_tbl[] = {
  569. SND_PCI_QUIRK_VENDOR(0x106b, "Apple", CS4208_MAC_AUTO),
  570. {} /* terminator */
  571. };
  572. /* codec SSID matching */
  573. static const struct snd_pci_quirk cs4208_mac_fixup_tbl[] = {
  574. SND_PCI_QUIRK(0x106b, 0x5e00, "MacBookPro 11,2", CS4208_MBP11),
  575. SND_PCI_QUIRK(0x106b, 0x6c00, "MacMini 7,1", CS4208_MACMINI),
  576. SND_PCI_QUIRK(0x106b, 0x7100, "MacBookAir 6,1", CS4208_MBA6),
  577. SND_PCI_QUIRK(0x106b, 0x7200, "MacBookAir 6,2", CS4208_MBA6),
  578. SND_PCI_QUIRK(0x106b, 0x7b00, "MacBookPro 12,1", CS4208_MBP11),
  579. {} /* terminator */
  580. };
  581. static void cs4208_fixup_gpio0(struct hda_codec *codec,
  582. const struct hda_fixup *fix, int action)
  583. {
  584. if (action == HDA_FIXUP_ACT_PRE_PROBE) {
  585. struct cs_spec *spec = codec->spec;
  586. spec->gpio_eapd_hp = 0;
  587. spec->gpio_eapd_speaker = 1;
  588. spec->gpio_mask = spec->gpio_dir =
  589. spec->gpio_eapd_hp | spec->gpio_eapd_speaker;
  590. }
  591. }
  592. static const struct hda_fixup cs4208_fixups[];
  593. /* remap the fixup from codec SSID and apply it */
  594. static void cs4208_fixup_mac(struct hda_codec *codec,
  595. const struct hda_fixup *fix, int action)
  596. {
  597. if (action != HDA_FIXUP_ACT_PRE_PROBE)
  598. return;
  599. codec->fixup_id = HDA_FIXUP_ID_NOT_SET;
  600. snd_hda_pick_fixup(codec, NULL, cs4208_mac_fixup_tbl, cs4208_fixups);
  601. if (codec->fixup_id == HDA_FIXUP_ID_NOT_SET)
  602. codec->fixup_id = CS4208_GPIO0; /* default fixup */
  603. snd_hda_apply_fixup(codec, action);
  604. }
  605. /* MacMini 7,1 has the inverted jack detection */
  606. static void cs4208_fixup_macmini(struct hda_codec *codec,
  607. const struct hda_fixup *fix, int action)
  608. {
  609. static const struct hda_pintbl pincfgs[] = {
  610. { 0x18, 0x00ab9150 }, /* mic (audio-in) jack: disable detect */
  611. { 0x21, 0x004be140 }, /* SPDIF: disable detect */
  612. { }
  613. };
  614. if (action == HDA_FIXUP_ACT_PRE_PROBE) {
  615. /* HP pin (0x10) has an inverted detection */
  616. codec->inv_jack_detect = 1;
  617. /* disable the bogus Mic and SPDIF jack detections */
  618. snd_hda_apply_pincfgs(codec, pincfgs);
  619. }
  620. }
  621. static int cs4208_spdif_sw_put(struct snd_kcontrol *kcontrol,
  622. struct snd_ctl_elem_value *ucontrol)
  623. {
  624. struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
  625. struct cs_spec *spec = codec->spec;
  626. hda_nid_t pin = spec->gen.autocfg.dig_out_pins[0];
  627. int pinctl = ucontrol->value.integer.value[0] ? PIN_OUT : 0;
  628. snd_hda_set_pin_ctl_cache(codec, pin, pinctl);
  629. return spec->spdif_sw_put(kcontrol, ucontrol);
  630. }
  631. /* hook the SPDIF switch */
  632. static void cs4208_fixup_spdif_switch(struct hda_codec *codec,
  633. const struct hda_fixup *fix, int action)
  634. {
  635. if (action == HDA_FIXUP_ACT_BUILD) {
  636. struct cs_spec *spec = codec->spec;
  637. struct snd_kcontrol *kctl;
  638. if (!spec->gen.autocfg.dig_out_pins[0])
  639. return;
  640. kctl = snd_hda_find_mixer_ctl(codec, "IEC958 Playback Switch");
  641. if (!kctl)
  642. return;
  643. spec->spdif_sw_put = kctl->put;
  644. kctl->put = cs4208_spdif_sw_put;
  645. }
  646. }
  647. static const struct hda_fixup cs4208_fixups[] = {
  648. [CS4208_MBA6] = {
  649. .type = HDA_FIXUP_PINS,
  650. .v.pins = mba6_pincfgs,
  651. .chained = true,
  652. .chain_id = CS4208_GPIO0,
  653. },
  654. [CS4208_MBP11] = {
  655. .type = HDA_FIXUP_FUNC,
  656. .v.func = cs4208_fixup_spdif_switch,
  657. .chained = true,
  658. .chain_id = CS4208_GPIO0,
  659. },
  660. [CS4208_MACMINI] = {
  661. .type = HDA_FIXUP_FUNC,
  662. .v.func = cs4208_fixup_macmini,
  663. .chained = true,
  664. .chain_id = CS4208_GPIO0,
  665. },
  666. [CS4208_GPIO0] = {
  667. .type = HDA_FIXUP_FUNC,
  668. .v.func = cs4208_fixup_gpio0,
  669. },
  670. [CS4208_MAC_AUTO] = {
  671. .type = HDA_FIXUP_FUNC,
  672. .v.func = cs4208_fixup_mac,
  673. },
  674. };
  675. /* correct the 0dB offset of input pins */
  676. static void cs4208_fix_amp_caps(struct hda_codec *codec, hda_nid_t adc)
  677. {
  678. unsigned int caps;
  679. caps = query_amp_caps(codec, adc, HDA_INPUT);
  680. caps &= ~(AC_AMPCAP_OFFSET);
  681. caps |= 0x02;
  682. snd_hda_override_amp_caps(codec, adc, HDA_INPUT, caps);
  683. }
  684. static int patch_cs4208(struct hda_codec *codec)
  685. {
  686. struct cs_spec *spec;
  687. int err;
  688. spec = cs_alloc_spec(codec, CS4208_VENDOR_NID);
  689. if (!spec)
  690. return -ENOMEM;
  691. codec->patch_ops = cs_patch_ops;
  692. spec->gen.automute_hook = cs_automute;
  693. /* exclude NID 0x10 (HP) from output volumes due to different steps */
  694. spec->gen.out_vol_mask = 1ULL << 0x10;
  695. snd_hda_pick_fixup(codec, cs4208_models, cs4208_fixup_tbl,
  696. cs4208_fixups);
  697. snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
  698. snd_hda_override_wcaps(codec, 0x18,
  699. get_wcaps(codec, 0x18) | AC_WCAP_STEREO);
  700. cs4208_fix_amp_caps(codec, 0x18);
  701. cs4208_fix_amp_caps(codec, 0x1b);
  702. cs4208_fix_amp_caps(codec, 0x1c);
  703. err = cs_parse_auto_config(codec);
  704. if (err < 0)
  705. goto error;
  706. snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
  707. return 0;
  708. error:
  709. cs_free(codec);
  710. return err;
  711. }
  712. /*
  713. * Cirrus Logic CS4210
  714. *
  715. * 1 DAC => HP(sense) / Speakers,
  716. * 1 ADC <= LineIn(sense) / MicIn / DMicIn,
  717. * 1 SPDIF OUT => SPDIF Trasmitter(sense)
  718. */
  719. /* CS4210 board names */
  720. static const struct hda_model_fixup cs421x_models[] = {
  721. { .id = CS421X_CDB4210, .name = "cdb4210" },
  722. { .id = CS421X_STUMPY, .name = "stumpy" },
  723. {}
  724. };
  725. static const struct snd_pci_quirk cs421x_fixup_tbl[] = {
  726. /* Test Intel board + CDB2410 */
  727. SND_PCI_QUIRK(0x8086, 0x5001, "DP45SG/CDB4210", CS421X_CDB4210),
  728. {} /* terminator */
  729. };
  730. /* CS4210 board pinconfigs */
  731. /* Default CS4210 (CDB4210)*/
  732. static const struct hda_pintbl cdb4210_pincfgs[] = {
  733. { 0x05, 0x0321401f },
  734. { 0x06, 0x90170010 },
  735. { 0x07, 0x03813031 },
  736. { 0x08, 0xb7a70037 },
  737. { 0x09, 0xb7a6003e },
  738. { 0x0a, 0x034510f0 },
  739. {} /* terminator */
  740. };
  741. /* Stumpy ChromeBox */
  742. static const struct hda_pintbl stumpy_pincfgs[] = {
  743. { 0x05, 0x022120f0 },
  744. { 0x06, 0x901700f0 },
  745. { 0x07, 0x02a120f0 },
  746. { 0x08, 0x77a70037 },
  747. { 0x09, 0x77a6003e },
  748. { 0x0a, 0x434510f0 },
  749. {} /* terminator */
  750. };
  751. /* Setup GPIO/SENSE for each board (if used) */
  752. static void cs421x_fixup_sense_b(struct hda_codec *codec,
  753. const struct hda_fixup *fix, int action)
  754. {
  755. struct cs_spec *spec = codec->spec;
  756. if (action == HDA_FIXUP_ACT_PRE_PROBE)
  757. spec->sense_b = 1;
  758. }
  759. static const struct hda_fixup cs421x_fixups[] = {
  760. [CS421X_CDB4210] = {
  761. .type = HDA_FIXUP_PINS,
  762. .v.pins = cdb4210_pincfgs,
  763. .chained = true,
  764. .chain_id = CS421X_SENSE_B,
  765. },
  766. [CS421X_SENSE_B] = {
  767. .type = HDA_FIXUP_FUNC,
  768. .v.func = cs421x_fixup_sense_b,
  769. },
  770. [CS421X_STUMPY] = {
  771. .type = HDA_FIXUP_PINS,
  772. .v.pins = stumpy_pincfgs,
  773. },
  774. };
  775. static const struct hda_verb cs421x_coef_init_verbs[] = {
  776. {0x0B, AC_VERB_SET_PROC_STATE, 1},
  777. {0x0B, AC_VERB_SET_COEF_INDEX, CS421X_IDX_DEV_CFG},
  778. /*
  779. Disable Coefficient Index Auto-Increment(DAI)=1,
  780. PDREF=0
  781. */
  782. {0x0B, AC_VERB_SET_PROC_COEF, 0x0001 },
  783. {0x0B, AC_VERB_SET_COEF_INDEX, CS421X_IDX_ADC_CFG},
  784. /* ADC SZCMode = Digital Soft Ramp */
  785. {0x0B, AC_VERB_SET_PROC_COEF, 0x0002 },
  786. {0x0B, AC_VERB_SET_COEF_INDEX, CS421X_IDX_DAC_CFG},
  787. {0x0B, AC_VERB_SET_PROC_COEF,
  788. (0x0002 /* DAC SZCMode = Digital Soft Ramp */
  789. | 0x0004 /* Mute DAC on FIFO error */
  790. | 0x0008 /* Enable DAC High Pass Filter */
  791. )},
  792. {} /* terminator */
  793. };
  794. /* Errata: CS4210 rev A1 Silicon
  795. *
  796. * http://www.cirrus.com/en/pubs/errata/
  797. *
  798. * Description:
  799. * 1. Performance degredation is present in the ADC.
  800. * 2. Speaker output is not completely muted upon HP detect.
  801. * 3. Noise is present when clipping occurs on the amplified
  802. * speaker outputs.
  803. *
  804. * Workaround:
  805. * The following verb sequence written to the registers during
  806. * initialization will correct the issues listed above.
  807. */
  808. static const struct hda_verb cs421x_coef_init_verbs_A1_silicon_fixes[] = {
  809. {0x0B, AC_VERB_SET_PROC_STATE, 0x01}, /* VPW: processing on */
  810. {0x0B, AC_VERB_SET_COEF_INDEX, 0x0006},
  811. {0x0B, AC_VERB_SET_PROC_COEF, 0x9999}, /* Test mode: on */
  812. {0x0B, AC_VERB_SET_COEF_INDEX, 0x000A},
  813. {0x0B, AC_VERB_SET_PROC_COEF, 0x14CB}, /* Chop double */
  814. {0x0B, AC_VERB_SET_COEF_INDEX, 0x0011},
  815. {0x0B, AC_VERB_SET_PROC_COEF, 0xA2D0}, /* Increase ADC current */
  816. {0x0B, AC_VERB_SET_COEF_INDEX, 0x001A},
  817. {0x0B, AC_VERB_SET_PROC_COEF, 0x02A9}, /* Mute speaker */
  818. {0x0B, AC_VERB_SET_COEF_INDEX, 0x001B},
  819. {0x0B, AC_VERB_SET_PROC_COEF, 0X1006}, /* Remove noise */
  820. {} /* terminator */
  821. };
  822. /* Speaker Amp Gain is controlled by the vendor widget's coef 4 */
  823. static const DECLARE_TLV_DB_SCALE(cs421x_speaker_boost_db_scale, 900, 300, 0);
  824. static int cs421x_boost_vol_info(struct snd_kcontrol *kcontrol,
  825. struct snd_ctl_elem_info *uinfo)
  826. {
  827. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  828. uinfo->count = 1;
  829. uinfo->value.integer.min = 0;
  830. uinfo->value.integer.max = 3;
  831. return 0;
  832. }
  833. static int cs421x_boost_vol_get(struct snd_kcontrol *kcontrol,
  834. struct snd_ctl_elem_value *ucontrol)
  835. {
  836. struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
  837. ucontrol->value.integer.value[0] =
  838. cs_vendor_coef_get(codec, CS421X_IDX_SPK_CTL) & 0x0003;
  839. return 0;
  840. }
  841. static int cs421x_boost_vol_put(struct snd_kcontrol *kcontrol,
  842. struct snd_ctl_elem_value *ucontrol)
  843. {
  844. struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
  845. unsigned int vol = ucontrol->value.integer.value[0];
  846. unsigned int coef =
  847. cs_vendor_coef_get(codec, CS421X_IDX_SPK_CTL);
  848. unsigned int original_coef = coef;
  849. coef &= ~0x0003;
  850. coef |= (vol & 0x0003);
  851. if (original_coef == coef)
  852. return 0;
  853. else {
  854. cs_vendor_coef_set(codec, CS421X_IDX_SPK_CTL, coef);
  855. return 1;
  856. }
  857. }
  858. static const struct snd_kcontrol_new cs421x_speaker_boost_ctl = {
  859. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  860. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  861. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  862. .name = "Speaker Boost Playback Volume",
  863. .info = cs421x_boost_vol_info,
  864. .get = cs421x_boost_vol_get,
  865. .put = cs421x_boost_vol_put,
  866. .tlv = { .p = cs421x_speaker_boost_db_scale },
  867. };
  868. static void cs4210_pinmux_init(struct hda_codec *codec)
  869. {
  870. struct cs_spec *spec = codec->spec;
  871. unsigned int def_conf, coef;
  872. /* GPIO, DMIC_SCL, DMIC_SDA and SENSE_B are multiplexed */
  873. coef = cs_vendor_coef_get(codec, CS421X_IDX_DEV_CFG);
  874. if (spec->gpio_mask)
  875. coef |= 0x0008; /* B1,B2 are GPIOs */
  876. else
  877. coef &= ~0x0008;
  878. if (spec->sense_b)
  879. coef |= 0x0010; /* B2 is SENSE_B, not inverted */
  880. else
  881. coef &= ~0x0010;
  882. cs_vendor_coef_set(codec, CS421X_IDX_DEV_CFG, coef);
  883. if ((spec->gpio_mask || spec->sense_b) &&
  884. is_active_pin(codec, CS421X_DMIC_PIN_NID)) {
  885. /*
  886. GPIO or SENSE_B forced - disconnect the DMIC pin.
  887. */
  888. def_conf = snd_hda_codec_get_pincfg(codec, CS421X_DMIC_PIN_NID);
  889. def_conf &= ~AC_DEFCFG_PORT_CONN;
  890. def_conf |= (AC_JACK_PORT_NONE << AC_DEFCFG_PORT_CONN_SHIFT);
  891. snd_hda_codec_set_pincfg(codec, CS421X_DMIC_PIN_NID, def_conf);
  892. }
  893. }
  894. static void cs4210_spdif_automute(struct hda_codec *codec,
  895. struct hda_jack_callback *tbl)
  896. {
  897. struct cs_spec *spec = codec->spec;
  898. bool spdif_present = false;
  899. hda_nid_t spdif_pin = spec->gen.autocfg.dig_out_pins[0];
  900. /* detect on spdif is specific to CS4210 */
  901. if (!spec->spdif_detect ||
  902. spec->vendor_nid != CS4210_VENDOR_NID)
  903. return;
  904. spdif_present = snd_hda_jack_detect(codec, spdif_pin);
  905. if (spdif_present == spec->spdif_present)
  906. return;
  907. spec->spdif_present = spdif_present;
  908. /* SPDIF TX on/off */
  909. snd_hda_set_pin_ctl(codec, spdif_pin, spdif_present ? PIN_OUT : 0);
  910. cs_automute(codec);
  911. }
  912. static void parse_cs421x_digital(struct hda_codec *codec)
  913. {
  914. struct cs_spec *spec = codec->spec;
  915. struct auto_pin_cfg *cfg = &spec->gen.autocfg;
  916. int i;
  917. for (i = 0; i < cfg->dig_outs; i++) {
  918. hda_nid_t nid = cfg->dig_out_pins[i];
  919. if (get_wcaps(codec, nid) & AC_WCAP_UNSOL_CAP) {
  920. spec->spdif_detect = 1;
  921. snd_hda_jack_detect_enable_callback(codec, nid,
  922. cs4210_spdif_automute);
  923. }
  924. }
  925. }
  926. static int cs421x_init(struct hda_codec *codec)
  927. {
  928. struct cs_spec *spec = codec->spec;
  929. if (spec->vendor_nid == CS4210_VENDOR_NID) {
  930. snd_hda_sequence_write(codec, cs421x_coef_init_verbs);
  931. snd_hda_sequence_write(codec, cs421x_coef_init_verbs_A1_silicon_fixes);
  932. cs4210_pinmux_init(codec);
  933. }
  934. snd_hda_gen_init(codec);
  935. if (spec->gpio_mask) {
  936. snd_hda_codec_write(codec, 0x01, 0, AC_VERB_SET_GPIO_MASK,
  937. spec->gpio_mask);
  938. snd_hda_codec_write(codec, 0x01, 0, AC_VERB_SET_GPIO_DIRECTION,
  939. spec->gpio_dir);
  940. snd_hda_codec_write(codec, 0x01, 0, AC_VERB_SET_GPIO_DATA,
  941. spec->gpio_data);
  942. }
  943. init_input_coef(codec);
  944. cs4210_spdif_automute(codec, NULL);
  945. return 0;
  946. }
  947. static int cs421x_build_controls(struct hda_codec *codec)
  948. {
  949. struct cs_spec *spec = codec->spec;
  950. int err;
  951. err = snd_hda_gen_build_controls(codec);
  952. if (err < 0)
  953. return err;
  954. if (spec->gen.autocfg.speaker_outs &&
  955. spec->vendor_nid == CS4210_VENDOR_NID) {
  956. err = snd_hda_ctl_add(codec, 0,
  957. snd_ctl_new1(&cs421x_speaker_boost_ctl, codec));
  958. if (err < 0)
  959. return err;
  960. }
  961. return 0;
  962. }
  963. static void fix_volume_caps(struct hda_codec *codec, hda_nid_t dac)
  964. {
  965. unsigned int caps;
  966. /* set the upper-limit for mixer amp to 0dB */
  967. caps = query_amp_caps(codec, dac, HDA_OUTPUT);
  968. caps &= ~(0x7f << AC_AMPCAP_NUM_STEPS_SHIFT);
  969. caps |= ((caps >> AC_AMPCAP_OFFSET_SHIFT) & 0x7f)
  970. << AC_AMPCAP_NUM_STEPS_SHIFT;
  971. snd_hda_override_amp_caps(codec, dac, HDA_OUTPUT, caps);
  972. }
  973. static int cs421x_parse_auto_config(struct hda_codec *codec)
  974. {
  975. struct cs_spec *spec = codec->spec;
  976. hda_nid_t dac = CS4210_DAC_NID;
  977. int err;
  978. fix_volume_caps(codec, dac);
  979. err = snd_hda_parse_pin_defcfg(codec, &spec->gen.autocfg, NULL, 0);
  980. if (err < 0)
  981. return err;
  982. err = snd_hda_gen_parse_auto_config(codec, &spec->gen.autocfg);
  983. if (err < 0)
  984. return err;
  985. parse_cs421x_digital(codec);
  986. return 0;
  987. }
  988. #ifdef CONFIG_PM
  989. /*
  990. Manage PDREF, when transitioning to D3hot
  991. (DAC,ADC) -> D3, PDREF=1, AFG->D3
  992. */
  993. static int cs421x_suspend(struct hda_codec *codec)
  994. {
  995. struct cs_spec *spec = codec->spec;
  996. unsigned int coef;
  997. snd_hda_shutup_pins(codec);
  998. snd_hda_codec_write(codec, CS4210_DAC_NID, 0,
  999. AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
  1000. snd_hda_codec_write(codec, CS4210_ADC_NID, 0,
  1001. AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
  1002. if (spec->vendor_nid == CS4210_VENDOR_NID) {
  1003. coef = cs_vendor_coef_get(codec, CS421X_IDX_DEV_CFG);
  1004. coef |= 0x0004; /* PDREF */
  1005. cs_vendor_coef_set(codec, CS421X_IDX_DEV_CFG, coef);
  1006. }
  1007. return 0;
  1008. }
  1009. #endif
  1010. static const struct hda_codec_ops cs421x_patch_ops = {
  1011. .build_controls = cs421x_build_controls,
  1012. .build_pcms = snd_hda_gen_build_pcms,
  1013. .init = cs421x_init,
  1014. .free = cs_free,
  1015. .unsol_event = snd_hda_jack_unsol_event,
  1016. #ifdef CONFIG_PM
  1017. .suspend = cs421x_suspend,
  1018. #endif
  1019. };
  1020. static int patch_cs4210(struct hda_codec *codec)
  1021. {
  1022. struct cs_spec *spec;
  1023. int err;
  1024. spec = cs_alloc_spec(codec, CS4210_VENDOR_NID);
  1025. if (!spec)
  1026. return -ENOMEM;
  1027. codec->patch_ops = cs421x_patch_ops;
  1028. spec->gen.automute_hook = cs_automute;
  1029. snd_hda_pick_fixup(codec, cs421x_models, cs421x_fixup_tbl,
  1030. cs421x_fixups);
  1031. snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
  1032. /*
  1033. Update the GPIO/DMIC/SENSE_B pinmux before the configuration
  1034. is auto-parsed. If GPIO or SENSE_B is forced, DMIC input
  1035. is disabled.
  1036. */
  1037. cs4210_pinmux_init(codec);
  1038. err = cs421x_parse_auto_config(codec);
  1039. if (err < 0)
  1040. goto error;
  1041. snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
  1042. return 0;
  1043. error:
  1044. cs_free(codec);
  1045. return err;
  1046. }
  1047. static int patch_cs4213(struct hda_codec *codec)
  1048. {
  1049. struct cs_spec *spec;
  1050. int err;
  1051. spec = cs_alloc_spec(codec, CS4213_VENDOR_NID);
  1052. if (!spec)
  1053. return -ENOMEM;
  1054. codec->patch_ops = cs421x_patch_ops;
  1055. err = cs421x_parse_auto_config(codec);
  1056. if (err < 0)
  1057. goto error;
  1058. return 0;
  1059. error:
  1060. cs_free(codec);
  1061. return err;
  1062. }
  1063. /*
  1064. * patch entries
  1065. */
  1066. static const struct hda_device_id snd_hda_id_cirrus[] = {
  1067. HDA_CODEC_ENTRY(0x10134206, "CS4206", patch_cs420x),
  1068. HDA_CODEC_ENTRY(0x10134207, "CS4207", patch_cs420x),
  1069. HDA_CODEC_ENTRY(0x10134208, "CS4208", patch_cs4208),
  1070. HDA_CODEC_ENTRY(0x10134210, "CS4210", patch_cs4210),
  1071. HDA_CODEC_ENTRY(0x10134213, "CS4213", patch_cs4213),
  1072. {} /* terminator */
  1073. };
  1074. MODULE_DEVICE_TABLE(hdaudio, snd_hda_id_cirrus);
  1075. MODULE_LICENSE("GPL");
  1076. MODULE_DESCRIPTION("Cirrus Logic HD-audio codec");
  1077. static struct hda_codec_driver cirrus_driver = {
  1078. .id = snd_hda_id_cirrus,
  1079. };
  1080. module_hda_codec_driver(cirrus_driver);